JP2004023117A - Serial communication apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a serial communication apparatus wherein an address of each slave terminal can easily be set almost without a cost increase and a master terminal and each slave terminal can recognize the set addresses. <P>SOLUTION: Master units 21S1 to 21S3 acting like slave terminals are connected to a master unit 21M acting like a master terminal by serial communication lines 51. The master units 21S1 to 21S3 determine their own addresses according to the way of entering (entering or not entering) request signals outputted from request signal output terminals S114, S214, S314 to request signal input terminals S115 to S117, S215 to S217, S315 to S317. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a serial communication device in which a master terminal and a plurality of slave terminals are connected by a serial communication line. In particular, the address of each slave terminal can be easily set, and the address is set by both the master terminal and each slave terminal. The present invention relates to a serial communication device capable of recognizing an assigned address.
[0002]
[Prior art]
There is a wireless intercom system including a main device, a master device connected to the main device, and a slave device that transmits and receives data to and from the master device by radio. In the wireless intercom system, in order to increase the number of slave units, it is necessary to increase the number of master units. When a plurality of master units are connected to the master unit, one master unit is used as the master terminal connected to the master unit, the remaining master units are used as slave terminals, and the master unit of the master terminal and the master unit of each slave terminal are connected. It is conceivable to connect by serial communication line.
[0003]
As described above, when the master terminal and each slave terminal are connected by the serial communication line, it is necessary to set an address for each slave terminal. As a conventional address setting method, there is a method in which a setting switch such as a dip switch is provided in each slave terminal and setting is performed using the setting switch, a method in which a ROM storing an address is mounted in each slave terminal, and the like.
[0004]
[Problems to be solved by the invention]
The method of setting the address by the setting switch has a problem that the cost is increased and a setting error easily occurs. The method using a ROM in which addresses are stored has a problem that the cost is increased and that the address cannot be changed.
[0005]
The present invention has been made in view of such a problem, and the address of each slave terminal can be easily set with little increase in cost, and both the master terminal and each slave terminal can recognize the set address. It is an object to provide a serial communication device.
[0006]
[Means for Solving the Problems]
The present invention provides a serial communication device in which a master terminal (M1) and a plurality of slave terminals (21S1, 21S2, 21S3) are connected by a serial communication line (51) in order to solve the above-mentioned problem of the conventional technology. Each of the plurality of slave terminals has a request signal output unit (S114, S214, S314) for outputting a request signal to the master terminal, and a request signal for outputting a request signal output from its own slave terminal or another slave terminal. , A plurality of request signal input terminals (S115 to S117, S215 to S217, S315 to S317) having the number of the plurality of slave terminals, and the master terminal outputs a request signal output from each of the plurality of slave terminals. Of the plurality of slave terminals for inputting And a plurality of request signal input terminals (M15 to M17) having the following. The plurality of request signal input terminals of the master terminal and the plurality of slave terminals transmit request signals output from the plurality of slave terminals, respectively. Request signal lines (611 to 613) for supplying to respective request signal input terminals of a master terminal are connected, and the master terminal inputs a request signal to the plurality of request signal input terminals in the master terminal. Determines the address of each of the plurality of slave terminals according to the presence / absence of the request signal. Each of the plurality of slave terminals determines its own address based on the presence / absence of a request signal input to the plurality of request signal input terminals in the slave terminal. Providing a serial communication device characterized by the following: It is intended.
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, a serial communication device of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a block diagram showing an embodiment of the serial communication device of the present invention, FIG. 2 is a block diagram showing a schematic configuration of a wireless intercom system as an example using the serial communication device of the present invention, and FIG. FIG. 4 is a diagram for explaining an operation in the serial communication device, FIG. 4 is a diagram showing an example of a command format used in the serial communication device of the present invention, FIG. 5 is a diagram showing an example of a status used in the serial communication device of the present invention, FIG. 6 is a diagram showing a method of determining an address of a master terminal in the serial communication device of the present invention, FIGS. 7 to 9 are diagrams showing a method of determining an address of a slave terminal in the serial communication device of the present invention, and FIG. FIGS. 11 and 12 show an example of a method of inputting a request signal to each slave terminal in a communication device. FIGS. Diagram for explaining the command transmission to the slave terminal from the definitive master terminal, FIG. 13 is a diagram for explaining the status transmission from the slave terminal to the master terminal in the serial communication device of the present invention.
[0008]
First, a wireless intercom system as a preferred example using the serial communication device of the present invention will be described with reference to FIG. In FIG. 2, a main device 10 is a control device for controlling the entire wireless intercom system. Master device 21M is connected to main device 10 by wire. Three master units 21S1, 21S2, and 21S3 are connected to the master unit 21M via a serial communication line 51. Slave units 311 and 312 wirelessly transmit and receive data such as audio signals to and from master units 21M to 21S3. These four parent devices 21M to 21S3 and the two child devices 311 and 312 form one area (area 1).
[0009]
The example shown in FIG. 2 shows a case where eight areas are set. The four master units 28M to 28S3 and the two slave units 381 and 382 connected to each other by the serial communication line 58 form one area (area 8). The main units 10 are connected to the master units of the respective areas 2 to 7 (not shown) in the same manner as the areas 1 and 8. Note that the numbers of master units and slave units are merely examples, and the maximum number of slave units is determined according to the number of master units.
[0010]
Further, an operation unit 40 is connected to the main device 10. The operation unit 40 includes, for example, a microphone, a speaker, and various operation buttons. The audio signal input via the microphone is transmitted to the parent device in a specific or all areas via the main device 10 and transmitted to each child device. The audio signal from the slave unit is transmitted to the speaker of the operation unit 40 and the slave unit in another area via the main device 10.
[0011]
Next, a detailed configuration of the present invention will be described with reference to FIG. Since the connection method of the master units in the respective areas in FIG. 2 is the same, only the master units 21M to 21S3 in the area 1 are illustrated and described in FIG. In FIG. 1, the master unit 21M includes a microcomputer (hereinafter, microcomputer) M1 and a transmission / reception switching circuit M2. Master unit 21M is a master terminal, and microcomputer M1 operates as a master microcomputer. The microcomputer M1 includes a serial data output terminal M11, a serial data input terminal M12, a transmission / reception switching signal output terminal M13, request signal input terminals M15 to M17, and a storage unit M1m.
[0012]
Master device 21S1 includes microcomputer S11 and transmission / reception switching circuit S12. Master device 21S1 is a slave terminal, and microcomputer S11 operates as a slave microcomputer. The microcomputer S11 includes a serial data input terminal S111, a serial data output terminal S112, a transmission / reception switching signal output terminal S113, a request signal output terminal S114, request signal input terminals S115 to S117, and a storage unit S11m.
[0013]
The master unit 21S2 includes a microcomputer S21 and a transmission / reception switching circuit S22. Master device 21S2 is a slave terminal, and microcomputer S21 operates as a slave microcomputer. The microcomputer S21 includes a serial data input terminal S211, a serial data output terminal S212, a transmission / reception switching signal output terminal S213, a request signal output terminal S214, request signal input terminals S215 to S217, and a storage unit S21m.
[0014]
Master device 21S3 includes a microcomputer S31 and a transmission / reception switching circuit S32. Master device 21S3 is a slave terminal, and microcomputer S31 operates as a slave microcomputer. The microcomputer S31 includes a serial data input terminal S311, a serial data output terminal S312, a transmission / reception switching signal output terminal S313, a request signal output terminal S314, request signal input terminals S315 to S317, and a storage unit S31m.
[0015]
As described above, the master unit 21M as the master terminal and the master units 21S1 to 21S3 as the slave terminals are connected by the serial communication line 51. The request signal output terminal S114 of the microcomputer S11 of the master unit 21S1 and the request signal input terminal M15 of the microcomputer M1 of the master unit 21M are connected by a request signal line 611. The request signal output terminal S214 of the microcomputer S21 of the master unit 21S2 and the request signal input terminal M16 of the microcomputer M1 of the master unit 21M are connected by a request signal line 612. The request signal output terminal S314 of the microcomputer S31 of the master unit 21S3 and the request signal input terminal M17 of the microcomputer M1 of the master unit 21M are connected by a request signal line 613.
[0016]
The request signal RQ1 output from the request signal output terminal S114 is supplied to the request signal input terminal M15 via the request signal line 611. The request signal RQ2 output from the request signal output terminal S214 is supplied to the request signal input terminal M16 via the request signal line 612, and the request signal input terminal S116 of the microcomputer S11 of the master unit 21S1 and the microcomputer of the master unit 21S2. It is supplied to the request signal input terminal S215 of S21.
[0017]
The request signal RQ3 output from the request signal output terminal S314 is supplied to the request signal input terminal M17 via the request signal line 613, and the request signal input terminal S117 of the microcomputer S11 of the master unit 21S1 and the microcomputer of the master unit 21S2. The request signal input terminal S216 of S21 and the request signal input terminal S315 of the microcomputer S31 of the master unit 21S3 are supplied.
[0018]
As can be seen from FIG. 1, the request signal input terminal S115 of the microcomputer S11 of the master unit 21S1, the request signal input terminal S217 of the microcomputer S21 of the master unit 21S2, and the request signal input terminals S316 and S317 of the microcomputer S31 of the master unit 21S3. Does not supply any of the request signals RQ1 to RQ3, and their request signal input terminals are not used.
[0019]
When data (for example, a command) is transmitted from the master terminal 21M as the master terminal to the master terminals 21S1 to 21S3 as the slave terminals via the serial communication line 51, the master device 21M is set to " It is necessary to set the master units 21S1 to 21S3 to the "receiving" state by the transmission / reception switching circuits S12 to S32. When data (for example, status) is transmitted from master units 21S1 to 21S3 to master unit 21M via serial communication line 51, the state must be reversed.
[0020]
When a high signal is supplied to the transmission / reception switching circuit M2 from the transmission / reception switching signal output terminal M13 of the microcomputer M1 of the parent device 21M, the transmission gate of the parent device 21M is enabled, and the reception gate is disabled. It will be in the state of “transmission”. Conversely, when a low signal is supplied from the transmission / reception switching signal output terminal M13 to the transmission / reception switching circuit M2, the master unit 21M enters the "reception" state.
[0021]
When low signals are supplied to the transmission / reception switching circuits S12 to S32 from the transmission / reception switching signal output terminals S113 to S313 of the microcomputers S11 to S31 of the parent devices 21S1 to 21S3, the reception gates of the parent devices 21S1 to 21S3 are enabled and transmitted. The trust gate is disabled and goes into a "receive" state. Conversely, when a high signal is supplied from the transmission / reception switching signal output terminals S113 to S313 to the transmission / reception switching circuits S12 to S32, the master units 21S1 to 21S3 enter the "transmission" state.
[0022]
Here, a method of setting the addresses of the parent devices 21S1 to 21S3 will be described in detail. The setting of the addresses to the master units 21S1 to 21S3 is performed when the wireless intercom system is initialized, such as when the power is turned on (when the system is started). As shown in FIG. 3, master device 21M as a master terminal transmits a connection confirmation start command to master devices 21S1 to 21S3 as slave terminals via serial communication line 51. The connection confirmation start command is a command without address designation, and the connection confirmation start command is supplied to all the slave terminals connected to the serial communication line 51.
[0023]
Upon receiving the connection confirmation start command, the master units 21S1 to 21S3 perform initialization (reset) such as clearing an already set address. Then, master units 21S1 to 21S3 assert (turn on) request signals RQ1 to RQ3, and transmit request signals RQ1 to RQ3 to master unit 21M via request signal lines 611 to 613. Master unit 21M transmits a connection confirmation start command a plurality of times (for example, 10 times) at a constant period of, for example, every 100 ms. This is to ensure that the master units 21S1 to 21S3 receive the connection confirmation start command and transmit the request signals RQ1 to RQ3 to the master unit 21M without fail.
[0024]
Each time the master unit 21M transmits a connection check start command, and each time the master units 21S1 to 21S3 receive the connection check start command, the storage units M1m, S11m to S31m of the microcomputers M1, S11 to S31 request signal RQ1 to RQ3. Is updated and stored.
[0025]
Then, the master unit 21M transmits a connection confirmation end command 100 ms after the tenth transmission of the connection confirmation start command, as shown in FIG. The connection confirmation end command is a command without address designation, and the connection confirmation end command is supplied to all slave terminals connected to the serial communication line 51. Upon receiving the connection confirmation end command, master units 21S1 to 21S3 negate (turn off) request signals RQ1 to RQ3.
[0026]
FIG. 4 shows an example of the format of a command (including a connection check start command and a connection check end command) transmitted from the master unit 21M to the master units 21S1 to 21S3. As shown in FIG. 4A, the command includes a start of text STX, an address ADR, a command CMD, and an end of text ETX. STX, ADR, ETX are, for example, one byte, and CMD is, for example, one or more bytes.
[0027]
FIG. 4B is a specific example of STX, ADR, CMD, and ETX. STX is C2h (h indicates a hexadecimal number). The ADR has no address designation for 00h, address 1 for 01h, address 2 for 02h, and address 3 for 03h. The specific content of the CMD differs for each command. ETX is C3h. FIG. 4C is a specific example of ADR. Of the bits b0 to b7, the bit b4 is 0 indicating that the signal is from the master unit 21M to the master units 21S1 to 21S3. ADR0 and ADR1 of bits b0 and b1 are 1 or 0, respectively.
[0028]
FIG. 5 shows an example of a format of a status transmitted from master units 21S1 to 21S3 to master unit 21M. As shown in FIGS. 5A and 5B, the format of the status is the status STS instead of the CMD in FIG. As shown in FIG. 5C, a bit b4 in the ADR of the STS is 1 indicating that the signal is a signal from the master unit 21S1 to 21S3 to the master unit 21M.
[0029]
Based on the presence or absence of the input of the request signals RQ1 to RQ3 updated and stored in response to the transmission and reception of the connection confirmation start command as described above, the master unit 21M (microcomputer M1) as the master terminal changes the master unit 21S1 as the slave terminal -21S3, and the parent devices 21S1-21S3 (microcomputers S11-S31) determine their own addresses. FIG. 6 shows a method of determining (assigning) the addresses of the master units 21S1 to 21S3 in the master unit 21M. In FIG. 6, the slave 1 is the master unit 21S1, the slave 2 is the master unit 21S2, and the slave 3 is the master unit 21S3.
[0030]
In the microcomputer M1 of the master unit 21M, when all of the request signals from the slaves 1 to 3 are present (when there is a combination of existence, existence, and existence), that is, when all the request signal input terminals M15 to M17 are high, 1 shows a state where three slave terminals (master units 21S1 to 21S3) are connected to the master unit 21M as shown in FIG. At this time, the master unit 21M determines that the address of the slave 1 is 1, the address of the slave 2 is 2, and the address of the slave 3 is 3.
[0031]
When a request signal is input from the slaves 1 and 2 and a request signal is not input from the slave 3 (in the case of a combination of “Yes, Yes, No”), the master unit 21M has two slave terminals ( 2 shows a state in which the master units 21S1 and 21S2) are connected. At this time, master device 21M determines the address of slave 1 to be 1 and the address of slave 2 to be 3. When the request signal is input from the slave 1 and the request signal is not input from the slaves 2 and 3 (in the case of a combination of “Yes, No, No”), the master unit 21M has one slave terminal ( This shows a state in which only the parent device 21S1) is connected. At this time, master device 21M determines the address of slave 1 to be 1.
[0032]
FIG. 7 shows a method of determining (recognizing) its own address in the master unit 21S1, which is the slave 1. The combination of the presence / absence of the request signal input to the request signal input terminals S115 to S117 of the microcomputer S11 of the parent device 21S1 is “none, none, none”, “none, yes, none”, “none, none, yes”, “none”. , Yes, yes ". Since the request signal input terminal S115 is not used, there is no request signal input to the request signal input terminal S115 (low). As shown in FIG. 7, the master unit 21S1 determines the address to be 1 in any case.
[0033]
FIG. 8 shows a method of determining (recognizing) its own address in the master unit 21S2 as the slave 2. The combination of the presence / absence of the request signal input to the request signal input terminals S215 to S217 of the microcomputer S21 of the parent device 21S2 is any one of “Yes, No, No”, “Yes, Yes, No”. Since the own request signal RQ2 is input to the request signal input terminal S215, the request signal input to the request signal input terminal S215 is always (high), and the request signal input terminal S217 is not used. Request signal input to the signal input terminal S217 is always none (low).
[0034]
8, the parent device 21S2 determines the address to be 3 when "Yes, No, No" and the address to 2 when "Yes, Yes, No" .Request signal input terminal S216 That there is an input to request signal input terminal S216 means that another slave terminal is connected after master device 21S2. The master unit 21S2 can determine whether or not the slave terminal is connected after itself.
[0035]
FIG. 9 shows a method of determining (recognizing) its own address in the master unit 21S3 as the slave 3. The combination of the presence / absence of the request signal input to the request signal input terminals S315 to S317 of the microcomputer S31 of the parent device 21S3 is only "Yes, No, No". Since the own request signal RQ3 is input to the request signal input terminal S315, the request signal input to the request signal input terminal S315 is always present (high), and the request signal input terminals S316 and S317 are not used. , The request signal input to the request signal input terminals S316 and S317 is always none (low).
[0036]
As shown in FIG. 9, the parent device 21S3 determines that the address is 3 when the presence / absence / absence / absence.
[0037]
In summary, the microcomputers of the master terminal (master unit 21M) and the slave terminals (master units 21S1, 21S2, 21S3...) Connected to the master terminal are connected as follows, and the address of each slave terminal is changed. What is necessary is just to determine as follows. First, the microcomputer of the master terminal is provided with at least the maximum number of request signal input terminals so that request signals from the maximum number of slave terminals connected to the master terminal can be input. Alternatively, of the plurality of ports of the microcomputer, only the maximum number of the ports are assigned as request signal input terminals. Then, the request signal output terminal of each microcomputer of the slave terminal is connected to the request signal input terminal of the microcomputer of the master terminal.
[0038]
When the maximum number of slave terminals is N (an integer of 2 or more) and N slave terminals are connected to the master terminal, the master terminal may assign addresses 1, 2,..., N in order. When N-n slave terminals are connected to the master terminal without using n (an integer equal to or more than 1) of the N terminals, the master terminal uses addresses 1,..., N-1-n, N as addresses. May be added. In the example of FIG. 6, N is 3 and n is 1 when “Yes, Yes, No”, and N−1−n is 1, so the address is 1,3.
[0039]
The slave terminals may be connected as follows, and each slave terminal may determine (recognize) its own address as follows. FIG. 10 shows a method of inputting a request signal (a method of using a request signal input terminal) of each slave terminal (slaves 1 to 5) when N is 5. In FIG. 5, "x" of the request signal input terminals (1) to (5) means not used (no request signal is input), and "o" means used (input of the request signal).
[0040]
The slave 1 does not use the request signal input terminal (1). The slaves 2 to 5 input their own request signals to the first request signal input terminal (1). Further, when the slave number is P, only P-1 slaves from the last input terminal, in this example, the request signal input terminal (5) are not used. As shown in FIG. 10, for example, only one (= (2-1)) request signal input terminal (5) is not used in the slave 2, and two (= (3-1)) in the slave 3 Request signal input terminals (5) and (4) are not used.
[0041]
The remaining request signal input terminals that are not unused and do not receive their own request signal are the number obtained by adding the slave number P to the request signal input terminal number (referred to as Q) and subtracting 1. A request signal from the Q + P-1 slave is input.
[0042]
In the slave 1, request signals from the slaves 2 to 5 are input to the request signal input terminals (2) to (5) from Q + 1-1. In the slave 2, request signals from the slaves 3 to 5 are input to the request signal input terminals (2) to (4) from Q + 2-1. In the slave 3, the request signals from the slaves 4 and 5 are input to the request signal input terminals (2) and (3) from Q + 3-1. The slave 4 inputs a request signal from the slave 5 to the request signal input terminal (2) from Q + 4-1.
[0043]
Since the first request signal input terminal (1) is not used, the slave 1 sets the address to 1 regardless of the presence or absence of an input to the request signal input terminals (2) to (5).
[0044]
Each of the slaves 2 to 5 determines the number of the input terminal that first becomes ○ (there is input of a request signal) as an address, counting from the request signal input terminal (5) that is the last input terminal. For example, in the slave 4, since the request signal input terminal (2), which is the fourth from the request signal input terminal (5), becomes ○, the address is 4.
[0045]
Here, a case is considered where only the slaves 1 to 4 are used without using the slave 5. At this time, since the request signal from the slave 5 is not input to the request signal input terminal (2) of the slave 4, the request signal input terminal (2) of the slave 4 in FIG. Become. Therefore, the address of the slave 4 is 5 instead of 4. Similarly, the address of the slave 2 is 3, and the address of the slave 3 is 4.
[0046]
Returning to the case where there are three slave terminals in FIG. 1, an operation when a command is transmitted from the master terminal to the slave terminals will be described. FIG. 11 shows a case where a predetermined command is transmitted to the slaves 1 to 3 collectively without address designation. As shown in FIG. 11A, a command without address designation is transmitted from the master terminal to all slave terminals. At this time, as shown in FIGS. 11B to 11D, the slaves 1 to 3 do not particularly return a status or the like.
[0047]
FIG. 12 shows a case where a predetermined command is transmitted by specifying an address to a specific one of the slaves 1 to 3. As shown in FIG. 12A, a command is transmitted from the master terminal by designating address 1, and thereafter, a command is transmitted by designating address 3. At this time, as shown in FIG. 12B, the slave 1 returns the status of the address 1 to the master terminal, and as shown in FIG. 12D, the slave 3 returns the status of the address 3 to the master terminal. As shown in FIG. 12C, the slave 2 does not respond.
[0048]
FIG. 13 shows a case where there is a status to be transmitted from the slave 1 to the master terminal. When there is a status to be transmitted from the slave 1 to the master terminal, the request signal RQ1 is asserted as shown in FIG. Here, high indicates negation (off) of the request signal, and low indicates assertion (on) of the request signal. The master terminal receives the request signal RQ1 from the slave 1 and transmits a status request command to the slave 1 as shown in FIG.
[0049]
The slave 1 having received the status request transmits the status to the master terminal as shown in FIG. Thereafter, as shown in FIG. 13C, the request signal RQ1 is negated. As shown in FIGS. 13D to 13G, the request signals RQ2 and RQ3 of the slaves 2 and 3 are negated, and the slaves 2 and 3 do not transmit any status.
[0050]
【The invention's effect】
As described in detail above, the serial communication device according to the present invention includes a master terminal and a plurality of slave terminals connected by a serial communication line, and each of the plurality of slave terminals outputs a request signal to the master terminal. Request signal output means, for inputting a request signal output from its own slave terminal or another slave terminal, comprising a plurality of request signal input terminals having the number of a plurality of slave terminals, the master terminal, A plurality of request signal input terminals having the number of the plurality of slave terminals for inputting a request signal output from each of the plurality of slave terminals are provided. The plurality of request signal input terminals and the plurality of slave terminals of the master terminal are connected to request signal lines for supplying request signals output from the plurality of slave terminals to respective request signal input terminals of the master terminal. Connected.
[0051]
In this configuration, the master terminal determines the address of each of the plurality of slave terminals based on the presence or absence of a request signal input to the plurality of request signal input terminals of the master terminal. The own address is determined based on the presence / absence of a request signal to the request signal input terminal.
[0052]
As a result, the address of each slave terminal can be easily set with little increase in cost, and both the master terminal and each slave terminal can recognize the set address.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an embodiment of the present invention.
FIG. 2 is a block diagram showing a schematic configuration of a wireless intercom system as an example using the present invention.
FIG. 3 is a diagram for explaining an operation in the present invention.
FIG. 4 is a diagram showing an example of a command format used in the present invention.
FIG. 5 is a diagram showing an example of a status used in the present invention.
FIG. 6 is a diagram showing a method for determining an address of a master terminal according to the present invention.
FIG. 7 is a diagram illustrating a method of determining an address of a slave terminal according to the present invention.
FIG. 8 is a diagram illustrating a method of determining an address of a slave terminal according to the present invention.
FIG. 9 is a diagram showing a method of determining an address of a slave terminal according to the present invention.
FIG. 10 is a diagram illustrating an example of a method of inputting a request signal to each slave terminal according to the present invention.
FIG. 11 is a diagram for explaining command transmission from a master terminal to a slave terminal in the present invention.
FIG. 12 is a diagram for explaining command transmission from a master terminal to a slave terminal in the present invention.
FIG. 13 is a diagram for explaining status transmission from a slave terminal to a master terminal in the present invention.
[Explanation of symbols]
21M master unit (master terminal)
21S1-21S3 Master unit (slave terminal)
51 Serial communication line
611, 612, 613 Request signal line
M1, S11, S21, S31 microcomputer
M15 to M17, S115 to S117, S215 to S217, S315 to S317 Request signal input terminal
S114, S214, S314 Request signal output terminal (request signal output means)

Claims (1)

In a serial communication device in which a master terminal and a plurality of slave terminals are connected by a serial communication line,
Each of the plurality of slave terminals,
Request signal output means for outputting a request signal to the master terminal;
For inputting a request signal output from its own slave terminal or another slave terminal, comprising a plurality of request signal input terminals having the number of the plurality of slave terminals,
The master terminal,
For inputting a request signal output by each of the plurality of slave terminals, comprising a plurality of request signal input terminals having the number of the plurality of slave terminals,
A plurality of request signal input terminals of the master terminal and the plurality of slave terminals, a request signal line for supplying a request signal output from each of the plurality of slave terminals to each request signal input terminal of the master terminal; Connected by
The master terminal determines the address of each of the plurality of slave terminals depending on the presence or absence of a request signal input to the plurality of request signal input terminals in the master terminal,
The serial communication device according to claim 1, wherein each of the plurality of slave terminals determines its own address based on whether a request signal is input to the plurality of request signal input terminals in the slave terminal.

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