JP2004021859A - Usb controller - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a USB (Universal Serial Bus) controller by which the size/kind or the like of transmission data are easily changed and a circuit scale is miniaturized. <P>SOLUTION: The USB controller carries out an automatic response without interposing a user circuit with respect to request for control transfer accompanied with data transmission from a USB host. The USB controller comprises: a memory means 28 sharing an end point previously writing the response data of the request in the initial setting; and a serial input engine 22 reading the data written on the memory means 28 and outputting the data to the USB host when the request for the automatic response arrives from the USB host. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a USB (Universal Serial Bus) controller, and more particularly to a USB controller that automatically responds to a control transfer request accompanied by data transmission to a USB host without the intervention of a user circuit.
[0002]
[Prior art]
As a related art related to a USB controller that automatically responds to a control transfer request accompanied by data transmission to a USB host without intervention of a user circuit, there is an interface box described in JP-A-2000-305890. Examples of the product include a USB controller IC (NetChip 2270) manufactured by NetChip.
In recent years, USB has been used as an interface for connecting a personal computer (PC) and peripheral devices. In the USB, a PC is the only host, a plurality of devices are connected in a tree structure under the host, and the USB controllers of the devices have unique addresses.
The PC, which is the host, sends and receives data to and from the USB controller at the unique address. When the USB controller receives a data transmission / reception request from the host, it notifies the user circuit of the reception of the data transmission / reception request from the host by means of an interrupt signal or the like. Then, the user circuit reads the content of the data transmission / reception request from the USB controller, reads the data received by the USB controller from the host, and writes the transmission data to the host to the USB controller.
Note that the USB controller has a plurality of endpoints, each of which is composed of a normal FIFO memory (First In First Out Memory), which transmits data to the host or receives data from the host (the number thereof is determined by the standard). There). The device connected to the local bus of the USB controller of the device accesses the FIFO memory of the endpoint.
[0003]
Incidentally, data transfer on the USB bus is performed in units of packets.
Packets include types of token packets for transmitting transfer direction and setup information, data packets as actual data, and handshake packets for transmitting data transfer results (success / failure). Regarding the type of transfer, control transfer used for device initialization and various information exchange performed via endpoint zero, and transfer of a large amount of data such as printer data regardless of transfer cycle Bulk transfer, interrupt transfer that sends a small amount of data at fixed intervals such as sending mouse and keyboard status, isochronous transfer that guarantees bandwidth instead of guaranteeing data validity when sending real-time data such as voice data, There are four data transfer modes.
Among these, in the case of control transfer, the USB controller may respond to a data transmission / reception request from the host without the intervention of the user circuit in order to reduce the load on the user circuit. When the USB controller performs data transmission in response to a data transmission request from the host without the intervention of a user circuit, conventionally, transmission data to the host is stored in a register for performing various settings relating to the operation of the USB controller, and the value is stored in the register. It is known that the data is always output to the serial input engine, or is output to the serial input engine when a transmission request is received from the host, and the serial input engine transmits the data to the host.
[0004]
FIG. 5 shows the configuration of a conventional USB controller. The USB transceiver 11 is connected to a USB bus, converts a packet transmitted from a USB host (not shown) from a signal on the USB bus to a logical signal, and outputs the signal to a serial input engine 12 described below. A packet transmitted from the serial input engine 12 to the USB host is converted from a logical signal into a signal on the USB bus and output to the USB host. The serial input engine 12 decodes the token packet and the handshake packet among the packets transmitted from the USB host input from the USB transceiver 11 and performs communication control with the USB host based on the token packet and the handshake packet if necessary. To the USB transceiver 11.
[0005]
The serial input engine 12 reads data to be output to the USB host from a memory 18 described later via the memory access controller group 13, adds control data to the data, and outputs the data to the USB transceiver 11 as a data packet. Control is performed to write data in a data packet from the USB host input from the USB host 11 into the memory 18 via the memory access controller group 13. In response to an automatic response request for control transfer, the automatic response data is read from a register 16 described later, control data is added thereto, and the data is output to the USB transceiver 11 as a data packet. The memory 18 is composed of a RAM, and temporarily stores data received from the local bus and transmitted to the USB host, and data received from the USB host and transmitted to the local bus. A memory access controller group 13 controls writing of data received from the local bus and transmitted to the USB host to the memory 18, and also controls reading of data received from the USB host and transmitted to the local bus from the memory 18. It is a controller group. The I / O controller 15 controls data transfer between a user circuit (not shown), a memory access controller group 13, and a register 16 described below. The register 16 is a register for performing various settings of the USB controller internal module and for storing an automatic response request for control transfer.
[0006]
The memory access controller group 13 is prepared for each endpoint, and a memory controller for endpoint zero (130 in the figure) and a memory controller for multiple endpoints (131 for transfer other than control transfer) are used. , 132,..., 13n), and an arbiter 19 that performs arbitration when a plurality of accesses from each memory controller to the memory 18 occur at the same time. Here, the difference between the memory controller 130 for the endpoint zero and the other memory controllers is that the memory controller 130 for the endpoint zero is used for control transfer. While reading is possible, the memory controller for the other endpoint performs writing on one of the serial input engine 12 and the local bus and performs reading on the other depending on the direction of the endpoint. It is to be done.
[0007]
In the USB controller shown in FIG. 5, when a request for control transfer accompanied by data transmission to the USB host is issued, the serial input engine 12 reads out the automatic response data stored in the register 16 and responds to the control signal in response to the request for performing an automatic response. The USB transceiver 11 adds the data packet as a data packet to the USB transceiver 11, converts the data packet into a USB bus signal, and outputs the signal to the USB host. For a request that does not perform an automatic response, after receiving the request, data is written from the user circuit to the memory 18 via the endpoint zero memory controller 130 via the I / O controller 15 and the serial input engine. 12 reads data from the memory 18 through the endpoint zero memory controller 130, adds a control signal, outputs the data as a data packet to the USB transceiver 11, converts the data packet into a USB bus signal by the USB transceiver 11, and Output to
[0008]
[Problems to be solved by the invention]
However, in the conventional method, since the transmission data is stored in the register, it is difficult to change the size and type of the transmission data. Further, since the number of elements required for the configuration of the register is larger than that of other memory devices, there is a problem that it is difficult to increase the amount of stored data.
Therefore, according to the present invention, the USB controller can easily change the size and type of transmission data in response to a data transmission request from the host without the intervention of a user circuit, and can reduce the circuit scale compared to storing the data in a register. It is an object of the present invention to provide a USB controller that can perform such operations.
[0009]
[Means for Solving the Problems]
In order to solve the above problem, a first aspect of the present invention is a USB controller that automatically responds to a control transfer request accompanied by data transmission to a USB host without the intervention of a user circuit. A memory for storing data corresponding to the FIFO is provided, and response data to the request is also written in the memory in advance at the time of initial setting, and when a request that requires an automatic response from the USB host comes, A serial input engine reads response data from the memory and outputs the response data to a USB host.
According to a second aspect of the present invention, in the USB controller according to the first aspect, when writing / reading data to / from the memory from both the serial input engine and the user circuit, the data for each endpoint and the response are provided. A memory access controller for controlling access in units of data for use.
A third aspect of the present invention is the USB controller according to the first or second aspect, wherein the memory has a plurality of input / output ports.
According to a fourth aspect of the present invention, in the USB controller according to the first, second, or third aspect, a register for performing various settings relating to the operation of the USB controller is provided, and the type, content, and size of response data to a request to be written to the memory are provided. , And the size of the FIFO of the endpoint is held in the register so as to be changeable by the user.
According to a fifth aspect of the present invention, in the USB controller according to the first aspect, when a request that requires an automatic response comes from a USB host, the serial input engine determines the type, content, and size of the response data. Reading response data from an address of the memory and outputting the data to a USB host.
According to a sixth aspect of the present invention, in the USB controller according to the first aspect, a register for performing various settings relating to the operation of the USB controller is provided, and response data is written from the user circuit to the memory at the time of initial setting of the USB controller. At the same time, a value corresponding to the type, content and size of the request is set in the register.
According to a seventh aspect of the present invention, in the USB controller according to the first aspect, a nonvolatile memory storing response data in advance and a register for performing various settings relating to the operation of the controller are provided. And writing a value corresponding to the type, content, and size of the request in the register at the same time as writing the response data to the memory.
[0010]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a conceptual diagram of a USB bus connection. In the figure, 1 is a USB host having a root HUB function, 2a and 2b are HUBs, and 3a to 3d are devices. In this way, in the USB, a plurality of hubs or devices are connected in a tree under one host. The device includes a USB controller 21 and a target device 22 as shown in FIG.
FIG. 3 shows the configuration of the USB controller of the present invention. In FIG. 3, the USB transceiver 21 is connected to a USB bus, converts a packet transmitted from a USB host (not shown) from a signal on the USB bus into a logical signal, and outputs the logical signal to the serial input engine 22. , Converts a packet transmitted from the serial input engine 22 to the USB host from a logical signal to a signal on the USB bus, and outputs the signal to the USB host. The serial input engine 22 decodes the token packet and the handshake packet among the packets transmitted from the USB host input from the USB transceiver 21 and performs communication control with the USB host based on the token packet and the handshake packet. In addition to outputting to the transceiver 21, data to be output to the USB host is read from the memory 2 described later through the memory access controller group 23, control data is added, and the data is output to the USB transceiver 21 as a data packet. The serial input engine 22 controls writing of data in a data packet from the USB host input from the USB transceiver 21 to the memory 28 via the memory access controller group 23, and further responds to an automatic response request for control transfer. Reads the automatic response data from the register 26 described later, adds the control data, and outputs the data to the USB transceiver 21 as a data packet. The memory 28 is a RAM that temporarily stores data received from the local bus and transmitted to the USB host and data received from the USB host and transmitted to the local bus. The memory access controller group 23 controls writing of data received from the local bus and transmitted to the USB host to the memory 28, and control of reading data received from the USB host and transmitted to the local bus from the memory 28. It is. The I / O controller 25 controls data transfer between a user circuit (not shown), the memory controller group 23, and a register described below. The register 26 is a register for performing various settings of the USB controller internal module.
[0011]
The memory access controller group 23 is a memory controller prepared for each endpoint and for an automatic response value of the control transfer. The memory access controller group 23 includes a memory controller for the endpoint zero (230 in the figure) and a transfer other than the control transfer. A plurality of memory controllers (231, 232,..., 23n) for a plurality of endpoints to be used, a memory controller 24 for an automatic response value of control transfer, and a plurality of accesses from each memory controller to the memory 28 simultaneously. And an arbiter 29 that performs arbitration in the case where the arbitration is performed. Here, the difference between the memory controller 230 for the endpoint zero and the other memory controllers is that the memory controller 230 for the endpoint zero is used for the control transfer, so that the memory controller 230 is used for writing on both the serial input engine 22 and the local bus. Whereas the memory controller for the other endpoint writes to one of the serial input engine 22 and the local bus depending on the direction of the endpoint, and reads to the other. Is to be done.
Although not shown in the figure, other modules that may be incorporated include a CLK module for supplying a clock to each module, and a DMA controller for performing DMA transfer between an endpoint and a user circuit. Can be Note that the USB transceiver 21 may be a separate chip from the USB controller.
The access from each memory controller to the memory 28 is performed. When a normal SRAM is used as the memory 28, the access on the serial input engine side and the local bus side of each memory controller is arbitrated by a common arbiter 29. . When a two-port SRAM is used as the memory 28, accesses to the serial input engine side and the local bus side of each memory controller are arbitrated by separate arbiters 29.
[0012]
In the USB controller shown in FIG. 3, initial settings are first performed after the power is turned on. In the initial setting, various settings of the USB controller internal module are performed in the register 26 from the user circuit via the I / O controller 25. At this time, the automatic response data of the device request for the control transfer is written from the user circuit to the memory 28 via the I / O controller 25 and the automatic response value memory controller 24. At the same time, when it is possible to change the start address and size when the automatic response data is accessed from the serial input engine, and the type of the request for performing the automatic response, the added information is added to the register 26 via the I / O controller 25. Write to. Then, after completion of the initial setting, connection to the USB host is performed, and actual data transfer is started.
[0013]
As described above, there are four types of USB transfer modes: control transfer, bulk transfer, interrupt transfer, and isochronous transfer. The present invention relates to control transfer.
The procedure will be described below.
The control transfer includes three stages, a setup stage, a data stage, and a status stage.
The setup stage starts when the USB host sends a setup token packet to the USB controller. The USB host subsequently transmits an 8-byte data packet to indicate the content of the request to the USB controller.
In the USB controller, the USB transceiver 21 converts a signal on the USB bus into a logical signal and outputs the logical signal to the serial input engine 22. The serial input engine 22 decodes the input signal from the USB transceiver 21 and outputs an ACK handshake packet to the USB transceiver 21 when it is determined that the setup token and the 8-byte data packet have been received. The USB transceiver 21 converts the ACK handshake packet input from the serial input engine 22 into a signal on the USB bus and returns it to the USB host to indicate that the request has been received. In the serial input engine 22, the request is decoded at the same time. This is the setup stage.
After that, depending on the type of request, a case where data is transmitted to a USB host like GET_DESCRIPTOR or GET_CONFIGURATION, a case where data is received from a USB host like SET_DESCRIPTOR, or a case where data transmission / reception is not accompanied like SET_CONFIGURATION or SET_ADDRESS And the operation differs.
[0014]
First, this is a data stage in the case of a request for transmitting data to the USB host, such as GET_DESCRIPTOR or GET_CONFIGURATION. In order to read out from the automatic response value memory, preparation is made to output the start address of the area where the request is stored to the memory controller 24 for the automatic response value memory. When the request does not require an automatic response, the serial input engine 22 outputs a setup request reception signal to the register 26. Upon receiving the setup request reception signal, the register 26 outputs an interrupt signal to the user circuit. The user circuit confirms the cause of the interrupt. In this case, since it is a setup request reception, the content of the request is confirmed from the register indicating the content of the setup request, and the corresponding data is stored in the I / O controller 25 and the endpoint zero. To the memory 28 via the memory controller 230 for use. The endpoint zero memory controller 230 informs the serial input engine 22 that the data transmission is ready when the data writing from the user circuit is completed, similarly to the writing of data from the automatic response value memory.
On the other hand, after receiving the ACK handshake packet for the 8-byte data packet, the USB host transmits an in-token packet to the USB controller to request data transmission.
[0015]
In the USB controller, when the in-token packet from the USB host converted into a logical signal by the USB transceiver 21 is input to the serial input engine 22, the serial input engine 22 is set to the endpoint NAK when the transmission data is not ready. The handshake packet is output to the USB transceiver 21, and the USB controller 21 converts the handshake packet into a signal on the USB bus and returns it to the USB host to notify that the data is not ready. In this case, the USB host transmits an in-token packet to the USB controller again after a predetermined time has elapsed. On the other hand, when the data is ready, if the request needs to correspond to an auto-response, the serial input engine 22 sends it to the auto-response value memory controller 24, otherwise, via the endpoint zero controller 230. Then, data is read from the memory 28, a control signal is added to the data, and the data packet is output to the USB transceiver 21 as a data packet. The USB transceiver 21 converts the data into a USB bus signal and returns it to the host. If the data packet is successfully received from the USB controller, the USB host sends an ACK handshake packet to the USB controller. This is the data stage in the case of a request for transmitting data. If the data packet is not returned from the USB controller, the USB host does not transmit the data packet to the USB controller for a certain period of time, so that the reception failure of the data packet is indicated to the USB controller. Send
[0016]
Next, in a status stage in the case of a request to transmit data to the USB host, the USB host transmits an out token packet and subsequently zero-length data to the USB controller after transmitting the ACK handshake packet in the previous data stage. In the USB controller, when the out token packet and the zero-length packet (a data packet composed of only a control signal and not including actual data) from the USB host converted into a logical signal by the USB transceiver 21 are input to the serial input engine 22. When the post-processing in the previous data stage is completed, the serial input engine 22 outputs an ACK handshake packet to the USB transceiver 21, and the USB controller 21 converts it into a USB bus signal and returns it to the USB host. . This is the status stage in the case of a request to transmit data. When the post-processing in the data stage is not completed when the out token packet and the zero-length packet from the USB host are input to the serial input engine 22, the serial input engine 22 outputs a NAK handshake packet to the USB transceiver 21. Then, the USB controller 21 converts the signal into a signal on the USB bus and returns the signal to the USB host. In this case, the USB host outputs the out token packet and the zero-length data again to the USB controller until the ACK handshake packet is returned after a predetermined time has elapsed.
[0017]
The above is the case of the USB 1.1 standard. The USB 2.0 standard differs from the USB 1.1 in that the USB host outputs the ping token packet to the USB controller before transmitting the out token packet and the zero-length data packet. . In the USB controller, the USB transceiver 21 converts the signal of the USB bus into a logical signal and outputs the logical signal to the serial input engine 22. When the serial input engine 22 decodes the input signal from the USB transceiver 21 and receives the ping token, the endpoint The zero memory controller 230 outputs an ACK handshake packet to the USB transceiver 21 when the end point zero area of the memory 28 indicates that data can be written, and outputs a NAK handshake packet when the data cannot be written. The USB transceiver 21 converts the input handshake packet into a signal on the USB bus and returns the signal to the USB host. When the ACK handshake packet is returned, the USB host performs the same status stage operation as in USB 1.1. On the other hand, when the NAK handshake packet is returned, the ping token packet is transmitted to the USB controller until the ACK handshake packet is returned again.
[0018]
Next, in the data stage in the case of a request to receive data from the USB host, such as SET_DESCRIPTOR, the USB host sends an out token packet after receiving the ACK handshake in the previous setup stage, and then sends the data packet to the USB controller. Send.
In the USB controller, the USB transceiver 21 converts a signal on the USB bus into a logical signal and outputs the logical signal to the serial input engine 22. The serial input engine 22 decodes the input signal from the USB transceiver 21 and immediately prepares to write data to the endpoint zero upon receiving the out token. When a data packet converted to a logical signal by the USB transceiver 21 is input, the serial input engine 22 decodes the input signal. The data in the data packet is written to the memory 28 via the endpoint zero memory controller 230. When the data writing to the memory 28 is completed normally, the serial input engine 22 outputs an ACK handshake packet to the USB transceiver 21, and the USB transceiver 21 converts the ACK handshake packet into a signal on the USB bus and outputs the signal to the USB host. This is the data stage in the case of a request to receive data. On the other hand, if the reception of the data packet from the USB controller or the writing to the endpoint zero fails due to a CRC error or the like, the USB host does not transmit the data packet to the USB controller for a certain period of time. The in-token packet is transmitted to the USB controller again after a predetermined time has elapsed.
[0019]
Note that, when the data writing from the serial input engine 22 to the memory 28 succeeds, the endpoint zero memory controller 230 outputs a data reception signal to the register 26. The register 26 outputs an interrupt signal to the user circuit when the data reception signal is input. The user circuit confirms the cause of the interrupt. In this case, since this is a data reception signal, data reading from the memory 28 via the memory controller 230 for endpoint zero and the I / O controller 25 is started.
The above is the case of the USB 1.1 standard. The USB 2.0 standard is different from USB 1.1 in that the USB host outputs the ping token packet to the USB controller before transmitting the out token packet and the data packet. In the USB controller, the USB transceiver 21 converts the signal of the USB bus into a logical signal and outputs the logical signal to the serial input engine 22. When the serial input engine 22 decodes the input signal from the USB transceiver 21 and receives the ping token, the endpoint If zero can be written into the data, an ACK handshake packet is output to the USB transceiver 21. If data cannot be written, a NAK handshake packet is output to the USB transceiver 21. The USB transceiver 21 converts the input handshake packet into a signal on the USB bus and returns the signal to the USB host.
When the ACK handshake packet is returned, the USB host performs the same data stage operation as USB 1.1. On the other hand, when the NAK handshake packet is returned, the ping token packet is transmitted to the USB controller until the ACK handshake packet is returned again.
[0020]
Next, in the status stage in the case of a request to receive data from the USB host, the USB host transmits an Token handshake packet in the previous data stage and then transmits an IN token packet to the USB controller. In the USB controller, the USB transceiver 21 converts the signal of the USB bus into a logical signal and outputs the logical signal to the serial input engine 22. When the serial input engine 22 decodes the input signal from the USB transceiver 21 and receives the in token, When the data written to the endpoint zero in the data stage has been read from the user circuit, a data packet of zero-length data is output to the USB transceiver, and the USB transceiver 21 converts it into a signal on the USB bus. Output to the USB host. Upon receiving the zero-length data packet, the USB host outputs an ACK handshake packet to the USB controller. The above is the status stage in the case of a request for transmitting data. If the reading of the data written to the endpoint zero from the user circuit has not been completed, the serial input engine 22 outputs a NAK handshake packet to the USB transceiver 21, and the USB controller 21 outputs the signal to the USB bus. And returns it to the USB host. In this case, the USB host outputs the in-token packet to the USB controller again after a lapse of a predetermined time until a zero-length data packet is returned.
Finally, in the case of a request that does not involve data transmission / reception, there is no data stage, and the serial input engine 22 updates the setting values such as the address of the USB controller and sets HALT based on the 8-byte data received in the setup stage. Then, the same status stage as in the case where data transmission / reception is performed is performed according to the direction of data transfer.
[0021]
FIG. 4 shows another configuration of the USB controller of the present invention. The same components are denoted by the same reference numerals, and duplicate description will be omitted. The operation of the USB controller shown in FIG. 4 is as follows. At the time of initial setting, response data is read into the RAM from the non-volatile memory 27 which can hold data even when the power is turned off, such as a ROM or a flash memory in which response data is stored in advance. It is the same as the USB controller in FIG. 3 except that values corresponding to the type, content, and size of the request written to the RAM are set in the registers for performing various settings related to the operation.
[0022]
【The invention's effect】
As described above, according to the present invention, the response data of the request is written in advance in the RAM shared with the FIFO of the endpoint at the time of the initial setting, and when the request that requires the automatic response from the USB host comes. In addition, since the serial input engine reads out the response data written in advance from the RAM and outputs it to the USB host, the USB has a higher degree of freedom and a smaller circuit scale than the conventional one which performs an automatic response without the intervention of a user circuit. A controller can be realized.
Also, since the RAM shared with the FIFO of the endpoint in which the response data of the request is previously written at the time of initial setting has a plurality of input / output ports, the RAM can be simultaneously accessed from both the serial input engine side and the user circuit side. It is possible to realize a higher-speed USB controller.
Further, the type, content, and size of the response data of the request to be written to the RAM are stored in registers for performing various settings relating to the operation of the USB controller, and the user can change the data, thereby realizing a flexible USB controller.
Also, at the time of initial setting, response data is written from a non-volatile memory, such as a ROM or a flash memory, in which response data is stored in advance, which can retain data even when power is turned off, to a RAM, and at the same time, a register for performing various settings relating to the operation of the controller. By setting values corresponding to the type, content, and size of the request to be written to the RAM, it is possible to realize a fast-start USB controller that reduces the time required for the user circuit to perform the initial setting.
[Brief description of the drawings]
FIG. 1 is a conceptual diagram of a USB bus connection.
FIG. 2 is a configuration diagram of a device.
FIG. 3 is a configuration diagram of a USB controller according to the first embodiment of the present invention.
FIG. 4 is a configuration diagram of a USB controller according to a second embodiment of the present invention.
FIG. 5 is a configuration diagram of a conventional USB controller.
[Explanation of symbols]
21 USB transceiver, 22 serial input engine (SIE), 23 memory controller group, 24 memory controller for automatic response value, 25 I / O controller, 26 register, 27 ROM, 28 memory, 29 arbiter

Claims (7)

In a USB controller which automatically responds to a control transfer request accompanied by data transmission to a USB host without intervention of a user circuit,
A memory for storing data corresponding to the FIFO of each endpoint is provided. Response data to the request is also written in the memory in advance at the time of initial setting, and a request that requires an automatic response from the USB host comes in. A serial input engine that reads response data from the memory and outputs the response data to a USB host. 2. The USB controller according to claim 1, wherein when writing / reading data to / from the memory from both the serial input engine and the user circuit, the memory controls access in units of data for each endpoint and data for response. A USB controller comprising an access controller. 3. The USB controller according to claim 1, wherein the memory has a plurality of input / output ports. 4. The USB controller according to claim 1, further comprising a register for performing various settings relating to the operation of the USB controller, wherein a type, a content, and a size of response data to a request to be written to the memory, and a size of an end point FIFO are set by a user. The USB controller is configured to be able to change the value in the register. 2. The USB controller according to claim 1, wherein, when a request that requires an automatic response from a USB host is received, the serial input engine converts the response data from the address of the memory based on the type, content, and size of the response data. A USB controller for reading out and outputting to a USB host. 2. The USB controller according to claim 1, further comprising: a register for performing various settings relating to the operation of the USB controller, wherein at the time of initial setting of the USB controller, response data is written from the user circuit to the memory, and at the same time, the type and content of the request are stored in the register. -A USB controller characterized by setting a value corresponding to the size. 2. The USB controller according to claim 1, further comprising: a nonvolatile memory in which response data is stored in advance; and a register for performing various settings relating to the operation of the controller, wherein response data of the nonvolatile memory is written to the memory at the time of initial setting. A value corresponding to the type, content, and size of the request is set in the register.

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