JP2003338739A - Analog signal input circuit for ad converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To enable direct application of a overvoltage, without increasing the circuit size. <P>SOLUTION: Each input terminal, to which an analog signal is applied, is provided with a surge-protecting means, and a conduction-controlling means for connecting/disconnecting the path of a signal line from the input terminal to an AD converter in accordance with the selection signal. A diode-connected low threshold P-type transistor, having an operation threshold voltage lower than that of a transistor constituting the conduction controlling means, is provided in between the signal line and a power supply, and one input terminal can be selected by giving the selection signal to the conduction-controlling means. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an analog input signal circuit of an AD converter, and more particularly to an analog signal input circuit of an AD converter which allows application of an analog signal exceeding a power supply voltage.

[0002]

2. Description of the Related Art For example, a microcomputer having a built-in AD converter usually has a plurality of analog signal input terminals, and one of the plurality of analog signal input terminals is selected and connected to the built-in AD converter. A digital signal used for internal processing is generated from the selected analog signal.

By the way, when a processing device is constructed using this kind of microcomputer, the voltage level of the analog signal to be processed may exceed the power supply voltage of the microcomputer. In this case, if it is possible to directly apply an analog signal voltage above the power supply voltage to the analog signal input terminal of the microcomputer, an external circuit that reduces the analog signal voltage above the power supply voltage of the microcomputer to a voltage below the power supply voltage. Therefore, the cost of the processing device to be constructed can be reduced.

That is, in a microcomputer having a built-in AD converter, there is a demand to directly apply an analog signal voltage higher than the power supply voltage to the analog signal input terminal. Therefore, the conventional microcomputer is provided with an analog signal input circuit capable of directly applying an analog signal voltage higher than the power supply voltage to the analog signal input terminal. Hereinafter, description will be given with reference to FIG.
4. FIG. 4 is a circuit diagram showing a configuration example of an analog signal input circuit of a conventional AD converter.

In FIG. 4, the comparator 48 and the DA converter 49 constitute an AD converter as a whole. A configuration example in the case where two analog signal input circuits are provided for this AD converter is shown.

A surge protection circuit 43, a transmission gate 44, an NMOS transistor 45, an inverter 46, and a transmission gate 47 are provided between one analog signal input terminal 41 and the AD converter. Similarly, the other analog signal input terminal 5
A surge protection circuit 53, a transmission gate 54, an NMOS transistor 55, an inverter 56, and a transmission gate 57 are provided between 1 and the AD converter.

In one analog signal input circuit, the surge protection circuit 43 is composed of a series circuit of two diodes connected in the forward direction, the forward end is connected to the power supply 42, and the reverse end is grounded (GND). ), And the connection ends of the two diodes are connected to the connection line between the analog signal input terminal 41 and one signal electrode of the transmission gate 44.

An NMO is provided between a connection line between the other signal electrode of the transmission gate 44 and one signal electrode of the transmission gate 47 and the ground (GND).
An S transistor 45 is provided.

The selection signal SEL0 is applied to the gate electrodes of the NMOS transistors forming the transmission gates 44 and 47. The selection signal SEL0 is applied to the gate electrode of the NMOS transistor 45 and the gate electrodes of the PMOS transistors forming the transmission gates 44 and 47 via the inverter 46.

In the other analog signal input circuit, the surge protection circuit 53 is composed of a series circuit of two diodes connected in the forward direction, and the forward end has a power supply 52.
, The reverse end is connected to ground (GND), and the connection ends of the two diodes are connected to the connection line between the analog signal input terminal 51 and one signal electrode of the transmission gate 54.

An NMO is provided between a connection line between the other signal electrode of the transmission gate 54 and one signal electrode of the transmission gate 57 and the ground (GND).
An S transistor 55 is provided.

The selection signal SEL1 is applied to the gate electrodes of the NMOS transistors forming the transmission gates 54 and 57. The selection signal SEL1 is applied to the gate electrode of the NMOS transistor 55 and the gate electrodes of the PMOS transistors forming the transmission gates 54 and 57 via the inverter 56.

The transmission gate 47,
The other signal electrode of 57 is commonly connected to one input terminal of the comparator 48 via the analog voltage input line 50. At the other input terminal of the comparator 48, D
The output voltage (reference voltage) of the A converter 49 is applied.

In the above configuration, in the comparator 48 and the DA converter 49, which constitute the AD converter, when the analog signal voltage is higher than the reference voltage, "H" is set as the AD conversion result (one bit). When the analog signal voltage is lower than the reference voltage, "L" is output as the AD conversion result (one bit).

Now, the selection signal SEL0 is SEL0 = "H".
Then, it is assumed that the selection signal SEL1 is SEL1 = "L". That is, it is assumed that the analog signal input terminal 41 is selected and the analog signal input terminal 51 is unselected. In this case, transmission gates 44 and 47 are rendered conductive, and NMOS transistor 45 is rendered non-conductive. Therefore, the analog signal input terminal 41 is connected to the analog voltage input line 50 via the transmission gates 44 and 47. On the other hand, the transmission gates 54 and 57 become non-conductive, and the NM
The OS transistor 55 is in a conductive state.

In this state, it is assumed that a voltage higher than the voltage Vcc of the power source 42 is applied to the analog signal input terminal 41. It is assumed that the analog signal input terminal 51 is fixed to the "L" level as a non-selected terminal.

The high voltage input to the analog signal input terminal 41 is clamped to a voltage of about Vcc + 0.6V by the diode connected to the power supply 42 side of the surge protection circuit 43. That is, the voltage of Vcc + 0.6V passes through the transmission gates 44 and 47 and appears on the analog voltage input line 50 to the comparator 48.

At this time, the transmission gate 57
In the PMOS transistor configuring the above, the voltage Vcc + 0.6 of the analog voltage input line 50 is applied to the other signal electrode.
V is applied, and Vc is applied from the inverter 56 to the gate electrode.
c is applied. Therefore, the PMOS transistor forming the transmission gate 57 performs an ON operation when the threshold voltage is about -0.6V.

However, since the NMOS transistor 55 is in the conductive state, the transmission gate 54 maintains the non-conductive state, so that the "L" level state of the analog signal input terminal 51 affects the voltage of the analog voltage input line 50. There is no application, and the voltage of Vcc + 0.6V is maintained as it is.

As a result, in the comparator 48, Vcc
By comparing the magnitude of +0.6 V with the reference voltage from the DA converter 49, it is correctly determined that it is higher than the power supply voltage,
The conversion result of "H" is output. As described above, with respect to the overvoltage exceeding the power supply voltage, the surge protection circuit can clamp the voltage to a certain voltage to meet the demand for direct input.

[0021]

However, in the above-mentioned conventional analog signal input circuit, the transmission gate is compared with the analog signal input circuit of the ordinary AD converter which does not guarantee the overvoltage application when it has two input terminals. 2 and NMOS transistors are additionally required, which increases the circuit scale. In particular, the number of analog signal input terminals is generally about eight. Then, eight transmission gates and eight NMOS transistors are additionally required, which further increases the circuit scale.

The present invention has been made in view of the above, and an object thereof is to obtain an analog signal input circuit of an AD converter which can allow direct application of an overvoltage without increasing the circuit scale.

[0023]

In order to achieve the above object, an analog signal input circuit of an AD converter according to the present invention has a surge protection means and an input terminal for each input terminal to which an analog signal is applied. To a signal line from the AD converter to the AD converter are connected and disconnected according to a selection signal, and a conduction control means is provided, and when the selection signal is given to the conduction control means to select one input terminal, the signal line and the power supply are connected. And a diode-connected low-threshold P-type transistor having an operation threshold voltage lower than that of the transistor constituting the conduction control means.

According to the present invention, the surge protection means and the conduction control means for connecting and disconnecting the path from the input terminal to the signal line to the AD converter according to the selection signal are provided for each input terminal to which the analog signal is applied. In the case where one input terminal is selected by applying the selection signal to the conduction control means, an overvoltage exceeding the power supply voltage is applied to the input terminal on the selection side in a situation where the non-selected input terminal is fixed at a low level. Is applied, the surge protection diode connected to the power supply side in the surge protection circuit clamps the voltage on the input side of the conduction control means on the selected side to the voltage value of “power supply voltage + on-operation voltage of surge protection diode”, This is output to the signal line from the selection side conduction control means to the AD converter. At this time, a diode-connected low-threshold P-type transistor having an operation threshold voltage lower than the operation threshold voltage of the transistor forming the conduction control means is provided between the signal line and the power supply. The voltage is clamped to the voltage value of “power supply voltage + on-operation voltage of low threshold P-type transistor”. Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted.

In the analog signal input circuit of the AD converter according to the next invention, the surge protection means and the route from the input terminal to the signal line from the input terminal are selected for each input terminal to which the analog signal is applied. Provided with a conduction control means for connecting and disconnecting according to a signal, in the case of selecting one input terminal by giving the selection signal to the conduction control means, between a line from the input terminal to the conduction control means and a power supply, It is characterized in that a diode-connected low-threshold P-type transistor having an operation threshold voltage lower than the operation threshold voltage of the transistor constituting the conduction control means is provided.

According to the present invention, the surge protection means and the conduction control means for connecting and disconnecting the path from the input terminal to the signal line to the AD converter according to the selection signal are provided for each input terminal to which the analog signal is applied. When the selection signal is provided to the conduction control means to select one input terminal, if an overvoltage exceeding the power supply voltage is applied to each input terminal, first, a surge connected to the power supply side in the surge protection circuit The operation is clamped to the voltage value of "power supply voltage + ON operation voltage of surge protection diode" by the protection diode, but the operation is lower than the operation threshold voltage of the transistor forming the conduction control means between the input terminal and the conduction control means. Since the diode-connected low-threshold P-type transistor having the threshold voltage is provided, the input voltage of each conduction control means is immediately switched to "electric current". It is clamped to the voltage value of the voltage + low threshold on operating voltage of the P-type transistor ". With this voltage value, the conduction control means on the non-selected side does not perform the ON operation. Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted.

In the analog signal input circuit of the AD converter according to the next invention, the surge protection means and the route from the input terminal to the signal line from the input terminal are selected for each input terminal to which the analog signal is applied. A conduction control unit that connects and disconnects according to a signal is provided, and when the selection signal is given to the conduction control unit to select one input terminal, the conduction is used as a surge protection diode connected to the power supply side in the surge protection unit. It is characterized in that a diode-connected low-threshold P-type transistor having an operation threshold voltage lower than that of a transistor constituting the control means is provided.

According to the present invention, the surge protection means and the conduction control means for connecting and disconnecting the path from the input terminal to the signal line to the AD converter according to the selection signal are provided for each input terminal to which the analog signal is applied. When the selection signal is provided to the conduction control means to select one input terminal, an operation threshold value of a transistor forming the conduction control means is used as a surge protection diode connected to the power supply side of the surge protection means. A diode-connected low threshold P-type transistor having an operating threshold voltage lower than the voltage is provided. Therefore, when an overvoltage exceeding the power supply voltage is applied to each input terminal, the input voltage of each conduction control means immediately becomes “power supply voltage ++” by the low threshold P-type transistor connected to the power supply side in the surge protection circuit.
It is clamped to the voltage value of "ON operation voltage of low threshold P-type transistor". With this voltage value, the conduction control means on the non-selected side does not perform the ON operation. Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of an analog signal input circuit of an AD converter according to the present invention will be described in detail below with reference to the accompanying drawings.

Embodiment 1. 1 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter according to a first embodiment of the present invention. In FIG. 1, the comparator 11
The DA converter 12 and the DA converter 12 constitute an AD converter as a whole. A configuration example in which two analog signal input terminals 1 and 6 are provided for this AD converter is shown.

One analog signal input terminal 1 is connected to one signal electrode of the transmission gate 4 through the surge protection circuit 3, and the other analog signal input terminal 6 is transmitted through the surge protection circuit 8. It is connected to one signal electrode of the gate 9. The other signal electrodes of the transmission gates 4 and 9 are commonly connected to one input terminal of the comparator 11 via the analog voltage input line 15. The output voltage (reference voltage) of the DA converter 12 is applied to the other input terminal of the comparator 11.

The surge protection circuit 3 is composed of a series circuit of two diodes 3a and 3b connected in the forward direction. The forward end is connected to the power supply 2 and the reverse end is grounded (GND).
And the connection ends of the two diodes 3a and 3b are connected to the connection line between the analog signal input terminal 1 and one signal electrode of the transmission gate 4.

N constituting the transmission gate 4
The selection signal SEL is applied to the gate electrode of the MOS transistor.
0 is applied. The selection signal SEL0 is a PM that constitutes the transmission gate 4 via the inverter 5.
It is adapted to be applied to the gate electrode of the OS transistor.

The surge protection circuit 8 is composed of a series circuit of two diodes 8a and 8b connected in the forward direction, the forward end is connected to the power supply 7, and the reverse end is grounded (G
ND), and the connection ends of the two diodes 8a and 8b are connected to the connection line between the analog signal input terminal 6 and one signal electrode of the transmission gate 9.

N constituting the transmission gate 9
The selection signal SEL is applied to the gate electrode of the MOS transistor.
1 is applied. The selection signal SEL1 is transmitted to the inverter P via the inverter 10 and constitutes the transmission gate 9.
It is adapted to be applied to the gate electrode of the MOS transistor.

The analog voltage input line 15 and the power supply 13 are provided with a diode-connected low threshold PMOS transistor 14. The threshold voltage of the low-threshold PMOS transistor 14 includes the PMOS transistor that constitutes the transmission gate 9 and is normally used P.
The threshold voltage of the MOS transistor is, for example, 0.4 V, which is lower than the threshold voltage of 0.6 V.

Next, the operation of the analog signal input circuit of the AD converter according to the first embodiment configured as described above will be described.

Comparator 1 that constitutes an AD converter
1 and the DA converter 12, the analog voltage input line 15
AD if the upper analog signal voltage is higher than the reference voltage
"H" is output as the conversion result (1 bit), and "L" is output as the AD conversion result (1 bit) when the analog signal voltage is lower than the reference voltage.

Now, the selection signal SEL0 is SEL0 = "H".
Then, it is assumed that the selection signal SEL1 is SEL1 = "L". That is, this is the case where the analog signal input terminal 1 is selected and the analog signal input terminal 6 is not selected. In this case, the transmission gate 4 becomes conductive and the transmission gate 9 becomes non-conductive. Therefore, the analog signal input terminal 1 is electrically connected to the analog voltage input line 15 via the transmission gate 4.

In this state, it is assumed that a voltage (for example, 6V) higher than the power supply voltage Vcc (Vcc = 5V) is applied to the analog signal input terminal 1. The analog signal input terminal 6 is fixed to the “L” level (0 V) as a non-selected terminal.

Since the ON operation voltage of the diode 3a connected to the power source 2 side of the surge protection circuit 3 is about 0.6V, the voltage 6V input to the analog signal input terminal 1 is
It is clamped to a voltage of about 5.6V by the diode 3a. That is, the voltage of 5.6V passes through the transmission gate 4 and appears on the analog voltage input line 15 to the comparator 11.

At this time, in the PMOS transistor which constitutes the transmission gate 9, the voltage of 5.6 V of the analog voltage input line 15 is applied to the other signal electrode, and the voltage of 5 V is applied from the inverter 10 to the gate electrode. There is. Therefore, as it is, the PMOS transistor forming the transmission gate 9 is
Since the threshold voltage is about -0.6V, the on operation is performed.
Then, a situation occurs in which the analog voltage input line 15 is connected to the analog signal input terminal 6 on the non-selected side via the transmission gate 9, which adversely affects the AD conversion operation.

However, in the first embodiment, the power source 13
Between the low voltage threshold and the analog voltage input line 15
A transistor 14 is provided. The low threshold PMOS transistor 14 performs an ON operation at a threshold voltage of 0.4V. In the present example, since the voltage of the analog voltage input line 15 is 5.6V and the voltage Vcc of the power supply 13 is 5V,
The low-threshold PMOS transistor 14 immediately turns on, and the voltage of the analog voltage input line 15 is clamped at 5.4V.

As a result, this analog voltage input line 1
Since the voltage 5.4V of 5 is applied to the gate electrode of the PMOS transistor forming the transmission gate 9, the PMOS transistor maintains the non-conductive state without performing the ON operation. As a result, the analog signal input terminal 6 is not connected to the analog voltage input line 15 and is maintained in a non-conductive state.
It does not adversely affect the conversion operation.

Therefore, in the comparator 11, the voltage 5.4V of the analog voltage input line 15 and the DA converter 1 are used.
By comparison with the reference voltage from 2 (for example, 1/2 Vcc = 2.5 V), it is correctly determined that the reference voltage is higher than 2.5 V, and the conversion result of “H” is output.

Here, in the wafer process, the central value of the transistor threshold is generally controlled.
The center value of the threshold voltage of the PMOS transistor forming the transmission gate 9 is about 0.8V, and when it shifts to the lower limit, it becomes about 0.6V. On the other hand, the threshold voltage of the low-threshold PMOS transistor 14 has a center value of about 0.6 V and is 0.4 when the lower limit is shifted to the lower limit.
It will be about V.

In other words, due to process variations,
The threshold voltage of the PMOS transistor that constitutes the transmission gate 9 and the low threshold PMOS transistor 14
The magnitude relationship with the threshold voltage is not reversed, and as long as the low-threshold PMOS transistor 14 is performing the clamp operation, the PMOS forming the transmission gate 9 is
The transistor does not turn on.

As described above, according to the first embodiment, a simple structure in which one low-threshold PMOS transistor is added to the structure of the analog signal input circuit of the normal AD converter which does not guarantee the application of overvoltage, It is possible to meet the demand for directly inputting an overvoltage higher than the power supply voltage to the selected analog signal input terminal.

Embodiment 2. 2 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter according to a second embodiment of the present invention. In FIG. 2, the first embodiment
Components that are the same as or equivalent to the configuration shown in FIG. 1 are given the same reference numerals. Here, the description will focus on the part related to the second embodiment.

As shown in FIG. 2, in the second embodiment, the diode-connected low-threshold PMOS transistor 14 is omitted in the configuration shown in the first embodiment (FIG. 1), and the analog signal input terminal 1 and the transmission gate are connected. 4 is provided with a diode-connected low-threshold PMOS transistor 22 between a connection line to one signal electrode of 4 and a power supply 21, and a connection line to the analog signal input terminal 6 and one signal electrode of the transmission gate 9 and a power supply 23. A diode-connected low threshold PMOS transistor 24 is provided between and.

The threshold voltage of the low-threshold PMOS transistor 22 depends on the PMOS that constitutes the transmission gate 4.
It is a voltage (0.4V) lower than the threshold voltage (0.6V) of the transistor. The threshold voltage of the low threshold PMOS transistor 24 depends on the transmission gate 9
Threshold voltage (0.6V
The voltage is lower than that of the above) (0.4V).

Next, the operation of the analog signal input circuit of the AD converter according to the second embodiment configured as described above will be described.

Now, the selection signal SEL0 is SEL0 = "H".
Then, it is assumed that the selection signal SEL1 is SEL1 = "L". That is, this is the case where the analog signal input terminal 1 is selected and the analog signal input terminal 6 is not selected. In this case, the transmission gate 4 becomes conductive and the transmission gate 9 becomes non-conductive. Therefore, the analog signal input terminal 1 is electrically connected to the analog voltage input line 15 via the transmission gate 4.

In this state, a voltage of 0 V is applied to the analog signal input terminal 1 on the selected side, and a voltage higher than the power supply voltage Vcc (Vcc = 5 V) is applied to the analog signal input terminal 6 on the non-selected side. It is assumed that (for example, 6 V) is applied.

In this case, the voltage 6V applied to the analog signal input terminal 6 is clamped to a voltage of about 5.6V by the diode 8a connected to the power supply 7 side of the surge protection circuit 8, but the low threshold PMOS. The voltage of 5.6V is immediately clamped to about 5.4V by the transistor 24.

This voltage of 5.4 V is applied to one signal electrode of the transmission gate 9. Since the gate potential of the PMOS transistor forming the transmission gate 9 does not become -0.6 V, the ON operation cannot be performed and the OFF operation state is maintained. That is, even if the overvoltage is applied to the analog signal input terminal 6 on the non-selected side, it does not affect the voltage applied to the analog signal input terminal 1 on the selected side. Therefore, the analog input voltage line 1
At 5, the voltage 0V applied to the analog signal input terminal 1 on the selected side appears correctly.

As described above, according to the second embodiment, the number of elements is larger than that of the first embodiment, but the power supply voltage is applied to both the selected analog signal input terminal and the unselected analog signal input terminal. Since the overvoltage of can be applied,
It is possible to obtain an analog signal input circuit of the AD converter which is more convenient than the analog signal input circuit of the AD converter according to the first embodiment in which it is not allowed.

Third Embodiment 3 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter according to a third embodiment of the present invention. In FIG. 3, the first embodiment
Components that are the same as or equivalent to the configuration shown in FIG. 1 are given the same reference numerals. Here, the description will focus on the part related to the third embodiment.

As shown in FIG. 3, in the third embodiment, in the configuration shown in the first embodiment (FIG. 1), the diode-connected low threshold PMOS transistor 14 is omitted, and the surge protection circuit 3 on the power supply 2 side. A diode-connected low-threshold PMOS transistor 31 is provided instead of the diode 3a, and a diode-connected low-threshold PMOS transistor 32 is provided instead of the diode 8a provided on the power supply 7 side of the surge protection circuit 8. There is.

The threshold voltage of the low-threshold PMOS transistor 31 depends on the PMOS which constitutes the transmission gate 4.
It is a voltage (0.4V) lower than the threshold voltage (0.6V) of the transistor. The threshold voltage of the low threshold PMOS transistor 32 depends on the transmission gate 9
Threshold voltage (0.6V
The voltage is lower than that of the above) (0.4V).

Next, the operation of the analog signal input circuit of the AD converter according to the third embodiment configured as described above will be described.

Now, the selection signal SEL0 is SEL0 = "H".
Then, it is assumed that the selection signal SEL1 is SEL1 = "L". That is, this is the case where the analog signal input terminal 1 is selected and the analog signal input terminal 6 is not selected. In this case, the transmission gate 4 becomes conductive and the transmission gate 9 becomes non-conductive. Therefore, the analog signal input terminal 1 is electrically connected to the analog voltage input line 15 via the transmission gate 4.

In this state, the voltage 0V is applied to the analog signal input terminal 1 on the selected side, and the analog signal input terminal 6 on the non-selected side is higher than the power supply voltage Vcc (Vcc = 5V). It is assumed that (for example, 6 V) is applied.

In this case, the voltage 6V applied to the analog signal input terminal 6 is immediately clamped to a voltage of about 5.4V by the low threshold PMOS transistor 32 connected to the power supply 7 side of the surge protection circuit 8. To be done.

Therefore, the transmission gate 9
In the PMOS transistor configuring the above, since the ON operation cannot be performed and the OFF operation state is maintained, even if the overvoltage is applied to the analog signal input terminal 6 on the non-selected side, it is applied to the analog signal input terminal 1 on the selected side. It does not affect the voltage. That is, the analog input voltage line 15 has
Voltage 0V applied to analog signal input terminal 1 on the selected side
Appears correctly.

As described above, according to the third embodiment, the low-threshold PMOS transistor is provided on the power supply side of the surge protection circuit so as to serve also as the surge protection. Therefore, the analog signal input terminal on the selection side and the non-selection side are selected. A more convenient AD than the analog signal input circuit of the AD converter according to the first embodiment in which an overvoltage higher than the power supply voltage can be applied to both analog signal input terminals of the AD converter is not allowed.
An analog signal input circuit for the converter is obtained. In addition, the number of elements can be further reduced.

[0067]

As described above, according to the present invention, for each input terminal to which an analog signal is applied, surge protection means and a route from the input terminal to the signal line to the AD converter are selected. When the selection signal is supplied to the conduction control means to select one input terminal, the non-selected input terminal is fixed to a low level, When an overvoltage exceeding the power supply voltage is applied to the input terminal, the surge protection diode connected to the power supply side in the surge protection circuit at the input side of the conduction control means on the selected side causes "power supply voltage + on-operation voltage of surge protection diode". Is clamped to the voltage value of “”, and this is output to the signal line from the conduction control means on the selection side to the AD converter. At this time,
Since a diode-connected low-threshold P-type transistor having an operation threshold voltage lower than the operation threshold voltage of the transistor forming the conduction control means is provided between the signal line and the power supply, the voltage of the signal line is: "Power supply voltage +
It is clamped to the voltage value of "ON operation voltage of low threshold P-type transistor". Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted. Thus, with a simple configuration in which one low threshold P-type transistor is added to the common signal line to the AD converter, it is possible to meet the demand for directly inputting an overvoltage exceeding the power supply voltage to the selected input terminal. it can.

According to the next invention, surge protection means for each input terminal to which an analog signal is applied, and conduction control means for connecting / disconnecting the path from the input terminal to the signal line to the AD converter according to the selection signal. In the case of providing one of the conduction control means with the selection signal to select one input terminal, when an overvoltage exceeding the power supply voltage is applied to each input terminal, the surge protection circuit is first connected to the power supply side. The surge protection diode clamps the voltage value of "power supply voltage + ON-operation voltage of the surge protection diode", but is lower than the operation threshold voltage of the transistor forming the conduction control means between the input terminal and the conduction control means. Since the diode-connected low threshold P-type transistor having the operation threshold voltage is provided, the input voltage of each conduction control means is immediately It is clamped to the voltage value of the source voltage + low threshold on operating voltage of the P-type transistor ". With this voltage value, the conduction control means on the non-selected side does not perform the ON operation. Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted. As described above, since the overvoltage exceeding the power supply voltage can be applied to the input terminal regardless of selection or non-selection, the number of elements is slightly increased as compared with the above invention, but the user-friendly AD is used.
An analog signal input circuit for the converter is obtained.

According to the next invention, for each input terminal to which an analog signal is applied, surge protection means, and conduction control means for connecting / disconnecting the path from the input terminal to the signal line to the AD converter according to the selection signal. And providing the selection signal to the conduction control means to select one input terminal, the operation of the transistor constituting the conduction control means as a surge protection diode connected to the power supply side in the surge protection means A diode-connected low threshold P-type transistor having an operating threshold voltage lower than the threshold voltage is provided. Therefore, when an overvoltage exceeding the power supply voltage is applied to each input terminal, the input voltage of each conduction control unit immediately becomes “power supply voltage + low threshold value” due to the low threshold P-type transistor connected to the power supply side in the surge protection circuit. It is clamped to the voltage value of “ON operation voltage of P-type transistor”. With this voltage value, the conduction control means on the non-selected side does not perform the ON operation. Therefore, the conduction control means on the non-selected side maintains the off operation state, so that the overvoltage exceeding the power supply voltage applied to the input terminal on the selected side is correctly AD-converted. In this way, the low threshold P-type transistor is also made to serve the purpose of surge protection. Therefore, an overvoltage exceeding the power supply voltage can be applied to the input terminal regardless of whether it is selected or not. The analog signal input circuit of the instrument is obtained. In addition, the number of elements can be further reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter that is Embodiment 2 of the present invention.

FIG. 3 is a circuit diagram showing a configuration of an analog signal input circuit of an AD converter according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a configuration example of an analog signal input circuit of a conventional AD converter.

[Explanation of symbols]

1,6 Analog signal input terminal, 3,8 Surge protection circuit, 4,9 Transmission gate, 5,10 Inverter, 11 Comparator, 12 DA converter, 1
4, 22, 24, 31, 32 Low threshold PMOS transistor, 15 Analog voltage input line.

Continued front page    F term (reference) 5J055 AX44 AX47 BX17 CX27 DX13                       DX22 EX02 EX07 EY12 EY21                       EZ24 EZ62 FX19 FX22 FX38                       GX01

Claims (3)

[Claims] 1. A surge protection means and a conduction control means for connecting and disconnecting a path from the input terminal to a signal line to an AD converter according to a selection signal are provided for each input terminal to which an analog signal is applied. In the case of applying the selection signal to the control means to select one input terminal, a diode having an operation threshold voltage lower than the operation threshold voltage of the transistor forming the conduction control means between the signal line and the power supply. An analog signal input circuit for an AD converter, characterized in that a low threshold P-type transistor for connection is provided. 2. A surge protection means and a conduction control means for connecting and disconnecting a path from the input terminal to a signal line to an AD converter according to a selection signal are provided for each input terminal to which an analog signal is applied, and the conduction is provided. In the case where one input terminal is selected by giving the selection signal to the control means, between the line from the input terminal to the conduction control means and the power supply, the operation threshold voltage of the transistor forming the conduction control means An analog signal input circuit of an AD converter, wherein a diode-connected low threshold P-type transistor having a low operating threshold voltage is provided. 3. A surge protection means and a conduction control means for connecting and disconnecting a path from the input terminal to a signal line to an AD converter according to a selection signal are provided for each input terminal to which an analog signal is applied, and the conduction is provided. In the case where one input terminal is selected by giving the selection signal to the control means, the surge protection diode connected to the power supply side in the surge protection means is lower than the operation threshold voltage of the transistor forming the conduction control means. An analog signal input circuit of an AD converter, wherein a diode-connected low threshold P-type transistor having an operation threshold voltage is provided.