JP2003333339A - Image encoding apparatus and image encoding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image encoding apparatus and an image encoding method capable of realizing high speed Huffman encoding processing and simplifying encoding processing. <P>SOLUTION: A zero run processing section 7 for a process of counting zero coefficients is provided not in a Huffman encoding section 5 but before the Huffman encoding section 5, the zero coefficients are processed before Huffman encoding and the Huffman encoding section 5 processes non-zero coefficients and a zero run length only. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image coding device,
In particular, JPEG (Joint Photographic Expert Group)
The present invention relates to an image encoding device that compresses and encodes an image by a method.

[0002]

2. Description of the Related Art J is a digital still image encoding system.
PEG is known, and in particular, a baseline method using DCT (discrete cosine transform) is widely used.
FIG. 1 shows a schematic configuration diagram of a conventional image encoding apparatus 100 that performs encoding by the above method. In the image encoding device 100 shown in FIG. 1, first, in the preprocessing unit 101, the input image data is divided into blocks of a predetermined size, for example, blocks each having 8 × 8 pixel values. Next, in the DCT / quantization unit 102, a discrete cosine transform (DCT) is performed on each pixel value block.
on) is applied. With DCT, an 8 × 8 DCT coefficient block is obtained from each 8 × 8 pixel value block. The first DCT coefficient of this 8 × 8 DCT coefficient block indicates the magnitude of the DC (direct current) component of the pixel value block, and the other 63 DCT coefficients have different A frequencies.
The magnitude of the C (alternating current) component is shown. Next, each DCT coefficient in the DCT coefficient block is quantized. Next, the quantized 64 DCT coefficients (1 block) are once D
It is saved in the CT buffer 103. Next, the zigzag scanning unit 104 performs a zigzag scan on the quantized DCT coefficient block (hereinafter, the quantized DCT coefficient is abbreviated as a DCT coefficient) to zigzag each DCT coefficient block. Arrange in a sequence of orders. Then, in the Huffman encoding unit 105, this DC
Two-dimensional Huffman coding (run-length Huffman coding) is applied to the T coefficient sequence to reduce the number of bits.

When DCT is applied to a general digital still image, in the obtained DCT coefficient block, most of high-frequency AC coefficients are zero or a value close to zero. Therefore, by the subsequent quantization, most of the high frequency AC coefficients become zero. Therefore, D obtained by the next zigzag scan
The CT coefficient sequence will include many consecutive columns of zeros. In the diagram of FIG. 2, the actual JPEG (4:
For a natural image of 2: 2), the number of zero coefficients included in all blocks and the number of all data, and the ratio of zero coefficients included in one block (8 × 8 = 64 data) are shown. . From the result of the chart of FIG. 2, the ratio of zero coefficients included in one block is about 65% or more. DC like this
For two-dimensional Huffman coding for a T coefficient block,
The number of bits is effectively reduced by performing the Huffman coding in consideration of the length (zero run length) of the series of consecutive zeros.

That is, in this two-dimensional Huffman coding, a sequence of consecutive zeros appearing in the DCT coefficient sequence and one preceding (or following) non-zero coefficient (non-zero coefficient) are combined. Is treated as one event to be encoded. Then, according to the principle of Huffman coding, shorter symbols are assigned to events having a higher statistical appearance frequency. For example, an event in which the zero run length is zero and the bit length of the subsequent non-zero coefficient is 1 has the highest appearance frequency, and thus the shortest symbol is assigned. Further, the phenomenon that the zero run length is 1 and the bit length of the subsequent non-zero coefficient is 1 has the second highest appearance frequency, so the next symbol is assigned. Similarly, symbols are assigned to other events according to their appearance frequencies. Thus, by two-dimensional Huffman coding that incorporates the two dimensions of zero run length and the subsequent non-zero coefficient,
The total number of bits is effectively reduced.

[0005]

FIG. 3 is a schematic block diagram of the Huffman coding unit 105 in the image coding apparatus 100. In the conventional Huffman encoding unit 105 shown in FIG. 3, first, the DCT coefficient determination unit 110 determines whether or not the DCT coefficient input from the zigzag scanning unit 104 is zero. If the DCT coefficient determination unit 110 determines that the input DCT coefficient is zero,
The zero run counter 111 counts up the number of consecutive zero coefficients (zero run length). When the DCT coefficient determining unit 110 determines that the input DCT coefficient is not zero, the encoding unit 112 determines that the non-zero D
Huffman coding is performed on the CT coefficient, and the count number of zero coefficients (zero run length) counted up to the coefficient before the non-zero DCT coefficient is also coded at the same time. Further, the zero run counter 111 is cleared once the non-zero coefficient is encoded.

FIGS. 4A to 4E show the image coding apparatus 1.
00 shows a time chart in which the Huffman encoding unit 105 operates. FIG. 4A shows an image encoding device 100.
4B, the DCT coefficient input from the zigzag scanning unit 104 is shown in FIG. Figure 4
(C), (D), and (E) show the count value of the zero run count 111, the symbol to be the Huffman code, and the Huffman coding enable signal, respectively. Figure 4
In (A), since the DCT coefficient whose value is 2 is input in the first clock cycle, the zero run counter 111
Does not operate, and the count value is zero as shown in FIG. In the next clock cycle, the Huffman enable signal becomes high level as shown in FIG. 4 (E), and at this time, as shown in FIG. 4 (D), the DCT coefficient (2) and the zero run counter 111 The symbol B is assigned to the count value (0), and Huffman coding is performed. Similarly, the DCT coefficient 1 (2) input in the next clock cycle
And the symbol C is assigned to the count value (0) of the zero run counter 111.

In the following three clock cycles (see FIG.
(A)), three zeros are continuously input (Fig. 4).
(B)), and the zero run counter 111 counts up the number of consecutive zero coefficients (zero run length) (here, 3) (FIG. 4 (C)). Further, in the next clock cycle, the DCT coefficient 3 is input, and the symbol G is assigned to the DCT coefficient (3) and the count value (3) of the zero run counter 111. Then, in the next clock cycle, the count value of the zero run counter 111 is reset to 0. Similarly, the number 2 of the next zero and the next DCT
The symbol J is assigned to the coefficient 1, and the zero run counter 111 is reset.

As described above, the conventional image coding apparatus 10
In 0, one clock is required to count up one zero coefficient, and one clock is required to encode zero run length. As a result, the processing time of Huffman coding is long and high-speed processing is difficult.

The present invention has been made in view of the above problems, and an object of the present invention is to provide an image coding apparatus and a method thereof capable of realizing high-speed Huffman coding processing and simplification of the coding processing. is there.

[0010]

In order to solve the above-mentioned problems, an image coding apparatus of the present invention quantizes an orthogonal transformation means for orthogonally transforming an input image and a coefficient obtained by the orthogonal transformation means. Quantizing means and the number of consecutive zero coefficients among the coefficients obtained by the quantizing means, which counts as zero, counts the number of consecutive zero coefficients L and zeros following the L zero coefficients. It has a zero coefficient processing unit for converting the non-equal coefficient X into one coefficient, and a variable length coding means for performing variable length coding on the coefficient converted by the zero coefficient processing unit.

Further, in the coefficient converted by the zero coefficient processing unit, the upper predetermined number of bits represents the number L of the continuous zero coefficients, and the lower predetermined number of bits is the L zero coefficients. Represents a non-zero coefficient X that follows.

Further, it further comprises a first storage means for storing the coefficient obtained by the quantizing means, and a second storage means for storing the coefficient converted by the zero coefficient processing section.

In order to solve the above-mentioned problems, the image coding method of the present invention orthogonally transforms an input image, quantizes the orthogonally transformed coefficient, and quantizes the quantized coefficient with consecutive zeros. Counting the number of zero coefficients, the number of consecutive zero coefficients L and the nonzero coefficient X following the L zero coefficients are converted into one coefficient, and the converted coefficient Variable-length encoding is performed on the.

In the transformed coefficients, the upper predetermined number of bits represents the number of consecutive zero coefficients L, and the lower predetermined number of bits is the nonzero coefficient X following the L zero coefficients. Represents

According to the image coding apparatus and the image coding method described above, the process of counting the zero coefficient is omitted from the Huffman coding unit and is performed before the Huffman coding. This allows
The number of clocks used for Huffman coding is reduced, the processing time of Huffman coding can be shortened, and the processing speed can be improved.

[0016]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an image coding apparatus and an image coding method according to the present invention will be described below with reference to the accompanying drawings. FIG. 5 is a schematic configuration diagram of the image encoding device 10 according to the embodiment of the present invention. The image coding apparatus 10 shown in FIG. 5 includes a preprocessing unit 1, a DCT / quantization unit 2, a first DCT buffer 3, a zigzag scanning unit 4, a zero run processing unit 7, a second DCT buffer 8, and Huffman coding. Including part 5.

In the image coding apparatus 10 shown in FIG. 5,
The preprocessing unit 1 performs color conversion for converting the color space of the input image data from RGB to YUV (YCbCr), and blocking processing for subdividing the image of each of the three color components into blocks of size 8 × 8, for example. Next, in the DCT / quantization unit 2, each pixel value block is subjected to two-dimensional DCT, and an 8 × 8 DCT coefficient block is obtained from each 8 × 8 pixel value block by DCT. Next, each coefficient block is quantized using a different quantization step for each DCT coefficient. Next, the quantized 64 DCT coefficients (1 block) are temporarily stored in the first DCT buffer 3.

Next, the zigzag scanning unit 4 performs a zigzag scan on the quantized DCT coefficient block read from the first DCT buffer 3, and the DCT coefficients of the DCT coefficient block are first increased in the low frequency range. The areas are arranged in the order of being afterwards. FIGS. 6A and 6B are diagrams illustrating zigzag scanning. Figure 6
In (A) and (B), the numbers 1 to 64 represent the respective coefficients of the 8 × 8 data block. As shown in FIG. 6A, the quantized DCT coefficients stored in the first DCT buffer 3 before the zigzag scan are 1 to 6
They are arranged in the order up to 4. The coefficients arranged in this way are read from the first DCT buffer 3 and
Zigzag scanning is performed as indicated by the arrow in FIG. 6A, and the DCT coefficients are arranged in the order shown in FIG. 6B.

Next, the zero run processing section 7 processes the zero coefficient and the non-zero coefficient separately. FIG. 7 shows the zero run processing unit 7.
An example of the configuration will be shown. As shown in FIG. 7, the zero run processing unit 7 includes a DCT coefficient determination unit 11 and a zero run counter 1.
2, including the synthesizing unit 13. FIG. 8 is a flowchart for explaining the operation of the zero run processing unit 7 shown in FIG. Step 61: The quantized DCT coefficient is input from the zigzag scanning unit 4 to the zero run processing unit 7. Step 62: The DCT coefficient determination unit 11 determines whether the DCT coefficient input from the zigzag scanning unit 4 is zero. Step 63: When it is determined that the input DCT coefficient is zero, the zero run counter 12 counts up the number of consecutive zero coefficients (zero run length).
Then, returning to step 61, the next input DCT
The coefficient is determined to be zero. The counted zero coefficient is not stored in the second DCT buffer 8.

Step 64: The DCT coefficient judging section 11
When it is determined that the input DCT coefficient is not zero, the synthesis unit 13 counts the non-zero DCT coefficient and the number of zero coefficients counted up to the coefficient before the non-zero DCT coefficient (zero run length). And are merged to obtain the new coefficient. In the new coefficient, the upper 4 bits represent zero run length and the lower 11 bits represent the non-zero DCT coefficient.

Step 65: The synthesized new coefficient is temporarily stored in the second DCT buffer 8. Then, the Huffman coding unit 5 performs Huffman coding on the combined coefficient read from the second DCT buffer 8. Also, the zero run counter 12 is cleared once the non-zero coefficients have been encoded.

FIGS. 9A to 9D show the image coding apparatus 1.
0 shows a time chart in which the Huffman encoder 5 operates. FIG. 9A shows the clock signal of the image coding apparatus 10, and FIG. 9B shows the DCT coefficients input from the second DCT buffer 8 to the Huffman coding unit 5. 9C and 9D show the count value of the zero run count 12 and the Huffman coded symbol, respectively. As can be seen from comparison with the time charts of the conventional image encoding device 100 shown in FIGS. 4A to 4E, the Huffman encoding unit 105 in the conventional image encoding device 100 has a large number of zero coefficients. Is input and the Huffman coding unit 105 counts and processes the large number of zero coefficients, whereas the Huffman coding unit 5 in the image coding apparatus 10 according to the embodiment of the present invention uses non-zero coefficients. And zero run length data only.
That is, in each clock cycle shown in FIG.
The non-zero DCT coefficients 2, 1, 3, shown in FIG.
1 is input, and the zero run length data shown in FIG. 9 (C) is also input together with it, and for each DCT coefficient and zero run length, the symbol B shown in FIG. 9 (D), C, G and H are assigned and Huffman coding is performed.

As described above, the zero coefficient is not input to the Huffman encoder 5, but the DCT coefficient and the zero run length are input at one time. In the conventional image encoding device 100, since the Huffman encoding device 100 counts zero data and encodes DCT coefficients, 64 clocks are always used to process one block consisting of 64 DCT coefficients. However, the Huffman coding unit 5 of the image coding apparatus 10 according to the embodiment of the present invention
Does not perform processing on zero data and can always encode one data in one clock.

As shown in FIG. 2, the number of zero data contained in one block is about 65% or more. Therefore, by applying the present invention, the data processed by the Huffman coding unit 5 is one block. Half of 64 data (32 data)
It becomes the following. This allows the Huffman coding according to the present invention to process one block in approximately 12 to 32 clocks, whereas the prior art used 64 clocks to process one block. Further, in principle, the second DCT buffer should have a capacity half that of the first DCT buffer. Of course, in consideration of versatility, the second DCT buffer may have the same capacity as the first DCT buffer.

According to the present embodiment, the process of counting the zero coefficient is removed from the Huffman coding unit and is performed before the Huffman coding, whereby the number of clocks used for the Huffman coding is reduced, and the Huffman coding process is performed. The time can be shortened and the processing speed can be improved.

Although the present invention has been described above based on the preferred embodiments, the present invention is not limited to the embodiments described above, and various modifications can be made without departing from the gist of the present invention. Is. The image encoding device described in the present embodiment is an example, and various modifications of its configuration are possible.

[0027]

According to the present invention, in the Huffman coding process, the D time is about half or less compared with the conventional technique.
It becomes possible to encode the CT coefficient. This allows
The Huffman coding algorithm is simplified,
The processing time is short and the processing speed can be increased. Further, in the Huffman encoding process, the supply of the number of clocks can be reduced, so that the power consumption of the image encoding device can be reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a conventional image encoding device.

FIG. 2 DC in which the value in the JPEG file is zero
It is a chart which shows the number and ratio of T coefficient.

FIG. 3 is a configuration diagram of a Huffman encoding unit in a conventional image encoding device.

4A to 4E are time charts for explaining the operation of the Huffman coding unit in the conventional image coding apparatus.

FIG. 5 is a configuration diagram of an image encoding device according to an embodiment of the present invention.

FIG. 6 is a diagram showing a zigzag scan process in the image encoding device according to the embodiment of the present invention.

FIG. 7 is a configuration diagram of a zero coefficient processing unit in the image encoding device according to the embodiment of the present invention.

FIG. 8 is a flowchart illustrating an operation of Huffman encoding processing in the image encoding device according to the embodiment of the present invention.

FIG. 9 is a time chart explaining the operation of the Huffman coding unit in the image coding apparatus according to the embodiment of the present invention.

[Explanation of symbols]

1 ... Preprocessing unit, 2 ... DCT / quantization unit, 3 ... First DC
T buffer, 4 ... Zigzag scanning unit, 5 ... Huffman coding unit, 7 ... Zero run processing unit, 8 ... Second DCT buffer, 10 ... Image coding device, 11 ... DCT coefficient determination unit,
12 ... Zero run counter, 13 ... Compositing section, 100 ... Image coding apparatus, 101 ... Preprocessing section, 102 ... DCT / quantization section, 103 ... DCT buffer, 104 ... Zigzag scanning section, 105 ... Huffman coding section, 110 ... DCT coefficient determination unit, 111 ... Zero run processing unit, 112 ... Zero run counter.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hitomi Horigome             134, Kobe-cho, Hodogaya-ku, Yokohama-shi, Kanagawa               Sony LSI Design Stock Association             In-house F-term (reference) 5C059 KK15 MA00 MA23 MC11 MC38                       ME02 PP01 PP15 PP16 TA57                       TB07 TC04 TC06 TD07 UA02                       UA32                 5C078 AA04 BA57 CA31 DA01 DA05                 5J064 AA03 BA09 BA16 BB13 BC01                       BC05 BC08 BC16 BD01

Claims (5)

[Claims] 1. An orthogonal transform means for orthogonal transforming an input image, a quantizing means for quantizing the coefficient obtained by the orthogonal transform means, and a continuous zero in the coefficient obtained by the quantizing means. A zero coefficient processing unit that counts the number of zero coefficients, and combines the number L of consecutive zero coefficients with a non-zero coefficient X that follows the L zero coefficients, and converts the coefficient into one coefficient. An image coding apparatus having variable length coding means for performing variable length coding on the coefficient converted by the zero coefficient processing unit. 2. In the coefficient converted by the zero coefficient processing unit, the upper predetermined bit number represents the number L of the continuous zero coefficients, and the lower predetermined bit number is the L zero coefficients. The image coding apparatus according to claim 1, wherein the image coding apparatus represents a coefficient X that is not zero and that follows X. 3. The method according to claim 2, further comprising: first storage means for storing the coefficient obtained by the quantizing means, and second storage means for storing the coefficient converted by the zero coefficient processing section. The image encoding device described. 4. An input image is orthogonally transformed, the orthogonally transformed coefficient is quantized, the number of zero coefficients that become consecutive zeros in the quantized coefficient is counted, and the consecutive zero coefficient is counted. Number L
And the non-zero coefficient X following the L zero coefficients are converted into one coefficient, and variable length coding is performed on the converted coefficient. 5. In the transformed coefficient, a predetermined number of higher bits represents the number L of the consecutive zero coefficients, and a predetermined number of lower bits is not zero following the L zero coefficients. The image coding method according to claim 4, wherein the coefficient X is represented.