JP2003330875A - Pci device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a PCI device having one basic structure and capable of easily selectively setting a function to be operated based on it. <P>SOLUTION: In this multi-function PCI device having a plurality of functions, the configuration resister of at least one faction of the functions is set so as not to be readable or writable from a host, whereby this function is made to look not mounted. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a PCI device,
In particular, it relates to a multifunction PCI device.

[0002]

2. Description of the Related Art Recent personal computers (personal computers), especially portable computers, are mainly small but multifunctional. Of course, the PCI (Peripheral) used internally
Component Interface devices are also being integrated with multiple functions.

However, a personal computer manufacturer intends to incorporate or remove a specific function depending on the personal computer model in order to diversify the production model.
At this time, according to each personal computer function, for example, a personal computer
When a device such as an I device is developed, the number of types of devices to be developed is increased and thus the development cost is increased. Further, as the number of types of devices increases, it becomes necessary to develop a board for each of them, which also leads to an increase in cost.

[0004]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a PCI device which has one basic structure and on which a function to be operated is easily selected and set.

[0005]

The present invention has been made to achieve the above object. The PCI device according to claim 1 of the present invention is a multi-function PCI device having a plurality of functions. In the PCI device, the configuration register of at least one function of the plurality of functions is set so that the host cannot perform read processing or write processing, so that the function appears not to be implemented. And

In the PCI device according to the second aspect of the present invention, when the function on the lower address side among a plurality of functions is made invisible, the address of the function of the upper address shifts to the lower position, and thus the function 2. The PCI device according to claim 1, wherein the missing address of the address does not occur.

In the PCI device according to the third aspect of the present invention, when the function address is shifted,
3. The PCI device according to claim 2, wherein the PCI interrupt signal used by the function is also automatically synchronized and shifted.

In the PCI device according to the fourth aspect of the present invention, when the function uses a function that is invisible to the host, the function stops the operation of the element used inside the device, and thus unnecessary. The PCI device according to any one of claims 1 to 3, wherein power consumption is eliminated.

A PCI device according to a fifth aspect of the present invention is characterized in that the PCI device has a setting bit in the configuration register in order to utilize the state of the function in which the function is invisible to the host. The PCI device according to claim 4.

The PCI device according to claim 6 according to the present invention is provided with an external pin in order to utilize the state of the function in which the function is invisible to the host. The PCI device according to any one of the above.

A PCI device according to a seventh aspect of the present invention is a multi-function PCI device having a plurality of functions. The PCI device is characterized in that the function address can be flexibly set.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the drawings.

In recent years, particularly portable type personal computers are mainly small and multifunctional. As a matter of course, the PCI device used internally is also being integrated with a plurality of functions. However, personal computer manufacturers try to incorporate or remove specific functions depending on the personal computer model, with the intention of diversifying the production models.

For example, first, PCI-CardBusB
ridge (2 slots) and IEEE 1394 I / F
In the case of a product that integrates (interface), the number of functions is "3". In this case, as the function settings for this product, (1) settings for using all functions, (2) “PCI-Car
dBusBridge1 Slot "and" IEEE13
94 ”, setting to use 2 functions, (3)
"PCI-CardBusBridge 2 slots"
Only, setting using two functions, etc. can be considered.

In the present specification, each of the three functions of the above-described product is given a "No.", and the first "PCI-CardBusBridge" slot (PCI-CardBusBridge SLO) is used.
TA) to “Func.0”, the second “PCI-CardBusBridge” slot (PCI-CardBusBridge SLO).
TB) is referred to as "Func.1", and IEEE 1394 I / F is referred to as "Func.2".

<< First Embodiment >> The PCI-Ca described above.
rdBusBridge (2 slots) and IEEE1
Assume a product integrated with 394 I / F (interface). FIG. 1 is a schematic block diagram showing the configuration of such a PCI device 2. The three functions are the first PCI-CardBusBrid.
ge slot 10, second PCI-CardBusBr
These are an idge slot 12 and an IEEE 1394 interface 14. Each function is connected to the PCI bus 4 via the bus slave 8. Further, each function (10, 12, 14) is provided with a configuration register set 16, respectively. By accessing the register set 16 in the software on the host side, the function status of the device can be grasped.

Here, "" PCI-CardBusBr
image 1 slot "and" IEEE 1394 ",
2 setting that uses function ”, F
unc. 1 may be made "invisible" by the access from the host side. By doing so, it is possible to make the device look as if it is configured by only the above-mentioned two functions.

Similarly, "" PCI-CardBusBr
If the setting is “2 slots using only 2 functions”, Func. 2 may be made "invisible" by the access from the host side.

First, Func. 2 is made invisible by the access from the host side.
The CI device 2'is shown using the schematic block diagram of FIG. Prior to the description of FIG. 3, a timing chart of the basic PCI read cycle of FIG. 2 will be described.

For access, the host side asserts (Low) the FRAME # signal, and at the same time, the address (AD / DA
Start by issuing TA). In the case of a configuration cycle, IDSEL is "Hi" here.
gh ”.

Next, the host asserts IRDY # and simultaneously deasserts FRAME #. The device must meet the conditions for the address phase (address, IDS
(EL, etc.) is decoded, and if it corresponds to itself, DEVSEL # is asserted in the next cycle.
In the case of "read", when the data is ready, the device asserts TRDY #, simultaneously outputs the data, and ends the access.

Of the above addresses (bit 31: 0), 3 bits (bits) of [bit 10: 8] are the function number. Is defined as. That is, it is possible to have eight kinds of functions from 000b to 111b.

The host (from the software) is the function No. Access from 000b in order. In the case of the three types of functions as described above (in FIG. 1), when accessing 000b, 001b, 010b, the device side asserts DEVSEL # and responds to the access. On the other hand, 011b, 100b, 101
b, 110b, 111b access to DEV
Do not assert SEL # (master abort). The host (software of the host) recognizes from these operations that it is a device that supports three functions.

Now, a process (see FIG. 3) of making some functions invisible so that the functions are not implemented by the host will be described. In the above device (FIG. 1), Func. 2 (IEEE1394) can be made invisible by a configuration access from the host. The device does not respond to the access of 010b, that is, the device is the DEV
It is not necessary to assert SEL #. Therefore, by applying a predetermined setting to the circuit, the Func. To make 2 invisible to the host, simply remove “010b” from the decoding condition that asserts DEVSEL # (FIG. 3).

<Second Embodiment> Fig. 4 is a schematic block diagram of a PCI device 2 "according to a second embodiment of the present invention. In the first embodiment, Func.2 is a host side. Although it is set to be “invisible” by access from the Func. 1 is set to be "invisible" by the access from the host side.

However, in this case, as in the first embodiment,
Function No. If the device does not respond to the access of 001b, the device responds to 000b, does not respond to 001b, and responds again to 010b. By the way, it is assumed that some software running on the host side does not access the subsequent functions when it does not respond to 001b. Then, from the host side, Fu
nc. A situation occurs in which the second IEEE 1394 interface cannot be grasped.

In order to avoid the above situation, the second embodiment avoids the setting that the device does not respond to 001b. That is, 010 in response to 000b and 001b
Do not react after b, and by 001b,
As the host accesses the configuration register 16 of the IEEE 1394 interface 14,
Set.

In the circuit, similar to the first embodiment, "010b" is removed from the decoding condition for asserting DEVSEL #, and the configuration register set 16 accessed by the host at 001b is replaced with the second PCI-CardBusBridge. The slot 12 is changed to that of the IEEE 1394 interface 14.

For example, each function (10, 12,
It is assumed that the access signal (RDB / WRB) signal for the configuration register set 16 of 14) is set as follows in the basic configuration of FIG.・ Func. 0: RDB0 / WRB0, Func. 1: RDB1 / WRB1, Func. 2: RDB2 / WRB2 As shown in FIG. 4, Func. In order to make the function of 1 invisible to the host, “RDB2 / WRB2” may be output at the time of access of 001b.

<< Third Embodiment >> In the basic PCI device 2 shown in FIG. 1, a PCI interrupt signal is generally set as follows for each function.・ Func. 0: INTA # -Func. 1: INTB # -Func. 2: INTC #

By the way, as in the second embodiment, as shown in FIG.
Of the basic configuration of Func. 1 (that is, the first PCI-Ca
rdBusBridgeBridge slot 10) is made invisible to the host, and Func. 1 becomes the IEEE 1394 interface 14 (FIG. 4), and the interrupt signals are: Func. 0: INTA # -Func. 1: It becomes INTC #. Such a structure is unnatural as a device. That is, “Func.1: INTB #” is desirable in relation to other elements.

Since the interrupt signal is a simple output signal, the third preferred embodiment described above can be realized only by adding a simple multiplexing circuit to the second preferred embodiment.

Furthermore, each function (10, 12, 1)
The configuration register set 16 of 4) usually has a bit (Interrupt / Pin register) indicating which interrupt signal is used. Therefore, it is desirable that this value is also set so as to be automatically matched.

<< Fourth Embodiment >> When the function is hidden from the host as shown in the first to third embodiments, for example, the function has a clock inside the device. However, if they are still operating, they will consume unnecessary power.

Therefore, when the function is set to be invisible, it is preferable to stop the clock or the like used by the function inside the device.

The fourth embodiment for performing the above stop is "A
This can be achieved by adding a simple gate such as ND ”or“ OR ”to the circuit.

<Fifth Embodiment> In order to use the function of making a function invisible in a mode in which the function is made invisible to the host, which is shown in the above-described first to fourth embodiments, Some kind of configuration is required. An internal register is defined as one of the configurations,
Is mentioned. For example, the user area of the configuration register set 16 (that is, the area not specified by the standard and freely set by the device maker)
Define the function disable register in.

However, if the register (internal register or function disable register) is arranged in the configuration register set 16 of the function which should be invisible, the only way to recover is to reset the register. Therefore, it is desirable that the function disable register be defined for different functions. For example, F
unc. The disable register of No. 1 is Func. 2 in Func. 2 disable register is Fun
c. Defined within 1.

<< Sixth Embodiment >> When the internal registers are provided in the fifth embodiment, it is necessary to set these internal registers by the system BIOS or the like. It puts a strain on the software. At the same time, depending on the system configuration, software such as BIOS must be changed, and if the system (configuration) is different, the software cannot be shared.

Therefore, in addition to the above-mentioned mode of setting the internal register, a mode in which a disable pin for setting is installed outside can be assumed. That is, pulling up / pulling down this pin externally is matched with the setting whether the function is visible or invisible from the host.

The above-mentioned pins may be dedicated to this embodiment, but may be pins shared with other functions. For example, a method is conceivable in which other output pins are set to the input mode during the reset period, and the states of the pins during that period are fetched and set.

<< Seventh Embodiment >> In the first to sixth embodiments, in a PCI device having a plurality of functions, the function is implemented from the host by making the configuration register invisible to the host. Make it look like it doesn't. In this embodiment, access to the function can be flexibly changed. Here, the function N
o. I will be able to make a missing number.

In this embodiment described above, by flexibly changing the access to the function,
It is possible to change the priority of the function.
Normally, the host software is function number. At 000b, the access is started in order, and, of course, the function No. Is recognized from the lower side of. For example, since the device 2 in FIG. 1 is configured as follows, the first “PCI-CardBusBridge”
Slot (PCI-CardBusBridge S
LOTA).・ Func. 0: PCI-CardBusBridge
SLOTA Func. 1: PCI-CardBusBridge
SLOTB Func. 2: IEEE 1394 I / F

The above-mentioned configuration is used as follows: Func. 0: IEEE1394 I / F. Func. 1: PCI-CardBusBridge
SLOTA Func. 2: PCI-CardBusBridge
By changing to SLOTB, the host will change to "IEEE1394
The I / F ”is recognized, and the driver loading process and the like are preferentially performed by the“ IEEE1394 I / F ”.

By providing the missing number, it is possible to realize a plurality of functions by the multichip module. The multi-chip module here is one in which a plurality of devices are bonded in one package (for example, BGA, CSP, etc.) and used as one device.

In the normal PCI device, first, the Func.
Use 0. If two PCI devices are put in one package and the wiring of the PCI bus 4 is made common, both devices will react by the configuration access from the host to 000b. But,
Function No. You can solve the problem by using the missing number.

For example, one PCI device (first P device
(CI device) is "PCI-CardBusBridge
e 2 slots ”and the other PCI device (second PCI device) has only“ IEEE 1394 ”, and they are bonded in one package and used as one device. At this time, in the second PCI device (IEEE1394),
When a multi-chip module is formed by making 000b and 0001 a missing number and reacting with 010b, it becomes a device which is apparently equivalent to the three-function device shown in FIG.

[0048]

As is apparent from the above description, the following effects can be obtained by utilizing the present invention.

By using the PCI device of the first embodiment according to the present invention, it becomes possible to select the function with one device, and the device development can be done with only one model. PC manufacturers can also share parts such as boards.
Therefore, the cost can be reduced for both device development and host (computer) development.

By using the PCI device of the second embodiment according to the present invention, the function No. Since the missing number does not occur, there is no possibility that the system will malfunction.

By using the PCI device of the third embodiment according to the present invention, the function No. If the device is shifted, the interrupt signal is used intermittently, and the device will not be unnatural.

By using the PCI device of the fourth embodiment according to the present invention, unnecessary power consumption can be eliminated when the function becomes invisible to the host.

By using the PCI device of the fifth embodiment according to the present invention, it is possible to make settings for using the function of making the function invisible in the first to fourth embodiments. .

By using the PCI device of the sixth embodiment according to the present invention, the load of software for using the functions of the fifth embodiment is eliminated. Even if the system changes, the BIOS can be shared.

By using the PCI device of the seventh embodiment according to the present invention, it becomes possible not only to make the function invisible but also to change the priority order of the function. Furthermore, it becomes possible to support a multi-chip module.

[Brief description of drawings]

FIG. 1 is a schematic block diagram showing a configuration of a conventional PCI device in which a PCI-CardBusBridge (2 slots) and an IEEE 1394 interface are integrated.

FIG. 2 is a timing chart of a basic PCI read cycle.

FIG. 3 is a schematic block diagram of a PCI device of a first embodiment according to the present invention.

FIG. 4 is a schematic block diagram of a PCI device of a second embodiment according to the present invention.

[Explanation of symbols]

2, 2 ', 2 "... PCI device, 4 ... PCI
Bus, 10 ... 1st PCI-CardBusBri
dge slot, 12 ... Second PCI-Card B
usBridge slot, 14 ... IEEE139
4 interfaces, 16 ... Configuration register set.

Claims (7)

[Claims] 1. In a multi-function PCI device having a plurality of functions, by setting a configuration register of at least one function of the plurality of functions so that a host cannot perform read processing or write processing, A PCI device characterized by appearing as not implemented. 2. When a function on the lower address side among a plurality of functions is made invisible, the function address of the upper address shifts to the lower position, and thus the missing address of the function does not occur. The PCI device according to claim 1. 3. The PCI device according to claim 2, wherein when the address of the function is shifted, the PCI interrupt signal used by the function is also automatically synchronized and shifted. 4. The function, when the function uses a function that is invisible to the host, stops the operation of an element used inside the device, thereby eliminating unnecessary power consumption. The PCI device according to any one of claims 1 to 3. 5. The PCI according to any one of claims 1 to 4, wherein the function has a setting bit in the configuration register in order to utilize the state of the function which is hidden from the host. device. 6. The PCI device according to claim 1, wherein an external pin is provided in order to utilize the state of the function in which the function is hidden from the host. 7. A PCI device having a plurality of functions, wherein a function address can be flexibly set.