JP2003318414A - Super abrupt junction-type varactor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve a performance index Q of a super abrupt junction-type varactor. <P>SOLUTION: A lightly doped N- type semiconductor layer 3 is formed on a heavily doped N+ type semiconductor substrate 2. A P+ type layer 3 is the P+ type diffusion layer formed by ion-implanting P-type impurities from a main surface of the semiconductor layer 3. An N+ type layer 5 is a diffusion layer formed adjacently to the P+ type layer 4 just below the P+ type layer 4, and it is formed by ion-implanting N-type impurities in a way similar to the P+ type layer 4. A guard ring 6 is a circular diffusion layer formed to surround a periphery of the P+ type layer 4 and the N+ type layer 5, and the ring mainly improves breakdown voltage. For improving the performance index Q, red phosphorus (P) is ion-implanted to the semiconductor substrate 2 and specific resistance of the semiconductor substrate 2 is dropped. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to improvement of a figure of merit Q of a hyper-stair junction type variable capacitance diode.

[0002]

2. Description of the Related Art Generally, a super staircase junction type variable capacitance diode is a diode whose capacitance value is variable by controlling the spread of a depletion layer caused by an applied potential difference, and is mainly used for radio tuning. .

FIG. 3 shows a general super staircase junction type variable capacitance diode (hereinafter, referred to as superstaircase junction type varactor diode 31).
Is a sectional view of FIG.

A low concentration N− type semiconductor layer 33 is formed on a high concentration N + type semiconductor substrate 32. Semiconductor layer 33
Is an epitaxial layer formed by, for example, an epitaxial growth method.

The P + type layer 34 is a P + type diffusion layer formed by ion-implanting P type impurities from the main surface of the semiconductor layer 33. The N + type layer 35 is a diffusion layer formed immediately below the P + type layer 34 so as to be adjacent to the P + type layer 34 so as to form a PN junction, and similarly to the P + type layer 34, ion implantation of N type impurities is performed. Formed. The guard ring 36
It is an annular diffusion layer formed so as to surround the P + type layer 34 and the N + type layer 35, and is mainly for improving the breakdown voltage.

[0006]

By the way, since the hyper-stair junction varactor diode 31 is used in an FM radio tuner, it is required to receive a tuning reception frequency wider than that of an AM radio tuner and to have good sensitivity. . For that purpose, it is necessary to maintain a high figure of merit Q (a numerical value of the high frequency characteristics of the transistor). If the figure of merit Q is high, it means that the high frequency characteristics of the hyper-staircase junction type varactor diode are high, and that the sensitivity is good even in high frequency reception.

Here, the performance index Q can be expressed by Q = 1 / (2π · f · Ct · rs). f is the received frequency, Ct is PN
Junction capacitance and rs represent series resistance values, respectively. That is,
In order to increase the figure of merit Q, since 2π and the reception frequency f are constant values, the PN junction capacitance Ct or the series resistance value rs
Need to lower. Here, the series resistance value rs depends on the specific resistance of the semiconductor substrate 32.

In order to reduce the series resistance value rs in the hyper-stair junction type varactor diode 31, therefore, arsenic (As) or antimony (Sb) is introduced into the semiconductor substrate 32 to lower the specific resistance of the semiconductor substrate 32 and increase it. There is a method of improving the performance index Q by increasing the concentration, but the effect was insufficient.

[0009]

The present invention provides a semiconductor substrate 32.
Arsenic (As) described above is used as an impurity for ion implantation into
By using phosphorus (P), which has a higher solid solubility in silicon than that of antimony (Sb) and has a low specific resistance, particularly red phosphorus (P), the series resistance value of the super-step junction varactor diode 31 is increased. To improve the figure of merit Q to provide a high quality FM radio tuner.

According to claim 1 of the present invention, a semiconductor substrate of one conductivity type, a semiconductor layer of one conductivity type having a low concentration formed on the semiconductor substrate, and an opposite conductivity type formed from the main surface of the semiconductor layer. In a super stair junction variable capacitance diode having a diffusion layer and a high-concentration one-conductivity-type diffusion layer formed immediately below the opposite-conductivity-type diffusion layer, red phosphorus is applied to the semiconductor substrate. The present invention provides a super staircase junction variable capacitance diode characterized by reducing the specific resistance of the semiconductor substrate.

According to a second aspect of the present invention, a one-conductivity type guard ring is formed around the opposite-conductivity-type diffusion layer and the one-conductivity type diffusion layer. Type variable capacitance diode is provided.

[0012]

1 is a cross-sectional view of a semiconductor device of the present invention, showing a super stair junction type variable capacitance diode 1.

A low concentration N− type semiconductor layer 3 is formed on a high concentration N + type semiconductor substrate 2. Mainly the semiconductor layer 3
Is an epitaxial layer formed by an epitaxial growth method.

The P + type layer 4 extends from the main surface of the semiconductor layer 3 to P
This is a P + type diffusion layer formed by ion implantation of a type impurity. The N + type layer 5 is a diffusion layer formed immediately below the P + type layer 4 and adjacent to the P + type layer 4, and is formed by ion implantation of N type impurities similarly to the P + type layer 4. The guard ring 6 is an annular diffusion layer formed so as to surround the P + type layer 4 and the N + type layer 5, and is mainly for improving the breakdown voltage.

FIG. 2 shows an impurity concentration distribution (profile) in the cross section taken along the line XX 'in FIG. When the junction depth is 0 to 1.5 μm, the P + type layer 4 is located,
The peak value of the impurity concentration is 5 × 10 ¹⁹ (atoms · c
m ^-3 ). When the junction depth is 1.5 to 2.0 μm,
The N + type layer 5 is located, and the peak value of the impurity concentration is 2 ×
It is 10 ¹⁷ (atoms · cm ⁻³ ). Bonding depth is 2.0 ~
The semiconductor layer 3 is located up to 2.5 μm, and its impurity concentration is 3 × 10 ¹⁶ (atoms · cm ⁻³ ) and has a constant value. When the junction depth is 2.5 or less, the semiconductor substrate 2 is located, and the peak value of the impurity concentration is 4 × 10 ¹⁹ (atoms · cm ⁻³ ) (see solid line in FIG. 2: P Sub).

Here, it is shown for comparison with arsenic (As) and antimony (Sb) in which impurities are implanted into the semiconductor substrate 2 in the conventional example. In the semiconductor substrate 2, arsenic (As) is
The impurity concentration becomes 3 × 10 ¹⁹ (atoms · cm ⁻³ ) (see As Sub indicated by a broken line in FIG. 2). In the antimony (Sb) semiconductor substrate 2, the impurity concentration is 4 ×.
10 ¹⁸ (atoms · cm ⁻³ ) (Sb S indicated by the broken line in FIG. 2)
ub).

That is, the semiconductor substrate 2 into which red phosphorus (P), arsenic (As) and antimony (Sb) have been ion-implanted, respectively.
The peak value concentration of P Sub, As Sub, Sb Su
Letting b be, P Sub> As Sub> Sb Sub.

According to the experiments conducted by the present inventor, the following results were obtained (when f = 1 (MHz)).

The impurities of the semiconductor substrate are antimony (S
b), arsenic (As), and red phosphorus (P), their performance indexes Q (at 1 V) were 30, 40, and 48, respectively.

As described above, when red phosphorus (P) is ion-implanted in the semiconductor substrate 2 as an impurity, the figure of merit Q is 1.2 times that of the semiconductor substrate in which antimony (Sb) is implanted, and arsenic (As). For the semiconductor substrate in which
A result of 1.6 times was obtained.

[0021]

As described above, by performing ion implantation of red phosphorus (P) having a small specific resistance into the semiconductor substrate 2 as an impurity, the performance index Q is about 1.2 times or 1.6 times that of the conventional example. Has improved. The improved performance index Q allows the hyper-stair junction varactor diode 31 to have a wide tuning reception frequency as an FM radio tuner.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing a hyper-step junction variable capacitance diode of the present invention.

FIG. 2 is an impurity concentration in a cross-sectional view taken along the line XX ′ of FIG.

FIG. 3 is a cross-sectional view showing a conventional hyper-step junction variable capacitance diode.

Claims (2)

[Claims] 1. A semiconductor substrate of one conductivity type, a low-concentration semiconductor layer of one conductivity type formed on the semiconductor substrate, a diffusion layer of an opposite conductivity type formed from a main surface of the semiconductor layer, A super staircase junction type varactor diode having a high-concentration one-conductivity-type diffusion layer formed directly adjacent to a conductivity-type diffusion layer, wherein the impurity of the semiconductor substrate is red phosphorus. Is a super stair junction type variable capacitance diode. 2. The super staircase junction type variable capacitance diode, wherein a guard ring of one conductivity type is formed around the diffusion layer of the opposite conductivity type and the diffusion layer of the one conductivity type.