JP2003318262A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device of fuse wiring structure wherein fuse blow for electrically disconnecting fuse wiring is facilitated, and quality of the fuse wiring and its peripheral part is hard to be deteriorated. <P>SOLUTION: A Cu fuse wiring 1 is constituted of a leading-out wire 5 for a fuse and a fuse main body 2 which is arranged above the wire 5 and electrically connected with the wire 5, and formed on an Si substrate 3. An interlayer insulating film 4 as an insulating film and a Cu diffusion preventing film 7 are laminated so as to cover the Cu fuse wiring 1. A recessed part 9 for facilitating the fuse blow is formed above the fuse main body 2. The fuse main body 2 is formed to be smaller than the width and the length of a bottom 10 of the recessed part 9 and to be longer than or equal to the diameter of a laser beam for fuse blow, and is positioned inside a region facing the bottom 10. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring structure in a semiconductor device, and more particularly to a semiconductor device having an improved fuse wiring structure and wiring pattern of an LSI.

[0002]

2. Description of the Related Art It is generally known that a conventional semiconductor device is provided with a redundancy circuit (redundancy circuit) for repairing defects. This redundancy circuit is generally provided with a fuse wiring for separating a defective portion from a circuit that functions normally. By irradiating the fuse wiring with a laser beam (laser beam), the fuse wiring is cut (fuse blow), and a defective portion is separated from a circuit that functions normally (for example, see Patent Documents 1 to 4).

Here, for example, a general structure near a fuse wiring of an LSI will be briefly described with reference to FIGS. 15 (a) to 15 (c). FIG. 15A is a sectional view showing the LSI along the width direction of the fuse wiring. Figure 15 (b)
15A is a cross-sectional view taken along the line XX in FIG. 15A, specifically, a cross-sectional view showing the LSI along the longitudinal direction of the fuse wiring. FIG. 15C is a plan view showing the vicinity of the fuse wiring of the LSI as viewed from above.

A multi-layer wiring structure is formed on a silicon substrate 101, and FIG. 15 (a) typically shows various wirings 102 of two layers of an uppermost layer and a lower layer. Each wiring 1
02 is generally formed by using Cu or Al, and in this case, it is assumed that it is formed by using Cu. The pad portion 103a is generally formed using AlCu, Cu, or a mixed metal thereof. In this case, the pad portion 103a is assumed to be formed using Cu.

An interlayer insulating film 104 is formed on the substrate 101.
Are stacked and provided. A diffusion prevention film 105 is provided between the interlayer insulating films 104. Cu wiring 1
For No. 02, the interlayer insulating film 104 is, for example, a plasma-SiO ₂ film, a Low-k film (low relative dielectric constant insulating film), a silicon nitride film, or a laminated film in which these films are laminated. It is generally formed by using. In this case, each interlayer insulating film 104 is a plasma-SiO ₂ film. Similarly, with respect to the Cu wiring 102, in order to prevent Cu diffusion, a diffusion prevention film 105 is used, for example, a silicon nitride film, a silicon carbide film (SiC), a silicon carbonitride film (SiCN), or an abbreviated combination thereof Generally, a film having equivalent characteristics is used to form a Cu diffusion preventing film. In this case, each Cu diffusion prevention film 105 is a silicon nitride film. The uppermost interlayer insulating film 104 and the Cu diffusion preventing film 105 thereunder are formed as a so-called passivation film 106.

A barrier metal film 107 is provided between each Cu wiring 102 and the SiO ₂ film 104. Each barrier metal film 107 is, for example, a film made of a refractory metal such as Ta, Nb, W, or Ti, a film made of a nitride of these refractory metals, or a nitride of these refractory metals and refractory metals. It is formed by using the laminated film of.

In the case of an LSI having a multi-layer wiring structure, the Cu wirings 102 of the second layer and above are generally formed by a so-called dual damascene process, single damascene process, or RIE process. Here, the top C
The u wiring 102a and the pad portion 103a are integrally formed with the via plug 108 by a dual damascene process. That is, the Cu wiring 102a and the pad portion 1
03a has a so-called dual damascene structure.

Further, in the case of an LSI having a multilayer wiring structure, the fuse wiring is generally provided in a wiring layer below the uppermost layer. For example, as shown in FIG. 15A, some of the Cu wirings 102 one layer below the uppermost layer are used as the fuse wiring 103. A so-called fuse window 109 is provided above the Cu fuse wiring 103 in order to facilitate fuse blowing, which electrically disconnects a predetermined fuse wiring. This fuse window 109 is L
From the viewpoint of reducing the so-called process cost involved in manufacturing the SI, it is common that the uppermost interlayer insulating film 104 is etched in parallel when the uppermost wiring pad portion 103a is exposed. is there.

[0009]

[Patent Document 1] United States Patent No .: 6,376,894

[0010]

[Patent Document 2] Japanese Patent Laid-Open No. 2000-269342

[0011]

[Patent Document 3] JP-A-11-163147

[0012]

[Patent Document 4] United States Patent No .: 6,054,339

[0013]

Cu fuse wiring 10
Since 3 is easily oxidized, the bottom portion 110 of the fuse window 109 is
It is not preferable to completely open the substrate to expose the surface of the Cu fuse wiring 103. However, in order to facilitate fuse blowing, it is not preferable to increase the thickness of the SiO ₂ film 104 and the Cu diffusion preventing film 105 left on the Cu fuse wiring 103. Therefore, the fuse window 109 has the bottom 110 and the Cu fuse wiring 103.
The film thickness of the residual film 104 between itself and the surface is formed as thin as possible.

At this time, due to the etching characteristics, the bottom portion 110 of the fuse window 109 is likely to have a curved upper surface as shown in FIGS. 15 (a) and 15 (b). Then, as shown in FIGS. 15 (a) and 15 (b),
At the peripheral portion of the bottom portion 110 of the fuse window 109, a so-called trenching phenomenon may occur, and a part of the surface of the Cu fuse wiring 103 may be exposed. When the surface of the Cu fuse wiring 103 is exposed, the Cu fuse wiring 103 is oxidized from the exposed portion. As a result, the wiring resistance of the Cu fuse wiring 103 increases and the quality of the Cu fuse wiring 103 deteriorates. As a result, the quality of the entire LSI may be impaired. On the other hand, in order to prevent the oxidation of the Cu fuse wire 103, the film thickness of the residual film 104 on the Cu fuse wire 103 is reduced, and the shape of the bottom portion 110 of the fuse window 109 is improved so that the surface of the Cu fuse wire 103 is not exposed. It is extremely difficult to achieve this because of the etching characteristics.

If etching is performed so that the surface of the Cu fuse wiring 103 is not exposed, the residual film 104 on the Cu fuse wiring 103 becomes thick. When the residual film 104 is thickened, it is necessary to increase the energy of the laser beam required for fuse blowing. As a result,
The laser beam with increased energy may damage the Cu fuse wiring 103 adjacent to the Cu fuse wiring 103 to be cut. This allows
The reliability of the fuse wiring 103 as a whole may be reduced. To prevent this, the adjacent fuse wiring 1
It is necessary to define the so-called fuse pitch, which is the interval between the 03, to a predetermined size or more. Specifically, the fuse pitch must be set to be equal to or larger than the limit of the energy of the laser beam, that is, the processing accuracy of the laser beam. As a result, the laser beam can be applied only to the fuse wiring 103 desired to be cut.

As described above, if the residual film 104 is thickened, the arrangement of the Cu fuse wires 103 is limited, such that the narrowing of the pitch of the fuse wires 103 is likely to occur. The decrease in the narrow pitch limit of the fuse wiring 103 is caused by LS
This leads to a decrease in the number of Cu fuse wires 103 mounted on I. As a result, the so-called chip rescue rate due to the fuse blow is reduced, which in turn reduces the LSI production yield. Further, if the residual film 104 is thickened, it becomes necessary to increase the output of the laser beam or to improve the limit of precision of the fine processing. As a result, the process cost of the LSI may increase.

Further, in recent years, along with the miniaturization and high densification of semiconductor devices, miniaturization and high densification of various electronic circuits in the semiconductor device have been advanced. Along with this, the number of fuse wires is also increasing. In the fuse wiring structure as shown in FIG. 15C, the size of the fuse wiring region must be increased in order to increase the number of the fuse wirings 103. As a result, the area occupied by the fuse wiring region in the semiconductor device increases, causing a reduction in the scale of the relief circuit that can be mounted on the semiconductor device. Therefore, the chip rescue rate may be reduced.

Further, in order to increase the number of the fuse wirings 103, the width of each fuse wiring 103 is narrowed rather than increasing the size of the fuse wiring region. Then, when the peripheral portion of the bottom portion 110 of the fuse window 109 is opened, the exposed portion of the fuse wiring 103 is easily oxidized, and L
The quality of SI is likely to be impaired. Furthermore, if the number of fuse wirings 103 is increased without increasing the fuse wiring area, the fuse pitch may exceed the limit defined by the processing accuracy of the laser beam and may be carelessly narrowed. Then, as described above, the fuse wiring 103 is likely to be damaged by the fuse blow, and the reliability of the entire fuse wiring 103 may be reduced.

The present invention has been made in order to solve the problems described above, and its purpose is to facilitate fuse blowing and to deteriorate the quality of the fuse wiring and its peripheral portion. An object of the present invention is to provide a semiconductor device having a difficult fuse wiring structure. Another object of the present invention is to provide a semiconductor device capable of suppressing the risk of being damaged by fuse blowing and increasing the number of fuse wires without expanding the fuse wire region.

[0020]

In order to solve the above-mentioned problems, a semiconductor device according to an embodiment of the present invention comprises a substrate,
A fuse blow target provided with a fuse wire provided on the substrate and an insulating film provided so as to cover the fuse wire, and a fuse blow target for electrically disconnecting the fuse wire in the fuse wire. The fuse body is formed to be smaller than the bottom of the fuse blow recess formed in the insulating film on the fuse wiring and to have a length equal to or larger than the diameter of the fuse blow laser beam, and to face the bottom. It is characterized in that it is provided inside the region to be operated.

In this semiconductor device, the fuse body, which is the target of fuse blowing, is formed so as to be smaller than the bottom of the fuse blowing recess and longer than the diameter of the fuse blowing laser beam. It is provided inside the area facing the bottom of the recess for use. As a result, even if the peripheral portion of the bottom is opened when the film thickness of the residual film between the bottom of the fuse blowing recess and the surface of the fuse wiring is made thin so that the fuse blowing can be performed easily, There is almost no danger of being exposed. Further, the laser beam is likely to hit the fuse body, and the energy of the laser beam is unlikely to escape to the lower side of the fuse body or the like. As a result, when the fuse is blown, there is almost no risk of damaging the insulating film or the like around the fuse wire to be broken.

In order to solve the above problems, a semiconductor device according to another embodiment of the present invention has a lead wire for a fuse provided on a substrate and the lead wire provided above the lead wire. A fuse wire formed of a fuse body electrically connected to the wire, and an insulating film provided on the substrate so as to cover the fuse wire, and having a fuse blow recess formed above the fuse body. And, the fuse body is
The length is formed to be equal to or larger than the diameter of the fuse-blowing laser beam, and both ends in the longitudinal direction are located inside the bottom portion of the recess. Is.

In this semiconductor device, the fuse main body forming a part of the fuse wiring provided on the substrate is electrically connected to the fuse main body, and the fuse main body also forms a part of the fuse wiring. It is provided above the lead line. Further, above the fuse body, a fuse blow recess is formed in an insulating film provided so as to cover the fuse wiring. The fuse body is formed such that its length is equal to or larger than the diameter of the fuse-blowing laser beam, and both ends in the longitudinal direction thereof are located inside the bottom portion of the fuse-blowing recess. There is. As a result, even if the peripheral portion of the bottom is opened when the film thickness of the residual film between the bottom of the fuse blowing recess and the surface of the fuse wiring is made thin so that the fuse blowing can be performed easily, There is almost no risk of exposing the fuse lead wire. Further, the laser beam is likely to hit the fuse body, and the energy of the laser beam is unlikely to escape to the lower side of the fuse body or the like. As a result, when the fuse is blown, there is almost no risk of damaging the insulating film or the like around the fuse wire to be broken.

At the same time, the lead wire for the fuse is
It is formed below the fuse body. As a result, when the fuse is blown, there is almost no possibility of damaging the fuse wiring adjacent to the broken fuse wiring. Further, regardless of the position of the fuse body, the wiring pattern of the lead wire for the fuse can be formed in an appropriate pattern according to the design of various electronic circuits in the semiconductor device.

In order to solve the above-mentioned problems, a semiconductor device according to still another embodiment of the present invention has a fuse lead line provided on a substrate and a fuse lead line provided in the same layer as the lead line. A fuse wire composed of a fuse body electrically connected to the lead wire, and an insulation provided on the substrate so as to cover the fuse wire, and having a fuse blow recess formed above the fuse body. The fuse main body is formed to have a length equal to or larger than the diameter of the fuse-blowing laser beam, and both ends in the longitudinal direction are inside regions of the bottom of the recess. And the width of the lead line is narrower than the width of the fuse body.

In this semiconductor device, a fuse lead line forming a part of the fuse wire provided on the substrate is electrically connected to the fuse lead line and also forms a part of the fuse wire. It is provided in the same layer as the fuse body. Further, above the fuse body, a fuse blow recess is formed in an insulating film provided so as to cover the fuse wiring.
The fuse body is formed such that its length is equal to or larger than the diameter of the fuse-blowing laser beam, and both ends in the longitudinal direction thereof are located inside the bottom portion of the fuse-blowing recess. There is. As a result, the laser beam easily hits the fuse body, and the energy of the laser beam does not easily escape to below the fuse body. As a result, when the fuse is blown, there is almost no risk of damaging the insulating film or the like around the fuse wire to be broken.

At the same time, the lead wire for the fuse is
The width is formed to be narrower than the width of the fuse body. Accordingly, the wiring pattern of the lead wire for the fuse can be formed in an appropriate shape so that the fuse wiring adjacent to the broken fuse wiring is hardly damaged when the fuse is blown. Further, regardless of the position of the fuse body, the wiring pattern of the lead wire for the fuse can be formed in an appropriate shape according to the design of various electronic circuits in the semiconductor device.

[0028]

DETAILED DESCRIPTION OF THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a process sectional view showing a manufacturing process of an LSI as a semiconductor device according to a first embodiment of the present invention. Fuse wiring 1 of this embodiment
Is formed of Cu. Also, fuse wiring 1
The fuse body 2 is integrally formed with a contact plug portion (via plug portion) 12 that electrically connects the fuse body 2 and the lead wire 5 for fuse. That is, the fuse body 2 has a so-called dual damascene structure.

First, as shown in FIG. 1A, an n-th layer (n is a positive number) is formed on a Si substrate 3 on which active elements (not shown) forming various electronic circuits and a multilayer wiring structure are formed. Inter-level Dielectric (ILD)
s) 4 is provided. The Cu fuse wiring 1 described below is provided on the substrate 3 in a predetermined wiring pattern and is electrically connected to various electronic circuits. The interlayer insulating film 4 of each layer provided on the substrate 3 including the n-th interlayer insulating film 4 is a SiO ₂ film (TEOS film), a low relative dielectric constant insulating film (Low-k film), or those. It is generally formed by a laminated film in which each film is laminated. SiO
_{The two} films are formed by, for example, the plasma CVD method.
In this embodiment, each interlayer insulating film 4 is a SiO ₂ film.

Next, in the n-th interlayer insulating film 4, Cu
A lead line 5 for Cu fuse that forms a part of the fuse wiring 1 is formed. First, the interlayer insulating film 4 is etched along a predetermined wiring pattern set in advance to form a recess (groove) (not shown) for forming the Cu lead wire 5 as the lower layer wiring. Continuously, in the groove, C
A barrier film (barrier metal film) 6 is provided for suppressing diffusion of Cu, which is a forming material of the u lead wire 5, into the interlayer insulating film 4. In the present embodiment, this barrier film 6 is formed in a two-layer structure including a Ta layer 6a and a TaN layer 6b. At this time, in consideration of the chemical compatibility between the materials of the barrier film 6 and the Cu lead wire 5, the Cu lead wire 5
The inner layer in direct contact with was the Ta layer 6a, and the outer layer of the Ta layer 6a was the TaN layer 6b.

Subsequently, after forming a film containing Cu as a main component, which is a seed of the Cu lead wire 5, inside the barrier film 6, the Cu lead wire 5 is formed by electrolytic plating.
Then, excess Cu attached to the outside of the groove and the barrier film 6 are removed by polishing by the CMP method. As a result, a desired Cu lead wire 5 is obtained in the n-th interlayer insulating film 4.

Next, on the interlayer insulating film 4 of the n-th layer, which is a kind of insulating film, the m-th layer (m is a positive number) for suppressing diffusion of Cu of the Cu lead wire 5 is used. An (integer) Cu diffusion prevention film 7 is provided. The Cu diffusion prevention film 7 of each layer provided on the substrate 3 including the diffusion prevention film 7 of the m-th layer is, for example, a silicon nitride film or a silicon carbide film (Si
It is generally formed of C), a silicon carbonitride film (SiCN), or a film having substantially the same characteristics. In this embodiment, each Cu diffusion prevention film 7 is a silicon nitride film.

Next, after providing the (n + 1) th-layer interlayer insulating film 4 on the Cu-diffusion preventing film 7 of the m-th layer, C
a concave portion (groove) 8a for forming the u-fuse body portion 2,
Further, a concave portion (groove) 8b for forming the Cu via plug portion 12 is formed. In this embodiment, the Cu fuse body 2 is formed in a dual damascene structure in which the Cu via plug 12 is integrally formed. Therefore, the fuse body portion recess (groove) 8a is formed integrally with the via plug portion recess (groove) 8b. Specifically, similar to the case of forming the above-mentioned lead line groove, the interlayer insulating film 4 and the m-th layer Cu diffusion prevention film 7 are formed in accordance with a predetermined wiring pattern and contact pattern set in advance. To etch. As a result, the surface (upper surface) of the Cu lead wire 5 is temporarily exposed to obtain the desired fuse body groove 8a integrated with the via plug groove 8b.

Subsequently, as shown in FIG. 1B, a Cu fuse body 2 which is a target of fuse blowing for electrically disconnecting the Cu fuse wiring 1 is formed in the fuse body groove 8a. At the same time, the Cu via plug portion 12 that electrically connects the Cu fuse main body portion 2 and the Cu lead wire 5 is formed in the via plug portion groove 8b. The Cu fuse main body portion 2 and the Cu via plug portion 12 are formed by the same method as in the case of forming the Cu lead wire 5 described above.

Specifically, first, the fuse body groove 8a is formed.
Further, the barrier film 6 having a two-layer structure of the Ta layer 6a and the TaN layer 6b is formed in the via plug groove 8b. After that, a film containing Cu (not shown) as a main component, which serves as a seed layer for the Cu fuse body 2 and the Cu via plug 12, is formed inside the barrier film 6. Subsequently, C is formed on the film containing Cu as a main component by electrolytic plating.
The u-fuse body 2 and the Cu via plug 12 are formed. After that, excess Cu and the barrier film 6 attached to the outside of both the grooves 8a and 8b are polished and removed by the CMP method. As a result, the Cu fuse body 2 having a desired dual damascene structure is obtained in the (n + 1) th layer interlayer insulating film 4 and the mth layer Cu diffusion preventing film 7.

As described above, the main part of the Cu fuse wiring 1 is formed. In the present embodiment, the Cu fuse body 2
Is formed to be smaller than the bottom portion 10 of the fuse blow recess 9 to be described later. Specifically, the Cu fuse body 2
Is formed so that its length and width are smaller than the length and width of the bottom portion 10 of the fuse blowing recess 9. That is, the area of the Cu fuse body 2 in plan view is sufficiently smaller than the area of the bottom portion 10 of the fuse blowing recess 9. At the same time, the Cu fuse body 2 is formed so that its length is equal to or larger than the diameter of the fuse blowing laser beam (laser beam). Also, C
The u-fuse main body 2 is formed so as to be located inside a region of the fuse blowing recess 9 that faces the bottom 10. In particular, the Cu fuse body 2 is provided such that both longitudinal ends thereof are located inside the bottom portion 10 of the fuse blowing recess 9.

Usually, the alignment for cutting the fuse wiring is performed by reading an alignment mark formed on the substrate by using an alignment scope provided separately from the irradiation optical system of the laser beam for fuse blowing. Done. The information of the plane position and the vertical position of the substrate is obtained by reading the alignment mark, and the coordinates of the fuse wiring to be cut and the focal position of the laser beam applied to the fuse wiring are calibrated. However,
An error may occur between the calibrated focus position and the actual fuse wiring position due to variations in the shape of the alignment mark, the insulating film thickness on the mark, and the like. For this reason, the irradiation optical system is required to have a depth of focus that is at least tolerable to the above error.

If the error in the focal position of the laser beam due to the miscalculation of the reading of the alignment mark becomes larger than the depth of focus of the irradiation optical system, the shape of the irradiated laser beam may deteriorate and the fuse wiring may be defectively cut.
In addition, the optical distance of the laser beam irradiation optical system also varies due to variations in the thickness of the insulating film on the fuse wiring and variations in the flatness of the substrate. This also causes a problem that the shape of the laser beam deteriorates at the cut portion of the fuse wiring.

Generally, in order to keep the influence of the above-mentioned error in the focal position of the laser beam on the fuse blow within the allowable range, the focal depth of the irradiation optical system is set to about 0.7 μm.
It is empirically known that it is necessary to set above. It is also known that the larger the depth of focus to be secured, the larger the restriction on the aperture limit (minimum diameter) of the laser beam. Therefore, in order to properly blow the fuse, the Cu fuse wiring 1 according to the present embodiment is used.
The (Cu fuse body 2) is also limited in the minimum value of its size (length).

If the length of the Cu fuse body 2 is less than the minimum diameter of the laser beam, the heat required for fuse blowing escapes to the lower layer of the Cu fuse body 2. Further, if the length of the Cu fuse body 2 is less than the minimum diameter of the laser beam, even the Cu lead wire 5 in the lower layer of the Cu fuse body 2 may be blown. When the lower Cu lead wire 5 is blown, a crack or the like may occur in the (n + 1) th interlayer insulating film 4 existing between the bottom portion 10 of the fuse window 9 described below and the lower Cu lead wire 5. . As a result, the Cu fuse wiring 1 may not be properly blown.

FIG. 2 is a graph showing the relationship between the wavelength of the laser beam and the minimum diameter of the laser beam when the focal depth of the irradiation optical system of the laser beam for fuse blowing is set to about 0.7 μm or more. Is. In order to properly cut the Cu fuse wiring 1 without excessively damaging the base of the Cu fuse main body 2, the minimum diameter of the laser beam shown in the graph of FIG. The Cu fuse body 2 having the length of 1 is formed.

The Cu via plug portion 12 is formed smaller than the Cu fuse main body portion 2. Specifically, as shown in FIG. 1B, the Cu via plug portion 12
Has a diameter less than or equal to the width of the Cu fuse body 2. At the same time, the Cu via plug portion 12 is C
It is formed inside the u-fuse body 2. This makes it difficult for the heat required for blowing the fuse of the Cu fuse wiring 1 to escape to the lower layer of the Cu fuse body 2.

Next, as shown in FIG. 1C, on the Cu fuse body 2 and the (n + 1) th interlayer insulating film 4, the (m + 1) th Cu diffusion prevention film 7 and the (n + 2) th interlayer insulating film 4 are formed. The inter-layer insulating film 4 is provided. Although not shown in the present embodiment, the portion from the n-th interlayer insulating film 4 to the (n + 2) th interlayer insulating film 4 is shown in FIG.
Various wirings and pads are formed as shown in FIG. These various wirings and pads are formed by the same method as the case of forming the Cu fuse body 2 and the Cu lead wire 5. Subsequently, as shown in FIG. 1D, the m + th layer is further formed on the (n + 2) th interlayer insulating film 4.
A Cu diffusion prevention film 7 of the second layer and an interlayer insulating film 4 of the (n + 3) th layer are provided. Both films 7 and 4 function as a so-called passivation film 11.

Next, a so-called fuse window 9 is formed above the Cu fuse body 2 so as to facilitate fuse blowing. This fuse window 9
As shown in FIG. 15 (a),
From the viewpoint of reducing the cost of the SI manufacturing process, so-called process cost, etc., it is generally performed together with the opening of the pad portion (not shown). Specifically, FIG.
As shown in (e), the bottom portion 10 of the fuse window 9 is made of Cu.
The n + 3th layer interlayer insulating film 4, the (m + 2) th layer Cu diffusion preventing film 7, and the (n + 2) th layer insulating layer so that the region in which the fuse body 2 is arranged is substantially completely included. The film 4 is etched. At this time, the (n + 2) th layer interlayer insulating film 4 left on the Cu fuse body 2 and forming the bottom 10 of the fuse window 9 is formed such that the film thickness of the remaining film after etching is as thin as possible. To be done.
This makes it easier to blow the Cu fuse main body 2 when the fuse blowing laser beam is irradiated toward the Cu fuse main body 2.

At this time, due to the etching characteristics, the bottom portion 10 of the fuse window 9 is likely to have a shape in which the upper surface thereof is curved (bending) into a substantially arched shape, as shown in FIG. 1 (e). Then, the Cu diffusion prevention film 7 of the (m + 1) th layer may be etched at the peripheral portion of the bottom portion 10 of the fuse window 9, and the interlayer insulating film 4 of the (n + 1) th layer may be exposed. That is, a so-called trenching phenomenon may occur in the peripheral portion of the bottom portion 10 of the fuse window 9, and the surface (upper surface) of the Cu fuse body 2 may be exposed. However, as described above, the Cu fuse body 2 is formed sufficiently shorter than the width (length) of the bottom portion 10 of the fuse window 9 and is located inside the region facing the bottom portion 10. Thereby, even if the upper surface of the bottom portion 10 is curved in a substantially arch shape, there is almost no possibility that the Cu fuse main body portion 2 is exposed. Further, the Cu lead wire 5 is formed in the layer immediately below the Cu fuse body 2. As a result, there is no possibility that the Cu lead wire 5 is exposed at the peripheral portion of the bottom portion 10 of the fuse window 9. Therefore,
According to the present embodiment, the fuse blowing of the Cu fuse wiring 1 can be facilitated, and the deterioration of the Cu fuse wiring 1 which is easily oxidized can be greatly suppressed.

Further, a current may flow through the Cu fuse wiring 1. In preparation for such a situation, the length of the Cu fuse wiring 1 is set to the critical length shown in FIG. Specifically, the Cu fuse wiring 1 is
The product of the density of the current flowing through the u-fuse wiring 1 and
80.0 μm · MA / cm ² or less. For example, the length of the Cu fuse wiring 1 is about 40 μm.
To form. Then, even if a current having a current density of about 2.0 MA / cm ² flows through the Cu fuse wiring 1, the possibility of causing a fatal electrical failure can be almost eliminated. In particular, so-called electromigration (E
M) It is possible to almost eliminate the possibility that a defect will occur. Therefore, the highly reliable Cu fuse wiring 1 can be formed. As a result, the reliability of the entire LSI can be improved.

As described above, in the semiconductor device according to the first embodiment, the fuse blow is easy to perform and C
The quality of the u-fuse wiring 1 is unlikely to deteriorate and is highly reliable.

(Second Embodiment) FIG. 4 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a second embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The fuse wiring 21 of this embodiment is made of Cu. The fuse body 22 of the fuse wiring 21 is formed separately from the contact plug portion (via plug portion) 23, as shown in FIG. That is, the Cu fuse body 22 has a so-called single damascene structure.

The Cu diffusion prevention film 7 up to the m-th layer is formed by the same method as in the first embodiment.

Next, the Cu fuse body 22 having a single damascene structure is formed inside the (n + 1) th interlayer insulating film 4 provided on the mth Cu diffusion preventing film 7. Therefore, the Cu fuse body 22 is formed separately from the Cu via plug 23.

Specifically, first, a lower insulating film which is a part of the (n + 1) th interlayer insulating film 4 is formed. continue,
The lower insulating film and the Cu diffusion preventive film 7 of the m-th layer are etched along a predetermined contact pattern. As a result, the surface of the Cu lead wire 5 is temporarily exposed. At this time, the thickness of the lower insulating film to be formed and the size of the recess (groove) formed by etching are set to an extent corresponding to the size of the Cu via plug 23. In the groove for this Cu via plug portion 23,
First, the barrier film 6 having a two-layer structure of the Ta layer 6a and the TaN layer 6b is formed. After that, C is formed inside the barrier film 6.
A film containing Cu as a main component, which serves as a seed layer of the u via plug portion 23, is formed. Subsequently, the Cu via plug 23 is formed by electrolytic plating. Subsequently, excess Cu attached to the outside of the groove and the barrier film 6 are polished and removed by the CMP method.

Subsequently, an upper insulating film which is a part of the (n + 1) th interlayer insulating film 4 is similarly formed. Then, the upper insulating film is etched along a predetermined wiring pattern set in advance. At this time, the size of the concave portion (groove) formed by etching is determined by the Cu fuse body 22.
The size is equivalent to the size of. In the groove for the Cu fuse body 22, first, the Ta layer 6a and the TaN layer 6b are formed.
The barrier film 6 having a two-layer structure is formed. Then, a film containing Cu as a main component, which serves as a seed layer of the Cu fuse body 22, is formed inside the barrier film 6. After that, the Cu fuse body 22 is formed by electrolytic plating. Subsequently, excess Cu attached to the outside of the groove and the barrier film 6 are polished and removed by the CMP method. As a result, as shown in FIG. 4, a Cu fuse body 22 having a desired single damascene structure is obtained in the (n + 1) th layer interlayer insulating film 4 and the mth layer Cu diffusion preventive film 7.

As described above, the main part of the Cu fuse wiring 21 is formed. The subsequent steps until the fuse window 9 is formed are the same as those in the first embodiment described above. As described above, the semiconductor device according to the second embodiment can obtain the same effects as those of the first embodiment.

(Third Embodiment) FIG. 5 is a sectional view showing a structure near a fuse wire of a semiconductor device according to a third embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The fuse wiring 31 of this embodiment is made of Cu. A barrier film for suppressing oxidation and diffusion of Cu, a so-called top barrier film 33, is formed on the fuse body 32 of the fuse wiring 31.

The parts up to the Cu fuse body 32 are formed by the same method as in the first embodiment. Therefore, the Cu fuse body 32 of this embodiment is formed in a dual damascene structure.

After the Cu fuse body 32 is formed, its upper surface is selectively recessed (retreated) by wet etching or dry etching. After this,
A top barrier film (top barrier metal film) 33 having a two-layer structure of a Ta layer 33a and a TaN layer 33b is formed in the recessed portion, similarly to the barrier film 6 provided around the Cu fuse body 32. . These Ta
The layer 33a and the TaN layer 33b are formed by, for example, a sputtering process. At this time, the Cu fuse body 3
The lower layer in direct contact with the upper surface of 2 is the TaN layer 33b, and the upper layer of the TaN layer 33b is the Ta layer 33a. After this,
CMP the excess top barrier film 33 attached to the outside of the groove.
And remove by polishing. As a result, as shown in FIG. 5, the (n + 1) th layer interlayer insulating film 4 and the mth layer C
A Cu fuse body 3 having a desired dual damascene structure having a top barrier film 33 in the u diffusion prevention film 7.
Get 2.

As described above, the main part of the fuse wiring 31 is formed. The subsequent steps up to forming the fuse window 9 are as follows.
This is similar to the first embodiment described above. Thus, the third
The semiconductor device according to the embodiment has a Cu fuse body 32.
Since the top barrier film 33 is provided on the upper surface of the, the Cu fuse wiring 31 is less likely to deteriorate than in the first embodiment.

Particularly, the top barrier film 33 is replaced with the barrier film 6.
By forming the Ta layer 33a and the TaN layer 33b in the same manner as described above, it is possible to obtain the effect of suppressing the diffusion of Cu into the interlayer insulating film (ILD film) 4, which is the original function of the top barrier film 33. Further, since the film forming apparatus can be used also and the film forming process can be unified and simplified, the capital investment can be reduced and the production cost of the semiconductor device can be reduced. Even if the wiring barrier film 6 and the top barrier film 33 are in contact with each other, since the barrier films 6 and 33 are made of the same material, the Cu fuse body 3 is formed.
There is almost no possibility that a reaction that causes an increase in the resistance value or deterioration of the barrier property in 2 occurs. Therefore, there is almost no possibility that a reaction that deteriorates the performance of the semiconductor device will occur in the Cu fuse body 32.

Further, the Ta layer 33a and the TaN layer 33 are formed.
The top barrier film 33 is formed by stacking b
It is possible to promote the thinning of the TaN layer 33b, which is the main cause of dust generated in the film forming process. In addition to this, it was found that the pasting effect of the Ta layer 33a can significantly reduce dust. Generally, the TaN layer 33b greatly contributes to the diffusion barrier property.
Since N is a ceramic layer, it has a low mechanical strength, that is, a fracture toughness value, and is very easily cracked. On the other hand, the Ta layer 3
Since 3a is formed of a simple metal, it has ductility (conductivity). Therefore, by forming the top barrier film 33 into a laminated structure including the Ta layer 33a and the TaN layer 33b formed in thin films, dust in the film forming process can be significantly reduced.

As described above, in the semiconductor device according to the third embodiment, the diffusion barrier in the Cu fuse body 32 is formed by the top barrier film 33 formed in the laminated structure of the thin metal layer and the ceramic layer. Is improved. That is, the reliability of the entire semiconductor device is significantly improved.

(Fourth Embodiment) FIG. 6 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a fourth embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The lead wire 5 of the fuse wiring 41 of the present embodiment is made of Cu, like the lead wire 5 of the first embodiment. However, the fuse body portion 42 of the fuse wiring 41 is formed of Al. Further, the fuse main body 42 is formed in a dual damascene structure like the Cu fuse main body 2 of the first embodiment described above.

The recesses (grooves) for the Al fuse body 42 are formed by the same method as in the first embodiment. Unlike Cu, Al does not diffuse, so the same barrier film 6 as in the first embodiment is not required. Therefore, first, for example, Ta, Nb, Ti, W,
Alternatively, a refractory metal such as Zr, a nitride film thereof, or a laminated film thereof, and AlCu are provided as the barrier film (barrier metal film) 43. In this embodiment, the barrier film 43 is formed in a two-layer structure including a Ta layer 43a and an AlCu layer 43b. After forming the barrier film 43, the fuse body 42 is formed of Al inside the barrier film 43. After that, the excess Al attached to the outside of the groove and the barrier film 43 are polished and removed by the CMP method. As a result, as shown in FIG. 6, an Al fuse main body 42 having a desired dual damascene structure is obtained in the (n + 1) th layer interlayer insulating film 4 and the mth layer Cu diffusion preventing film 7.

The main part of the fuse wiring 41 is formed as described above. Since Al is less likely to be oxidized than Cu, it is not necessary to provide a diffusion prevention film on the Al fuse body 42. Therefore, directly on the Al fuse body 42,
A second-layer interlayer insulating film 4 is provided. Fuse window 9 after this
The steps up to the formation of are similar to those of the first embodiment described above.

As described above, in the semiconductor device according to the fourth embodiment, since the fuse main body portion 42 is formed of Al, the fuse wiring 41 is less likely to deteriorate than in the first embodiment.

(Fifth Embodiment) FIG. 7 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a fifth embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The lead wire 5 of the fuse wiring 51 of the present embodiment is made of Cu similarly to the lead wire 5 of the first embodiment described above. However, the fuse body 52 of the fuse wiring 51 is made of Al, like the Al fuse body 42 of the fourth embodiment described above. Further, the Al fuse body 52 of the fuse wiring 51 is, as shown in FIG. 7, C of the second embodiment described above.
Like the u-fuse main body 22, it is formed separately from the Al contact plug portion (via plug portion) 53. That is, the Al fuse body 52 has a single damascene structure.

Therefore, in the semiconductor device of the fifth embodiment, the fuse main body 52 may be formed by the same method as in the second embodiment. However, the fuse body 5
2 and the via plug portion 53 are formed of Al, and the barrier film 43 used in the fourth embodiment is formed around them. The subsequent steps up to forming the fuse window 9 are the same as those in the fourth embodiment.

As described above, in the semiconductor device according to the fifth embodiment, the fuse body 52 is made of Al, so the fuse wiring 51 is less likely to deteriorate than in the first embodiment.

(Sixth Embodiment) FIG. 8 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a sixth embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The lead wire 5 of the fuse wiring 61 of the present embodiment is made of Cu, like the lead wire 5 of the first embodiment described above. However, the fuse main body portion 62 of the fuse wiring 61 is formed of Al, like the Al fuse main body portion 42 of the fourth embodiment described above. Further, as shown in FIG. 8, an Al contact plug portion (via plug portion) 68 is integrally formed on the Al fuse main body portion 62 of the fuse wiring 61. Further, the Al fuse body 62 of the sixth embodiment is
It is processed and formed not by the damascene process but by the RIE process.

The Cu diffusion prevention film 7 up to the m-th layer is formed by the same method as in the first embodiment described above.

Next, on the Cu diffusion preventive film 7 of the mth layer, with a film thickness approximately the same as the height of the Al via plug portion 68,
A pad portion first insulating film (SiO ₂ film) 63 is provided. Subsequently, the pad section first insulating film 63 and the m-th layer Cu diffusion prevention film 7 are etched along a predetermined contact pattern to temporarily expose the surface of the Cu lead wire 5. At this time, the size of the recess (groove) for the Al via plug portion 68 formed by etching is
It is about the size of the Al via plug portion 68.

Next, a barrier film having a two-layer structure of the Ta layer 43a and the AlCu layer 43b used in the fourth embodiment is formed on the groove and the pad portion first insulating film 63 for the Al via plug portion 68. 43 is deposited. Subsequently, Al forming the Al fuse body 62 and the Al via plug 68 is deposited on the inside and the upper side of the barrier film 43. After that, excess Al and the barrier film 43 are selectively removed by wet etching or dry etching along a predetermined wiring pattern set in advance. As a result, the Al fuse body 62, the Al via plug 68, and the barrier film 43 having a desired shape are obtained.

Next, a pad portion second insulating film (SiO ₂ film) 64 is provided on the pad portion first insulating film 63 so as to cover the Al fuse main body portion 62. Thereafter, various wirings of the uppermost layer (not shown) penetrating the pad portion second insulating film 64,
And forming a pad portion. These various wirings and pads are formed by the same method as the case of forming the Al fuse main body 62 and the Al via plug 68. Since Al is less likely to be oxidized than Cu, it is not necessary to provide a diffusion prevention film on the Al fuse body 62. Therefore, the pad portion second insulating film 63 is formed on the pad portion second insulating film 63.
The insulating film 64 is continuously provided. Similarly, the pad portion third insulating film (SiO ₂ film) 6 is formed on the pad portion second insulating film 64.
5 and the pad portion fourth insulating film (silicon nitride film) 66 are continuously provided. At this time, the pad portion third insulating film 65 and the pad portion fourth insulating film 66 are respectively deposited to have a predetermined thickness and formed as a passivation film 67.

As described above, the main part of the fuse wiring 61 is formed. After that, the steps up to forming the fuse window 9 together with the opening of the pad portion are the same as those in the first embodiment.

As described above, in the semiconductor device according to the sixth embodiment, since the fuse body 62 is formed of Al, the fuse wiring 61 is less likely to deteriorate than in the first embodiment.

(Seventh Embodiment) FIG. 9 is a plan view showing a structure near a fuse body of a fuse wiring of a semiconductor device according to a seventh embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

The semiconductor device of this embodiment is characterized by the arrangement of the fuse body 72 of the fuse wiring 71.

Similar to the fuse wiring structures in the above-described first to sixth embodiments, the fuse wiring 71 has a multi-layered structure, and the fuse body 72 is formed in the fuse window 9.
It is formed to be shorter than the bottom portion 10. At this time, as shown in FIG. 9A, the fuse main body portions 72 of the adjacent fuse wirings 71 are arranged so as not to be adjacent to each other along the direction orthogonal to the longitudinal direction of the fuse wiring 71. As a result, the area required for the fuse wiring 71 can be reduced to, for example, FIG. 9 without reducing the width of the fuse wiring 71.
(A) The size can be reduced by the size shown by the diagonal line. That is, the fuse wiring area can be made compact. 9A to 9C, a residual film 73 such as an interlayer insulating film that forms the bottom portion 10 of the fuse window 9 exists in a region shown by a dashed line inside the fuse window 9. I shall.

Here, in FIG. 9A, for example, the width W of the fuse wiring 71 (fuse main body 72).
To about 0.6 μm. In addition, the interval between the fuse body portions 72 adjacent to each other along the direction orthogonal to the longitudinal direction of the fuse wiring 71, that is, the pitch P is formed to be about 2.0 μm. At the same time, the number of fuse wires 71 per unit area (block size) inside the fuse window 9 is set to 1000.

With such a setting, for example, FIG.
In the fuse wiring structure according to the related art shown in FIG. 2, the block size is approximately 2.0 μm × 1000 =
A width of about 2000 μm is necessary. On the other hand, in the fuse wiring structure of this embodiment in which the fuse body 72 is arranged as shown in FIG. 9A, the width of the block size is about 2.0 × 500 = 1000 μm. Is enough. This would result in a reduction of about 50% in area compared to the block size of the prior art. As a result, the mounting area of the relief circuit (not shown) that can be mounted on the LSI is increased, and the relief rate of the LSI can be improved.

Further, in the fuse wiring structure of the present embodiment, unless the area of the block size required for the fuse wiring 71 is changed, the interval between the adjacent fuse body portions 72 shown by D1 and D2 in FIG. 9B is set. Can be expanded.
As a result, the interval between the fuse wires 71 can be increased. As a result, the reliability of the fuse wiring 71 can be improved with almost no possibility of damaging the adjacent undesired fuse wiring 71 when the fuse is blown. Consequently, the reliability of the entire LSI and the production yield can be improved.

Further, in the fuse wiring structure of the present embodiment, the area of the block size required for the fuse wiring 71,
And, if the interval between the adjacent fuse body portions 72 is not changed, as shown in FIG. 9C, the total number of the fuse wirings 71 in a unit area can be increased and a high density wiring can be realized. Consequently, the number of fuse wires 71 electrically connected to the relief circuit can be increased to improve the relief rate of the LSI.

As described above, according to the semiconductor device of the seventh embodiment, it is possible to reduce the fuse wiring interval, that is, the fuse pitch. As a result, it is possible to miniaturize and increase the density of various electronic circuits in the semiconductor device and to make the semiconductor device compact.
As a result, the size of the fuse wiring region, the fuse pitch, and the number and density of the fuse wirings can be set to an appropriate state according to the design of various electronic circuits in the semiconductor device.

Further, the number of the fuse wirings 71 can be increased and the density of the fuse wirings 71 can be increased without increasing the fuse wiring area while reducing the damage to the adjacent fuse wirings 71 due to the fuse blow. it can. As a result, the reliability of the semiconductor device and the yield of its production efficiency can be improved.

(Eighth Embodiment) FIGS. 10 to 14 show
FIG. 13 is a plan view showing a configuration near a fuse wiring of a semiconductor device according to an eighth exemplary embodiment of the present invention. The same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted. Also,
16 to 18 are a plan view and a cross-sectional view showing a configuration near a fuse wiring of a semiconductor device according to a conventional technique, which is a comparative example of the semiconductor device of the present embodiment.

The semiconductor device of this embodiment is characterized by the wiring patterns of the fuse body portion 82 of the fuse wiring 81 and the lead wire 83.

First, the structure near the fuse wiring of the semiconductor device according to the prior art will be briefly described. FIG. 16 shows an outline of the structure of a fuse wiring 201 which has been conventionally used. FIG. 16A is a plan view showing the vicinity of a fuse wire of an LSI as a semiconductor device according to a conventional technique as seen from above. In addition, FIG. 16B is the same as FIG.
It is sectional drawing shown along the middle YY line.

One end of each of the plurality of fuse wires 201 is electrically connected to various electronic circuits in the semiconductor device, for example, the control circuit section 202. The other end of each fuse wiring 201 is electrically connected to the common potential wiring 203, for example.

In recent years, along with the miniaturization of semiconductor devices, miniaturization of various electronic circuits in semiconductor devices such as control circuit portions has been progressing. Along with this, miniaturization of fuse pitch is also progressing. In the semiconductor manufacturing technology, a fuse cutting method using a laser beam or the like is often used to replace a defective cell element with a spare cell element by the redundancy technology.

Generally, a laser beam in the near infrared region having a wavelength of 1047 nm or 1321 nm is used for fuse blowing. The aperture limit of these laser beams is determined by the wavelength of each beam. For this reason, when the fuse pitch becomes narrower and approaches the size of the aperture of the laser beam, there is a possibility that the adjacent fuse wiring 201 may be damaged when the desired fuse wiring 201 is cut. In order to prevent this, for example, the control circuit unit 202 is
It is necessary to arrange the fuses according to the limit size of the fuse pitch determined by the laser processing limit. As a result, there arises a problem that the occupied area of the fuse wiring 201 and the control circuit section 202 becomes larger than necessary. Further, when the area occupied by the fuse wiring 201 and the control circuit unit 202 increases, the scale of the relief circuit that can be mounted on the semiconductor chip is reduced, and the chip relief rate decreases. However, in the wiring pattern as shown in FIG. 16A, the fuse wiring 20 is changed according to the reduction of the pitch of the control circuit unit 202.
It is difficult to narrow the pitch of 1. Hereinafter, an example will be specifically described.

16A and 16B are a plan view and a sectional view of a fuse wiring region formed in a conventional semiconductor device, respectively. FIG. 16B is the same as FIG.
(A) shows a cross-sectional structure of a portion indicated by a line YY in (a). Fuse wiring 2 provided on the Si substrate 207
01 is generally formed of Cu, Cu alloy, Al, Al alloy, or the like. Usually, the fuse wiring 201
Are formed in the same structure by using the same kind of material as the other wiring formed in the same layer as the fuse wiring 201. Further, a silicon oxide film,
Various insulating films 204 such as an organic silicon oxide film or a silicon nitride film, which are generally used in semiconductor devices, are formed in a single layer or a multilayer.

In the semiconductor device shown in FIGS. 16A and 16B, the interlayer insulating film 205 of each insulating film 204 is formed of a silicon oxide film. At the same time, the diffusion prevention film 2
06 is formed of a silicon nitride film. The inter-layer insulation film 205 and the diffusion prevention film 206 are laminated on the Si substrate 207 in five layers. The fuse wiring 201 is made of Cu.
The Ta layer 208 is formed around the fuse wiring 201.
A barrier film 208 having a two-layer structure of a and TaN layer 208b is formed.

In this semiconductor device, as shown in FIG. 16A, the fuse pitch size P1 is 2.5 μm. At the same time, the width W1 of the main body portion 201a of the fuse wiring 201, which is the substantial width of the fuse wiring 201, is set to 1.0 μm. Also,
In this semiconductor device, the body portion 20 of the fuse wiring 201 is
1a is formed on the fourth layer. The common potential wiring 203 is formed on the second layer, for example. Further, a lead wire 201b of the fuse wire 201 that electrically connects the fuse wire 201 and the control circuit unit 202.
Is formed on the first layer, for example. The fuse body 201a and the common potential wiring 203 are electrically connected via a contact plug (via plug) 210. Similarly, the fuse body 201a and the lead wire 20
1b is also electrically connected via the contact plug 210.

The insulating film 20 which is the remaining film on the fuse wiring 201 and which forms the bottom portion 209 of the fuse window 208.
5 is formed as thin as possible in order to improve the blow characteristic of the fuse blow. However, as described in the related art, the residual film 205 is likely to be formed in a convex shape upward in the bottom portion 209 of the fuse window 208. Therefore, the residual film 205 is formed such that the film thickness in the vicinity of the outer peripheral portion thereof is such that the fuse wiring 201 is not exposed.

17 (a) and 17 (b) are shown in FIG.
The fuse wiring 201 having the structure shown in FIG.
Of these, the state is shown after the fuse wiring 201 whose coordinates have been designated is cut by fuse blowing. FIG. 17
(A) shows the vicinity of the fuse wiring blown by the fuse,
It is a top view which shows from the upper part. In addition, FIG.
17B is a sectional view taken along line ZZ in FIG. 17A.

In FIG. 17A, the dotted portion of the fuse wiring 201 is the portion where the fuse has been blown. The wavelength of the laser beam used for this fuse blowing is 1321
nm, the beam diameter is 3.0 μm, and the alignment accuracy is ± 0.
It was 35 μm. It can be seen that with such a setting, the desired fuse wiring 201 can be cut with almost no damage to the fuse wiring 201 adjacent to the cut fuse wiring 201 and other regions.

However, as shown in FIG. 18, the width W2 of the body portion 201a of the fuse wiring 201 is set to 1.0.
The size of the fuse pitch P2 is reduced to 2.0 μm while maintaining it at μm. In such a setting,
A desired fuse wiring 20 as shown by a dotted portion in FIG.
Cut 1. Then, the fuse wiring 201 to be cut
As shown by the black portion on the fuse wire 201 adjacent to the fuse wire 201, the surrounding fuse wire 201 is damaged. To prevent this, if the irradiation energy of the laser beam is lowered so as not to damage the adjacent fuse wiring 201, the desired fuse wiring 201 cannot be cut. Thus, in the conventional wiring pattern, if the wavelength of the laser beam is 1321 nm, the beam diameter is 3.0 μm, and the alignment accuracy is ± 0.35 μm, the control circuit unit 2
It is practically impossible to make the array pitch of 02 compact to 2.0 μm.

The semiconductor device according to the eighth embodiment is made to overcome the problems described above. An object of the present invention is to provide a fuse wiring structure capable of setting a fuse wiring to an appropriate wiring pattern according to miniaturization of various electronic circuits in a semiconductor device, regardless of the precision limit of fine processing by a laser beam. That is.
Another object is to provide a fuse wiring structure that can improve the processing speed of fuse blowing.

Fuse wiring 8 of the semiconductor device of this embodiment
10 to 12 are plan views of the structure in the vicinity of No. 1 viewed from above the fuse window 9.

As shown in FIGS. 10 to 12, in the present embodiment, the fuse main body portion 82 of the plurality of fuse wirings 81 has a control circuit portion as an electronic circuit along the longitudinal direction of each fuse wiring 81. Common potential wiring 85 from the 84 side
The first row, the second row, and the third row are formed toward the side. In the fuse main body portions 82 in the second row, the lead lines 83 connected to them are electrically connected to the control circuit portion 84 through the spaces between the fuse main body portions 82 in the first row. In addition, the fuse body portion 82 of the third row
Indicates that each lead wire 83 connected to them is the second
It is electrically connected to the control circuit section 84 through between the fuse main body sections 82 of the first row and the first row.

Similarly, the fuse main body 82 of the second row is
Each lead wire 83 connected to them is electrically connected to the common potential wiring 85 through between the fuse main body portions 82 in the third column. In addition, the fuse main body portion 82 of the first row has the lead wires 83 connected to them.
Are electrically connected to the common potential wiring 85 through the fuse main body portions 82 in the second and third columns. In the present embodiment, the center-to-center distance between each fuse main body 82 and each lead wire 83 adjacent to each fuse main body 82 is set to, for example, about 2.5 μm.

In addition, each fuse body 82 is formed such that the width thereof is wider than or equal to the width of each lead wire 83. That is, the width of each lead wire 83 is formed to be narrower than the width of each fuse body portion 82. As a result, it is possible to improve the degree of freedom in routing each lead wire 83, and hence each fuse wire 81, while facilitating fuse blowing. Therefore, the fuse wiring 81 having a more appropriate wiring pattern can be provided according to various connection states of various electronic circuits provided in the LSI.

Generally, the width of the fuse body is 1.0 μm.
When it is widened to a certain extent, damage due to fuse blow to the underlying Si film and the interlayer insulating film is suppressed. However, it becomes difficult to blow the fuse. On the other hand, if the width of the fuse body is narrowed to about 0.5 μm, the fuse blow becomes easier. However, the blown fuse is apt to be damaged by the fuse blow. Therefore, the width of the fuse body is appropriately set according to the wavelength of the laser beam, the alignment accuracy, the film thickness of the underlayer, and the like so that both blow characteristics and damage suppression can be compatible. For example, the wavelength of the fuse blowing laser beam is 1
It is assumed to be 321 nm. In this case, the proper width of the fuse body is usually about 0.4 μm to about 1.0 μm.

Further, for example, the width of the fuse body is set to about 0.
Even if the width is reduced to 5 μm, the underlying Si may be hardly damaged. Even if the lead wire and the fuse body are formed to have substantially the same width, there is a case where the lead wire can be freely routed. When the two cases can be compatible with each other, the fuse body and the lead wire may be formed to have substantially the same width. However, if the width of the lead wire is made larger than the width of the fuse main body portion, there is a high possibility that the cutting characteristic (blowing characteristic) is deteriorated and the degree of freedom of wiring is increased, which is not preferable.

Further, the interval between the two lead lines 83 passing between the two fuse main bodies 82 in the first row, which is indicated by D in FIG. 10, is set to, for example, about 1.0 μm. Then,
The interval between the fuse main body portions 82 adjacent to each other in the first row shown by B in FIG. 10 is about 6 μm. As a result,
As shown in 0, three fuse wirings 81 can be arranged in the first column with a width of about 6 μm. This also applies to the second and third columns. Thus, according to the wiring pattern of the present embodiment, C in FIG.
The substantial pitch of the adjacent fuse wiring 81 indicated by can be narrowed to about 2.0 μm.

Each fuse wiring 81 shown in FIG.
Of the fuse body portion 82 of the desired fuse wiring 81
The result of fuse blowing is shown in FIG. At this time, the wavelength of the laser beam (laser beam) for fuse blowing is about 1321n using a fuse cutting device (not shown).
m, the diameter of the beam was about 3.0 μm, and the alignment accuracy was ± about 0.35 μm. In FIG. 11, the dotted portion of the fuse main body portion 82 shows the portion where the fuse has been blown. As shown in FIG. 11, it is understood that only the desired fuse wiring 81 can be cut in the wiring pattern of this embodiment. Therefore, according to the fuse wiring structure of the present embodiment, the fuse wiring 8
The substantial fuse pitch can be narrowed without forming the remaining film 73 on the first thin film or improving the limit of narrowing the pitch of the fuse wiring 81.

Further, when applying the wiring pattern of the fuse wiring 81 of this embodiment, each fuse main body portion 82 and each lead wire 83 may be formed in the same layer. On this occasion,
The interval between the lead lines 83 adjacent to each other is formed to be equal to or smaller than the diameter of the laser beam. That is, FIG.
2 As shown by enclosing with a dashed circle on the middle lead wire 83,
Two adjacent lead lines 83 are formed such that some of them are within the laser beam irradiation region. In such a setting, the laser beam is applied to the portion surrounded by the broken line circle. Then, adjacent two in FIG.
Two lead lines 83 can be collectively blown on the two lead lines 83, as indicated by the dots. That is, it is possible to substantially cut the two fuse wires 81 together by blowing the fuse once. This makes it possible to improve the throughput of cutting the fuse.

Further, the fuse wiring 81 may be formed in a pattern as shown in FIGS. 13 and 14.
The size of the irradiation area of the laser beam is shown in FIG. 13 and FIG.
4. The size is shown by enclosing it in a circle with a broken line. Then, it is set as a target at a predetermined position on each lead wire 83,
Fuse blow the part surrounded by the dashed circle. As a result, one or more fuse blows can collectively cut the two or three fuse wires 81.

Thus, the first column, the second column, and the third column
Each fuse main body portion 82 in the row is arranged so as to be positioned in a substantially straight line along the longitudinal direction of the fuse wiring 81. Then, each fuse wiring 81 is patterned so that the lead wire 83 formed in a narrow width equal to or smaller than the width of each fuse body portion 82 is passed between the fuse body portions 82. As a result, even if each fuse body portion 82 and each lead wire 83 are formed in the same layer, the adjacent fuse wiring 8
It is possible to obtain a fuse wiring structure capable of efficiently performing the fuse blowing of the target fuse wiring 81 in a proper state while suppressing the damage caused by the fuse blowing of No. 1. That is, since the fuse wiring structure capable of improving the flexibility of the wiring pattern according to the circuit design in the semiconductor device is provided, the reliability and the yield can be improved.

Further, as shown in FIGS. 13 and 14,
Each fuse main body portion 82 may be arranged such that each row is positioned in a substantially straight line not only in the longitudinal direction of the fuse wiring 81 but also in the direction orthogonal to the longitudinal direction. That is, the fuse main bodies 82 are arranged in a matrix so as to be located in a substantially straight line along both the longitudinal direction of the fuse wiring 81 and the direction orthogonal to the longitudinal direction. As a result, the fuse wiring 81 that allows the fuse blow to be performed more efficiently in a more appropriate state.
Can be obtained.

In the fuse wiring structure shown in FIG. 14, the fuse main body portions 82 of the first to third columns are common to the first to third columns provided corresponding to the respective columns. Each column is electrically connected to the potential wiring 85. The common potential wiring 85 of each column is formed in the region facing the bottom portion 10 of the fuse window 9 one below the other fuse main body portion 82. The common potential wirings 85 are electrically connected at their ends. Each fuse body 82 and each common potential wiring 85
Are electrically connected to each other by a contact plug (not shown) formed along the stacking direction between the portion of each fuse main body portion 82 shown by X in FIG. 14 and each common potential wiring 85.

In the present embodiment, the wiring pattern of the fuse wiring 81 is not limited to the shape shown in FIGS. With one blow of fuse,
A larger number of fuse wires 81 can be appropriately formed with an appropriate shape, size and wiring pattern so that they can be cut together. In addition, the fuse body 8
The distance between 2 and the lead wire 83 may be set to an appropriate size according to the wavelength of the laser beam for fuse blowing, the diameter of the beam, the alignment accuracy, and the like.

In the present embodiment, the residual film 73 on the fuse wiring 81 forming the bottom portion 10 of the fuse window 9 has the fuse window 9 as shown in FIGS.
The bottom edge 10 has a shape and film thickness that cannot be opened. Further, when each fuse wiring 81 is formed using Cu and each fuse body portion 82 and each lead wire 83 are formed in the same layer, each lead wire is formed near the peripheral portion of the bottom portion 10 of the fuse window 9. 83 is formed by lowering at least one layer below. This allows
Even if the trenching phenomenon occurs in the bottom portion 10 of the fuse window 9, the possibility that the fuse wiring 81 is deteriorated can be greatly reduced.

As described above, according to the semiconductor device of the eighth embodiment, it is possible to obtain the same effects as those of the aforementioned seventh embodiment. Specifically, it is possible to cope with the narrowing of the pitch of the redundancy control circuit unit 84. Further, by forming the fuse main body 82 and the lead wire 83 in the same layer, it becomes possible to cut a plurality of adjacent fuse wires 81 by one fuse blow. As a result, the throughput of cutting the fuse can be improved.

The semiconductor device according to the present invention is not limited to the above-described first to eighth embodiments. Without departing from the spirit of the present invention, it is possible to change the configuration or a part of the process to various settings, or to use various settings in an appropriate combination. .

For example, the height at which the fuse wiring is provided is not limited to the wiring layer which is one layer below the uppermost layer. In the case of a semiconductor device having a multilayer wiring structure, the fuse may be formed in any layer in the semiconductor device as long as it is easy to blow the fuse and the deterioration of the quality of the fuse wiring can be suppressed. Further, the height at which the lead lines are provided does not have to be set in the same layer as the fuse body for all fuse wirings. Alternatively, it is not necessary to set the height at which the lead line is provided in the layer immediately below the fuse body for all the fuse wirings. The lead lines may be provided in layers having different heights. The same applies to the case where a plurality of lead lines are drawn from one fuse body. In these cases, each lead wire may be pulled out in a stepwise manner so that it gradually descends as it goes away from the fuse body. The same applies to the height at which the common potential wiring is provided.

When the fuse body and the lead wire are connected while being separated from each other by a plurality of layers, it is sufficient to simply form a via plug portion (contact plug portion) in the layer between them. The same applies to the case where the lead-out line and the common potential line are separated by a plurality of layers and are electrically connected.

The number of lead lines drawn from one fuse body is not limited to one or two. For example, four lead lines may be drawn from each of a plurality of fuse body portions so that predetermined circuits in the semiconductor device can be disconnected in a plurality of patterns. Of the respective lead lines, predetermined lead lines may be formed so as to be adjacent to each other in a range smaller than the diameter of the fuse blowing laser beam. As a result, without lowering the work efficiency of fuse blowing,
The number of disconnection patterns can be increased. Further, it is possible to perform fuse blowing by selecting a place where the influence of the fuse blowing on an undesired region is lower. That is, the quality of the semiconductor device can be improved without lowering the work efficiency of fuse blowing.

The shape of the fuse body is not limited to the dual damascene structure, single damascene structure or RIE structure described above. Further, the fuse body and the via plug may be formed to have substantially the same size and shape.

Further, as the material for forming the fuse wiring, an appropriate material which does not easily deteriorate the fuse wiring can be selected according to the structure of the fuse wiring and the shape of the bottom of the fuse window. For example, when the residual film remaining on the bottom of the fuse window is thinly formed and the peripheral edge of the bottom may be opened, the fuse body of the fuse wiring may be formed of Al. In particular, when the fuse main body portion and the lead wire for a fuse formed to have a narrow width equal to or smaller than the width of the fuse main body portion are formed in the same layer, the fuse wiring is formed by using Al. Can be suppressed very well. On the other hand, if the residual film remaining at the bottom of the fuse window is formed thick and there is almost no possibility of opening the peripheral portion of the bottom, the fuse body of the fuse wiring is
It may be formed of u. As a result, the electrical characteristics of the fuse wiring can be improved. Further, the same effect as in the above-described respective embodiments can be obtained by using a metal having substantially the same characteristics as Cu, Al, or the like for the fuse wiring. For example, the fuse wiring may be formed of Cu alloy or Al alloy.

When the fuse main body is formed in the single damascene structure, the fuse main body and the via plug may be made of different materials. In this case, a metal having a higher melting point than the material forming the fuse body is used as the material forming the via plug. For example, the via plug portion is formed using a so-called refractory metal.

Further, as the diameter of the via plug portion that electrically connects the fuse main body portion of the fuse wiring and the lead wire is made smaller, the lead wire width of the fuse wire can be made smaller. By forming the width of the fuse lead line to be equal to or less than the width of the fuse body, it is possible to reduce the influence on the periphery of the fuse wiring to be disconnected when the fuse is blown.

The barrier film is not limited to the pair of Ta and TaN. For example, Ti and TiN, Nb and NbN, W and WN, or Zr and ZrN
The barrier film may be formed by using each combination of the above. Further, the layer made of a compound is not limited to nitride, and may be, for example, a carbide containing each of the above metal elements as a main component, or a boride. That is, a metal selected from the group consisting of IVa group, Va group, or VIa group and a compound thereof may be selected and used according to the material for forming the fuse wiring. Further, the top barrier film may be provided on the Al fuse body. As a result, quality deterioration in the fuse body can be significantly reduced.

The light beam used for fuse blowing is not limited to the laser beam having the above-mentioned setting. For example, various types of light rays shown below can be used.

The fundamental wave (wavelength: 1064 nm) of the Q-switch Nd YAG laser, the second harmonic wave (wavelength: 532 nm) of the Q-switch Nd YAG laser, the third harmonic wave (wavelength: 355 nm), and the fourth harmonic wave of the same. Wave (wavelength:
266 nm). Alternatively, it is a KrF excimer laser (wavelength: 248 nm), an ArF excimer laser (wavelength: 190 nm), or the like. That is, the light beam may be a light beam that can be locally emitted by narrowing the beam diameter of the blowing light beam and that can selectively cut a desired fuse wiring.

[0131]

In the semiconductor device according to the present invention, the fuse body is formed to have a size smaller than the bottom of the fuse blowing recess and a length equal to or larger than the diameter of the fuse blowing laser beam. Is provided inside the region facing the bottom of the. This allows
Even if the film thickness of the remaining film on the fuse wiring is made thin so as to facilitate the fuse blowing, there is almost no risk of exposing the fuse body. In addition, since the laser beam easily hits the fuse body and the energy of the laser beam does not easily escape to below the fuse body, there is almost no possibility of damaging the insulating film around the fuse wiring. Therefore, the quality of the fuse wiring and its peripheral portion is not easily deteriorated, and the quality is high. As a result, the semiconductor device as a whole is of good quality.

Further, in the semiconductor device according to the present invention, the lead line for the fuse is formed in a layer below the fuse body. Alternatively, the lead wire for a fuse is formed in the same layer as the fuse body portion, with its width being narrower than the width of the fuse body portion. As a result, when the fuse is blown, there is almost no possibility of damaging the fuse wiring adjacent to the broken fuse wiring. At the same time, the degree of freedom of the wiring pattern is set so that the size of the fuse wiring area, the fuse pitch, and the number and density of the fuse wiring can be set to an appropriate state according to the design of various electronic circuits in the semiconductor device. It has a fuse wiring structure that can be improved. Therefore, it is possible to suppress the risk of being damaged by the fuse blow, and it is possible to increase the number of fuse wires without expanding the fuse wire region. Therefore, the reliability of the semiconductor device as a whole and the production yield thereof are improved.

[Brief description of drawings]

FIG. 1 is a process cross-sectional view showing a manufacturing process of a semiconductor device according to a first embodiment.

FIG. 2 is a graph showing a relationship between a wavelength of a fuse blowing laser beam and a minimum beam diameter.

FIG. 3 is a diagram showing a correlation between a density of a current flowing through a fuse wire and a critical length of the fuse wire.

FIG. 4 is a cross-sectional view showing a structure near a fuse wiring of a semiconductor device according to a second embodiment.

FIG. 5 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a third embodiment.

FIG. 6 is a cross-sectional view showing a structure near a fuse wiring of a semiconductor device according to a fourth embodiment.

FIG. 7 is a cross-sectional view showing a structure near a fuse wiring of a semiconductor device according to a fifth embodiment.

FIG. 8 is a sectional view showing a structure near a fuse wiring of a semiconductor device according to a sixth embodiment.

FIG. 9 is a plan view showing a structure near a fuse wiring of a semiconductor device according to a seventh embodiment.

FIG. 10 is a plan view showing a structure near a fuse wiring of a semiconductor device according to an eighth embodiment.

11 is a plan view showing a state in which a fuse is blown in a fuse body portion of the fuse wiring shown in FIG.

FIG. 12 is a plan view showing a state in which a fuse main body and a lead wire of the fuse wiring of FIG. 10 are blown with a fuse.

FIG. 13 is a plan view showing a structure in the vicinity of a fuse wiring including another wiring pattern of the semiconductor device according to the eighth embodiment.

FIG. 14 is a plan view showing a structure in the vicinity of a fuse wiring formed of still another wiring pattern of a semiconductor device according to an eighth embodiment.

15A and 15B are a cross-sectional view and a plan view showing a structure near a fuse wiring of a semiconductor device according to a conventional technique.

16A and 16B are a plan view and a cross-sectional view showing a structure in the vicinity of a fuse wiring formed of another configuration of a semiconductor device according to a conventional technique.

17A and 17B are a plan view and a cross-sectional view showing a state in which fuse blowing is performed on the fuse wiring of FIG.

FIG. 18 is a plan view showing a state in which the fuse wiring of FIG. 16 is narrowed and the fuse is blown.

[Explanation of symbols]

1, 21, 31 ... Cu fuse wiring, 2, 22, 32 ...
Cu fuse body, 3 ... Si substrate (substrate), 4 ... Interlayer insulating film (residual film, TEOS-SiO ₂ film, ILD film),
5 ... Cu lead line (fuse lead line), 6 ... Barrier metal film (barrier film), 6a ... Ta layer (barrier film), 6b ... TaN layer (barrier film), 7 ... Cu diffusion prevention film (silicon nitride film) , Insulating film), 9 ... Fuse window (fuse blow recess, recess), 10 ... Fuse window bottom (bottom of fuse blow recess), 11, 67 ... Passivation film (insulating film), 12, 23 ... Cu via plug Part (contact plug part, plug part), 33 ... Top barrier metal film (barrier film), 33a ... Ta layer (barrier film), 33b ... TaN layer (barrier film), 41, 51, 6
1, 71, 81 ... Fuse wiring, 42, 52, 62 ... A
l fuse body, 43 ... Barrier film (barrier metal film), 43a ... Ta layer (barrier metal film), 43b ... A
1 Cu layer (barrier metal film), 53, 68 ... Al via plug portion (contact plug portion, plug portion), 63 ... Pad portion first insulating film, 64 ... Pad portion second insulating film (residual film, TEOS-SiO ₂ Film), 65 ... Pad part third insulating film (TEOS-SiO ₂ film), 66 ... Pad part fourth insulating film (silicon nitride film), 72, 82 ... Fuse main body part,
73 ... Remaining film (insulating film), 83 ... Fuse lead wire, 84 ... Control circuit section (electronic circuit), 85 ... Common potential wiring

Continued front page    (72) Inventor Takako Usui             8th Shinsugita Town, Isogo Ward, Yokohama City, Kanagawa Prefecture             Ceremony company Toshiba Yokohama office (72) Inventor Mie Matsuo             8th Shinsugita Town, Isogo Ward, Yokohama City, Kanagawa Prefecture             Ceremony company Toshiba Yokohama office F term (reference) 5F033 HH08 HH09 HH11 HH12 HH17                       HH18 HH19 HH21 HH32 JJ01                       JJ08 JJ09 JJ11 JJ17 JJ18                       JJ19 JJ21 JJ32 KK11 KK21                       KK32 MM01 MM02 MM05 MM08                       MM12 MM13 NN06 NN07 PP27                       QQ09 QQ11 QQ19 QQ48 RR01                       RR04 RR06 RR23 SS04 UU04                       VV11 WW08 XX01 XX20 XX24                       XX28 XX34                 5F064 BB35 EE19 FF02 FF27 FF32                       FF34 FF42 GG03

Claims (20)

[Claims] 1. A substrate, a fuse wire provided on the substrate, and an insulating film provided so as to cover the fuse wire, wherein the fuse wire is electrically connected to the fuse wire. The fuse main body that is the target of the fuse blow to be disconnected is smaller than the bottom of the fuse blow recess formed in the insulating film on the fuse wiring, and has a length not less than the diameter of the fuse blow laser beam Formed,
A semiconductor device, which is provided inside an area facing the bottom portion. 2. A fuse lead line, which is electrically connected to the fuse body and constitutes the fuse wiring together with the fuse body, is provided in a lower layer than the fuse body. The semiconductor device according to claim 1. 3. A fuse lead line that is electrically connected to the fuse main body and constitutes the fuse wiring together with the fuse main body is formed so that its width is narrower than the width of the fuse main body. The semiconductor device according to claim 1, wherein the fuse main body is provided in the same layer. 4. A fuse wiring formed of a lead wire for a fuse provided on a substrate and a fuse main body portion provided above the lead wire and electrically connected to the lead wire, and the substrate. An insulating film which is provided on the fuse body to cover the fuse wiring and has a fuse blow recess formed above the fuse body. A semiconductor device, which is formed to have a length equal to or larger than a diameter of a laser beam, and is provided such that both end portions in a longitudinal direction thereof are located in an inner region of a bottom portion of the recess. 5. A fuse wire formed of a lead wire for a fuse provided on a substrate, and a fuse main body provided in the same layer as the lead wire and electrically connected to the lead wire, and the substrate. An insulating film which is provided on the fuse body to cover the fuse wiring and has a fuse blow recess formed above the fuse body. The lead wire is formed to have a length equal to or larger than the diameter of the laser beam, and both end portions in the longitudinal direction thereof are provided so as to be located in an inner region of the bottom portion of the recess, and the width of the lead wire is the fuse body portion. A semiconductor device having a width equal to or smaller than the width of the semiconductor device. 6. The semiconductor device according to claim 5, wherein the lead wire is provided so as to extend from the fuse body toward an outside of a region facing the bottom of the recess. 7. A plurality of the fuse wires are provided in parallel, and fuse body portions of adjacent fuse wires are arranged so as to be offset from each other along a direction orthogonal to a longitudinal direction of the fuse wires. 7. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device. 8. At least two fuse body portions of the fuse body portion of the fuse wiring are arranged substantially linearly along a direction orthogonal to a longitudinal direction of the fuse wiring. The semiconductor device according to claim 7, wherein the semiconductor device is a semiconductor device. 9. A plurality of the fuse wirings are provided in parallel, and at least two of the fuse body portions of the fuse wirings are substantially straight along a longitudinal direction of the fuse wirings. 7. The semiconductor device according to claim 1, wherein the semiconductor device is arranged in the shape of a circle. 10. A plurality of the fuse wirings are provided in parallel, and a fuse main body portion of the fuse wiring is
10. The semiconductor device according to claim 1, wherein the semiconductor devices are arranged in a matrix along both the longitudinal direction of the fuse wiring and the direction orthogonal to the longitudinal direction of the fuse wiring. 11. A plurality of the fuse wirings are provided in parallel, and at least two of the fuse wirings of at least two of the fuse wirings are laser beams for fuse blowing. Are formed in close proximity to each other so that they fall within the range equal to or less than the irradiation area of
7. The semiconductor device according to claim 5, wherein the semiconductor device is provided in an inner region of a bottom of the fuse blowing recess. 12. The fuse main body portion is electrically connected to an electronic circuit provided outside the region facing the bottom portion of the fuse blow recess through the corresponding lead wire. The semiconductor device according to claim 11, which is provided. 13. The product of the length of the fuse wiring and the magnitude of the current density flowing in the fuse wiring is 80.
13. The semiconductor device according to claim 1, wherein the semiconductor device is formed to have a thickness of 0 μm · MA / cm ² or less. 14. The fuse body is provided integrally with a plug portion electrically connecting the fuse body and the lead wire in an upper layer of a layer in which the lead wire is provided. 3. The method according to claim 2, wherein
Alternatively, the semiconductor device according to item 4. 15. The fuse main body is provided in an upper layer of a layer in which the lead wire is provided, and is embedded separately from a plug portion electrically connecting the fuse main body and the lead wire. 2. The method according to claim 2, wherein
Alternatively, the semiconductor device according to item 4. 16. The fuse main body is an upper layer of a layer in which the lead wire is provided, and is formed by etching together with a plug portion electrically connecting the fuse main body and the lead wire. It is provided, The semiconductor device of Claim 2 or 4 characterized by the above-mentioned. 17. The semiconductor device according to claim 14, wherein a diameter of the plug portion is formed to be equal to or smaller than a width of the fuse body portion. 18. The fuse wiring is formed of Cu or a Cu alloy.
17. The semiconductor device according to any one of 17. 19. The semiconductor device according to claim 18, wherein the fuse body is provided with a barrier film thereon. 20. The fuse wiring is formed of Al or an Al alloy.
17. The semiconductor device according to any one of 17.