JP2003288378A - System lsi design support program, system lsi control circuit and integrated circuit for pc - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the development efficiency of a system LSI. <P>SOLUTION: This program is provided with a synchronous analytic part 102 for extracting a reading processing for another module from the content of a logic circuit module constructed on the system LIS or a program module integrated to a ROM, and generating synchronous information showing the synchronous relation between the modules based on the extracted reading processing, a synchronous conversion part 104 for converting, when performing the conversion between the logic circuit module and the program module, the synchronous processing of the modules based on the synchronous information, and an API library 108 for registering an API function for making the logic circuit module execute the function of the logic circuit module. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a logic circuit module mounted on a system LSI, which is a design target, and a ROM (Read Onl) mounted on the system LSI.
The present invention relates to a system LSI design support program, a system LSI control circuit, and a PC integrated circuit for designing a program module incorporated in a y Memory).

[0002]

2. Description of the Related Art Conventionally, mobile phones and PHS (Person)
FPG used for al Handy Phone)
The design of the system LSI such as A is determined in advance for each function by a logic circuit or a program, and then HDL (Hardware Description).
(Language: hardware description language) etc. to develop hardware such as a logic circuit block and system L
Since they are incorporated in the ROM of SI, different developers separately develop software such as programs in C language. After the hardware development and the software development are completed, the developed program or logic circuit block is mounted on the system LSI, and the hardware-software co-verification (co-verification) is performed.
n) and performance measurement, etc., and when the performance is low, the function allocation of software and hardware is readjusted, and work such as correction and addition of logic circuit blocks and embedded programs is performed.

[0003]

However, such a system LSI designing method has the following problems. There is a case where modules of each functional unit are operating in parallel while synchronizing with each other, instead of a program which is sequentially executed like a CPU. In such a case, it is necessary to analyze and accurately grasp the synchronization relationship between each module. However, software developers usually have little knowledge of hardware, and hardware developers usually have little knowledge of software. Therefore, there is a problem that it takes time to analyze the synchronization processing and the development efficiency deteriorates.

In particular, when the logic circuit block is changed to a functionally equivalent built-in program as a result of readjusting the functional division of software and hardware, or vice versa, the changed module and other modules are There is a problem in that the work of changing the synchronization processing between the two becomes necessary and the development efficiency further deteriorates.

The present invention has been made in view of the above,
If you have knowledge of either hardware or software, you can easily design a system LSI.
An object of the present invention is to obtain a system LSI design support program, a system LSI control circuit, and a PC integrated circuit capable of improving the development efficiency of the system LSI.

[0006]

In order to achieve the above object, the invention according to claim 1 is a program for causing a computer to function as a means for designing a system LSI having a built-in CPU core. Synchronization information indicating the synchronization relationship between the modules based on the extracted calling process by extracting the calling process of another module from the contents of the module of the logic circuit constructed in Is characterized by causing a computer to function as a synchronous analysis means for generating.

According to the first aspect of the present invention, the synchronization analysis means performs a process of calling another module from the contents of the module of the logic circuit constructed on the system LSI or the module of the program incorporated in the ROM. By extracting the synchronization information based on the extracted call processing and showing the synchronization relationship between the modules, even if only one of the knowledge of hardware or software is familiar, It can be easily grasped and the development efficiency of the system LSI can be improved.

The invention according to claim 2 is based on claim 1.
In the system LSI design support program described in
It is characterized by further comprising an API library that is called from the module and registers an API function for causing the logic circuit module to execute the function of the logic circuit module.

According to the second aspect of the present invention, the function A is called from the module and causes the logic circuit module to execute the function of the logic circuit module.
By having an API library that registers PI functions,
IP (Intellectual Property)
When accessing a logic circuit module such as a functional block such as
The system LSI can be easily developed even if the hardware knowledge is poor, and the system LSI development efficiency can be further improved.

The invention according to claim 3 provides the invention according to claim 2.
In the system LSI design support program described in
The API function returns attribute information indicating a function of the corresponding logic circuit module as a return value.

According to the invention of claim 3, the AP
The I-function returns attribute information indicating the function of the corresponding logic circuit module as a return value, so that the attribute information is used as an index for software / hardware division of the function of the system LSI at the specification design stage of the system LSI. It can be used, and the development efficiency of the system LSI can be further improved.

The invention according to claim 4 is the same as claim 3
In the system LSI design support program described in
The API function is characterized in that at least one of the attribute information in power consumption, circuit scale, and processing time is returned as a return value.

According to the invention of claim 4, the AP
The I function returns at least one of the attribute information among power consumption, circuit scale, and processing time as a return value,
At the system LSI specification design stage, the processing time, power consumption, cost, etc. of the entire system can be estimated and used as an index for software / hardware division of the function of the system LSI. Can be further improved.

The invention according to claim 5 provides the invention according to claim 2.
In the system LSI design support program according to any one of 1 to 4, the synchronization analysis unit extracts a calling process of the API function from the module, and based on the extracted calling process, the logic circuit module It is characterized in that the synchronization information of another module is generated.

According to the invention of claim 5, the synchronous analysis means extracts the call processing of the API function from the module, and based on the extracted call processing,
By generating the synchronization information of the logic circuit module and other modules, the knowledge of the hardware is scarce and the synchronization relationship between the logic circuit modules and the synchronization relationship between the program module and the logic circuit module can be easily grasped. The LSI development efficiency can be further improved.

The invention according to claim 6 is the same as claim 1.
In the system LSI design support program described in any one of 5 to 5, when a logic circuit module designated by the user is converted into the program module having a function equivalent to the logic circuit module, or designated by the user. When a program module is converted into a logic circuit module having a function equivalent to the program module, the synchronization processing of the module before conversion and the other module is converted according to the module after conversion, based on the synchronization information. It is characterized in that the computer is further made to function as the synchronization conversion means.

According to the sixth aspect of the present invention, when the logic conversion module designated by the user is converted into the program module having a function equivalent to the logic circuit module by the synchronization conversion means, or by the user. When the converted program module is converted into a logic circuit module having a function equivalent to the program module, the synchronization processing of the module before conversion and the other module is performed according to the module after conversion based on the synchronization information. Even if the functions are divided between software / hardware by conversion, the synchronization relationship of each module can be maintained, so the correction work of synchronization processing is unnecessary and the development efficiency of system LSI can be further improved. You can

The invention according to claim 7 is the same as claim 1.
In the system LSI design support program described in any one of 1 to 6, static model information indicating a synchronization relationship between the logic circuit modules and synchronization between the logic circuit modules including state transitions of the logic circuit modules. It is characterized in that the computer is further made to function as a screen display means for separately displaying the dynamic model information indicating the relationship on the screen.

According to the invention of claim 7, the screen display means synchronizes the static model information indicating the synchronization relationship between the logic circuit modules and the logic circuit modules including the state transition of the logic circuit modules. By displaying the dynamic model information indicating the relationship separately on the screen, the information of each module mounted on the actual system LSI can be expressed as static model information from the initial design stage. Sometimes the traditional process of mapping processing to hardware becomes unnecessary. Further, by displaying the dynamic model information on the screen separately from the static model information, functional verification can be easily performed. Therefore, according to the present invention, it is possible to further improve the development efficiency of the system LSI.

The invention according to claim 8 is the invention according to claim 7.
In the system LSI design support program described in
The screen display means screen-displays temporal model information indicating a synchronization relationship between the logic circuit modules including a synchronization timing of the logic circuit module, separately from the static model information and the dynamic model information. Is characterized by.

According to the eighth aspect of the present invention, the screen display means displays the temporal model information indicating the synchronization relationship between the logic circuit modules including the synchronization timing of the logic circuit modules as static model information and dynamic model information. By displaying the screen separately from the model information, the screen display covering all of the function verification, timing verification, and hardware mounting can be performed separately and easily grasped, and the development efficiency of the system LSI can be further improved. be able to.

According to a ninth aspect of the present invention, there is provided a system LSI control circuit which is mounted on a system LSI having a built-in CPU core built on a logic integrated circuit and which controls the overall operation of the system LSI. A storage unit that holds synchronization information indicating a synchronization relationship between a module of a logic circuit built on the LSI or a module of a program incorporated in the ROM, and a control unit that controls the operation of the module based on the synchronization information. It is characterized by having.

According to the ninth aspect of the present invention, the storage means holds the synchronization information indicating the synchronization relationship between the module of the logic circuit constructed on the system LSI or the module of the program incorporated in the ROM, and controls it. By controlling the operation of the module based on the synchronization information by the means, the entire system LSI can be easily managed including the synchronization relationship, which is convenient for the user.

According to a tenth aspect of the present invention, in the system LSI control circuit according to the ninth aspect, the storage means further holds, for each of the modules, state information indicating a processing state of the module, The control means further controls the operation of the module based on the state information.

According to the tenth aspect of the present invention, by holding the status information indicating the processing status of the module in the storage means and controlling the operation of the module based on the status information by the control means, the waiting status etc. It is possible to control the module, such as stopping the clock for the module in, and to realize low power consumption.
Further, hardware resources can be saved by controlling the generation and deletion of the logic circuit module based on the state information.

The invention according to claim 11 is the system LSI control circuit according to claim 9 or 10, wherein the storage means further comprises:
Holds priority information indicating the execution order of the modules,
The control means further, based on the priority information,
The operation of the module is controlled.

According to the eleventh aspect of the present invention, the storage unit holds the priority information indicating the execution order of the modules, and the control unit controls the operation of the module based on the priority information. Execution control can be performed based on the module priority order, and the efficiency of processing by the system LSI can be improved.

According to a twelfth aspect of the present invention, there is provided an integrated circuit for a PC, which is mounted on a computer and can be read by the computer, which has a CPU core built therein and a module of a logic circuit or a module of a program incorporated in a ROM. It is characterized in that it is provided with a system LSI on which is mounted and an integrated circuit for verification.

According to the invention of claim 12, C
Built-in PU core, logic circuit module or RO
By providing a system LSI having a program module incorporated in M and an integrated circuit for verification,
It is possible to implement everything from the specification design of the system LSI to the implementation on a computer. Also, system LSI
Since the module mounted on the PC can be immediately downloaded to the integrated circuit for PC and verified, accurate system performance estimation and software / hardware division work can be performed immediately on the PC.
The above can be performed, and the development efficiency of the system LSI can be further improved.

According to a thirteenth aspect of the present invention, in the PC integrated circuit according to the twelfth aspect, the system L is used.
It is characterized by further comprising storage means for storing the execution result by SI.

According to the thirteenth aspect of the present invention, since the storage means for storing the execution result by the system LSI is provided, the execution result can be immediately confirmed on the PC, and the development efficiency of the system LSI can be improved. It can be further improved.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of a system LSI design support program, a system LSI control circuit and an integrated circuit for PC according to the present invention will be described in detail below with reference to the accompanying drawings.

(Embodiment 1) A system LSI design support program according to this embodiment is provided in a format that can be installed in a storage medium such as a CD-ROM, and a PC
(Personal Computer) and the like, and is installed and executed in a normal computer. Then, when the system LSI design support program is executed, the computer realizes the function provided by the system LSI design support program.

(Functional Configuration of System LSI Design Support Program) FIG. 1 is a block diagram showing a functional configuration of a PC when the system LSI design support program according to the first embodiment of the present invention is executed on the PC. is there. As shown in FIG. 1, the system LSI design support program according to the first embodiment includes an input processing unit 101 and a synchronization analysis unit 10.
2 and software / hardware division processing unit 103
The AP having a component configuration including a synchronous conversion unit 104, a screen display unit 105, and an object generation unit 109, and which is further installed in the HD 106.
It includes the I library 108.

The input processing unit 101 receives various keys and events input from the keyboard or mouse of the PC and transfers them to the synchronization analysis unit 102 and the software / hardware division processing unit 103.

The object generator 109 stores the program module and the logic circuit module designed on the screen as an object 107 in the hard disk 106.

The synchronization analysis unit 102 analyzes the synchronization relationship between various logic circuit modules that construct the system LSI to be designed and various program modules incorporated in the ROM of the system LSI, and the analysis result is used as the synchronization information of the object 107. It is something to store.

Software / hardware division processing unit 1
Reference numeral 03 denotes a program module when a certain module is moved from software to hardware, that is, when the user gives an instruction to change a certain program module as a logic circuit module from the display screen of the PC, or vice versa. The conversion between the source code of and the code for hardware design of the logic circuit module is performed.

The synchronization conversion unit 104 uses the above software /
When converting between the source code of the program module and the hardware design code of the logic circuit module by the hardware division processing unit 103, the object 10
If the pre-conversion module is performing synchronization processing with another module by referring to the synchronization information of 7, the synchronization processing with the module to be synchronized is performed by the program module in order to maintain synchronization between the modules. Convert from source code to hardware design code of logic circuit module,
Alternatively, the reverse conversion process is performed.

The screen display section 105 performs display processing of various screens. In the system LSI design support program of the first embodiment, the static model showing the synchronization relationship between the logic circuit modules and the logic circuit are shown. The process of displaying the screen separately from the dynamic model showing the synchronization relationship between the logic circuit modules including the state transition of the module is performed on another plane.

Next, the object 107 generated by the object generator 109 will be described. Figure 1
Reference numeral 0 is an explanatory diagram showing the structure of the document and the communication unit between the objects stored in the HD 106 in addition to the object 107. As shown in FIG. 10, the object 107
Is composed of 7 layers.

In the first layer, it is possible to understand the function of each object and how to realize a system application by using the functions. This corresponds to a normal specification. The second layer is equivalent to a member function of a UML class (object). Third
The layer is the synchronization information generated by the synchronization analysis unit 102. The fourth layer is for determining the module in which the object is mounted. The fifth layer is for scheduling the processing of each object. The sixth layer stores hardware attribute information such as processing time, power consumption, and cost. The seventh layer stores assembler code and hardware gate level code.

As described above, by managing each object in a hierarchical structure, it becomes possible to easily perform system design and verification work. That is, by expressing each function in such a hierarchical structure, file management becomes easy, and the relationship between each function and the relationship with the entire system can be easily grasped. In addition, by performing such information management, the user can design while always understanding the design process, and since the comparison between each object and the entire system can be immediately found, the design efficiency can be improved. be able to.

Here, the scheduling of the processing of each object is displayed on the screen of the PC as shown in FIG. 11, for example, by using the fifth layer data of the object 107 by the screen display unit 105. Alternatively, FIG.
As shown in, it is also possible to display the activity diagram on the screen of the PC.

The API library 108 is one in which a plurality of different API functions are registered. The API function is provided for each logic circuit module (including IP), performs input / output to / from the logic circuit module, and causes the logic circuit module to operate. Therefore, by describing the API function calling process in the source code of the program module or the hardware design code of the logic circuit module, it becomes possible to operate the logic circuit module corresponding to the API function.

FIG. 2 is an explanatory diagram showing an API function, an example, and a process of calling a logic circuit module from a program module. As shown in FIG. 2, as an API function,
By writing call_lst1 in the source code of the program module, the CPU that executes the program module calls the logic circuit module corresponding to the API function.

Further, as shown in FIG. 2, the API function is
As the return value, power consumption (power_consumption), processing time (process_time), and circuit scale (cost) that are attribute information of the logic circuit.
Is returned to the caller. Therefore, by using such attribute information, it is possible to grasp the processing time of the entire system, the power consumption, and the estimation of the circuit scale, and thus it is possible to obtain the index of software / hardware division.

Further, the API function may be configured to return processing time, power consumption, circuit scale, I / O pin information, and processing contents as return values. Also, A
When the PI function is configured to return the maximum clock frequency as a return value, the processing time and power consumption change depending on the clock frequency, so it is necessary to return information according to each clock frequency. Furthermore, the variables used inside each API function can be configured to be accessed through I / O, and in this case, it is possible to prevent the internal information from being accidentally rewritten from the outside.

(Synchronization Analysis Processing) Next, the synchronization analysis processing by the system LSI design support program according to the first embodiment configured as described above will be described.

The synchronization analysis unit 102 scans the ware design code describing the configuration of the logic circuit module, and extracts the function call processing such as the system call and the API function call processing included in the program module. Then, the synchronization relationship between the logic circuit module corresponding to the program module or the API function having the function called in each function call process and the logic circuit module calling the function is recorded in the synchronization information.

Further, the source code of the program module is scanned to extract the function call processing such as the system call included in the program module and the API function call processing, and the program module having the function called in each function call processing or The synchronization relationship between the logic circuit module corresponding to the API function and the program module calling the function is recorded in the synchronization information.

FIG. 3A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit 102 is displayed on the screen as the synchronization relationship between the modules, and FIG.
FIG. 6 is an explanatory diagram showing the contents of synchronization information in this case. Figure 3
(A) and (b) have shown the static structure of the system like an instance and its related figure, for example. Figure 3
As shown in (a), as a static model, a module (corresponding to an instance in the case of UML), which is a unit of static functions, and its related diagram are displayed on the screen. As a result, each functional unit can be extracted and the influence of the functional unit can be easily grasped. In addition, FIG.
As shown in, the synchronization information expresses the relationship between the modules and the role of each module.

FIG. 4A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit 102 is displayed on the screen as the synchronization relationship between the modules, and FIG.
FIG. 6 is an explanatory diagram showing the contents of synchronization information in this case. Figure 4
(A) and (b) have shown the dynamic behavior of a system, ie, the synchronous relationship between modules including a state transition.

As shown in FIGS. 4 (a) and 4 (b), as a dynamic model, a state transition diagram of each component or a representation of the state transition table and the synchronization between the modules, or an activity diagram of each module is used. The expression of synchronization is displayed on the screen and is also generated as synchronization information. As a result, it is possible to understand how the modules relate to each other and the entire system operates.

FIG. 5A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit 102 is displayed on the screen as the synchronization relationship between the modules, and FIG.
And (c) are explanatory diagrams showing the contents of the synchronization information in this case. 5 (a) and 5 (b) show the synchronization relationship after software / hardware division.

As shown in FIG. 5 (a), by grasping the order of each processing of modules by synchronization, software / hardware division is performed, and scheduling when assigning processing to each module is performed. You can Further, as shown in FIG. 5B, the synchronization information holds information as to which process of which module issues each synchronization event to which process of which module. Further, as shown in FIG. 5C, it is possible to record an event that starts processing and an event that is issued after the processing ends.

Further, the system LS according to the first embodiment
In the I design support program, the screen display unit 105 draws the static model, the dynamic model, and the temporal model of the system on different planes and separately displays them on the screen of the PC.

FIG. 6 is an explanatory diagram showing a state in which the screen display unit 105 displays the static model, the dynamic model, and the temporal model of the system on different planes. As shown in FIG. 6, in the static model, for example, a diagram of the logic modules of the actual system LSI and the wiring between the logic modules are reflected and displayed. In the dynamic model, the processing content of each logic module is displayed including state transitions, and particularly the CPU operation is displayed using a state transition table so that simulation including the OS can be performed. in this way,
By expressing the information of the system LSI as a static model from the early stage of design, the conventional process of mapping the process to the hardware at the time of implementation design becomes unnecessary and the development efficiency can be improved. To be

By displaying a dynamic model,
Functional verification can be performed. Also, by displaying the temporal model in another plane for timing verification,
Function verification, timing verification, and hardware implementation are all covered, making it easy to understand. The temporal model displays information such as timing information for each process (processing time), estimated power consumption, unit price of logic module (circuit scale), and other maximum clock frequency. Timing verification of the entire system and circuit It is possible to estimate the scale and power consumption.

(Synchronous Conversion Processing) Next, the synchronous conversion processing by the system LSI design support program according to the first embodiment will be described. FIG. 7 shows the first embodiment on a PC.
FIG. 7 is an explanatory diagram showing an example of a screen when performing software / hardware division using the system LSI design support program according to the first embodiment. For example, as shown in FIG. 7, consider a case where the hardware logic circuit module 701a is moved to the software side, that is, the logic circuit module 701a is converted into a program module. In this case, the logic circuit module 701a is converted to the program module 701b by dragging the logic circuit module 701a to the software side with the mouse.

At this time, the logic circuit module 7 before conversion
01a is performing processing for synchronizing with the logic circuit module 702, the converted program module 701
It is necessary to synchronize with the logic circuit module 702 at b. The system LSI design support program according to the first embodiment performs a synchronous conversion process in such a case or when a program module is converted into a logic circuit module.

FIG. 8 is an explanatory diagram showing an outline of the synchronization processing method. As shown in FIG. 8, synchronization of software (program modules) is performed via a system call of the OS when a real-time OS is used (synchronization via memory). Further, the synchronization of the hardware (the logic circuit modules) is performed via a bus or a register. Further, the synchronization between the software / hardware is performed using an interrupt.

In the case of software / hardware synchronous conversion, the synchronous conversion unit 104 refers to the synchronous information generated by the synchronous analysis unit 102 and acquires the synchronous relationship of the conversion target modules. Then, the conversion data between the synchronous processing using the system call and the synchronous processing using the bus and the register is performed based on the acquired synchronous relation data. For example, as shown in FIG. 9, a system call (send_send) for sending a message when a program module is converted into a logic circuit module.
message) (message [1: 0]) to be transmitted when converting (message) to synchronization between hardware
Is transferred using the bus, and the enable signal is activated at the timing of sending an event, whereby the data can be transferred from the module A to the module B, and the synchronous conversion is performed. In addition,
The synchronous conversion method described here is an example, and the method is not limited to this.

As described above, in the system LSI design support program according to the first embodiment, the synchronization analysis unit 102 extracts the calling processing of another module from the contents of the logic circuit module or the program module constructed on the system LSI. However, since the synchronization information indicating the synchronization relationship between the modules is generated and stored in the object 107 based on the extracted call processing, even if only knowledge of hardware or software is familiar, The synchronization relation of each module can be easily grasped, and the development efficiency of the system LSI can be improved.

(Second Embodiment) In the second embodiment, a system controller (system L) mounted on a system LSI is used.
SI control circuit). FIG. 13 is a block diagram showing the configuration of the system controller 1301 according to the second embodiment. System controller 1301
A control unit 1302 and a storage unit 1303 are provided in the. In the storage unit 1303, synchronization information (processing order) indicating the synchronization relationship between the logic circuit module and the program module, priority indicating the execution order of the module, and status information indicating the processing status of the module (Wait, Busy,
Stop etc.) is held.

The control unit 1302 controls the entire system LSI on the basis of these pieces of information. For example, as the control regarding the status information (Wait, Busy, Stop, etc.) of the module, when the processing of the module is in the waiting state, control such as stopping the clock for the module is performed. As a result, low power consumption can be realized. In addition, the system controller 130
1 is capable of generating and erasing the logic circuit module, and when the logic circuit module finishes the processing and becomes unnecessary, the control is performed so that the erasing is performed at that time.
This makes it possible to save hardware resources. FIG. 14 shows a system controller 1301.
FIG. 6 is an explanatory diagram showing an outline of control based on state information according to FIG.

In addition, FPGA (Field Progr)
When designing a reconfigurable LSI such as an Amable Gate Array), the priority of the logic circuit module is used, and the real-time processing that must be completed within a target time is prioritized.

Further, like the memory management of the real-time OS, as shown in FIG. 15, it is possible to control the entire system by managing hardware resources. Since all the software / hardware information is stored in the memory, it is possible to dynamically reconfigure the system simply by downloading the memory data.

Since the configuration of the system controller 1301 according to the second embodiment can also be downloaded as data from the outside, the function required for the system controller 1301 can be selected according to the installed application.

For convenience of the user, the control unit 130
It is also possible to configure No. 2 so that the circuit configuration is automatically changed in consideration of the processing time of each module to meet the required time.

As described above, in the system controller 1301 according to the second embodiment, the storage unit 1303 for holding various information is incorporated in the controller, and the information stored in the storage unit 1303 is similarly stored by the control unit 1302 incorporated. Since the module is controlled based on the above, the entire system LSI can be easily managed including the synchronization relationship, the priority, and the state, which is convenient for the user.

(Third Embodiment) The third embodiment relates to a verification PC card having a system LSI mounted thereon. FIG. 16 is a block diagram showing the configuration of the verification PC card 1600 according to the third embodiment.

As shown in FIG. 16, an FPGA 1601 as a system LSI and a test logic circuit 1605.
A (verification integrated circuit), a RAM 1606, and a flash memory 1607 are incorporated in a PC card 1600. Then, in the ROM 1606, the FPGA 16
The execution result of 01 is stored.

In this way, the P with the FPGA 1601 mounted
When design verification is performed using the C card 1600, everything from specification design to mounting can be realized on the PC. In addition, the system controller 1301, real time O
Since S and design data can be immediately downloaded to the PC card and verified, accurate system performance estimation can be performed.

Further, after the software / hardware division, the performance estimation can be performed immediately, and the software / hardware division can be performed again immediately based on the estimation result. Also, software /
Since the result of hardware division can be verified immediately, the optimum system configuration can be realized in a short period of time.

By saving the result actually executed on the PC card in the RAM 1606 in the PC card, the execution result can be confirmed on the PC screen. Signals inside the system can also be observed on the PC by a method such as a Scan chain inside the LSI. Further, even if the clock frequency of the actual system is high, the function verification can be completely performed by lowering the frequency and mounting it on the PC card.

In addition to the early implementation of such prototype implementation, the implemented application can be used as it is. If such a PC card is distributed in advance, the application can be realized only by downloading the software through the network.

The PC card 1 according to the third embodiment
By using 600, even when an engineer at a remote place designs one system, mutual verification can be performed only by transferring the design data through a network such as the Internet.

[0079]

As described above, according to the first aspect of the present invention, even if only one of hardware and software is knowledgeable, the synchronization relation of each module can be easily grasped. The effect is that the development efficiency of the system LSI can be improved.

According to the invention of claim 2, I
When accessing a logic circuit module such as a functional block such as P, it is sufficient to call an API function, so that the development of the system LSI can be easily performed even if the knowledge of the hardware is poor, and the development efficiency of the system LSI can be improved. The effect of being able to further improve.

According to the third aspect of the invention, the attribute information can be used as an index for software / hardware division of the function of the system LSI at the stage of designing the specification of the system LSI.
The effect is that the development efficiency of can be further improved.

According to the fourth aspect of the invention, at the stage of designing the specifications of the system LSI, the processing time, power consumption, cost, etc. of the entire system are estimated and the software / hardware division of the functions of the system LSI is performed. System LSI that can be used as an index for
The effect is that the development efficiency of can be further improved.

According to the fifth aspect of the invention, the knowledge of hardware is scarce and the synchronization relationship between logic circuit modules and the synchronization relationship between the program module and the logic circuit module can be easily grasped, and the system LS can be easily understood.
The effect that the development efficiency of I can be improved more is produced.

According to the sixth aspect of the invention, even if the functions are divided between software / hardware, the synchronization relationship of each module can be maintained, so that the correction work of the synchronization processing becomes unnecessary, An effect is that the development efficiency of the system LSI can be further improved.

Further, according to the invention of claim 7, the information of each module mounted on the actual system LSI can be expressed by the static model information from the initial stage of the design, and the function verification can be performed. And the system LSI development efficiency can be further improved.

According to the invention of claim 8, the screen display covering all of the function verification, the timing verification and the hardware mounting can be separately performed and easily grasped, and the development efficiency of the system LSI can be improved. The effect of being able to further improve.

According to the ninth aspect of the invention, the entire system LSI can be easily managed including the synchronization relationship, which is convenient for the user.

According to the invention of claim 10,
The module can be controlled by stopping the clock for the module in the waiting state and the like, and low power consumption can be realized. Also,
By controlling the generation and deletion of the logic circuit module based on the state information, it is possible to save hardware resources.

According to the invention of claim 11,
There is an effect that execution control can be performed based on the priority order of modules, and the efficiency of processing by the system LSI can be improved.

According to the invention of claim 12,
It is possible to realize everything from the specification design to the implementation of the system LSI on the computer. Also, immediately load the module mounted on the system LSI.
The effects of being able to download to a C integrated circuit for verification, to accurately estimate system performance, to perform software / hardware division work immediately on a PC, and to improve the development efficiency of system LSI can be obtained. .

According to the thirteenth aspect of the invention,
The execution result can be immediately confirmed on the PC, and the development efficiency of the system LSI can be further improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a functional configuration of a PC when a system LSI design support program according to a first embodiment is executed on the PC.

FIG. 2 is an explanatory diagram showing an API function, an example, and a process of calling a logic circuit module from a program module.

FIG. 3A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit is displayed on the screen as a synchronization relationship between modules, and FIG. It is explanatory drawing which shows the content of synchronization information.

FIG. 4A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit is displayed on the screen as the synchronization relationship between the modules, and FIG. It is explanatory drawing which shows the content of synchronization information.

FIG. 5A is an explanatory diagram showing an example in which the synchronization information generated by the synchronization analysis unit is displayed on the screen as the synchronization relationship between the modules, and FIGS.
FIG. 6 is an explanatory diagram showing the contents of synchronization information in this case.

FIG. 6 is an explanatory diagram showing a state in which a static model, a dynamic model, and a temporal model of the system are displayed on different planes by the screen display unit.

FIG. 7 is a system LSI according to the first embodiment on a PC.
It is explanatory drawing which shows the example of a screen at the time of performing software / hardware division using a design support program.

FIG. 8 is an explanatory diagram showing an outline of a synchronization processing method.

FIG. 9 is an explanatory diagram showing an example of synchronous conversion.

FIG. 10 is an explanatory diagram showing structures of objects, a communication unit between the objects, and a document.

FIG. 11 is an explanatory diagram showing a display example of scheduling of processing of each object.

FIG. 12 is an explanatory diagram showing an example of displaying the scheduling of processing of each object in an activity diagram.

FIG. 13 is a block diagram showing a configuration of a system controller according to a second embodiment.

FIG. 14 is an explanatory diagram showing an outline of control based on state information by the system controller according to the second embodiment.

FIG. 15 is an explanatory diagram showing a state of hardware resource management by the system controller according to the second embodiment.

FIG. 16 is a block diagram showing a configuration of a verification PC card according to a third embodiment.

[Explanation of symbols]

101 Input processing unit 102 synchronization analysis unit 103 software / hardware division processing unit 104 Synchronous converter 105 screen display 106 hard disk 107 objects 108 library 109 Object generator 701a Logic circuit module 701b Program module 702 Logic circuit module 1301 System controller 1302 control unit 1303 storage unit 1600 PC card 1605 Test logic circuit 1607 Flash memory

Claims (13)

[Claims] 1. A program for causing a computer to function as a means for designing a system LSI having a built-in CPU core, the contents of a module of a logic circuit constructed on the system LSI or a module of a program incorporated in a ROM. Extract the calling process of other module from
A system LSI design support program for causing a computer to function as a synchronization analysis unit that generates synchronization information indicating a synchronization relationship between the modules based on the extracted calling process. 2. The API library according to claim 1, further comprising an API library that is called from the module and registers an API function that causes the logic circuit module to execute a function of the logic circuit module. System LSI design support program. 3. The system LSI design support program according to claim 2, wherein the API function returns attribute information indicating the function of the corresponding logic circuit module as a return value. 4. The API function stores at least one of the attribute information in power consumption, circuit scale, and processing time.
The system LSI design support program according to claim 3, which is returned as a return value. 5. The synchronization analysis means extracts a calling process of the API function from the module, and generates the synchronization information of the logic circuit module and another module based on the extracted calling process. The system LSI according to any one of claims 2 to 4, characterized in that
Design support program. 6. A logic circuit module designated by a user is converted into the program module having a function equivalent to the logic circuit module, or a program module designated by a user has a function equivalent to the program module. When converted into a logic circuit module, the computer may further function as a synchronization conversion unit that converts the synchronization processing of the module before conversion and the other module based on the synchronization information according to the module after conversion. Claims 1 to 1 characterized
5. A system LSI design support program described in any one of 5. 7. A screen for separately displaying static model information indicating a synchronization relationship between the logic circuit modules and dynamic model information indicating a synchronization relationship between the logic circuit modules including state transitions of the logic circuit module. 7. The system LS according to claim 1, further comprising causing a computer to function as a screen display unit for displaying.
I design support program. 8. The screen display means separates temporal model information indicating a synchronization relationship between the logic circuit modules including a synchronization timing of the logic circuit module from the static model information and the dynamic model information. The system LSI design support program according to claim 7, which is displayed on the screen. 9. The system LSI, which is mounted on a system LSI with a built-in CPU core built on a logic integrated circuit,
A storage means for holding synchronization information indicating a synchronization relationship between a module of a logic circuit constructed on the system LSI or a module of a program installed in a ROM, A system LSI control circuit comprising: control means for controlling the operation of the module based on synchronization information. 10. The storage means further holds, for each module, status information indicating a processing status of the module, and the control means further controls an operation of the module based on the status information. The system LSI control circuit according to claim 9, wherein the system LSI control circuit comprises: 11. The storage unit further holds, for each of the modules, priority information indicating an execution order of the module, and the control unit further includes, based on the priority information,
The system LSI control circuit according to claim 9, which controls the operation of the module. 12. An integrated circuit for a PC, which is mounted on a computer and readable by a computer, comprising a CPU core, a logic circuit module, or an R.
An integrated circuit for a PC, comprising a system LSI having a program module incorporated in the OM and an integrated circuit for verification. 13. The integrated circuit for PC according to claim 12, further comprising a storage unit that stores an execution result by the system LSI.