JP2003288047A - Device and method to drive light emitting display panel - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a driver of a light emitting display panel in which cross talk light emission is effectively suppressed and stable lighting condition of light emitting elements is secured even though the lighting rate of the elements is reduced. <P>SOLUTION: A voltage peak value generated on a scanning line, that is in a nonscanning state, through a parasitic capacitor of a light emitting element in the nonscanning state is held in a capacitor C<SB>3</SB>while scanning lines B<SB>1</SB>to Bm are successively scanned and light emitting elements OEL are light emission driven. On the other hand, a reverse bias voltage outputted from a reverse bias voltage generating circuit 5 is controlled based on the voltage value held in the capacitor C<SB>3</SB>and supplied to the lines B<SB>1</SB>to Bm. Thus, a reverse bias voltage which corresponds to a forward direction voltage of the light emitting element and is optimized, is generated and cross talk light emission is effectively suppressed. When the lighting rate of the light emitting elements is reduced, a lowest voltage is held in the capacitor C<SB>3</SB>by the constant voltage through a constant current circuit 22. Thus, a stable lighting condition of the light emitting elements is realized when the lighting rate of the elements is reduced. <P>COPYRIGHT: (C)2004,JPO

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to, for example, an organic EL device.
TECHNICAL FIELD The present invention relates to a technique for driving a capacitive light emitting element such as an (electroluminescence) element to emit light, and particularly when driving a display panel in which a plurality of organic EL elements are arranged, a reverse bias voltage applied to a scanning line in a non-light emitting state is appropriately set. The present invention relates to a driving device and a driving method for a light emitting display panel, which can effectively suppress crosstalk light emission of an EL element by performing control, and can perform stable light emission control even when the lighting rate of the EL element decreases.

[0002]

2. Description of the Related Art Organic EL displays have been partially put into practical use as low power consumption and high display quality alternatives to liquid crystal displays and displays that can be made thinner. This is because the use of an organic compound that can be expected to have good light-emitting characteristics in the light-emitting layer of an EL element used in an EL display has led to higher efficiency and longer life that can be put to practical use. is there.

The organic EL element can be electrically represented by an equivalent circuit as shown in FIG. That is, the organic EL element can be replaced with a configuration including a diode component E and a parasitic capacitance component Cp coupled in parallel with the diode component, and the organic EL element is considered to be a capacitive light emitting element. When an emission drive voltage is applied to this organic EL element, first, electric charges corresponding to the electric capacity of the element flow into the electrodes as displacement current and are accumulated.
Then, when a certain voltage (light emission threshold = Vth) peculiar to the device is exceeded, a current starts to flow from the electrode (the anode side of the diode component E) to the organic layer forming the light emitting layer, and light is emitted with an intensity proportional to this current. Then you can think.

FIG. 6 shows emission static characteristics of such an organic EL device. According to this, as shown in FIG. 6A, when the drive voltage (V) is equal to or higher than the light emission threshold voltage (Vth), the organic EL element rapidly emits a current (I). In other words, if the applied drive voltage is equal to or lower than the light emission threshold voltage, almost no drive current flows through the EL element after charging the parasitic capacitance and no light emission occurs. Then, in the light-emissible region where the drive voltage (V) is equal to or higher than the light-emission threshold voltage, as shown in FIG. 6B, it has a characteristic of emitting light with a brightness (L) substantially proportional to the drive current (I). There is. Therefore, as shown in FIG. 6C, in the luminance characteristic of the EL element, in the light-emission possible region larger than the threshold voltage, as the value of the voltage (V) applied thereto increases, the emission luminance (L) becomes higher. It has the characteristic of becoming large.

On the other hand, the above-mentioned organic EL device has a characteristic that the physical properties of the device change with a long-term use and the resistance value of the device itself increases. For this reason organic EL
As shown in FIG. 6A, the VI characteristic of the element changes in the direction indicated by the arrow (the characteristic indicated by the broken line) with the lapse of the actual use time, and the luminance characteristic also deteriorates.

Further, it is also known that the brightness characteristic of the organic EL element changes depending on the ambient temperature as shown by the broken line in FIG. 6 (c). That is, the EL element is
It has a characteristic that the emission brightness (L) increases as the value of the voltage (V) applied thereto increases, but the emission threshold voltage decreases as the temperature increases. Therefore,
The higher the temperature, the more the EL element is in a state in which it can emit light with a smaller applied voltage, and even if the same applied voltage that can emit light is applied, the EL element has temperature dependence of brightness such that it is bright at high temperature and dark at low temperature.

A simple matrix driving method is known as a driving method of a display panel constituted by arranging a plurality of such organic EL elements. FIG. 7 shows an example of a simple matrix display panel and its driving device. There are two methods of driving the organic EL element in the simple matrix driving method, that is, cathode line scanning / anode line driving and anode line scanning / cathode line driving. The configuration shown in FIG. The form of the drive is shown. That is, the anode wire A as the n drive wires
1 to An are vertical and cathode lines B1 as m scanning lines
~ Bm are arranged in the lateral direction and intersect each other (total n
The organic EL element OEL indicated by the diode symbol mark is arranged at (xm)) to form the display panel 1.

The EL elements constituting the pixels are arranged in a grid pattern, and the anode drive lines A1 to A along the vertical direction are arranged.
One end (the anode terminal of the diode component E of the equivalent circuit described above) corresponds to the anode drive line and the other end (the diode component of the equivalent circuit described above) corresponds to the intersection of n and the cathode scanning lines B1 to Bm along the horizontal direction. E cathode terminal) is connected to the cathode scan line. Further, the anode drive line is connected to the anode line drive circuit 2 and the cathode scanning line is connected to the cathode line scanning circuit 3 to be driven.

The cathode line scanning circuit 3 is provided with scan switches SY1 to SYm corresponding to the cathode scanning lines B1 to Bm, and a reverse bias voltage from a reverse bias voltage generating circuit 5 for preventing crosstalk light emission. Either (VM) or the ground potential as the reference potential point acts to connect to the corresponding cathode scanning line. Further, the anode line drive circuit 2 is provided with constant current circuits I1 to In and drive switches SX1 to SXn as constant current sources for supplying a drive current to each EL element through each anode drive line.

The drive switches SX1 to SXn act to connect either one of the currents from the constant current circuits I1 to In or the ground potential to the corresponding anode line. Therefore, drive switches SX1-S
By connecting Xn to the constant current circuit side, the currents from the constant current circuits I1 to In are supplied to the individual EL elements arranged corresponding to the cathode scanning lines.

It is also possible to use a driving source such as a constant voltage circuit instead of the constant current circuit. However, while the current / luminance characteristics of the EL element are stable against temperature changes, The constant current circuit is used as the drive source as shown in FIG. 7 for the reason that the luminance characteristic is unstable with respect to temperature change and that the EL element is prevented from deteriorating due to overcurrent. It is common.

A control bus is connected from the light emission control circuit 4 to the anode line drive circuit 2 and the cathode line scan circuit 3, and the scan switch is operated based on the image signal to be displayed supplied to the light emission control circuit 4. SY1 to SYm and drive switches SX1 to SXn are operated. Then, the constant current circuit is connected to the desired anode line while setting the cathode scanning line to the reference potential at a predetermined cycle based on the image signal. As a result, each of the light emitting elements selectively emits light, and an image based on the image signal is reproduced on the display panel 1.

Each of the constant current circuits I1 to In in the anode line drive circuit 2 is configured to be supplied with a DC output provided from a booster circuit 6 by a DC-DC converter. In addition, the booster circuit 6 by the DC-DC converter described below has PWM control (pulse width
Modulation) is used to generate DC output, but this is PFM control (pulse frequency modulation).
Can also be used.

This DC-DC converter is configured so that the PWM wave output from the switching regulator circuit 11 turns on the npn transistor Q1 as a switching element at a predetermined duty cycle. That is, when the transistor Q1 is turned on, the power energy from the DC voltage source 12 is stored in the inductor L1, and as the transistor Q1 is turned off,
The power energy stored in the inductor is stored in the capacitor C1 via the diode D1. By repeating the on / off operation of the transistor Q1, the boosted DC output can be obtained as the terminal voltage of the capacitor C1.

The DC output voltage is divided in a parallel circuit composed of a resistor R3 and a thermistor TH1 for temperature compensation, and in a connection point of the resistors R2 and R1 connected in series to the parallel circuit. Then, the divided output is supplied to the error amplifier 14 by the operational amplifier in the switching regulator circuit 11 and compared with the reference voltage Vref in the error amplifier 14. This comparison output (error output) is the PWM circuit 1
By controlling the duty of the signal wave supplied from the oscillator 16 and supplied from the oscillator 16, feedback control is performed so as to maintain the output voltage at a predetermined constant voltage.

In the configuration shown in FIG. 7, in the feedback system that is fed back to the error amplifier 14 as described above,
The thermistor TH1 is inserted and the thermistor TH1
DC-DC converter 6 depending on the temperature characteristics possessed by
The reverse bias voltage VM, which will be described later, obtained by adjusting the output voltage Vout obtained by the above and dividing the output voltage Vout as a result is made variable according to the environmental temperature. Here, the output voltage Vout obtained by the DC-DC converter 6 can be expressed as follows. In the following equation, "TH1 // R3" represents the parallel combined resistance value of the thermistor TH1 and the resistor R3.

[0017]

[Equation 1] Vout = Vref × [(R1 + R2 + TH1 //
R3) / R1]

On the other hand, the reverse bias voltage generating circuit 5 used to prevent the crosstalk light emission is composed of a voltage dividing circuit for dividing the output voltage Vout. That is, this voltage dividing circuit is composed of resistors R4 and R5, and an npn transistor Q2 which functions as an emitter follower. Therefore, if the base-emitter voltage of the transistor Q2 is Vbe,
The reverse bias voltage VM obtained by this voltage dividing circuit can be generally expressed as follows.

[0019]

[Equation 2] VM = Vout × [R5 / (R4 + R5)]-Vbe

In the above configuration, the light emission control circuit 4 is
While scanning the cathode scan lines B1 to Bm in the cathode line scan circuit 3 at a predetermined cycle, the drive switches SX1 to SXn in the anode line drive circuit 2 are controlled on the basis of the image signal, for each anode drive line A1 to An. Constant current circuit I
1 to In are selectively connected. As a result, the respective light emitting elements act to selectively emit light. At this time, the reverse bias voltage VM from the above-mentioned reverse bias voltage generation circuit 5 is applied to the cathode line in the non-scanning state, whereby
Each EL element connected to the intersection of the driven anode line and the cathode line which is not selected for scanning functions to prevent the crosstalk light emission.

By the way, the organic EL element has the parasitic capacitance Cp as described above, and for example, when several tens of EL elements are connected to one anode drive line, the anode drive is concerned. When viewed from the line, a combined capacitance of several tens of times each parasitic capacitance is connected to the anode drive line as a load capacitance.

Therefore, at the beginning of the scanning period, the current from the anode drive line is consumed for charging the load capacitance, and a time delay occurs for charging until the light emission threshold voltage of the EL element is sufficiently exceeded. However, eventually, there arises a problem that the rise of light emission of the EL element is delayed. In particular, when the constant current sources I1 to In are used as the driving source as described above, the constant current source is a high-impedance output circuit because of its operating principle, so that the current is limited and the EL element starts to emit light. There is a noticeable delay.

Therefore, in this kind of drive circuit, the cathode reset method is generally adopted. This cathode reset method is disclosed in, for example, Japanese Patent Application Laid-Open No. 9-232074, and when switching the scanning line, it works to accelerate the light emission rise of the EL element driven to emit light corresponding to the next scanning line. To do.

The drive switches SX1 to SXn provided in the anode line drive circuit 2 operate so as to be selectively connected to the constant current sources I1 to In or the ground potential,
When the switches SX1 to SXn are connected to the ground potential, the anode drive line is set to the ground potential. Therefore, the cathode reset method can be realized by using the drive switches SX1 to SXn.

FIG. 8 is a diagram for explaining the cathode reset operation. For example, from the state in which the EL element E11 connected to the first anode drive line A1 is driven to emit light, in the next scan, the same first The state in which the EL element E12 connected to the anode drive line A1 is driven to emit light is shown. Note that, in FIG. 8, the EL element driven to emit light is shown as a symbol mark of a diode, and the others are shown as a symbol mark of a capacitor as a parasitic capacitance.

FIG. 8A shows a state before the cathode reset operation, in which the cathode scanning line B1 is scanned and the EL element E is scanned.
11 shows a state of emitting light. EL element E12 in the next scan
However, before the EL element E12 emits light, the anode drive line A1 and all the cathode scanning lines are reset to the ground potential as shown in (b) to discharge all the charges of each EL element. . For this, each scan switch SY1-
SYm is connected to the ground side, and the drive switch SX1 is connected to the ground side. Next, in order to make the EL element E12 emit light, the cathode scanning line B2 is brought into a scanning state. That is, the cathode scanning line B2 is connected to the ground, and the other cathode scanning lines are supplied with the reverse bias voltage VM.
At this time, the drive switch SX1 is switched to the constant current source I1 side.

Therefore, since the electric charge of the parasitic capacitance in each element is discharged at the time of the above-mentioned reset, at this moment, as shown in (c), the element E12 which emits light next time is emitted.
The parasitic capacitance of the other elements is charged in the reverse direction by the reverse bias voltage VM as shown by the arrow. The charging current for these flows into the EL element E12 to be emitted next, via the anode drive line A1, and charges the parasitic capacitance of the EL element E12. At this time, drive line A1
The constant current source I1 connected to is basically a high impedance output circuit as described above, and does not affect the movement of this charging current.

In this case, it is assumed that, for example, 64 EL elements are arranged on the drive line A1 and the reverse bias voltage VM is, for example, 10 (V). Anode drive line A1
Since the wiring impedance in the panel is so small as to be negligible, the electric potential V (A1) of (5) instantly rises to the electric potential based on Equation 3 below. For example, the outer shape is 100 mm x 25 mm
With a display panel of (256 × 64 dots), this operation is completed in about 1 μsec.

[0029]

[Formula 3] V (A1) = (VM × 63 + 0V × 1) / 64 =
9.84V

After that, the EL element E12 is brought into a light emitting state as shown in (d) by the drive current from the constant current source I1 flowing through the drive line A1. As described above, in the cathode reset method, the forward voltage of the EL element to be driven next for lighting is utilized by utilizing the parasitic capacitance of the EL element and the reverse bias voltage for preventing crosstalk light emission, which originally hinders driving. It acts to instantly start up.

[0031]

When the cathode reset method as described above is used, the forward voltage of the EL element that is driven to light in the next scan is instantly raised and the forward voltage from the constant current source is increased. The EL element is driven to emit light in response to the drive current. Therefore, if the value of the reverse bias voltage VM is set to a higher value, crosstalk light emission can be effectively suppressed, and the initial charge voltage of the forward voltage to the EL element emitted in the next scan can be accordingly changed. It seems to be preferable because it increases. However, when the value of the reverse bias voltage VM is set excessively large, a so-called leak phenomenon occurs,
There is a problem that the display quality of the display panel is degraded. Therefore, in the conventional drive circuit of this type,
The reverse bias voltage VM is the forward voltage Vf of the EL element.
It is set to a fixed voltage close to.

By the way, this type of EL device is shown in FIG.
As described based on (a), there is a problem that the forward voltage rises due to the change over time. Further, this type of EL element also has a problem that the forward voltage fluctuates depending on the ambient temperature as described with reference to FIG. Here, considering the case where the forward voltage rises due to a change over time, for example, since the reverse bias voltage VM has a fixed voltage value, the voltage VM initially charged in the EL element immediately before scanning and the order of the element Opening gradually occurs with the directional voltage Vf. As a result, there is a delay in the light emission start timing of the EL element due to the initial charging operation from the fixed reverse bias voltage VM, and the amount of light emission of the EL element gradually decreases. In other words, the period during which the EL element can secure a predetermined amount of light emission is shortened, resulting in a problem that the luminance life of the EL element is substantially shortened.

The change in the forward voltage in this type of EL element is caused by the above-mentioned change with time and temperature dependence, and also by the variation in film forming (vapor deposition) processing in manufacturing the EL element. Variation occurs. Furthermore, this type of EL element has R (red), G (green), B (blue)
There is a problem in that the forward voltage also varies depending on the emission color, such as, and as a result, the emission brightness of the EL element varies.

Further, even if the generation circuit having the resistance division and the emitter follower configuration as shown in FIG. 7 is adopted as the means for generating the reverse bias voltage VM, if the forward voltage Vf is higher than the reverse bias voltage VM. A phenomenon occurs in which the current flowing through the emitter follower resistor fluctuates via the parasitic capacitance of each EL element on the non-scanning line, depending on the number of lighting elements and the lighting brightness of the display panel.
As a result, the reverse bias voltage VM fluctuates, which causes a fluctuation in the potential difference between the reverse bias voltage VM and the forward voltage Vf of the element, resulting in variation in the emission brightness of the EL element.

Furthermore, even if the thermistor TH1 is used as shown in FIG. 7 and the reverse bias voltage VM is temperature-compensated as a result, the response of the temperature compensation by the thermistor is slow, and the temperature compensation curve is of the EL element. It is difficult to obtain satisfactory compensation characteristics due to factors such as not necessarily matching the characteristics. Then, although it is ideal that the thermistor is arranged so as to be in a heat contact state with the display panel, it is practically difficult to adopt such a configuration, and it is difficult to design the thermistor. There are also problems such as being forced.

Therefore, the applicant of the present invention constantly controls the reverse bias voltage applied to the light emitting element represented by the organic EL element as described above to effectively suppress the crosstalk light emission, and change with time or the operating temperature. Japanese Patent Application No. 2001-269941 has been filed for a drive device for a light emitting display panel that does not cause a change in the brightness of the light emitting element due to the above. According to the drive device for a light emitting display panel filed as Japanese Patent Application No. 2001-269941, as will be described in detail later, the reverse bias voltage value applied to the scanning line is set to the forward voltage value in the light emitting lighting state of the light emitting element. And a reverse bias voltage generating means for changing the voltage at any time according to the above.

That is, in the reverse bias voltage generating means, the line voltage generated in the scanning line in the non-scanning state is peak-held through the parasitic capacitance of the light emitting element in the non-scanning state in the state where the light emitting element is driven to emit light. A voltage buffer that outputs a reverse bias voltage applied to the scanning line based on the peak hold value is provided. As a result, the reverse bias voltage applied to the light emitting element can always be appropriately controlled, and the technical problems described above can be solved.

However, the minimum voltage generated by the above-mentioned reverse bias voltage generating means is determined by the current flowing by the self bias of the active element in the circuit. Therefore, according to this reverse bias voltage generating means, when the lighting rate of the light emitting display panel is low (or when the lighting is not performed at all), the line voltage generated in the non-scanning scanning line via the parasitic capacitance of the light emitting element. Therefore, the reverse bias voltage defined by the self-bias of the active element in the circuit is generated as described above.

Therefore, when the lighting rate of the light emitting element is low, the reverse bias voltage changes due to variations in the characteristics of the active element and the brightness of the light emitting element fluctuates, making it impossible to expect a stable lighting state. I will have it.
Further, when the lighting rate of the light emitting element is low, it is difficult to flatly compensate the luminance characteristic with respect to the operating temperature.

According to the present invention, the effects of the reverse bias voltage generating means described above can be directly enjoyed, and the problems of the reverse bias voltage generating means which occur when the lighting rate of the light emitting display panel is low can be solved. An object of the present invention is to provide a driving device and a driving method of a light emitting display panel that can be performed.

[0041]

A light emitting display panel driving apparatus according to the present invention, which has been made to achieve the above-mentioned object, comprises a plurality of drive lines and a plurality of scanning lines intersecting each other, and the drive lines and A driving device for a light emitting display panel, comprising: a plurality of capacitive light emitting elements having a polarity connected between the drive line and the scanning line at each of a plurality of intersecting positions of the respective scanning lines, The reverse bias voltage value applied to the line is generated by the reverse bias voltage generating means for generating an output voltage corresponding to the line voltage of the scanning line in the non-scanning state of the light emitting element and the constant voltage obtained through the constant current circuit. It is characterized in that it is configured to obtain.

In this case, the current from the constant current circuit is
Preferably, it is arranged so as to be applied to the supply point of the line voltage in the reverse bias voltage generating means. Further, in a preferred embodiment, a scanning switch is connected to each scanning line corresponding to each scanning line, and a reverse bias voltage generated by the reverse bias voltage generating means is applied to each scanning line via each scanning switch. And the line voltage of the scan line in the non-scan state is obtained via the scan switch.

Further, it is desirable that peak holding means for holding the line voltage generated in the scanning line in the non-scanning state and the peak value in the constant voltage obtained through the constant current circuit is provided. A voltage value of the reverse bias voltage generated by the reverse bias voltage generating means is controlled based on the held peak value. In addition, it is preferable that the peak hold means includes a discharge means for gradually discharging the held peak value.

On the other hand, the peak holding means is preferably provided with peak value resetting means capable of instantly resetting the held peak value. Then, in a preferred embodiment, the peak value resetting means is configured to execute the resetting operation by a command signal from a light emission control circuit which drives the light emitting display panel based on the image signal.

The reverse bias voltage generating means is
It is preferably composed of a voltage buffer circuit that generates a reverse bias voltage based on the peak value held by the peak hold means. In this case, it is preferable that the loop path from the input end of the peak hold means to the output end of the voltage buffer circuit that generates the reverse bias voltage is provided with feedback amount adjusting means for setting the loop gain to less than 1.

And in a preferred embodiment,
The peak hold means is composed of a voltage buffer circuit, a first resistor connected to the output end of the buffer circuit and forming a charging time constant, and a peak hold capacitor connected via the first resistor. A second resistor forming a discharge time constant is connected in parallel with the capacitor, and the first resistor and the second resistor constitute the feedback amount adjusting means.

On the other hand, in the light emitting display panel driving apparatus according to the present invention, a constant current source is arranged in each of the drive lines, and each light emitting element in the scanning state is selectively passed through the constant current source. A constant current is supplied, and the drive voltage supplied to the constant current source arranged in each drive line is set based on the peak value held by the peak hold means. It may be configured.

In this case, the drive voltage supplied to the constant current source is preferably supplied from the DC-DC converter, and the output voltage of the DC-DC converter is a divided voltage of the output voltage. The divided voltage is controlled based on the difference between the voltage and the reference voltage, and the divided voltage is controlled based on the peak value held by the peak holding means.

In any of the above-mentioned configurations, the constant voltage obtained through the constant current circuit used in the reverse bias voltage generating means is changed according to the dimmer control. Can be configured. Further, in a scanning state in which the plurality of scanning lines are sequentially scanned, it is desirable that a reset operation for setting all the drive lines and the scanning lines to the same potential is performed at the end of each scanning period. . Further, each of the above-described configurations can be suitably used for a drive device of a light emitting display panel using an organic electroluminescence element as a light emitting element.

On the other hand, in the driving method of the light emitting display panel according to the present invention, a plurality of drive lines and a plurality of scanning lines intersecting each other, and a plurality of intersecting positions of the drive lines and the scanning lines are respectively provided. A driving method of a light emitting display panel comprising a plurality of capacitive light emitting elements having a polarity connected between the drive line and the scanning line,
In a state in which one of the scanning lines is set to a reference potential to drive the light emitting element to emit light, a voltage value generated in the scanning line in the non-scanning state via the parasitic capacitance of the light emitting element in the non-scanning state, and a constant current circuit, It is characterized in that the reverse bias voltage applied to the scanning line is controlled according to the constant voltage obtained through the above.

In this case, preferably, the voltage value generated in the scanning line in the non-scanning state via the parasitic capacitance of the light emitting element in the non-scanning state and the constant voltage obtained via the constant current circuit are peak-held and peak-held. The reverse bias voltage value applied to the scanning line is generated based on the voltage value. Further, in this case, it is desirable to adopt a control means for gradually discharging the peak-held voltage value.

According to the driving device of the light emitting display panel adopting the above-mentioned driving method, the voltage value generated in the scanning line through the parasitic capacitance of the light emitting element in the non-scanning state, that is, the forward voltage of the light emitting element is utilized. The reverse bias voltage value VM applied to the scan line is controlled based on the peak value of the forward voltage. Therefore, even if the forward voltage Vf of the EL element forming the light emitting display panel rises due to a change with time, for example, the reverse bias voltage value VM is controlled so as to rise accordingly. As a result, the potential difference between the forward voltage Vf of the EL element and the reverse bias voltage value VM is always maintained within a predetermined range.

Therefore, in the case where the above-described cathode reset method is adopted in the display panel driving device, the charging voltage corresponding to the bias voltage VM initially charged in the EL element immediately before scanning is always in the forward direction of the element. Since the voltage is maintained close to the peak value of Vf, it is possible to prevent the emission start timing of the EL element from being delayed due to the initial charging operation. At the same time, the reverse bias voltage VM does not become higher than the forward voltage Vf.
There is no problem of causing damage to the device due to over-emission due to overcharge. Therefore, the EL element emits the optimal lighting immediately after the start of scanning, and the light emission amount of the EL element can be controlled to be substantially constant.

Therefore, as described above, even if the forward voltage Vf of the EL element rises due to the change with time, the EL element
Since the amount of light emitted from the device is controlled to be almost constant,
The period during which the EL element can secure a predetermined amount of light emission, that is, E
The luminance life of the L element can be substantially extended.

Further, each E connected to the intersection of the driven anode line and the cathode line which is not selected for scanning.
Since the L element is supplied with the reverse bias voltage VM having an appropriate value which is controlled by following the forward voltage Vf of the EL element, it is possible to effectively suppress the crosstalk light emission of each EL element. In addition, it is possible to avoid the problem that the above-mentioned leak phenomenon is caused and the display quality of the display panel is deteriorated.

Further, the above-mentioned action is caused by, for example, the variation of the forward voltage caused by the variation of the film forming (vapor deposition) process in manufacturing the EL element, and the difference of the forward voltage based on the emission color of the EL element. Also has the same effect, so that it is possible to always obtain stable and optimized emission characteristics without specially adjusting the operating point of the circuit.

According to the above-described light emitting display panel drive device, when the lighting rate of the display panel is low (or when no lighting is performed at all), non-scanning scanning is performed via the parasitic capacitance of the light emitting element. Since the line voltage generated on the line becomes low, the level of the reverse bias voltage output from the reverse bias voltage generating means also decreases. In such a case, the reverse bias voltage determined by the self-bias of the active element in the circuit forming the reverse bias voltage generating means is generated, and as described above, the reverse bias voltage is generated due to the variation in the characteristics of the active element. This causes a problem such as a change in voltage that makes it impossible to maintain a stable lighting state of the light emitting element.

Therefore, in the light emitting display panel driving device according to the present invention, the reverse bias voltage generating means generates the output voltage corresponding to the constant voltage obtained through the constant current circuit as described above. Is also configured. According to this configuration, when the lighting rate of the display panel becomes low, the minimum voltage of the reverse bias voltage is locked by the constant voltage obtained through the constant current circuit, and the locked reverse bias voltage is output. Act on.

Therefore, according to this, it is possible to solve the problem that the minimum voltage of the reverse bias is changed due to the variation of the characteristics of the active element, which obstructs the stable lighting state of the light emitting element. Moreover, even when the lighting rate of the light emitting element is low, by providing the constant current circuit with temperature characteristics and matching with the temperature characteristics of the forward voltage of the light emitting element,
It becomes possible to compensate the luminance characteristic with respect to the operating temperature almost flatly.

[0060]

BEST MODE FOR CARRYING OUT THE INVENTION A first embodiment of a drive device for a light emitting display panel according to the present invention will be described below with reference to FIG. Note that in FIG. 1, portions corresponding to the already-described components shown in FIG. 7 are denoted by the same reference numerals, and therefore detailed description thereof will be omitted as appropriate. Reference numeral 21 in FIG. 1 indicates a peak hold circuit. Here, the peak hold circuit includes an operational amplifier OP1, a diode D3, a resistor R6, and a capacitor C.
It is composed of 3.

The non-inverting input terminal of the operational amplifier OP1 is
It constitutes an input terminal of the peak hold circuit, and is connected to the non-scanning cathode lines B1 to Bm through the scanning switches SY1 to SYm in the cathode line scanning circuit 3 described above. That is, the non-inverting input terminal of the operational amplifier OP1 is connected to the line voltage supply point of the scanning line in the non-scanning state of the EL element. The anode of the diode D3 is connected to the output terminal of the operational amplifier OP1, and the cathode of the diode D3 is connected to the operational amplifier OP1.
It is connected to the inverting input terminal of. As a result, a well-known non-inverting half-wave rectifier circuit is formed between the non-inverting input terminal of the operational amplifier OP1 and the cathode of the diode D3.

A resistor R6 is connected to the cathode side of the diode D3, that is, to the output terminal of the half-wave rectifier circuit, and a capacitor C for peak hold is connected via this resistor.
3 is connected to the reference potential point. A resistor R7 forming a discharging means is connected in parallel with the capacitor C3. With this configuration, the resistor R6 constitutes the charging time constant together with the capacitor C3, and the resistor R7 constitutes the discharging time constant together with the capacitor C3. Further, the peak hold circuit acts so as to hold the half-wave rectified output divided by the resistors R6 and R7 in the capacitor C3, whereby the resistors R6 and R7 constitute a feedback amount adjusting means which will be described later.

The terminal voltage (peak hold value) of the capacitor C3 is configured to be supplied to the reverse bias voltage generation circuit 5. The reverse bias voltage generating circuit 5 in this embodiment is composed of an operational amplifier OP2, a diode D4, a resistor R8 and a resistor R9. The combination of the operational amplifier OP2 and the diode D4 constitutes a voltage buffer circuit having a non-inverting type half-wave rectification function, the output of which is passed through the voltage dividing circuit composed of the resistor R8 and the resistor R9 and the peak hold circuit described above. It is configured so that it can be supplied to the input end of. In other words, the output of the reverse bias voltage generating circuit 5 can be supplied to the cathode lines B1 to Bm via the scan switches SY1 to SYm.

On the other hand, a switch SW is connected in parallel with the peak hold capacitor C3. The switch SW is driven by the command signal from the light emission control circuit 4 and the capacitor C is turned on by the ON signal.
It constitutes peak value resetting means that instantly discharges the electric charge of 3.

The above-mentioned configuration has the peak hold circuit 21.
And the reverse bias voltage generation circuit 5 form one closed loop. Therefore, in the peak hold circuit 21, the voltage dividing circuit is composed of the resistors R6 and R7 as a feedback amount adjusting means. Further, also in the reverse bias voltage generating circuit 5, the voltage dividing circuit by the resistors R8 and R9 constitutes a feedback amount adjusting means.

By these feedback amount adjusting means, the loop gain in the closed loop by the peak hold circuit 21 and the reverse bias voltage generating circuit 5 is configured to be less than 1, whereby the closed loop described above oscillates. It is designed to avoid becoming. Further, even before the closed loop is brought into an oscillating state, it is necessary to avoid a phenomenon in which each potential of the loop sticks to a high voltage and is locked in that state due to a transient phenomenon due to a change in operating power supply voltage or the like. Has been done.

The above-described structure shows the basic form of the driving device for the light emitting display panel, which the applicant of the present invention has previously filed. Here, in the first embodiment according to the present invention,
A constant current circuit 22 that generates a constant current using the output voltage obtained by the DC-DC converter 6 is provided. The constant current circuit 22 is configured to supply a constant current to the resistor R9 substantially inserted in the input terminal of the peak hold circuit 21 described above.
The constant voltage generated at 1 is supplied to the peak hold circuit 21.

The constant voltage generated in the resistor R9 compensates for the line voltage of the scanning line in the non-scanning state when the lighting rate of the EL element is low, as will be described later, to fall below a predetermined value. In other words, it has a function of locking the input terminal voltage of the peak hold circuit 21 so as not to fall below a predetermined value.

In the above-mentioned structure, the scanning switches SY1 to SY1 are driven on the basis of the image signal supplied to the light emission control circuit 4.
SYm and drive switches SX1 to SXn are operated.
That is, the constant current circuits I1 to In are connected to the anode drive lines SX1 to SXn based on the image signal while setting the cathode scanning lines SY1 to SYm to the reference potential at a predetermined cycle. As a result, each EL element OEL arranged on the light emitting display panel 1 selectively emits light, and an image based on the image signal is reproduced on the display panel 1.

Here, when any of the EL elements OEL is lit and displayed, the forward voltage Vf of the EL element is generated on the drive line to which the EL element is connected.
When the forward voltage Vf becomes higher than the reverse bias voltage VM, each parasitic capacitance C of the EL element in the non-scanning state
flows into the non-scanning cathode scan line to charge p,
Increase the terminal voltage of the resistor R9. Therefore, the peak voltage corresponding to the forward voltage Vf is the scan switch S
It is supplied to the non-inverting input terminal of the operational amplifier OP1 via Y1 to SYm. As a result, the voltage corresponding to the peak value of the forward voltage Vf is peak-held in the capacitor C3.

The peak voltage value held in the capacitor C3 is supplied to the reverse bias voltage generating circuit 5 described above, and the reverse bias voltage generated by the generating circuit 5 is not applied to the non-reverse bias voltage via the scan switches SY1 to SYm. The reverse bias voltage VM is supplied to the cathode terminals of the EL elements in the scanning state. Therefore, if the forward voltage Vf of the EL element rises due to, for example, a change with time or a change in environmental temperature, the reverse bias voltage VM from the reverse bias voltage generation circuit 5 also follows the rise and acts. Further, the discharge resistor R7 is connected to the capacitor C3 which constitutes the peak hold circuit. Therefore, if the peak value of the forward voltage Vf of the EL element drops, the reverse bias voltage generation circuit follows it. The reverse bias voltage VM from 5 also acts to drop.

As described above, the reverse bias voltage VM from the reverse bias voltage generating circuit 5 always follows the value corresponding to the peak value of the forward voltage Vf of the EL element, so that the reverse bias voltage VM is not selected for the cathode line. The reverse bias voltage VM having an appropriate value is supplied to each EL element connected to the intersection, and it is possible to effectively suppress the crosstalk light emission of each EL element. In this case, it is possible to avoid the problems that the above-mentioned leak phenomenon is caused to deteriorate the display quality of the display panel and the element is deteriorated due to overcharge.

On the other hand, the reverse bias voltage VM provided from the reverse bias voltage generating circuit 5 is used as a charging voltage for the parasitic capacitance of the EL element driven to emit light in the next scan in the cathode reset operation described above. Even in this case, since the reverse bias voltage value VM follows the potential slightly lower than the peak value of the forward voltage Vf of the EL element, the next scanning light emission is caused by the cathode reset operation. The parasitic capacitance of the EL element is instantly charged to a potential capable of emitting light.

Therefore, since the EL element emits light immediately after the start of scanning, the amount of light emitted from the EL element can be controlled to be always constant. In other words, even if the forward voltage Vf of the EL element rises due to a change with time, the EL element is turned on immediately after the scanning period, and the lighting is maintained during the scanning period. Therefore, it is possible to substantially extend the period during which the EL element can secure a predetermined amount of light emission, that is, the luminance life of the EL element.

The above description is the operation in the case where the lighting rate of the EL element in the display panel is relatively large.
That is, when the lighting rate of the EL element is relatively large, the line voltage of the scanning line generated via each parasitic capacitance Cp of each EL element is maintained at a relatively large level, and the above-described operation is performed. Is executed. However, when the lighting rate of the EL element in the display panel is lowered (or when no lighting is performed at all), E
The line voltage of the scanning line generated via the parasitic capacitance Cp of the L element decreases.

In such a state, the reverse bias voltage output from the reverse bias voltage generating means 5 is
It is determined by the current that flows due to the self-bias of the active elements that form the peak hold circuit 22 and the reverse bias voltage generating means 5. Therefore, as described above, the reverse bias voltage that is output changes due to variations in the characteristics of each active element and due to temperature dependence, and the EL
There arises a problem that a stable lighting state of the element cannot be expected.

Therefore, in this embodiment, as shown in FIG.
By supplying a constant current to the resistor R9 inserted into the input terminal of the peak hold circuit 21 via the constant current circuit 22, as shown in FIG. ing. This allows
Even if the lighting rate decreases, the input voltage of the peak hold circuit 21 is locked so as not to fall below a predetermined value.
Therefore, it is possible to avoid the unstable lighting state of the EL element, which is caused by the variation in the characteristics of the active elements as described above.

Further, since the minimum voltage that is applied to the resistor R9 via the constant current circuit 22 is proportional to the constant current value supplied from the constant current circuit 22, it is possible to freely set the minimum voltage. Further, the forward voltage characteristic with respect to the operating temperature of the EL element can be matched so that the constant current value can be increased or decreased depending on the operating temperature, that is, the constant current circuit 22 has temperature dependence.

In a general constant current circuit, the constant current value changes with the temperature change rate of the base-emitter voltage (Vbe) of the transistors forming the constant current circuit, so that the forward voltage characteristic with respect to the operating temperature of the EL element is changed. It was confirmed that a reverse bias voltage substantially equal to was obtained, and even if the lighting rate was low, it was possible to make the emission brightness of the EL element constant without being affected by the operating temperature.

On the other hand, in the embodiment shown in FIG.
A switch SW which constitutes a peak value resetting unit is arranged, and the switch SW is ON-controlled by a command signal from the light emission control circuit 4 and resets the peak voltage. This is executed in the case where the forward voltage Vf of the EL element to be scanned and lit next becomes abruptly decreased. For example, when the image signal continuously supplied to the light emission control circuit 4 includes information for reducing the brightness thereof, the light emission control circuit 4 acquires this information before driving the display panel 1. Based on this, the switch SW is momentarily turned on.

Further, for example, when driving the display panel 1 in which a multi-color screen is formed by arranging EL elements having different emission colors, a forward voltage is high, for example, scanning of EL elements emitting B (blue) light. Therefore, the reset operation is similarly performed at the moment when the forward voltage is low, for example, when the EL element that emits G (green) light is scanned. As a result, it is possible to avoid applying an excessive reverse bias voltage VM to the EL element to be scanned and lit next.

Next, FIG. 2 shows a second embodiment of the drive device according to the present invention. Note that in FIG. 2, portions corresponding to the respective constituent elements shown in FIGS. 1 and 7 which have already been described are indicated by the same reference numerals, and therefore detailed description thereof will be omitted. In the embodiment shown in FIG. 2, the peak hold circuit 21, the reverse bias voltage generating circuit 5, and the constant current circuit 22 are configured by a relatively simple discrete circuit, and the others are the same as those in FIG. It is similar to the embodiment shown in FIG.

First, as with the pnp transistor Q3, p
A constant current circuit 22 is composed of the np transistor Q4. That is, the emitter of the transistor Q3 is connected to the drive voltage source obtained from the DC-DC converter 6, and the base thereof is connected to the drive voltage source via the resistors R11 and R12. Also, its collector is connected to the base via a resistor R13,
It is connected to a reference potential point via a resistor R14. on the other hand,
The emitter of the transistor Q4 is the resistors R11 and R.
It is connected to 12 connection points, the base is connected to the collector of the transistor Q3, and the collector is
It is connected to the reference potential point via a series circuit of diodes D6 and D7 and a resistor R9 which function as bias voltage adjustment and temperature compensation.

In the configuration of the constant current circuit 22 described above,
The value of each resistor is preferably set such that R11 <R12 = R13. Then, from the drive voltage source obtained from the DC-DC converter 6, the resistors R11, R12, R13,
When a current flows through R14, first, a potential of about 0.6 V rises between the base and emitter of the transistor Q4 to turn on the transistor Q4. Then, a current flows through the resistor R11, the base-emitter voltage of the transistor Q3 reaches about 0.6 V, the transistor Q3 is turned on, and the base current of the transistor Q4 is adjusted. Since the base-emitter voltage of each of the transistors Q3 and Q4 is locked at about 0.6V, a constant current flows through the resistor R11. This constant current is applied to the diode D6 described above.
, D7 and resistor R9 flow in series.

On the other hand, the collector of the npn transistor Q5 constituting the peak hold circuit 21 is DC-DC.
It is connected to the drive voltage source obtained from the converter 6, and the base is connected to the connection point of the collector of the transistor Q4 and the diode D6 via the resistor R15 for increasing the oscillation margin. The emitter is connected to one end of the resistor 6, and the other end of the resistor 6 is connected to the peak hold capacitor C3 and the resistor 7 connected in parallel with the capacitor C3. As a result, the transistor Q5 constitutes a voltage buffer by an emitter follower. The resistor 6 constitutes a charging time constant together with the capacitor C3, and the resistor R7 constitutes a discharging time constant together with the capacitor C3.

Further, the reverse bias voltage generating means 5 has np
It is composed of an n-transistor Q6 and a pnp transistor Q7. That is, the collector of the transistor Q6 is connected to the drive voltage source obtained from the DC-DC converter 6 via the resistor 19, and its base is connected to the above-mentioned resistor R18 via the resistor R18 for increasing the oscillation margin.
6 and capacitor C3 and resistor R for peak hold
It is connected to the connection point with 7 parallel circuits. The emitter of the transistor Q7 is connected to the drive voltage source, the base of the transistor Q7 is connected to the collector of the transistor Q6, and the collector of the transistor Q7 is connected to the emitter of the transistor Q6. Are configured.

The output terminal of the reverse bias voltage generating means 5 is connected to the scan switches SY1 to SYm via the resistor R20 so as to supply the reverse bias to the scan line. Further, the line voltage of the scanning line in the non-scanning state via the resistor R20 is
It is configured to feed 9 connection points. The resistor R20 is inserted to adjust the feedback amount and the inrush current, and a resistor having a relatively low resistance value is adopted. Also,
At the connection point of the resistor R20 and the scan switches SY1 to SYm,
A capacitor C4 is connected, which has a function of cutting noise generated by the switches SY1 to SYm during scanning, and has a relatively low capacity.

In the above structure, a constant current is passed from the constant current circuit 22 to the series circuit of the diodes D6, D7 and the resistor R9, which causes the diode D6.
A constant voltage is generated at the cathode of. This constant voltage is charged in the capacitor C3 via the transistor Q5 which functions as a voltage buffer. Here, when the line voltage of the scanning line in the non-scanning state, that is, the forward voltage Vf of the EL element is supplied to the resistor R9, the capacitor C3 has a voltage corresponding to the peak voltage of Vf + 0.6V. Is charged.

On the other hand, as described above, by the drive voltage source obtained from the DC-DC converter 6, the forward current is supplied from the constant current circuits I1 to In arranged in the anode line drive circuit 2 to the EL elements in the lighting line. The voltage Vf is determined. Then, in the initial stage of scanning, the voltage of the capacitor C1 contributes to the charging of the parasitic capacitance of the EL element to be lit by the action of the above-mentioned cathode reset through the voltage buffer of the transistors Q6 and Q7.

In the latter half of scanning, if the anode line voltage becomes higher than the reverse bias voltage, the resistance R20
A current is caused to flow through the resistor R9 via and the terminal voltage of the resistor R9 rises. At this time, the voltage buffer formed by the transistors Q6 and Q7 is turned off. Then, even if a current for charging the parasitic capacitance in reverse flows, the cathode side of the diode D6 is quickly lifted up because the constant current circuit of the transistors Q3 and Q4 is operating, and the transistor Q3
Through the buffer of 5, the peak is held by the capacitor C3.

The hold voltage by the capacitor C3 gradually decreases through the discharge time constant by the resistor R7, so that the brightness difference in the horizontal direction can be made inconspicuous. The terminal voltage of the capacitor C3 is determined by the above Vf when the lighting rate of the EL element is high, and when the lighting rate of the EL element is low, or when the EL element is not lit at all, the constant current circuit 22 causes the diode D6,
It is defined by the voltage level of diode D6 produced by flowing into the series circuit of D7 and resistor R9. This avoids that the minimum voltage generated by the reverse bias voltage generating means is determined by the current flowing by the self bias of the active element in the circuit.

Next, FIG. 3 shows a third embodiment of the drive device according to the present invention. The basic configuration in the embodiment shown in FIG. 3 is the same as the configuration shown in FIG. 2, and corresponding parts are designated by the same reference numerals. Therefore, detailed description thereof will be omitted. In the embodiment shown in FIG. 3, the peak hold circuit 2 described above is used.
The boosted output of the DC-DC converter is controlled by using the terminal voltage of the capacitor C3 held by 1.
The display panel 1 is configured to reduce power loss when it is driven.

For example, in the embodiment shown in FIGS. 1 and 2, the output voltage provided by the DC-DC converter 6 applied to each of the constant current circuits I1 to In in the anode line drive circuit 2 is as described above. The output voltage (constant voltage) is controlled to be almost constant by a switching regulator using the PWM method.
In this case, the output voltage provided by the DC-DC converter 6 is set to a high value in consideration of the following factors so that the constant current characteristics of the constant current circuit in the anode line drive circuit 2 can be sufficiently ensured. I have to do it.

That is, as the elements, for example, the constant tolerance of each circuit component forming the switching regulator circuit 11, the variation of the voltage drop amount in each constant current circuit I1 to In, and the organic EL element The voltage drop due to the panel wiring resistance at the maximum brightness level, the forward voltage increase due to the change over time of the EL element described with reference to FIG. 6A, and also based on FIG. 6C. The variation of the forward voltage due to the temperature dependency of the EL element described above can be cited. Further, in the above-described drive device for a light emitting display panel, even if each of these elements act synergistically, the DC-voltage is controlled so that the constant current characteristics of the constant current circuits I1 to In can be sufficiently secured. The output voltage provided by the DC converter 6 is set higher.

However, as described above, DC-DC
When the output voltage provided by the converter is set higher, it often involves excessive power loss. For example, when this is adopted in a portable terminal device, etc.,
Not only does this accelerate battery consumption, but it also results in heat generation due to power loss. That is, when the output voltage is set higher, as a result, the voltage drop in each of the constant current circuits I1 to In in the anode line drive circuit 2 increases, and the power loss increases in proportion thereto.
Therefore, the heat generated by this causes stress to the organic EL element and peripheral circuit parts, and causes a problem such as shortening the life of the EL element.

Therefore, in the embodiment shown in FIG. 3, a pnp transistor Q9 is inserted between the resistors R1 and R2 in the DC-DC converter 6, and the above-mentioned peak hold is provided at the base of the transistor. The terminal voltage of the capacitor C3 held by the circuit 21 is supplied. Therefore,
A voltage corresponding to the forward voltage Vf of the driven EL element is applied to the base of the transistor Q9. The transistor Q9 functions as a current buffer, and the emitter current of the transistor Q9 is almost equal to the collector current.

Therefore, when the terminal voltage of the capacitor C3 is Vm, the voltage between the emitter and the base of the transistor Q9 (Vbe) is superposed on this terminal voltage Vm and applied to the resistor R2 side. , The output voltage of the DC-DC converter 6 rises corresponding to the Vm. The output voltage of the DC-DC converter 6 is fed back through the PWM switching regulator circuit 11, and therefore the DC-DC converter 6 is controlled in accordance with the ratio of the resistors R2 and R1 and the parameter of the reference voltage Vref. The output voltage at is determined. Therefore, the output voltage Vout1 obtained from the DC-DC converter 6 having the circuit configuration shown in FIG.
Can be shown as:

[0098]

[Equation 4] Vout1 = Vm + Vref × (R2 / R1) + Vbe

As is apparent from the above description, the output voltage Vout1 obtained from the DC-DC converter 6 having the circuit configuration shown in FIG. 3 corresponds to the peak value of the forward voltage of the EL element as a result. Thus, the output voltage Vout1 obtained from the DC-DC converter 6 changes according to the forward voltage of the EL element. Therefore, according to the configuration shown in FIG. 3, as in the drive device shown in FIGS. 1 and 2, the output voltage of the DC-DC converter 6 is increased by adding a useless margin accumulated according to each element. The need to set can be eliminated.

In other words, it is possible to output an optimized output voltage from the DC-DC converter to such an extent that the constant current characteristics of the constant current circuits I1 to In for driving the EL elements to be driven can be always ensured. As a result, the voltage drop in the constant current circuits I1 to In can be controlled to the minimum, and the power loss generated in the constant current circuit can be effectively suppressed. Further, the output voltage Vout1 obtained from the DC-DC converter 6 can follow this even when the forward voltage of the EL element increases due to change over time, and further, due to the temperature dependence of the EL element. It can also follow changes in directional voltage.

Next, FIG. 4 shows a fourth embodiment of the drive device according to the present invention. The configuration in the embodiment shown in FIG. 4 is basically the same as the configuration shown in FIG. 3, and corresponding parts are designated by the same reference numerals. Therefore, detailed description thereof will be omitted. In the embodiment shown in FIG. 4, the constant voltage obtained through the constant current circuit used in the reverse bias voltage generating means is changed in accordance with the dimmer control.

That is, in this embodiment, the dimmer control circuit 24 controlled by the command from the light emission control circuit 4 is provided. The dimmer control circuit 24 is configured to perform dimmer control on each of the constant current circuits I1 to In in the anode line drive circuit 2. As a form of the dimmer control performed at this time, means for varying the current value of each constant current circuit I1 to In or means for varying the energization duty of each constant current circuit I1 to In can be adopted. On the other hand, as shown in FIG.
A variable resistor VR1 connected in parallel with a resistor R9, which generates a constant voltage via the constant current circuit 22, is provided.
The dimmer control circuit 24 is configured to supply a command for controlling the resistance value of the variable resistor VR1 in association with the dimmer control.

In this embodiment, when the dimmer value is reduced by the command of the dimmer control circuit 24, that is, the emission brightness of the EL element is lowered,
The resistance value of the variable resistor VR1 is also controlled to be small accordingly. As a result, the combined resistance value of the resistor R9 and the variable resistor VR1 is controlled to be small, and as a result, the voltage level charged in the peak hold capacitor C3 is also controlled to be small. Therefore, according to the configuration described above,
It is possible to smoothly reduce the minimum brightness limit of display.

2 to 4, the switch SW as the peak value resetting means shown in FIG. 1 is not provided, but it may be provided if necessary.

[0105]

As is apparent from the above description, according to the driving device of the light emitting display panel which employs the driving method according to the present invention, the voltage value of the reverse bias applied to the scanning line is set in the light emitting lighting state of the light emitting element. Since the voltage is changed as needed according to the peak value of the forward voltage, an optimized reverse bias voltage can always be obtained, and crosstalk light emission can be effectively suppressed.

When the lighting rate of the light emitting element is low, or when the light emitting element is not lit at all, the voltage value of the reverse bias applied to the scanning line is generated corresponding to the constant voltage obtained through the constant current circuit. Therefore, it is possible to solve the problem that the reverse bias voltage changes due to variations in the characteristics of the active elements forming the reverse bias generating means, and the luminance of the light emitting element in the lighting state becomes unstable.

[Brief description of drawings]

FIG. 1 is a connection diagram showing a first embodiment of a drive device according to the present invention.

FIG. 2 is likewise a connection diagram showing a second embodiment.

FIG. 3 is likewise a connection diagram showing a third embodiment.

FIG. 4 is likewise a connection diagram showing a fourth embodiment.

FIG. 5 is a diagram showing an equivalent circuit of an organic EL element.

FIG. 6 is a characteristic diagram showing various characteristics of an organic EL element.

FIG. 7 is a connection diagram showing an example of a conventional drive device.

FIG. 8 is a connection diagram illustrating a cathode reset method.

[Explanation of symbols]

1 Light emitting display panel 2 Anode line drive circuit 3 Cathode line scanning circuit 4 Light emission control circuit 5 Reverse bias voltage generation circuit 6 DC-DC converter (step-up circuit) 11 Switching regulator circuit 12 DC voltage source 14 Error amplifier 15 PWM circuit 16 oscillators 21 Peak hold circuit 22 constant current circuit 24 dimmer control circuit A1 to An anode (drive) wire B1 to Bm cathode (scanning) line C3 peak hold capacitor D1 to D7 diode I1 to In constant current circuit (constant current source) L1 inductor OEL Organic EL element OP1, OP2 operational amplifier Q1 to Q9 transistors R1 to R20 resistance SX1 to SXn drive switch SY1 to SYN scan switch SW switch (peak value reset means) VR1 variable resistor Vref reference voltage source

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G09G 3/20 641 G09G 3/20 641D 642 642P 670 670J H05B 33/14 H05B 33/14 A (72) Invention Person Hiroyuki Takahashi 4-3146, Yawatahara, Yonezawa City, Yamagata Prefecture 7 Tohoku Pioneer Co., Ltd., Yonezawa Plant (72) Inventor Ken Okuyama 4, 3146, Hachimanbara, Yonezawa City, Yamagata Prefecture, Tohoku Pioneer Co., Ltd. Yonezawa Plant (72 ) Inventor Kazuhiro Sato 4-3146, Hachimanbara, Yonezawa City, Yamagata Prefecture 7 Tohoku Pioneer Co., Ltd. Yonezawa Factory F-term (reference) 3K007 AB17 DB03 GA00 5C080 AA06 BB05 CC03 DD10 DD29 EE28 FF03 FF12 JJ02 JJ05

Claims (18)

[Claims] 1. A plurality of drive lines and a plurality of scanning lines intersecting each other, and a plurality of intersections formed by the respective drive lines and the respective scanning lines are respectively connected between the drive lines and the scanning lines. A drive device for a light-emitting display panel comprising a plurality of capacitive light-emitting elements having polarities, wherein a reverse bias voltage value applied to the scan line is set to a line voltage of a scan line in a non-scan state of the light-emitting element, and a constant value. A drive device for a light emitting display panel, characterized in that it is configured to be obtained by a reverse bias voltage generating means for generating an output voltage corresponding to a constant voltage obtained through a current circuit. 2. The drive device for a light emitting display panel according to claim 1, wherein the current from the constant current circuit is configured to be applied to a line voltage supply point in the reverse bias voltage generating means. 3. A scanning switch is connected to each scanning line corresponding to each scanning line, and a reverse bias voltage by the reverse bias voltage generating means is applied to each scanning line via each scanning switch. The drive device for a light emitting display panel according to claim 1, wherein the line voltage of the scanning line in the non-scanning state is acquired via the scan switch. 4. A peak hold means for holding a line voltage generated in the scanning line in the non-scan state and a peak value in a constant voltage obtained through a constant current circuit is provided, and the peak held by the peak hold means. 3. The drive device for a light emitting display panel according to claim 1, wherein the voltage value of the reverse bias voltage generated by the reverse bias voltage generating means is controlled based on the value. 5. The drive device of the light emitting display panel according to claim 4, wherein the peak hold means includes a discharge means for gradually discharging the held peak value. 6. The drive device for the light emitting display panel according to claim 4, wherein the peak hold means is provided with peak value reset means capable of instantly resetting the held peak value. . 7. The light emitting display according to claim 6, wherein the peak value resetting unit is configured to perform a reset operation in response to a command signal from a light emitting control circuit that drives a light emitting display panel based on an image signal. Panel drive. 8. The reverse bias voltage generating means comprises a voltage buffer circuit for generating a reverse bias voltage based on the peak value held by the peak holding means, according to any one of claims 4 to 6. The drive device for the light-emitting display panel according to. 9. A feedback amount adjusting means for setting a loop gain to less than 1 is provided on a loop path from an input terminal of the peak hold means to an output terminal of a voltage buffer circuit for generating a reverse bias voltage. 7. The drive device of the light emitting display panel according to 7. 10. The peak hold means, wherein the peak hold means is connected via a voltage buffer circuit and a first resistor forming a charging time constant connected to the output end of the buffer circuit and the first resistor connected via the first resistor. A second resistor configured to configure a discharge time constant in parallel with the capacitor, and the feedback amount adjusting means is configured by the first resistor and the second resistor. The drive device for a light emitting display panel according to claim 9. 11. A constant current source is arranged in each drive line, and a constant current is selectively supplied to each light emitting element in a scanning state via the constant current source, The light emission according to claim 4 or 5, wherein the drive voltage supplied to the constant current source arranged in each drive line is set based on the peak value held by the peak hold means. Display panel drive. 12. The drive voltage supplied to the constant current source is supplied from a DC-DC converter, and the output voltage of the DC-DC converter is a divided voltage of the output voltage and a reference voltage. The light emitting display panel according to claim 11, wherein the light emitting display panel is configured to be controlled based on a difference from a voltage, and the divided voltage is controlled based on a peak value held by the peak holding means. Drive. 13. The constant voltage obtained through a constant current circuit used in the reverse bias voltage generating means is changed according to dimmer control.
13. A drive device for a light emitting display panel according to claim 12. 14. In a scanning state in which the plurality of scanning lines are sequentially scanned, a reset operation for setting all the drive lines and the scanning lines to the same potential is performed at the end of each scanning period. Claim 1 to Claim 1
4. The drive device for the light emitting display panel according to any one of 3 above. 15. The drive device for a light emitting display panel according to claim 1, wherein the light emitting element is an organic electroluminescence element. 16. A plurality of drive lines and a plurality of scanning lines intersecting with each other, and a plurality of intersecting positions of the drive lines and the scanning lines are connected between the drive lines and the scanning lines, respectively. A method for driving a light-emitting display panel comprising a plurality of capacitive light-emitting elements having polarities, wherein the light-emitting element in a non-scan state in a state in which one of the scanning lines is set to a reference potential to drive the light-emitting element to emit light. Light emission to control the reverse bias voltage applied to the scanning line in accordance with the voltage value generated in the scanning line in the non-scanning state via the parasitic capacitance and the constant voltage value obtained via the constant current circuit. Driving method of display panel. 17. The voltage value generated in the non-scanning scanning line via the parasitic capacitance of the light emitting element in the non-scanning state and the constant voltage obtained via the constant current circuit are peak-held, and the peak-held voltage value is set. 17. The method for driving a light emitting display panel according to claim 16, wherein a reverse bias voltage value applied to the scanning line is generated based on the above. 18. The method for driving a light emitting display panel according to claim 17, wherein the peak-held voltage value is gradually discharged.