JP2003273661A - Delay filter and distortion compensation amplifier using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a delay filter and a distortion compensation amplifier using the same in which a group delay time characteristic over a wide band is obtained within a desired bandwidth with a little stages. <P>SOLUTION: The inner conductors of a dielectric resonator 12 provided in the delay filter are respectively electrically connected with a copper plating electrode 14 and respective outer conductors are grounded to a casing 19. Copper plating electrodes 14 and 15 are located while forming capacitors at a prescribed interval. A copper plating electrode 16 is located parallel with the array direction of the copper plating electrodes 14 and 15 while forming capacitors at a prescribed interval, and are connected with the copper plating electrodes 14 and 15 via air-core coils 17 and 18. In the group delay time characteristic of the delay filter, the peak of the group delay time characteristic does not occur near the outside of a passing bandwidth. Therefore, a group delay time has a fixed wide passing bandwidth and the group delay time characteristic is obtained with a little stages. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a delay filter and a distortion compensating amplifier using the same, and more particularly to a constant in-band group delay having a constant group delay time used in high frequency radio equipment in a high frequency band. Type dielectric filter and a distortion compensation type amplifier using the same.

[0002]

2. Description of the Related Art In recent years, a lot of distortion compensation type amplifiers have been used in base station radio equipment such as mobile communication systems in order to reduce the distortion of the base station. A feedforward amplifier is a typical example of this distortion compensation amplifier, and the feedforward amplifier will be described with reference to FIG.

In FIG. 13, a feedforward amplifier receives a main signal from an input terminal 10a and outputs an amplified signal from an output terminal 10b. Sub-amplifiers 3 and 4, a distributor 5, a coupler 6, an attenuator 7, and combiners 8 and 9 are provided.
The signal input from the input terminal 10 a is amplified by the main amplifier 3 via the distributor 5. The signal amplified by the main amplifier 3 is distorted, and the signal is amplified and output from the main amplifier 3 in a distorted state.
The signal output from the main amplifier 3 is attenuated by the high power side delay filter 1 and the attenuator 7 via the coupler 6 and input to the combiner 8.

On the other hand, the signal input from the input terminal 10a is also input to the low power side delay filter 2 via the distributor 5. Since the signal output from the low power side delay filter 2 does not have distortion, the signal attenuated by the attenuator 7 is compared with the synthesizer 8 to obtain the distortion component generated in the main amplifier 3. Can only be taken out (distortion detection loop).

The distortion component extracted by the synthesizer 8 is amplified by the sub-amplifier 4 and output to the synthesizer 9.
On the other hand, the signal amplified by the main amplifier 3 and distorted is
It is output to the combiner 9 through the high power side delay filter 1. The combiner 9 compares the distortion component from the sub-amplifier 4 with the signal from the high power side delay filter 1 to remove the distortion component generated in the main amplifier 3,
It is output from the output terminal 10b (distortion suppression loop). The details of the operation of this feedforward amplifier are, for example,
JOHN L. B. WALKER, "High-Po
“Wer GaAsFET Amplifiers” (A
rtech House (Boston, Londo
N) Issued 7.3.2 Linearized Am
described in pliers.

Here, the delay filters 1 and 2 provided in the feedforward amplifier are generally in-band constant group delay type dielectric filters, and are used in the distortion detection loop and the distortion suppression loop. The delay time must be adjusted exactly. That is, the low power side delay filter 2 is configured so that the input of the signal attenuated by the attenuator 7 and the signal input through the low power side delay filter 2 have the same group delay time in the combiner 8. The high power side delay filter 1 is adjusted so that the input of the signal amplified by the sub-amplifier 4 and the signal input through the high power side delay filter 3 have the same group delay time in the combiner 9. Must be adjusted to. Also,
The delay filters 1 and 2 are required to have low loss characteristics, phase linearity, and miniaturization in a desired band and group delay time.

Next, a conventional 11-stage delay filter used as the high power side delay filter 1 will be described with reference to FIG. FIG. 14 is a perspective view of the conventional 11-stage delay filter with the upper lid and the front surface of the housing removed. In FIG. 14, the delay filter is a constant in-band group delay type dielectric filter, and the input / output terminal 10
1, 11 dielectric resonators 102a to 102k, a coupling substrate 103 made of alumina, and a copper-plated electrode 10 forming a coupling capacitance.
4a-k and 105a, b, and a housing 106 are provided. The end faces of the dielectric resonator 102 are aligned,
Each outer conductor is grounded to the housing 106. The inner conductor of the dielectric resonator 102 is the copper-plated electrode 10
4 are electrically connected to each other with solder or the like. The copper-plated electrodes 105 on both ends of the alumina coupling substrate 103 are connected to the inner conductor of the input / output terminal 101. The copper-plated electrodes 104 and 105 are arranged on the alumina-made coupling substrate 103 at predetermined intervals, and the coupling capacitors 107 are formed at the respective intervals.

Next, an equivalent circuit of the above-mentioned conventional 11-stage delay filter will be described with reference to FIG. Note that FIG.
The same parts described in 4 are given the same reference numerals. In FIG. 14, coupling capacitances 107a and 107l are formed between the input / output terminal 101 and the dielectric resonators 102a and 102k with the above-described spacing. Further, the coupling capacitances 107b to 107k are formed between the dielectric resonators 102a to 102k with the above-mentioned spacing. In this manner, the delay filter constitutes a bandpass filter by coupling the dielectric resonators 102 with the coupling capacitance 107.

[0009]

However, in the delay filter having the above-described structure, the group delay time characteristic thereof has a large peak near the pass band edge. That is, between the peaks, the group delay time characteristic deteriorates and the constant bandwidth becomes narrow. In the conventional delay filter, in order to make the group delay time characteristic of the desired bandwidth constant over a wide band, it is necessary to increase the number of stages of the dielectric resonator, which causes a problem that the device becomes large and the loss increases. Was.

Therefore, an object of the present invention is to provide a delay filter which can obtain a wide band group delay time characteristic in a desired bandwidth with a small number of stages, and a distortion compensation amplifier using the delay filter.

[0011]

Means for Solving the Problems and Effects of the Invention In order to achieve the above object, the present invention has the following features. A first aspect of the present invention is a delay filter having a constant group delay time characteristic with respect to a predetermined frequency band, wherein impedance is provided on each side of a circuit formed of a plurality of dielectric resonators and a plurality of grating shapes. An impedance element is provided, and a lattice-shaped circuit that couples a plurality of dielectric resonators to each other and is connected to an input / output terminal is provided.

According to the first aspect of the present invention, the dielectric resonator is provided on the side of the grid-like circuit connecting the input / output terminals,
By providing an inductor in a part of the impedance element, a large peak does not occur in the group delay time characteristic near the edge of the pass band width, so that a characteristic having a wide frequency band with a constant group delay time can be obtained. Moreover, since the number of filter stages of the delay filter required to obtain the same group delay time characteristic can be reduced, a small-sized and low-loss delay filter can be realized. Further, since the delay filter of the present invention is small and has low loss, by using the delay filter as a delay element in a distortion compensation type amplifier such as the feedforward amplifier described above, the overall size of the amplifier can be reduced and the load on the amplifier can be reduced. Can be reduced and efficiency can be increased.

A second invention is an invention according to the first invention, wherein the grid-shaped circuit has an input / output terminal for coupling between the input / output terminal and each dielectric resonator through a coupling capacitor. The inter-stage coupling circuit and the inter-input / output stage coupling circuit, which are provided between the input / output terminals in parallel with the inter-stage coupling circuit and which are composed of a plurality of first impedance elements, are provided. First and second interlacing bridge circuits formed by connecting the coupling capacitances and the first impedance elements that form the interlaced parallel circuit in a grid pattern and configured by the second impedance elements. At least a part of the impedance element is configured by an inductor.

According to the second aspect of the present invention, the grid-like circuit for connecting the dielectric resonator and the input / output terminals is composed of an input / output interstage coupling circuit, an interlaced parallel circuit, and an interlaced bridge circuit. By providing an inductor in a part of the element that configures, a large peak does not occur in the group delay time characteristic near the edge of the pass bandwidth, so that a characteristic with a wide group frequency band can be obtained. . Moreover, since the number of filter stages of the delay filter required to obtain the same group delay time characteristic can be reduced, a small-sized and low-loss delay filter can be realized.

A third invention is according to the second invention, and in the first impedance element, the elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are constituted by inductors, and The other element is formed of a capacitor, and the second impedance element is formed of an inductor.

According to the third aspect of the invention, the inductance of the inductor and the capacitance of the element forming the first and second impedance elements and the capacitance of the coupling capacitance are adjusted to adjust the pass bandwidth. A large peak does not occur near the edge, and it is possible to easily obtain a group delay time characteristic with a wide frequency band with a constant group delay time.

A fourth invention is according to the second invention, and in the first impedance element, the elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are constituted by inductors, and The other element is composed of a capacitor, and the second impedance element is composed of an inductor and a capacitor.

According to the fourth aspect of the present invention, the inductance of the inductor and the capacitance of the element forming the first and second impedance elements and the capacitance of the coupling capacitance are adjusted to adjust the pass bandwidth. A large peak does not occur near the edge, and it is possible to easily obtain a group delay time characteristic with a wide frequency band with a constant group delay time.

A fifth invention is an invention subordinate to the third or fourth invention, and is characterized in that a part of the first impedance element is short-circuited or opened.

According to the fifth aspect of the invention, the element constituting the delay filter is formed by short-circuiting or opening the capacitance or the inductor constituting the first impedance element,
Can be reduced.

A sixth invention is an invention according to the second invention, wherein the coupling capacitance forming the input / output stage coupling circuit is:
Two interleaved bridge circuits are arranged between the respective dielectric resonators, and the interlaced bridge circuit connects the interleaved parallel circuit between two coupling capacitors arranged between the respective dielectric resonators.

A seventh invention is according to the sixth invention, wherein the first impedance element is composed of an inductor and a capacitor, and the second impedance element is entirely composed of an inductor.

According to the sixth and seventh inventions, the inductance of the inductors and the electrostatic capacitance of the elements forming the first and second impedance elements and the electrostatic capacitance of the coupling capacitance are adjusted so that the passage A large peak does not occur near the edge of the bandwidth, and it is possible to easily obtain a group delay time characteristic with a wide frequency band with a constant group delay time.

An eighth invention is an invention subordinate to the second invention, and is characterized in that a part of the first and second impedance elements is short-circuited.

According to the eighth invention, in order to eliminate the capacitance when the capacitance of the capacitance forming the first and second impedance elements is adjusted to a very large value according to desired characteristics. Since they can be short-circuited, the number of elements forming the delay filter can be reduced.

A ninth invention is an invention subordinate to the second invention, and is characterized in that a part of the first and second impedance elements is opened.

According to the ninth invention, in order to eliminate the capacitance when the capacitance of the capacitance forming the first and second impedance elements is adjusted to a very small value by desired characteristics. Since it can be opened, the number of elements forming the delay filter can be reduced.

A tenth aspect of the present invention is a distortion compensating amplifier which suppresses a distortion component generated when amplifying an input signal and outputs the amplified input signal, and a main amplifier which amplifies the input signal, A first delay element that delays the input signal by a predetermined first group delay time with respect to the frequency band of the input signal, and outputs the input signal amplified by the main amplifier and the first delay element. A distortion component detection unit that detects a distortion component included in the input signal amplified by the main amplifier by combining the delayed input signal, a sub-amplifier that amplifies the distortion component detected by the distortion component detection unit, and a main amplifier. A second delay element that delays the input signal amplified by the amplifier by a predetermined second group delay time, and outputs the distortion component amplified by the sub-amplifier and the delay component output from the second delay element. And a distortion component suppressing section that suppresses a distortion component included in the input signal amplified by the main amplifier by combining the input signal amplified by the main amplifier, and at least one of the first and second delay elements. Is an impedance element provided on each side of a circuit composed of a plurality of dielectric resonators and a plurality of lattice shapes,
A lattice-shaped circuit that connects a plurality of dielectric resonators to each other and connects to the input / output terminals, and at least a part of the impedance element provided in the lattice-shaped circuit is configured by an inductor.

According to the tenth invention, the first or second
In the delay element of, the inductor is provided in a part of the impedance element, which is provided on the side of the grid-like circuit that connects the dielectric resonator and the input / output terminal, so that the group delay time characteristic has an edge of the pass bandwidth. Since a large peak does not occur in the vicinity, it is possible to obtain a characteristic in which the frequency band with a constant group delay time is wide. Moreover, since the number of filter stages of the delay element required to obtain the same group delay time characteristic can be reduced, a small-sized and low-loss delay element can be realized. Further, since the delay element of the present invention is small and has low loss, by using the delay element as a delay element in a distortion compensation type amplifier such as the feedforward amplifier described above, it is possible to downsize the entire amplifier,
It is possible to reduce the load on the amplifier and increase the efficiency.

An eleventh invention is an invention dependent on the tenth invention, wherein the grid-shaped circuit has an input / output terminal for coupling between the input / output terminal and each dielectric resonator through a coupling capacitor. The inter-stage coupling circuit and the inter-input / output stage coupling circuit, which are provided between the input / output terminals in parallel with the inter-stage coupling circuit and which are composed of a plurality of first impedance elements, are provided. An interlaced bridge circuit formed by connecting the coupling capacitances and the first impedance elements forming the interlaced parallel circuit in a grid pattern and including the second impedance element;
And at least a part of the second impedance element,
It is composed of an inductor.

A twelfth aspect of the invention is an invention dependent on the eleventh aspect of the invention, in which the first impedance element has elements located at both ends of the interlaced parallel circuit connected to the input / output terminals, which are inductors, and The other element is formed of a capacitor, and the second impedance element is formed of an inductor.

A thirteenth invention is an invention dependent on the eleventh invention, wherein the first impedance element is such that elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are inductors, and The other element is composed of a capacitor, and the second impedance element is composed of an inductor and a capacitor.

A fourteenth invention is an invention according to the twelfth or thirteenth invention, and is characterized in that a part of the first impedance element is short-circuited or opened.

A fifteenth aspect of the present invention is an invention subordinate to the eleventh aspect of the present invention, wherein two coupling capacitors forming an input / output stage coupling circuit are arranged between the respective dielectric resonators.
The interlaced bridge circuit connects the interlaced parallel circuit between two coupling capacitors arranged between the respective dielectric resonators.

[0035] A sixteenth invention is an invention according to the fifteenth invention, wherein the first impedance element is composed of an inductor and a capacitor, and the second impedance element is entirely composed of an inductor.

A seventeenth invention is an invention subordinate to the eleventh invention, characterized in that a part of the first and second impedance elements is short-circuited.

An eighteenth invention is an invention subordinate to the eleventh invention, and is characterized in that a part of the first and second impedance elements is opened.

[0038]

BEST MODE FOR CARRYING OUT THE INVENTION Before describing an embodiment of a delay filter of the present invention, first, a distortion compensation amplifier using the delay filter of the present invention will be described. The delay filter of the present invention is typically used in a distortion compensation type amplifier, for example, a feedforward type amplifier. This feedforward amplifier is similar to that described in the prior art with reference to FIG. 13, and the delay filter is preferably a constant in-band group delay type used as the high power side delay filter 1 in FIG. It is a dielectric filter. The delay filter may be used as the low power side delay filter 2 in FIG. Since the operation of the feedforward amplifier is the same as the conventional technique,
Detailed description is omitted here.

(First Embodiment) The structure of a delay filter according to the first embodiment of the present invention will be described with reference to FIG. In the first embodiment, a 5-stage delay filter will be described as an example of the delay filter, and FIG.
FIG. 1A is a perspective view of the delay filter with the upper lid and the front surface of the housing removed, and FIG. 1B is a perspective view of the substrate section viewed from above (the direction A in the drawing) of the perspective view of FIG. FIG.

In FIG. 1, the delay filter is provided with an input / output terminal 11, a dielectric resonator 12, a coupling substrate 13, copper plated electrodes 14 to 16, air core coils 17 and 18, and a casing 19. .

The two input / output terminals 11 are respectively connected to the housing 1.
The outside of 9 and the coupling substrate 13 are connected by the inner conductor. The shape in which the input / output terminal 11 projects to the outside of the housing 19 is formed according to the component connected to the delay filter.

The dielectric resonator 12 is composed of five half-wavelength open-ended dielectric resonators 12a to 12e, and the end surfaces of the dielectric resonators 12a to 12e are arranged in the housing 19. The inner conductors of the respective dielectric resonators 12a to 12e are electrically connected to the copper plated electrodes 14a to 14e by soldering or the like, and the respective outer conductors are grounded to the housing 19.

The copper-plated electrodes 14 to 16 are formed on the bonded substrate 13 made of alumina. As mentioned above, 5
The copper-plated electrodes 14a to 14e are connected to the inner conductors of the dielectric resonators 12a to 12e, respectively, and are arranged at predetermined intervals. Also, two copper-plated electrodes 15
a and b are electrically connected to the inner conductor of the input / output terminal 11 and are arranged at both ends of the combined substrate 13 with the copper plated electrodes 14a and 14e at a predetermined interval. On the other hand, the five copper-plated electrodes 16a to 16e are arranged in parallel with the arrangement direction of the copper-plated electrodes 14 and 15 at predetermined intervals. It should be noted that the above-mentioned copper-plated electrodes 14 to 16 are opposed to each other with a predetermined gap therebetween, thereby forming a capacitance.

In the two air-core coils 17a and 17b, the air-core coil 17a electrically connects the copper-plated electrodes 15a and 16a, and the air-core coil 17b electrically connects the copper-plated electrodes 15b and 16e. The five air-core coils 18a-e electrically connect the copper-plated electrodes 14a-e and 16a-e, respectively.

Next, an equivalent circuit of the above-mentioned delay filter will be described with reference to FIG. In FIG. 2, the same portions as the portions described with reference to FIG. 1 described above are denoted by the same reference numerals, and the portions are connected by the copper-plated electrodes 14 to 16, so that a plurality of portions are formed. The grid-like circuit shown by the grid shape is formed.

A capacitance 21a is formed between the input / output terminal 11 and the dielectric resonator 12a due to the arrangement interval of the copper plated electrodes 15a and 14a. Also, input / output terminal 1
1 and the dielectric resonator 12e between the copper plated electrode 15
A capacitance 21b is formed by the arrangement interval of b and 14e (hereinafter, the capacitance formed between the input / output terminal 11 and the dielectric resonator 12 is referred to as an input / output coupling capacitance).

Between the five dielectric resonators 12a-e,
Depending on the arrangement interval of the copper plating electrodes 14a to 14e, the capacitance 22
a to d are formed (hereinafter, these dielectric resonators 12
The capacitance formed between the two is the interstage coupling capacitance). Here, the delay filter constitutes a bandpass filter by the dielectric resonator 12, the input / output coupling capacitance 21, and the inter-stage coupling capacitance 22 (hereinafter, the input / output coupling capacitance 21.
And a circuit constituted by the interstage coupling capacitance 22 is an input / output interstage coupling circuit).

On the other hand, the delay filter has a circuit (hereinafter referred to as an interlaced parallel circuit) that connects between the two input / output terminals 11 in parallel with the inter-input / output stage coupling circuit. This interlaced parallel circuit is formed by the copper-plated electrode 16 and the air-core coil 17. Then, depending on the arrangement intervals of the copper plated electrodes 16a to 16e, the capacitance 2
3a-d are formed. (Hereinafter, the capacitance formed in these interlaced parallel circuits is referred to as the interlaced parallel capacitance, the air-core coil provided in the interlaced parallel circuit is referred to as the interlaced parallel inductor, and each of them is referred to as the interlaced parallel impedance element). That is, the interlaced parallel circuit of the delay filter is formed by the interlaced parallel inductor 17 and the interlaced parallel capacitance 23.

Further, the delay filter has a circuit (hereinafter referred to as an interlaced bridge circuit) for connecting the input / output interstage coupling circuit and the interlaced parallel circuit. In the delay filter, the inter-input / output inter-stage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit form a lattice-shaped circuit having a plurality of lattice shapes, and the lattice-shaped circuit forms input / output terminals. 11
And a plurality of dielectric resonators 12 are connected. The interlace bridge circuit is formed by five air core coils 18a to 18e (hereinafter, the air core coils provided in these interlace bridge circuits are referred to as interlace bridge inductors). The air-core coil 18a is a dielectric resonator 12a.
By connecting (that is, the copper-plated electrode 14a) and the interlaced parallel inductor 17a and the interlaced parallel capacitor 23a (that is, the copper-plated electrode 16a),
Form one of the interlaced bridge circuits. In addition, the air-core coil 18b connects the dielectric resonator 12b (that is, the copper-plated electrode 14b) and the interlaced parallel capacitors 23a and 23b (that is, the copper-plated electrode 16b) to form the interlaced bridge circuit. Form one. Furthermore, the air-core coil 18c and the dielectric resonator 12c (that is,
One of the interlaced bridge circuits is formed by connecting the copper-plated electrode 14c) and the interlaced parallel capacitors 23b and c (that is, the copper-plated electrode 16c). Further, the air-core coil 18d is the dielectric resonator 12d.
By connecting (that is, the copper-plated electrode 14d) and the interlaced parallel capacitors 23c and d (that is, the copper-plated electrode 16d), one of the interlaced bridge circuits is formed. Further, the air-core coil 18e jumps by connecting the dielectric resonator 12e (that is, the copper-plated electrode 14e) and the interlaced parallel capacitance 23d and the interlaced parallel inductor 17b (that is, the copper-plated electrode 16e). Form one of the bridge circuits. In addition,
The delay filter adjusts the phase and the amplitude of the delay filter by adjusting the interlace parallel inductor 17, the interlace parallel capacitance 23, and the interlace bridge inductor 18 which form a sub line (interlace parallel circuit and interlace bridge circuit). can do.

Next, the group delay time characteristic of the delay filter will be described. In general, a delay filter defines a desired frequency band and its group delay time according to an amplifier system such as the above-mentioned distortion compensation amplifier, and the group delay time deviation within the frequency band is small, that is, within the band. A flat group delay time is required. Further, in order to increase the group delay time while maintaining the deviation of the in-band group delay time, it is necessary to increase the number of filter stages (the number of dielectric resonators). Further, the number of stages must be increased in order to widen the frequency band in which the deviation of the group delay time is constant while the group delay time is held. However, if the number of stages is increased, the loss of the delay filter will increase.

The group delay time characteristics of the delay filter according to the first embodiment will be described with reference to FIGS. 3 and 4.
3 is a graph comparing the group delay time characteristics of the delay filter of the present invention and the 11-stage delay filter described in the above-mentioned prior art, and FIG. 4 is for simulating the group delay time characteristics of FIG. It is a figure which shows the characteristic of the element which comprises each delay filter used.

In FIGS. 3A and 4, the five-stage delay filter of the present invention comprises a dielectric resonator 12, an input / output coupling capacitance 21, and an inter-stage coupling capacitance 2 which constitute the delay filter.
2, jump parallel inductor 17, jump parallel capacitance 2
3 and the characteristics of the interlaced bridge inductor 18 are adjusted as shown in FIG. 4, the group delay time characteristic α5 of FIG. 3A is obtained. On the other hand, the conventional 1 shown in FIG.
In the one-stage delay filter, the group delay time characteristic β11 of FIG. 3A is obtained by adjusting the characteristics of the dielectric resonator 102 and the coupling capacitor 107 that form the delay filter as shown in FIG. In the group delay time characteristics α5 and β11, the respective group delay times and the constant group delay time bandwidths, that is, the pass bandwidths show the same value,
The pass band width is 60 MHz.

In the group delay time characteristic β11 of the conventional 11-stage delay filter, a peak occurs near the outside of the pass band width, so that the pass band width is narrowed by the peak. On the other hand, in the group delay time characteristic α5 of the five-stage delay filter of the present invention, there is no peak near the outside of the pass band width, and the characteristic that the pass band width is wide is obtained. In other words, the group delay time characteristic of the delay filter of the present invention can have a wide group delay time deviation constant band by eliminating peaks on both sides of the pass band by adjustment. Therefore, the group delay time characteristic β1 of the conventional 11-stage delay filter
In the delay filter of the present invention, the group delay time and its pass band width obtained in 1 can be realized with five filter stages. Therefore, in the delay filter of the present invention, the number of filter stages can be significantly reduced, and thus the delay filter can be downsized and its loss can be reduced. Further, since the delay filter of the present invention is small and has low loss, by using the delay filter as a delay element in a distortion compensation type amplifier such as the feedforward amplifier described above, the overall size of the amplifier can be reduced and the load on the amplifier can be reduced. Can be reduced and efficiency can be increased.

Further, when the number of filter stages of the delay filter of the present invention is 11 as in the conventional case, the group delay time characteristic α11 shown in FIG. 3B is obtained. The group delay time characteristic α11 has the same group delay time as compared with the conventional group delay time characteristic β11, and the pass bandwidth of the group delay time is 200 MHz. Therefore, when the delay filter of the present invention is configured with the same number of filter stages as the conventional one, the pass band width can be significantly widened.

Further, the delay filter constituted by the circuit shown in FIG. 2 has an input / output coupling capacitor 21 and an interstage coupling capacitor 2
2, and the capacitance of the interlaced parallel capacitance 23 and the inductance of the interlaced parallel inductor 17 and the interlaced bridge inductor 18 are appropriately adjusted according to the target characteristics of the delay filter.
It may be adjusted to very small or very large values depending on the desired characteristics. Then, when the capacitance is adjusted to a very small value, it is opened to remove the capacitance, and when the capacitance is adjusted to a very large value, a short circuit is performed to remove the capacitance. Let That is,
When such adjustment is performed, the number of elements forming the delay filter can be reduced.

In the above description, the dielectric resonator 12
A half-wavelength open-ended dielectric resonator was used for
Other dielectric resonators such as a quarter-wavelength short-circuited type may be used. Further, although the air-core coil is used as the inductor of the delay filter of the present invention, it goes without saying that similar characteristics can be obtained even if the inductor is configured by a chip inductor or a meander-shaped copper pattern electrode.

(Second Embodiment) Referring to FIG. 5, the structure of a delay filter according to a second embodiment of the present invention will be described. In the second embodiment, a 5-stage delay filter will be described as an example of the delay filter, and FIG.
5A is a perspective view of the delay filter with the upper lid and the front surface of the housing removed, and FIG. 5B is a perspective view of the substrate section viewed from above (A direction in the drawing) of the perspective view of FIG. 5A. FIG.

In FIG. 5, the delay filter is different from the delay filter according to the first embodiment described above in the copper plating electrode and the air core coil formed on the coupling substrate 13. The other components are similar to those of the delay filter according to the first embodiment, and therefore, the same components are designated by the same reference numerals and detailed description thereof will be omitted.

The copper-plated electrodes 31 to 34 are formed on the bonded substrate 13 made of alumina. The five copper-plated electrodes 31a-e are connected to the inner conductors of the dielectric resonators 12a-e, respectively. And the copper-plated electrodes 31a-e
Between the four copper-plated electrodes 32 with a predetermined space between them.
a to d are arranged. Also, two copper-plated electrodes 33a
And b are electrically connected to the inner conductor of the input / output terminal 11, and the copper plated electrodes 31a and 31e are provided on both ends of the combined substrate 13.
And it is arranged with a predetermined interval. On the other hand, the four copper plated electrodes 34a to 34d are arranged in parallel with the arrangement direction of the copper plated electrodes 31 to 33. At both ends of the combined substrate 13,
The copper-plated electrodes 34a and 34d are arranged with a predetermined gap from the copper-plated electrodes 33a and 33b, and the copper-plated electrodes 34b and c are arranged with a predetermined gap from each other in the central portion of the combined substrate 13. It is to be noted that the respective copper-plated electrodes 31 to 34 described above are opposed to each other with a predetermined gap therebetween to form a capacitance.

The four air-core coils 35a-d electrically connect the copper-plated electrodes 32a-d and 34a-d, respectively. Further, the two air core coils 36a and 36b are
The copper plated electrodes 34a and 34b and the copper plated electrodes 34c and 34d are electrically connected to each other.

Next, an equivalent circuit of the above-mentioned delay filter will be described with reference to FIG. In FIG. 6, the same parts as the parts described with reference to FIG. 5 described above are denoted by the same reference numerals, and the parts are connected by the copper-plated electrodes 31 to 34, so that a plurality of parts are formed. The grid-like circuit shown by the grid shape is formed.

An input / output coupling capacitance 37a is formed between the input / output terminal 11 and the dielectric resonator 12a due to the arrangement interval of the copper plated electrodes 33a and 31a. An input / output coupling capacitance 37b is formed between the input / output terminal 11 and the dielectric resonator 12e due to the arrangement interval of the copper plated electrodes 33b and 31e.

Between the five dielectric resonators 12a to 12e,
Inter-stage coupling capacitors 38a-8 are formed by the arrangement intervals of the copper-plated electrodes 31a-e and 32a-d. That is, in the delay filter, each dielectric resonator 1
Two inter-stage coupling capacitors 38 are formed between the two. Here, the delay filter constitutes a bandpass filter by the input / output interstage coupling circuit including the dielectric resonator 12, the input / output coupling capacitance 37, and the interstage coupling interstage coupling capacitance 38.

On the other hand, the delay filter has an interlaced parallel circuit which connects the two input / output terminals 11 in parallel with the inter-input / output stage coupling circuit. This interlaced parallel circuit is formed by the copper-plated electrodes 33 and 34 and the air-core coil 36. The interlaced parallel capacitance 39a is provided between the input / output terminal 11 and the air-core coil 36a depending on the arrangement interval of the copper-plated electrodes 33a and 34a.
Is formed. In addition, the input / output terminal 11 and the air-core coil 36
An interlaced parallel capacitance 39b is formed between the same and b by the arrangement interval of the copper plated electrodes 33b and 34d.
Further, an interlaced parallel capacitance 39c is formed between the air-core coils 36a and 36b due to the arrangement interval of the copper plated electrodes 34b and 34c. That is, the interlaced parallel circuit of the delay filter is formed by the interlaced parallel inductor 36 and the interlaced parallel capacitor 39.

The delay filter has an interlace bridge circuit that connects the inter-input / output stage coupling circuit and the interlaced parallel circuit. In the delay filter, the inter-input / output inter-stage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit form a lattice-shaped circuit having a plurality of lattice shapes, and the lattice-shaped circuit forms input / output terminals. 11 and a plurality of dielectric resonators 12 are connected. The jump bridge circuit
4 air core coils (interlaced bridge inductors) 35
It is formed by a to d. The air-core coil 35a is connected between the two inter-stage coupling capacitors 38a and 38b formed between the dielectric resonators 12a and 12b (that is,
One of the interlaced bridge circuits is formed by connecting the copper plated electrode 32a) and the interlaced parallel capacitor 39a and the interlaced parallel inductor 36a (that is, the copper plated electrode 34a). Also, the air core coil 35b
Is between the two interstage couplings 38c and 38d (that is, the copper-plated electrode 32b) formed between the dielectric resonators 12b and 12c, and between the interlaced parallel inductor 36a and the interlaced parallel capacitance 39c. (That is, by connecting with the copper plating electrode 34b),
Form one of the interlaced bridge circuits. Further, the air-core coil 35c includes the inter-stage coupling capacitors 38e and 38f (that is, the copper-plated electrode 32c) formed between the dielectric resonators 12c and 12d (that is, the copper-plated electrode 32c) and the interlaced parallel capacitance 39c and Jumping parallel inductor 36b
One of the interlaced bridge circuits is formed by connecting the intervening bridge circuit (that is, the copper plated electrode 34c). The air-core coil 35d includes the dielectric resonators 12d and 1d.
Two inter-stage couplings formed between 2e Inter-stage coupling capacitance 38
Between g and 38h (that is, the copper-plated electrode 32d)
And the interlaced parallel inductor 36b and the interlaced parallel capacitor 39b (that is, the copper-plated electrode 34d) are connected to each other to form one of the interlaced bridge circuits. The delay filter includes an interlaced parallel inductor 36, an interlaced parallel capacitor 39, and an interlaced parallel capacitor 39, which form a sub line (interlaced parallel circuit and interlaced bridge circuit).
By adjusting the interlace bridge inductor 35 and the phase and amplitude of the delay filter can be adjusted.

Next, the group delay time characteristic of the delay filter according to the second embodiment will be described. The 5-stage delay filter configured by the circuit of FIG. 6 also includes the dielectric resonator 12, the input / output coupling capacitance 37, and the inter-stage coupling capacitance 3 that constitute the delay filter.
8, jumping parallel inductor 36, jumping parallel capacitance 3
9 and by adjusting the characteristics of the interlaced bridge inductor 35, the group delay time characteristic α5 of FIG.
The same characteristics as are obtained. Moreover, when the number of filter stages of the delay filter is simulated as 11 as in the conventional case, the same characteristic as the group delay time characteristic α11 shown in FIG. 3B is obtained. That is, as for the group delay time characteristic of the delay filter, there is no peak near the outside of the pass band width and the pass band width is wide. Therefore, also in the delay filter according to the second embodiment,
By configuring the number of filter stages to five and adjusting each element, the group delay time characteristic β1 of the conventional 11-stage delay filter
The same group delay time as 1 and its pass bandwidth of 60 MHz can be obtained. Further, by configuring the number of filter stages to 11 and adjusting each element, it is possible to obtain a pass band width of 200 MHz with the same group delay time as the conventional group delay time characteristic β11.

Therefore, the delay filter according to the second embodiment, like the delay filter according to the first embodiment, also has the group delay time characteristic β1 of the conventional 11-stage delay filter.
The group delay time and its passband width obtained in 1 can be realized with five filter stages. Further, also in the delay filter, since the number of filter stages can be significantly reduced, the delay filter can be downsized and the loss can be reduced. Further, since the delay filter is also small in size and low in loss, by using the delay filter as a delay element in the distortion compensation type amplifier such as the feedforward amplifier described above, it is possible to downsize the entire amplifier and reduce the load on the amplifier. And it becomes possible to improve efficiency. Further, even with the delay filter, if the delay filter is configured with the same number of filter stages as in the conventional case, the pass band width can be significantly widened.

The delay filter constructed by the circuit shown in FIG. 6 includes an input / output coupling capacitor 37, an interstage coupling capacitor 38,
And the capacitance of the interlaced parallel capacitor 39, the interlaced parallel inductor 36, and the interlaced bridge inductor 3
The inductance of 5 is appropriately adjusted according to the target characteristic of the delay filter, but a part of the capacitance may be adjusted to a very small value or a very large value depending on the desired characteristic. Then, when the capacitance is adjusted to a very small value, it is opened to remove the capacitance, and when the capacitance is adjusted to a very large value, a short circuit is performed to remove the capacitance. Let That is, when such an adjustment is performed, the number of elements forming the delay filter can be reduced.

In the description of the second embodiment, the air-core coil is used as the inductor of the delay filter of the present invention. However, the same applies to the case where the inductor is constituted by a chip inductor or a meander-shaped copper pattern electrode. It goes without saying that the characteristics can be obtained.

(Third Embodiment) The structure of a delay filter according to a third embodiment of the present invention will be described with reference to FIG. In addition, in the third embodiment, a five-stage delay filter will be described as an example of the delay filter, and FIG.
7A is a perspective view of the delay filter with the upper lid and the front surface of the housing removed, and FIG. 7B is a perspective view of the substrate section viewed from above (the direction A in the drawing) of the perspective view of FIG. 7A. FIG.

In FIG. 7, the delay filter is different from the delay filter according to the first embodiment described above in that the air-core coils 18a and 18e provided on the coupling substrate 13 are provided.
Are removed, and the copper-plated electrode 1 is formed on the combined substrate 13.
By changing the shapes of 6a and 6e, the copper-plated electrode 16a3
And e3 are formed. For other components,
Since it is the same as the delay filter according to the first embodiment, the same components are designated by the same reference numerals, and detailed description thereof will be omitted.

The copper-plated electrode 16a3 is formed on the bonded substrate 13 made of alumina, and is arranged at a predetermined distance from the copper-plated electrodes 14a and 16b. Further, the copper-plated electrode 16a3 is the air-core coil 17a.
Is electrically connected to. The copper-plated electrode 16e3 is
It is formed on a bonded substrate 13 made of alumina, and is arranged at a predetermined interval with respect to the copper plated electrodes 14e and 16d. The copper-plated electrode 16e3 is electrically connected to the air-core coil 17b. Capacitances are also formed in these copper-plated electrodes 16a3 and e3 by facing the other copper-plated electrodes with a predetermined gap.

Next, an equivalent circuit of the above-described delay filter will be described with reference to FIG. In FIG. 8, the same portions as the portions described with reference to FIG. 7 described above are denoted by the same reference numerals, and the portions are connected by the copper-plated electrodes 14 to 16, so that a plurality of portions are formed. The grid-like circuit shown by the grid shape is formed. Further, in the equivalent circuit of the delay filter according to the first embodiment described in FIG. 2, the interlace bridge inductors 18a and 18e are deleted and the capacitors 24a and b are added in the equivalent circuit of the delay filter. There is. The other elements are similar to those of the equivalent circuit of the delay filter according to the first embodiment, and therefore, the same elements are denoted by the same reference symbols and detailed description thereof will be omitted.

The capacitor 24a is formed by the arrangement interval between the copper plated electrodes 14a and 16a3. That is, the capacitor 24a forms one of the interlaced bridge circuits that connect the dielectric resonator 12a to the interlaced parallel inductor 17a and the interlaced parallel capacitor 23a. Further, the capacitor 24b includes the copper-plated electrodes 14e and 1
6e3 is formed by the arrangement interval. That is,
The capacitor 24b forms one of the interlaced bridge circuits that connect the dielectric resonator 12e to the interlaced parallel inductor 17b and the interlaced parallel capacitor 23d (hereinafter, the capacitors forming these interlaced bridge circuits are referred to as Interlaced bridge capacity). That is, the interlaced bridge circuit of the delay filter is composed of the interlaced bridge inductor 18 and the interlaced bridge capacitor 24. In the delay filter, the inter-input / output inter-stage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit form a lattice-shaped circuit having a plurality of lattice shapes, and the lattice-shaped circuit forms input / output terminals. 11 and a plurality of dielectric resonators 12 are connected. Further, the delay filter constitutes a bandpass filter by the dielectric resonator 12, the input / output coupling capacitance 21, and the inter-stage coupling capacitance 22, and is a jump line that constitutes a sub line (interlaced parallel circuit and interlaced bridge circuit). By adjusting the parallel inductor 17, the jumping parallel capacitance 23, the jumping bridge inductor 18, and the jumping bridge capacitance 24, the phase and the amplitude of the delay filter can be adjusted.

Next, the group delay time characteristic of the delay filter according to the third embodiment will be described. The five-stage delay filter configured by the circuit of FIG. 8 also includes the dielectric resonator 12, the input / output coupling capacitance 21, and the inter-stage coupling capacitance 2 that constitute the delay filter.
2, jump parallel inductor 17, jump parallel capacitance 2
3 by adjusting the characteristics of the interlaced bridge inductor 18 and the interlaced bridge capacitance 24.
A characteristic similar to the group delay time characteristic α5 of (a) is obtained.
Moreover, when the number of filter stages of the delay filter is simulated as 11 as in the conventional case, the same characteristic as the group delay time characteristic α11 shown in FIG. 3B is obtained. That is, as for the group delay time characteristic of the delay filter, there is no peak near the outside of the pass band width and the pass band width is wide. Therefore, also in the delay filter according to the third embodiment, by configuring the number of filter stages to 5 and adjusting each element, the same group delay time as the group delay time characteristic β11 of the conventional 11-stage delay filter and its A pass band width of 60 MHz can be obtained. Also,
By configuring the number of filter stages to 11 and adjusting each element, it is possible to obtain a pass band width of 200 MHz with the same group delay time as the conventional group delay time characteristic β11.

Therefore, the delay filter in which a part of the interlaced bridge circuit is composed of a capacitor is also obtained with the group delay time characteristic β11 of the conventional 11-stage delay filter, like the delay filter according to the first embodiment. The group delay time and its pass band width can be realized with five filter stages.
Further, also in the delay filter, since the number of filter stages can be significantly reduced, the delay filter can be downsized and the loss can be reduced. Further, since the delay filter is also small in size and low in loss, by using the delay filter as a delay element in the distortion compensation type amplifier such as the feedforward amplifier described above, it is possible to downsize the entire amplifier and reduce the load on the amplifier. And it becomes possible to improve efficiency. Further, even with the delay filter, if the delay filter is configured with the same number of filter stages as in the conventional case, the pass band width can be significantly widened.

The delay filter constructed by the circuit shown in FIG. 8 has an input / output coupling capacitor 21, an interstage coupling capacitor 22,
Interlaced parallel capacity 23 and interlaced bridge capacity 2
4 and the inductances of the interlaced parallel inductor 17 and the interlaced bridge inductor 18,
It is appropriately adjusted according to the target characteristics of the delay filter,
A part of the capacitance may be adjusted to a very small value or a very large value depending on desired characteristics.
Then, when the capacitance is adjusted to a very small value, it is opened to remove the capacitance, and when the capacitance is adjusted to a very large value, a short circuit is performed to remove the capacitance. Let That is, when such an adjustment is performed, the number of elements forming the delay filter can be reduced.

In the description of the third embodiment, the air-core coil is used as the inductor of the delay filter of the present invention. However, the same applies when the inductor is constituted by a chip inductor or a meander-shaped copper pattern electrode. It goes without saying that the characteristics can be obtained.

(Fourth Embodiment) The structure of a delay filter according to a fourth embodiment of the present invention will be described with reference to FIG. In addition, in the fourth embodiment, a 5-stage delay filter will be described as an example of the delay filter, and FIG.
FIG. 9A is a perspective view of the delay filter with the upper lid and the front surface of the housing removed, and FIG. 9B is a perspective view of the substrate section viewed from above (A direction in the drawing) of the perspective view of FIG. 9A. FIG.

In FIG. 9, the delay filter is different from the delay filter according to the first embodiment described above in that the air-core coils 17a and 17e provided on the coupling substrate 13 are provided.
Are removed, and the copper-plated electrode 1 is formed on the combined substrate 13.
6a and b are connected to form a copper plated electrode 16ab, and copper plated electrodes 16d and e formed on the combined substrate 13 are connected to form a copper plated electrode 16de. The other components are similar to those of the delay filter according to the first embodiment, and therefore, the same components are designated by the same reference numerals and detailed description thereof will be omitted.

The copper-plated electrode 16ab is formed on the bonded substrate 13 made of alumina, and is arranged at a predetermined distance from the copper-plated electrode 16c. Further, the copper-plated electrode 16ab has air-core coils 18a and 18 electrically connected to the copper-plated electrodes 14b and c.
It is electrically connected to b. Copper plating electrode 16de
Is formed on a bonded substrate 13 made of alumina, and is arranged at a predetermined interval with respect to the copper-plated electrode 16c. Further, the copper-plated electrode 16de is electrically connected to the air-core coils 18d and e which are electrically connected to the copper-plated electrodes 14d and e. Capacitances are also formed in these copper-plated electrodes 16ab and de by facing the copper-plated electrode 16c with a predetermined gap. The copper-plated electrode 1
Between 6ab and 16de and the copper-plated electrodes 15a and 15b, there is an opening and no capacitance is formed.

Next, an equivalent circuit of the above-mentioned delay filter will be described with reference to FIG. In FIG.
In the same part as the part described with reference to FIG. 9 described above,
The same reference numerals are given, and the portions are connected by the copper plating electrodes 14 to 16,
A grid-shaped circuit having a plurality of grid shapes is formed. Moreover, in the equivalent circuit of the delay filter according to the first embodiment described in FIG. 2, the interlaced parallel inductor 17 is deleted and the capacitors 23a and 23d are short-circuited in the equivalent circuit of the delay filter. It has been deleted. The other elements are similar to those of the equivalent circuit of the delay filter according to the first embodiment, and therefore, the same elements are denoted by the same reference symbols and detailed description thereof will be omitted.

In the equivalent circuit of the delay filter according to the fourth embodiment, the interlaced parallel circuit of the delay filter is composed of two interlaced parallel capacitors 23b and 23c and is not connected to the input / output terminal 11. That is,
Both ends of the interlaced parallel circuit are connected to the interlaced bridge inductors 18a and 18e, and are connected to the input / output inter-stage coupling circuit by the interlaced bridge circuit (that is, copper-plated electrodes 16ab and 15a, 16).
Open between de and 15b). In the interlaced parallel circuit, the interlaced bridge inductor 18a
No interlaced parallel capacitance or inductor is formed between the and b (that is, the copper-plated electrode 16a).
b)). Further, in the interlaced parallel circuit, no interlaced parallel capacitance or inductor is formed between the interlaced bridge inductors 18d and e (that is, connection by the copper-plated electrode 16de). In the delay filter, the inter-input / output inter-stage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit form a lattice-shaped circuit having a plurality of lattice shapes, and the lattice-shaped circuit forms input / output terminals. 1
One and a plurality of dielectric resonators 12 are connected. As described above, the equivalent circuit of the delay filter according to the fourth embodiment is a circuit in which the elements configuring the equivalent circuit of the delay filter according to the first embodiment shown in FIG. 2 are eliminated. .

Next, the group delay time characteristic of the delay filter according to the fourth embodiment will be described. The characteristics of the dielectric resonator 12, the input / output coupling capacitance 21, the inter-stage coupling capacitance 22, the interlaced parallel capacitance 23, and the interlaced bridge inductor 18 which are also included in the 5-stage delay filter configured by the circuit of FIG. 3 by adjusting
A characteristic similar to the group delay time characteristic α5 of (a) is obtained.
Moreover, when the number of filter stages of the delay filter is simulated as 11 as in the conventional case, the same characteristic as the group delay time characteristic α11 shown in FIG. 3B is obtained. That is, as for the group delay time characteristic of the delay filter, there is no peak near the outside of the pass band width and the pass band width is wide. Therefore, also in the delay filter according to the fourth embodiment, the same group delay time as that of the group delay time characteristic β11 of the conventional 11-stage delay filter and its adjustment can be obtained by configuring the number of filter stages to 5 and adjusting each element. A pass band width of 60 MHz can be obtained. Also,
By configuring the number of filter stages to 11 and adjusting each element, it is possible to obtain a pass band width of 200 MHz with the same group delay time as the conventional group delay time characteristic β11.

Therefore, the delay filter constructed by opening a part of the interlaced parallel circuit is also obtained by the group delay time characteristic β11 of the conventional 11-stage delay filter, like the delay filter according to the first embodiment. The group delay time and the pass band width thereof can be realized with five filter stages. Further, also in the delay filter, since the number of filter stages can be significantly reduced, the delay filter can be downsized and the loss can be reduced. Further, since the delay filter is also small in size and low in loss, by using the delay filter as a delay element in the distortion compensation type amplifier such as the feedforward amplifier described above, it is possible to downsize the entire amplifier and reduce the load on the amplifier. And it becomes possible to improve efficiency. Further, even with the delay filter, if the delay filter is configured with the same number of filter stages as in the conventional case, the pass band width can be significantly widened.

The delay filter constructed by the circuit shown in FIG. 10 has an input / output coupling capacitor 21 and an interstage coupling capacitor 2
2, and the capacitance of the interlaced parallel capacitance 23 and the inductance of the interlaced bridge inductor 18 are appropriately adjusted according to the target characteristics of the delay filter. It may be adjusted to small or very large values. And if the capacitance is adjusted to a very small value,
Open to remove the capacitance and short circuit to remove the capacitance if the capacitance is adjusted to a very large value. That is, when such adjustment is performed, the number of elements forming the delay filter can be further reduced.

In the description of the fourth embodiment, the air-core coil is used as the inductor of the delay filter of the present invention, but the same effect can be obtained even if the inductor is constituted by a chip inductor or a meander-shaped copper pattern electrode. It goes without saying that the characteristics can be obtained.

(Fifth Embodiment) Referring to FIG. 11,
The structure of the delay filter according to the fifth embodiment of the present invention will be described. In addition, in the fifth embodiment, a five-stage delay filter will be described as an example of the delay filter, and FIG. 11A is a perspective view of the delay filter with the upper lid and the front surface of the housing removed. (B) is FIG.
It is an enlarged view of the board | substrate part seen from the upper direction (A direction of illustration) of the perspective view of (a).

In FIG. 11, the delay filter is different from the delay filter according to the fourth embodiment described above.
The air-core coil 18c provided on the combined substrate 13 is deleted, the shape of the copper-plated electrode 16c formed on the combined substrate 13 is changed, and the copper-plated electrode 16c5 is formed. The other components are similar to those of the delay filter according to the fourth embodiment, and therefore, the same components are designated by the same reference numerals and detailed description thereof will be omitted.

The copper-plated electrode 16c5 is formed on the bonded substrate 13 made of alumina, and the copper-plated electrode 16a is formed.
It is arranged at a predetermined interval with respect to b, 16de, and 14c. Also in this copper plating electrode 16c5, the copper plating electrodes 16ab, 16de, and 14c
Capacitors are respectively formed by facing each other with a predetermined interval. In addition, as described above, the air-core coil 18c described in FIG. 9 of the fourth embodiment is omitted in the delay filter.

Next, an equivalent circuit of the above-described delay filter will be described with reference to FIG. In FIG.
The same parts as the parts described with reference to FIG. 11 described above are denoted by the same reference numerals, and the parts are connected by the copper-plated electrodes 14 to 16 to form a plurality of grid shapes. The grid-like circuit shown is formed. Further, in contrast to the equivalent circuit of the delay filter according to the fourth embodiment described in FIG. 10, the interlace bridge inductor 18c is deleted and the capacitance 25 is formed instead of the equivalent circuit of the delay filter. . The other elements are the same as the equivalent circuit of the delay filter according to the fourth embodiment, and therefore, the same elements will be denoted by the same reference symbols and detailed description thereof will be omitted.

The capacitor 25 includes copper-plated electrodes 14c and 1
6c5 is formed by the arrangement interval. That is,
The capacitance 25 is an interlaced bridge capacitance forming one of interlaced bridge circuits connecting the dielectric resonator 12c and the interlaced parallel capacitances 23b and 23c. That is, the interlaced bridge circuit of the delay filter is composed of the interlaced bridge inductor 18 and the interlaced bridge capacitor 25. The interlaced capacitors 23b and 23c are respectively formed by the copper-plated electrode 16c5.
And the copper-plated electrodes 16ab and 16de. As described above, the equivalent circuit of the delay filter according to the fifth exemplary embodiment is similar to the delay filter according to the fourth exemplary embodiment shown in FIG. The circuit has been changed to capacity. In the delay filter, the inter-input / output inter-stage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit form a lattice-shaped circuit having a plurality of lattice shapes, and the lattice-shaped circuit forms input / output terminals. 11 and a plurality of dielectric resonators 12 are connected. Further, the delay filter constitutes a bandpass filter by the dielectric resonator 12, the input / output coupling capacitance 21, and the inter-stage coupling capacitance 22, and constitutes a sub line (interlaced parallel circuit and interlaced bridge circuit). By adjusting the interlaced parallel capacitance 23, the interlaced bridge inductor 18, and the interlaced bridge capacitance 25, the phase and amplitude of the delay filter can be adjusted.

Next, the group delay time characteristic of the delay filter according to the fifth embodiment will be described. The five-stage delay filter configured by the circuit of FIG. 12 also includes the dielectric resonator 12, the input / output coupling capacitance 21, the inter-stage coupling capacitance 22, the interlaced parallel capacitance 23, the interlaced bridge inductor 18, and the interlaced capacitor that constitute the delay filter. By adjusting the characteristic of the bridge capacitance 25, the group delay time characteristic α5 of FIG.
The same characteristics as are obtained. Moreover, when the number of filter stages of the delay filter is simulated as 11 as in the conventional case, the same characteristic as the group delay time characteristic α11 shown in FIG. 3B is obtained. That is, as for the group delay time characteristic of the delay filter, there is no peak near the outside of the pass band width and the pass band width is wide. Therefore, also in the delay filter according to the fourth embodiment,
By configuring the number of filter stages to five and adjusting each element, the group delay time characteristic β1 of the conventional 11-stage delay filter
The same group delay time as 1 and its pass bandwidth of 60 MHz can be obtained. Further, by configuring the number of filter stages to 11 and adjusting each element, it is possible to obtain a pass band width of 200 MHz with the same group delay time as the conventional group delay time characteristic β11.

Therefore, the delay filter in which a part of the interlace bridge circuit of the fourth embodiment is formed of a capacitor also has a group of conventional 11-stage delay filters, like the delay filter according to the first embodiment. The group delay time and its pass band width obtained by the delay time characteristic β11 can be realized with five filter stages. Further, also in the delay filter, since the number of filter stages can be significantly reduced, the delay filter can be downsized and the loss can be reduced. Further, since the delay filter is also small in size and low in loss, by using the delay filter as a delay element in the distortion compensation type amplifier such as the feedforward amplifier described above, it is possible to downsize the entire amplifier and reduce the load on the amplifier. And it becomes possible to improve efficiency. Further, even with the delay filter, if the delay filter is configured with the same number of filter stages as in the conventional case, the pass band width can be significantly widened.

The delay filter constituted by the circuit shown in FIG. 12 has an input / output coupling capacitor 21 and an interstage coupling capacitor 2
2, the capacitance of the interlaced parallel capacitance 23 and the interlaced bridge capacitance 25, and the interlaced bridge inductor 18
The inductance of is adjusted appropriately according to the target characteristic of the delay filter, but a part of the capacitance may be adjusted to a very small value or a very large value depending on the desired characteristic. Then, when the capacitance is adjusted to a very small value, it is opened to remove the capacitance, and when the capacitance is adjusted to a very large value, a short circuit is performed to remove the capacitance. Let That is, when such adjustment is performed, the number of elements forming the delay filter can be further reduced.

In the description of the fifth embodiment, the air-core coil is used as the inductor of the delay filter of the present invention, but the same effect can be obtained even if the inductor is constituted by a chip inductor or a meander-shaped copper pattern electrode. It goes without saying that the characteristics can be obtained.

As described above, the delay filter of the present invention is not limited to the equivalent circuit of the delay filter described in the first embodiment, but may be interlaced depending on the target characteristics such as pass band width and group delay time of the delay filter. Part of the parallel inductor is replaced with an interlaced parallel capacitance, the interlaced parallel inductor or interlaced parallel capacitance connected to the copper-plated electrodes connected to the input / output terminals is deleted, the interlaced bridge inductor and interlaced bridge capacitance are replaced, or the interlaced parallel Various replacements are possible, such as the deletion of inductors or interlaced parallel capacitances. Similarly, it becomes possible to suppress the peak of the group delay time characteristic that occurs near the outside of the pass bandwidth, and the group delay time characteristic becomes flat. It is possible to obtain the characteristic that the pass band width is wide. Further, since the number of filter stages of the delay filter required to obtain the same group delay time characteristic can be reduced, a small size and low loss delay filter can be realized in each case.

As described above, according to the present invention, the grid-like circuit for connecting the dielectric resonator and the input / output terminal is composed of the input / output interstage coupling circuit, the interlaced parallel circuit, and the interlaced bridge circuit. By providing an inductor in a part of the element that configures, a large peak does not occur in the group delay time characteristic near the edge of the pass bandwidth, so that a characteristic with a wide group frequency band can be obtained. . Moreover, since the number of filter stages of the delay filter required to obtain the same group delay time characteristic can be reduced, a small-sized and low-loss delay filter can be realized. Further, since the delay filter of the present invention is small and has low loss, by using the delay filter as a delay element in a distortion compensation type amplifier such as the feedforward amplifier described above, the overall size of the amplifier can be reduced and the load on the amplifier can be reduced. Can be reduced and efficiency can be increased.

[Brief description of drawings]

FIG. 1 is a diagram showing a structure of a delay filter according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an equivalent circuit of the delay filter of FIG.

FIG. 3 is a diagram comparing group delay time characteristics of the delay filter of FIG. 1 and a conventional 11-stage delay filter.

FIG. 4 is a diagram showing characteristics of elements constituting the delay filter of FIG. 1 and a conventional 11-stage delay filter.

FIG. 5 is a diagram showing a structure of a delay filter according to a second embodiment of the present invention.

FIG. 6 is a diagram showing an equivalent circuit of the delay filter of FIG.

FIG. 7 is a diagram showing a structure of a delay filter according to a third embodiment of the present invention.

8 is a diagram showing an equivalent circuit of the delay filter of FIG.

FIG. 9 is a diagram showing a structure of a delay filter according to a fourth embodiment of the present invention.

10 is a diagram showing an equivalent circuit of the delay filter of FIG.

FIG. 11 is a diagram showing a structure of a delay filter according to a fifth embodiment of the present invention.

12 is a diagram showing an equivalent circuit of the delay filter of FIG.

FIG. 13 is a functional block diagram showing a functional configuration of a feedforward amplifier.

FIG. 14 is a diagram showing a structure of a conventional delay filter.

15 is a diagram showing an equivalent circuit of the delay filter of FIG.

[Explanation of symbols]

1 ... Large power delay filter 2 ... Low power delay filter 3 ... Main amplifier 4 ... Sub amplifier 5 ... Distributor 6 ... Coupler 7 ... Attenuator 8, 9 ... Synthesizer 10, 11 ... I / O terminals 12 ... Dielectric resonator 13 ... Bonded substrate 14-16, 31-34 ... Copper-plated electrode 17, 18, 35, 36 ... Air core coil (inductor) 19 ... Case 21-25, 37-39 ... Capacity α ... Group delay time characteristic of the present invention β: Conventional group delay time characteristics

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Minato Tachibana             55-12 Ohsumihama, Kyotanabe City, Kyoto Prefecture Matsushita Nittoden             Ware corporation (72) Inventor Toshiaki Nakamura             55-12 Ohsumihama, Kyotanabe City, Kyoto Prefecture Matsushita Nittoden             Ware corporation F-term (reference) 5J090 AA01 CA36 CA92 FA20 GN07                       HA29 HA33 KA13 KA23 KA41                       KA66 KA68 MA14 QA04 QA05                       SA13 TA01 TA03                 5J500 AA01 AC36 AC92 AF20 AH29                       AH33 AK13 AK23 AK41 AK66                       AK68 AM14 AQ04 AQ05 AS13                       AT01 AT03

Claims (18)

[Claims] 1. A delay filter having a constant group delay time characteristic for a predetermined frequency band, wherein an impedance element is provided on each side of a circuit composed of a plurality of dielectric resonators and a plurality of grating shapes. And a grid-shaped circuit that connects a plurality of the dielectric resonators to each other by connecting the dielectric resonators to the input / output terminals, and at least a part of the impedance element provided in the grid-shaped circuit is formed by an inductor. , Delay filters. 2. The grid-shaped circuit includes an input / output interstage coupling circuit for interstage coupling between the input / output terminal and each of the dielectric resonators via coupling capacitance, and between the input / output terminal. An interlaced parallel circuit provided in parallel with the inter-input / output stage coupling circuit and configured by a plurality of first impedance elements; and the interlace between the coupling capacitors configuring the inter-input / output stage coupling circuit and the interlace. At least one of the first and second impedance elements, including an interlaced bridge circuit that connects the first impedance elements that form a parallel circuit in a grid pattern and that is configured by a second impedance element. The delay filter according to claim 1, wherein the part is constituted by an inductor. 3. In the first impedance element, elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are inductors, and other elements are capacitors, and the second impedance element is the second impedance element. The delay filter according to claim 2, wherein the impedance elements are all configured by inductors. 4. In the first impedance element, elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are inductors, and the other first impedance elements are capacitors. The delay filter according to claim 2, wherein the second impedance element includes an inductor and a capacitor. 5. The delay filter according to claim 3, wherein a part of the first impedance element is short-circuited or opened. 6. The coupling capacitors forming the input / output inter-stage coupling circuit are arranged two by two between the respective dielectric resonators, and the interlaced bridge circuit is arranged between the dielectric resonators of the respective dielectric resonators. The delay filter according to claim 2, wherein the interlaced parallel circuit is connected between two coupling capacitors arranged in between. 7. The delay filter according to claim 6, wherein the first impedance element is composed of an inductor and a capacitor, and the second impedance element is entirely composed of an inductor. 8. The delay filter according to claim 2, wherein a part of the first and second impedance elements is short-circuited. 9. The delay filter according to claim 2, wherein a part of the first and second impedance elements is opened. 10. A distortion compensation amplifier for suppressing a distortion component generated when amplifying an input signal and outputting the amplified input signal, the main amplifier amplifying the input signal, and the input signal. A first delay element that delays the input signal by a predetermined first group delay time with respect to a frequency band of the output signal, an input signal amplified by the main amplifier, and an output from the first delay element. And a distortion component detecting unit for detecting a distortion component included in the input signal amplified by the main amplifier, and amplifying the distortion component detected by the distortion component detecting unit. A sub-amplifier, a second delay element for delaying the input signal amplified by the main amplifier by a predetermined second group delay time, and outputting the input signal; a distortion component amplified by the sub-amplifier; And a distortion component suppressor that suppresses a distortion component included in the input signal amplified by the main amplifier by combining the delayed input signal output from the second delay element and amplified by the main amplifier. At least one of the first and second delay elements is provided with an impedance element on each side of a circuit composed of a plurality of dielectric resonators and a plurality of lattice shapes, and the plurality of dielectric resonators are provided. A distortion-compensation amplifier, comprising: a grid-shaped circuit coupled between stages and connected to an input / output terminal, wherein at least a part of an impedance element provided in the grid-shaped circuit is composed of an inductor. 11. The grid-shaped circuit includes an input / output interstage coupling circuit for coupling the input / output terminals and each of the dielectric resonators via a coupling capacitance, and between the input / output terminals. An interlaced parallel circuit provided in parallel with the inter-input / output stage coupling circuit and configured by a plurality of first impedance elements; and the interlace between the coupling capacitors configuring the inter-input / output stage coupling circuit and the interlace. At least one of the first and second impedance elements, including an interlaced bridge circuit that connects the first impedance elements that form a parallel circuit in a grid pattern and that is configured by a second impedance element. The distortion-compensated amplifier according to claim 10, wherein the part is constituted by an inductor. 12. In the first impedance element, elements located at both ends of the interlaced parallel circuit connected to the input / output terminal are inductors, and other elements are capacitors, and the second impedance element is a capacitor. The distortion compensation amplifier according to claim 11, wherein all the impedance elements are configured by inductors. 13. In the first impedance element, elements located at both ends of the interlaced parallel circuit connected to the input / output terminals are inductors, and other elements are capacitors, and the second impedance element is a second impedance element. The distortion compensation amplifier according to claim 11, wherein the impedance element includes an inductor and a capacitance. 14. A part of the first impedance element is short-circuited or opened.
The distortion compensation amplifier according to 2 or 13. 15. The coupling capacitors forming the input-output inter-stage coupling circuit are arranged two by two between the respective dielectric resonators, and the interlaced bridge circuit is arranged between the dielectric resonators of the respective dielectric resonators. The distortion compensating amplifier according to claim 11, wherein the interlaced parallel circuit is connected between two coupling capacitors arranged in between. 16. The distortion-compensation amplifier according to claim 15, wherein the first impedance element is composed of an inductor and a capacitor, and all the second impedance elements are composed of inductors. 17. The part of the first and second impedance elements is short-circuited.
Distortion-compensated amplifier according to item 1. 18. The method according to claim 11, wherein a part of the first and second impedance elements is opened.
Distortion-compensated amplifier according to item 1.