JP2003273041A - Method of manufacturing integrated circuit and substrate with integrated circuit formed by the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of an integrated circuit superior in economy, since conductive minute particles can be deposited efficiently and minutely on a minute wiring groove and a connection hole, wiring resistance is small, a circuit with high density can be formed and high integration is possible, and to provide a substrate with integrated circuit, which is formed by the method. <P>SOLUTION: The manufacturing method of the integrated circuit is formed by means of processes (a) and (b). (a) A process of forming a metal thin film on the surface of the wiring groove formed on the substrate. (b) A process for applying the wiring groove where the metal thin film is formed with application liquid for forming integrated circuit, which comprises a conductive minute particle forming component and/or the conductive minute particles. (c) Application liquid for forming integrated circuit is applied, and an applied face may be planarized. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention applies an integrated circuit forming coating liquid containing a conductive fine particle forming component and / or conductive fine particles to a substrate having wiring grooves formed therein to form an electric circuit on the substrate. In the method, a metal thin film is formed on the surface of the wiring groove, and then a coating liquid for forming an integrated circuit is applied to the wiring groove while irradiating ultrasonic waves, and a method for manufacturing an integrated circuit in which the coating surface is flattened as necessary, and The present invention relates to a substrate with an integrated circuit formed by the method.

[0002]

BACKGROUND OF THE INVENTION Various integrated circuits are used in computers and various electronic devices, and with the miniaturization and higher performance of these circuits, higher circuit density and higher performance are required. Among these, specifically exemplifying a semiconductor integrated circuit, conventionally, in order to increase the integration degree of the semiconductor integrated circuit, for example, a multilayer wiring circuit as shown in FIG. 5 has been used. FIG. 5 is a schematic sectional view of a semiconductor integrated circuit. The manufacturing process of such an integrated circuit will be described. After the thermal oxide film as the first insulating film 32 is formed on the substrate 31 made of silicon or the like, the first wiring made of an aluminum film or the like is formed on the surface of the first insulating film. Layer 33 is formed. Then, an interlayer insulating film 34 such as a silica film or a silicon nitride film is deposited on the interlayer insulating film 34 by the CVD method or the plasma CVD method, and the interlayer insulating film 3 is formed on the interlayer insulating film 34.
A silica insulating film (planarizing film) 35 for flattening 4 is formed, and a second insulating film 36 is further deposited on the silica insulating film 35, if necessary, and then the second wiring layer (see FIG. (Not shown) is formed, and if necessary, an interlayer insulating film, a planarizing film, and an insulating film are further formed on the surface of the second wiring layer.

However, in the wiring made of an aluminum film, the aluminum constituting the wiring layer is oxidized during the sputtering for forming the multi-layered wiring, and the resistance value may increase to cause a conductive failure. Further, there is a limit to forming a high-density integrated circuit because the wiring width cannot be reduced. Furthermore, in recent years, in long-distance wiring such as clock lines and data bus lines, the propagation delay time (RC delay time = resistance × capacitance) of an electric signal is increased due to an increase in wiring resistance as the chip size increases. Increasing is a new issue. Therefore, it is necessary to use a material having a lower resistance as the wiring layer.

Therefore, in place of the conventional Al or Al alloy, Cu
Wiring has been proposed. For example, after forming a wiring groove in an insulating film on a substrate in advance, electrolytic plating, CVD
A method of depositing Cu by a method or the like to form a wiring has been proposed. However, in this method, since the wiring is densified, Cu cannot be sufficiently deposited in the fine wiring groove and the connection hole, and the flatness of the deposited film is not always satisfactory. Was not obtained. Furthermore, the deposited film was not a dense film, and holes were sometimes generated. For this reason, a method of forming a circuit by applying a solution containing Cu ultrafine particles onto a substrate having wiring grooves by a spin coating method (SOM method) has been proposed (ULVAC TECHNICAL JOURNAL No. 51, 1999, P. 15).
However, in this method, since the thickness of the deposited film that can be formed by one coating is small, it is necessary to repeatedly coat the wiring to fill the wiring grooves. Further, in the spin coating method, when the Cu ultrafine particle-containing solution is applied uniformly over the entire surface of the substrate, there is a Cu ultrafine particle solution that is applied to the outside of the substrate, so that there is a problem that the utilization rate of the Cu ultrafine particle solution is low. It was

Further, in the case of depositing metal fine particles such as Cu fine particles, the metal fine particles may not be densely packed due to the weight of the metal fine particles, and the grain boundary resistance cannot be reduced, so that a circuit having a sufficiently low wiring resistance cannot be obtained. was there.
Therefore, the applicant of the present application discloses in Patent Publication No. 2001-208297 that the wiring groove is coated with a coating solution for forming an integrated circuit, which contains a conductive fine particle-forming component and / or conductive fine particles while irradiating ultrasonic waves. It is proposed that the conductive fine particles can be densely deposited by coating and that a circuit having a low wiring resistance and a high density can be formed.

However, there is a problem that the formed circuit peels off due to insufficient adhesion to the wiring groove. Therefore, if a binder component is used to improve the adhesion between the wiring groove and the metal fine particles, the conductivity may be impaired. Further, the conductive fine particles are filled in the wiring groove, but even if they are dense, the voids of the particles may remain as voids, the resistance value is high, and the voids may cause the disconnection of the circuit.

[0007]

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems in the prior art. It is possible to efficiently and densely deposit conductive fine particles in fine wiring grooves and connection holes, and An object of the present invention is to provide a method of manufacturing an integrated circuit which is excellent in economical efficiency because it can form a high-density circuit with small resistance and can be highly integrated, and a substrate with an integrated circuit formed by the method. I am trying.

[0008]

SUMMARY OF THE INVENTION The method of manufacturing an integrated circuit according to the present invention comprises the following steps (a) and (b): (a) forming a metal thin film on the surface of a wiring groove formed on a substrate. Then, the step (b) of applying a coating liquid for forming an integrated circuit containing a conductive fine particle forming component and / or conductive fine particles to the wiring groove formed with the metal thin film while irradiating ultrasonic waves.

In the present invention, (c) it is preferable to further flatten the coated surface after coating the integrated circuit forming coating liquid. The conductive fine particles are Au, Ag, Pd, Pt,
Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti, In, Al,
It is preferable that the metal fine particles contain at least one metal selected from the group consisting of Sb and W, and the conductive fine particle forming component is Au, Ag, Pd, P.
t, Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti, In, A
It preferably comprises ions of at least one metal selected from the group consisting of l, Sb and W.

The depth (D) of the wiring groove is 0.05.
The width (WC) of the wiring groove is within the range of 10 μm to 0.0
It is preferably in the range of 5 to 100 μm, and the ratio (D / WC) of the depth (D) of the wiring groove to the width (WC) of the wiring groove is preferably in the range of 0.1 to 20. The integrated circuit formed on the substrate is preferably the integrated circuit formed by the method described above.

[0011]

DETAILED DESCRIPTION OF THE INVENTION The present invention will be specifically described below. The method for manufacturing an integrated circuit according to the present invention is characterized by comprising the following steps (a) to (c). (A) A step of forming a metal thin film in the wiring groove formed on the substrate. (B) Next, a step of applying a coating solution for forming an integrated circuit containing a conductive fine particle forming component and / or conductive fine particles to the wiring groove formed with the metal thin film while irradiating with ultrasonic waves. (C) A step of further flattening the coated surface, if necessary. In the integrated circuit according to the present invention, for example, the wiring grooved substrate shown in FIG. 1 is used. FIG. 1 shows a schematic cross-sectional view of a wiring grooved substrate used in a method for manufacturing an integrated circuit according to the present invention. In the figure, a subscript 1 is a substrate, 2 is an insulating film, and 3 is a wiring groove.

[Substrate 1] As the substrate 1 used in the present invention,
A substrate made of silicon, glass or the like can be used. [Insulating Film 2] The insulating film 2 is formed on this substrate.

The insulating film is not particularly limited as long as it is made of an insulating material. For example, silica, alumina, titania, silicon nitride, silicon carbide, organic resin polymer, and plasma TEOS (plasma is used). TEOS is tetraethyl orthosilicate (TEO
(S) plasma-deposited) and the like are formed. The insulating film 2 may be made of one type, or may be made of two or more types. Further, it may be a multi-layered one in which another insulating film is formed on the upper and lower sides.

Such an insulating film 2 is formed by a conventionally known method, for example, a spin coating method, a CVD method, a sputtering method, a plasma CVD method or the like. Further, for example, an insulating film (SOG film) made of silica disclosed in JP-A-2-237030 filed by the applicant of the present application has a high contact resistance, a low dielectric constant, and further excellent flatness, which is preferable.

At this time, the insulating film preferably has a film thickness in the range of 0.1 to 6 μm. When the film thickness of the insulating film 2 is less than 0.1 μm, the film thickness may be too thin to secure the insulating property.
If it exceeds m, the insulating film 2 may be cracked.

The wiring grooved substrate used in the present invention does not have to be a single-layer insulating film as shown in FIG. 1, and as described above, two or more kinds of insulating films are laminated and provided. It may be. When the insulating film is composed of two or more kinds, it is preferable that the final film thickness of the insulating film is in the range of 0.1 to 6 μm. [Wiring Groove 3] In the wiring grooved substrate used in the present invention, the wiring groove is formed in the insulating film.

The depth (D) of the wiring groove is 0.05 to 10 μm.
It is preferably in the range of 0.1, more preferably 0.1.
It is desirable to be in the range of up to 5 μm. The width (WC) of the wiring groove is preferably in the range of 0.05 to 100 μm, more preferably in the range of 0.1 to 20 μm. Wiring groove width (WC) is 0.05μ
If it is less than m, the width may be too small to selectively supply the conductive fine particles to the wiring groove.

If the width (WC) of the wiring groove exceeds 100 μm, the width of the wiring groove may be too wide to form a high-density circuit. When the width of the wiring groove is in the above range, the conductive fine particles formed by irradiation of ultrasonic waves to the conductive fine particle forming component or the conductive fine particles contained in advance,
It absorbs the energy of the applied ultrasonic waves and collides with the metal thin film formed on the bottom surface or side wall of the wiring groove described below or the wiring groove formed with a barrier metal layer described later, and is deposited while being fused. The conductive fine particles are densely deposited while colliding with the conductive fine particles.

Therefore, the bonding surface of the conductive fine particles increases,
In particular, when the coating liquid for forming an integrated circuit contains the conductive fine particle forming component, voids due to the gaps between the particles are small, and a circuit having a small circuit resistance can be formed. Further, it is possible to form a circuit having excellent adhesion to the bottom surface and side wall of the wiring groove or the wiring groove in which a barrier metal layer described later is formed. In addition, the depth (D) of the wiring groove is 0.05
If the thickness is less than μm, it is necessary to widen the width of the circuit in order to ensure the conductivity of the circuit, and thus it may not be possible to form a high-density circuit.

If the depth (D) of the wiring groove exceeds 10 μm, the wiring layer may be too thick to obtain an integrated circuit highly integrated in the height direction. Ratio (D / WC) of the width (WC) of the wiring groove and the depth (D) of the wiring groove
Is preferably in the range of 0.1 to 20. The depth (D) of the wiring groove and the width (WC) of the wiring groove are within the above range,
If the aspect ratio D / WC is less than 0.1, the conductivity of the circuit may not be ensured, and thus if the width of the circuit is widened, it may not be possible to form a high-density circuit. Further, if the aspect ratio D / WC exceeds 20, the conductivity of the circuit may not be ensured, and therefore, if the height of the circuit is increased, it may not be possible to form a highly integrated circuit in the vertical direction. Such wiring grooves can be formed by forming a photoresist film (PR film) having a line-and-space of 0.1 to 10 μm on the substrate, and then sputtering.

[Barrier Metal Layer] In the method of manufacturing an integrated circuit of the present invention, a barrier metal layer may be formed on the inner surface of the wiring groove before applying the coating liquid for forming an integrated circuit. For forming such a barrier metal layer, a conventionally known method can be adopted. For example, TiN, Ta, T
It can be performed by sputtering aN or the like. At this time, the thickness of the barrier metal layer is usually 50 to 200 nm.
Is in the range. By forming the barrier metal layer, it is possible to prevent the conductive fine particle component for circuit formation, the organic stabilizer described below, and impurities such as ions from diffusing or eroding into the insulating film, and at the same time, to these insulating films. It is possible to suppress the deterioration of the insulating property of the insulating film due to the diffusion and erosion of.

Step (a) [Formation of Metal Thin Film] In the present invention, a metal thin film is formed on the surface of the wiring groove. As the constituents of the metal thin film, Au, Ag, Pd, Pt, R
h, Ru, Cu, Fe, Ni, Co, Sn, Ti, In, Al, S
At least one metal component selected from the group consisting of b and W is used. At this time, the metal thin film component may be different from the conductive fine particle component and the conductive fine particle forming component, but if they are the same, the adhesiveness to the metal thin film is high, and the circuit with few voids described above can be formed. .

The thickness of such a metal thin film is 2 to 25 n.
m, more preferably 5 to 20 nm. If the thickness of the metal thin film is less than 2 nm, it may not be possible to form the thin film on the entire side wall and bottom surface of the wiring groove.
The adhesion between the wiring groove and the circuit may be lacking. If the thickness of the metal thin film exceeds 25 nm, the wiring groove becomes narrower depending on the size of the wiring groove. Therefore, the application of the coating solution for forming an integrated circuit containing the conductive fine particle forming component and / or the conductive fine particle is selectively performed. It may be difficult to apply it to the groove, and the effect of applying the application liquid while irradiating the ultrasonic wave to form the circuit cannot be sufficiently exerted. A metal thin film is also formed on the insulating film, and this portion (sacrifice layer) needs to be removed by polishing or the like, which increases the burden.

The method for forming the metal thin film is not particularly limited as long as it is possible to form a uniform thin film within the above-mentioned thickness range.
A conventionally known method can be adopted. For example, a sputtering method, a CVD method, an electrolytic plating method, an electroless plating method, etc. can be mentioned. Among them, the CVD method is preferably used because it can form a metal thin film having a uniform thickness within the above range.

Step (b) Next, while applying ultrasonic waves, a coating solution for forming an integrated circuit containing a conductive fine particle forming component and / or conductive fine particles is applied to the wiring groove formed with the metal thin film. Furthermore, if necessary, it can be dried and heat-treated.

Coating Solution for Forming Integrated Circuit The coating solution for forming an integrated circuit used in the present invention is composed of a component for forming conductive fine particles and / or conductive fine particles and water and / or an organic solvent. [Conductive Fine Particle Forming Component] The conductive fine particle forming component is a component for forming conductive fine particles such as a single component metal fine particle described later or a composite metal fine particle containing two or more kinds of metal components. Ion is mentioned. Specifically, Au, Ag, Pd, Pt, Rh, Ru, Cu, Fe, N
Ions of metals such as i, Co, Sn, Ti, In, Al, Sb and W are mentioned. Among them, Au, Ag, Pd, Pt,
Metals such as Rh and Cu are preferable because metal colloid fine particles can be easily obtained by ultrasonic irradiation.

Compounds containing such metal ions include NaAuCl ₄ , AgClO ₄ , AgNO ₃ , PdCl ₂ .2N
aCl, Pd (NO ₃ ) ₂ , K ₂ PtCl ₄ , H ₂ PtCl ₆ , CuCl ₂
Are exemplified. These conductive fine particle-forming components easily generate metal colloidal fine particles having a particle size similar to that of the conductive fine particles to be described later upon irradiation with ultrasonic waves.

[Conductive Fine Particles] The conductive fine particles can be used without particular limitation as long as they have conductivity. Metal fine particles, metal oxide fine particles, conductive carbon, conductive polymer fine particles. Etc. In the present invention, fine metal particles are preferably used as the conductive fine particles.

Conventionally known metal fine particles can be used as the metal fine particles, and may be single component metal fine particles or composite metal fine particles containing two or more kinds of metal components. Further, the two or more kinds of metals forming the composite metal fine particles may be an alloy in a solid solution state, a eutectic body not in a solid solution state, or the alloy and the eutectic body may coexist. . In such composite metal fine particles, since metal oxidation and ionization are suppressed, the particle growth of the composite metal fine particles is suppressed, the corrosion resistance of the composite metal fine particles is high, and the conductivity is lowered (the resistance value is increased). It has excellent reliability such as small size. Such metal fine particles include Au, Ag, P
d, Pt, Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti, I
Metal fine particles containing at least one metal selected from the group consisting of n, Al, Sb and W are preferable.

The fine metal particles include Au, Ag, Pd and P.
t, Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti, In, A
Examples thereof include fine particles of a metal selected from the group consisting of l, Sb and W. Further, as the composite metal fine particles, Au, A
g, Pd, Pt, Rh, Ru, Cu, Fe, Ni, Co, Sn, T
Examples thereof include fine composite metal particles composed of at least two metals selected from the group consisting of i, In, Al, Sb and W. A preferable combination of two or more metals is Au-
Cu, Ag-Pt, Ag-Pd, Au-Pd, Au-Rh, Pt-Pd,
Pt-Rh, Fe-Ni, Ni-Pd, Fe-Co, Cu-Co, Ru-
Ag, Au-Cu-Ag, Ag-Cu-Pt, Ag-Cu-Pd, Ag-A
u-Pd, Au-Rh-Pd, Ag-Pt-Pd, Ag-Pt-Rh, Fe-
Ni-Pd, Fe-Co-Pd, Cu-Co-Pd and the like can be mentioned. Also, Au, Ag, Pd, Pt, Rh, Cu, Co, Sn,
When using metal fine particles made of a metal such as In, a part thereof may be in an oxidized state.
The metal oxide may be included. Furthermore, P and B
It may also contain compounds with attached atoms.

Such metal fine particles can be obtained by a known method (see Japanese Patent Laid-Open No. 10-188681). For example, in an alcohol / water mixed solvent, 1
The fine metal particles can be prepared by a method of reducing one kind of metal salt or a method of simultaneously or separately reducing two or more kinds of metal salts. At this time, a reducing agent may be added if necessary. As a reducing agent, sulfuric acid No. 1
Iron, trisodium citrate, tartaric acid, sodium borohydride, sodium hypophosphite and the like can be mentioned. Alternatively, the heat treatment may be performed in a pressure vessel at a temperature of about 100 ° C. or higher. Further, in the dispersion liquid of single-component metal fine particles or alloy fine particles, the presence of metal fine particles or ions having a standard hydrogen electrode potential higher than that of the metal fine particles or alloy fine particles,
The metal fine particles can also be prepared by a method of depositing a metal having a high standard hydrogen electrode potential on the metal fine particles and / or the alloy fine particles. At this time, a metal having a higher standard hydrogen electrode potential may be deposited on the obtained composite metal fine particles. Further, it is preferable that a large amount of such a metal having the highest standard hydrogen electrode potential is present in the surface layer of the composite metal fine particles. In this way, when the metal having the highest standard hydrogen electrode potential is present in the surface layer of the composite metal fine particles in a large amount, the oxidation and ionization of the composite metal fine particles are suppressed,
Particle growth due to ion migration or the like can be suppressed. Furthermore, since such composite metal fine particles have high corrosion resistance, it is possible to suppress a decrease in conductivity.
Furthermore, the fine metal particles can be prepared by the ultrasonic irradiation direct reduction method described in, for example, the proceedings of the symposium of the Autumn Meeting of the Japan Institute of Metals (1997), page 70.
Specifically, precious metal ions (Ag ⁺ , Au ³⁺ +, Pd ²⁺ , P
t ²⁺ , Pt ^4+, etc.) and, if necessary, an organic compound such as a surfactant, is irradiated with ultrasonic waves under an inert gas atmosphere under the conditions of, for example, 200 kHz and 6 W / cm ^2. By doing so, the fine metal particles can be prepared.
The average particle size of such metal fine particles is preferably 200 nm or less, and more preferably 70 nm or less.

When the average particle size of the metal fine particles exceeds 200 nm, the metal fine particles are too large to enter the wiring groove, or even if they enter, they cannot be densely deposited and a circuit having a low resistance value is formed. Difficult to do. It is difficult to obtain a conductive metal oxide fine particle having an average particle size of less than 1 nm, and even if it is obtained, the grain boundary resistance becomes large and a low resistance circuit may not be formed depending on the mixing ratio of the particles. .

In the present invention, conductive metal oxide fine particles may be used in place of the metal fine particles, or conductive metal oxide fine particles may be used together with the metal fine particles. Examples of the conductive metal oxide include tin oxide, tin oxide doped with Sb, F or P, indium oxide, and S.
Examples thereof include indium oxide, antimony oxide, and low-order titanium oxide doped with n or F.

The coating liquid for forming an integrated circuit used in the present invention may contain conductive fine particles other than the above metal fine particles and metal oxide fine particles. Further, it is also possible to use inorganic conductive fine particles such as conductive carbon, and conductive fine particles made of a conductive polymer such as polyacetylene, polypyrrole, poly-P-phenylene. The average particle size of these conductive fine particles is also 1 to 200 nm, preferably 2 to 70 n.
It is desirable to be in the range of m.

Organic Solvent As the organic solvent used in the coating liquid for forming an integrated circuit,
Methanol, ethanol, propanol, butanol,
Alcohols such as diacetone alcohol, furfuryl alcohol, tetrahydrofurfuryl alcohol, ethylene glycol, hexylene glycol; esters such as acetic acid methyl ester, acetic acid ethyl ester; diethyl ether, ethylene glycol monomethyl ether,
Examples thereof include ethers such as ethylene glycol monoethyl ether, ethylene glycol monobutyl ether, diethylene glycol monomethyl ether, and diethylene glycol monoethyl ether; ketones such as acetone, methyl ethyl ketone, acetylacetone, acetoacetic acid ester, and the like. These may be used alone or in combination of two or more. The concentration of the conductive fine particle-forming component and / or the conductive fine particles in the coating liquid for forming an integrated circuit is not particularly limited as long as the fluidity of the coating liquid can be secured, but is 0.0 in terms of solid content or metal.
It is desirable that it is contained in an amount of 5 to 30% by weight, preferably 0.1 to 10% by weight, particularly preferably 0.2 to 5% by weight.

When the amount of the conductive fine particle forming component and / or the conductive fine particles contained in the integrated circuit forming coating liquid is less than 0.05% by weight in terms of solid content or metal, the concentration is too low. However, it is not preferable because it is necessary to repeatedly apply the solvent, or it takes time to evaporate the solvent, which requires a long time to form a circuit. Further, when the amount of the conductive fine particle-forming component and / or the conductive fine particles exceeds 30% by weight in terms of solid content or metal, the produced particles are agglomerated particles, or the conductive fine particles are formed in the coating liquid. In some cases, the conductive particles may not be densely deposited and a circuit with a low resistance value may not be obtained.Even if they are obtained, the conductivity may drop or the circuit may be broken during a long period of use. May cause. In the present invention, when metal fine particles are used as the conductive fine particle forming component or conductive fine particles in the present invention, the dispersibility of the generated metal fine particles or the metal fine particles is improved in order to promote the generation of the metal fine particles. In order to improve the stability of the dispersion liquid, an organic stabilizer or a surfactant may be contained in the coating liquid for forming an integrated circuit.
Such organic stabilizers, specifically as a surfactant, gelatin, polyvinyl alcohol, polyvinylpyrrolidone, oxalic acid, malonic acid, succinic acid, glutaric acid, adipic acid, sebacic acid, maleic acid, fumaric acid,
Examples thereof include polyvalent carboxylic acids such as phthalic acid and citric acid and salts thereof, sulfonates, organic sulfonates, phosphates, organic phosphates, heterocyclic compounds, polycarboxylic acids, and mixtures thereof. Such organic stabilizers and surfactants vary depending on their types, the particle size of the metal fine particles, etc., but the metal fine particle-forming component and / or the metal fine particles are converted to metal, and 1 part by weight of this metal is used. , 0.005 to 5 parts by weight, preferably 0.01 to 2 parts by weight. When the amount of the organic stabilizer and the surfactant is less than 0.005 part by weight, sufficient dispersibility,
If the stability is not obtained and the amount exceeds 5 parts by weight, the conductivity may be hindered.

Furthermore, when the fine metal particles are dispersed in water and / or an organic solvent to be used in the coating liquid for forming an integrated circuit used in the present invention, the alkali metal ion, ammonium ion and polyvalent metal present in the coating liquid are used. ion,
In addition, it is desirable that the total amount of the concentration of ions of inorganic anions such as mineral acid and organic anions such as acetic acid and formic acid, which are liberated from the particles, be 10 mmol or less per 100 g of the solid content in the dispersion liquid. In particular, since inorganic anions such as mineral acids impair the stability and dispersibility of the metal fine particles, the lower the amount contained in the dispersion, the better. When the ion concentration is low, the dispersion state of the fine metal particles contained in the coating liquid for forming an integrated circuit is good, and a dispersion liquid containing almost no aggregated particles can be obtained. The monodispersed state of the metal fine particles in the coating liquid is maintained even during the circuit formation process. Therefore, when an integrated circuit is formed from a coating liquid for forming an integrated circuit having a low ion concentration, a dense circuit having a low resistance value is formed due to the absence of aggregated particles.

Further, in the circuit formed from the dispersion liquid having a low ion concentration as described above, the conductive fine particles such as metal fine particles can be favorably dispersed and arranged, so that the conductive fine particles are aggregated in the circuit. As compared with the case, it is possible to provide a highly reliable integrated circuit without defects.
The method of deionization treatment for obtaining a coating solution having a low ion concentration as described above is not particularly limited as long as the ion concentration finally contained in the coating solution falls within the above range. However, as a preferable deionization method, a dispersion liquid of conductive fine particles used as a raw material of a coating liquid or a coating liquid for forming an integrated circuit prepared from the dispersion liquid is used as a cation exchange resin and / or an anion. Examples thereof include a method of contacting with an exchange resin, and a method of washing these liquids with an ultrafiltration membrane.

Coating Method of Coating Liquid In the present invention, the coating method of the coating liquid for forming an integrated circuit is not particularly limited as long as the coating liquid for forming an integrated circuit can be coated in the wiring groove, but it is coated from a nozzle or the like mounted in a container. It is preferable that the coating liquid at the time of irradiation can be uniformly irradiated with ultrasonic waves and can be selectively applied to the wiring groove.

In the present invention, ultrasonic waves are applied while applying the coating liquid for forming an integrated circuit. However, the ultrasonic waves are applied to the coating liquid and / or the coating deposited on the wiring groove when the liquid drops or flows out from the nozzle or the like. Perform on liquid. The ultrasonic irradiation conditions are the metal-concentrated concentration of the metal fine particle forming component in the coating liquid for forming an integrated circuit, the concentration of conductive fine particles in the coating liquid for forming an integrated circuit, the average particle size, the boiling point of the solvent, and the coating. There is no particular limitation as long as the conductive fine particles can be selectively applied to the wiring groove depending on the coating speed of the liquid, etc., but 20 to 400 kH
It can be selected in the range of z and 5 to 400 W.

When the coating liquid for forming an integrated circuit contains a component for forming fine metal particles, the coating liquid is heated by irradiation of ultrasonic waves and fine metal particles are generated, and the coating liquid is concentrated and dried as the solvent evaporates. While entering the wiring groove, conductive fine particles are deposited and a conductive fine particle layer is formed in the wiring groove,
A circuit is formed. If the coating liquid for forming an integrated circuit contains conductive fine particles, the coating liquid is heated by the irradiation of ultrasonic waves, and the coating liquid enters the wiring groove while being concentrated and dried as the solvent evaporates, and the conductivity is increased. The fine particles are deposited and the conductive fine particle layer is formed in the wiring groove to form a circuit.

Further, the conductive fine particles including the generated metal fine particles absorb the energy due to ultrasonic waves, and the conductive fine particles that have entered the wiring groove are collided with each other on the bottom surface, the side wall of the wiring groove or between the conductive fine particles, so that the wiring premises The conductive fine particles are densely deposited in sequence from the lower part of the to form a circuit. After the circuit is formed by sufficiently filling the wiring groove, it is possible to further irradiate ultrasonic waves (irradiation of second ultrasonic waves) as necessary.

Alternatively, it is also possible to apply the second ultrasonic wave after applying the integrated circuit forming coating solution by a spinner method before the second ultrasonic wave is applied. Such a second
By irradiating the ultrasonic wave, the upper surface of the substrate after the circuit formation can be flattened, and the flattening treatment (for example, chemical mechanical polishing (CMP) treatment) performed as necessary after the circuit formation becomes easy. According to the method for forming an integrated circuit of the present invention, the conductive fine particles are selectively and densely deposited in the wiring groove to fill the wiring groove with the conductive fine particles, and the upper end surface of the wiring groove and the conductive fine particle layer are formed. Since the circuit can be formed so that the upper end surfaces of the wiring grooves substantially coincide with each other, a conductive layer (sacrificial layer) higher than the upper end surface of the wiring groove can be formed as in the conventional plating method, CVD method, PVD method, and SOM method described above. ) Is rarely formed, it suffices to remove the metal thin film formed on the insulating film, the planarization process is extremely easy, and the end face after the process has excellent flatness. Therefore, the economical efficiency of forming an integrated circuit is excellent.

The coating solution for forming an integrated circuit is applied while irradiating ultrasonic waves, and then, if necessary, in an oxidizing and / or reducing atmosphere or an inert gas atmosphere, about 200 to about
Heat treatment (curing) is performed at a temperature of 400 ° C. By this heat treatment, when impurities are present in the circuit, the impurities can be removed, the bonding of the conductive fine particles to each other is further promoted, and a circuit having a low resistance value excellent in adhesion to the wiring groove can be obtained.

Next, it is desirable to perform a flattening treatment on the formed conductive fine particle layer. The flattening process is performed as shown in FIG. FIG. 2 is a schematic view showing an outline of the flattening process, wherein the subscript 11 is a substrate, 12 is an insulating film, and 1
3 is the formed conductive fine particle layer, 14 is a barrier metal layer, and 15 is a metal thin film layer. As shown in FIG. 2A, the conductive fine particle layer immediately after formation is formed on the upper part of the wiring groove in which the metal thin film is formed and on the surface of the insulating film. As shown in FIG. 2B, the conductive fine particle layer is flattened so that the upper end surface of the insulating film and the polished upper end surface of the conductive fine particle layer are aligned horizontally and flatly. Such a flattening process is performed by, for example, a chemical mechanical polishing (CMP) process.

After forming the integrated circuit in this way, an insulating film (second insulating film) may be formed on the circuit surface. The method of forming the second insulating film is the same as the method of forming the insulating film. After forming the second insulating film, a through hole (connection groove) for electrically connecting to the formed circuit is provided at a predetermined position of the second insulating film as needed. The connection groove is formed by dry etching or the like, for example, and usually has a diameter of about 1.5 μm.

After that, the above-mentioned insulating film is formed, the wiring groove is formed, the circuit forming coating liquid is applied to the wiring groove and the connection groove, and then a series of steps for forming the second insulating film is repeated. Thus, a multilayer substrate with an integrated circuit can be manufactured. [Substrate with Integrated Circuit] Next, a substrate with an integrated circuit obtained by the method for manufacturing an integrated circuit of the present invention will be described with reference to the drawings shown below. FIG. 3 is a schematic sectional view showing an embodiment of the substrate with integrated circuit according to the present invention. In FIG. 3, a subscript 21 is a substrate, 22 is a first insulating film, 23 is a wiring layer, and 24
Indicates a second insulating film.

In the substrate with integrated circuit of the present invention, the first insulating film 22 is laminated on the substrate 21, and the wiring layer 23 is formed in the insulating film by the method described above. The two insulating films 24 are formed. A second wiring layer (not shown) having the same structure as the first wiring layer is formed on the second insulating film 24 (these are referred to as a first wiring layer). The first wiring layer and the second wiring layer are connected through a through hole (connection groove, not shown). Similarly, the third wiring layer, ..., The nth wiring layer are formed.

In the multi-layered substrate with integrated circuit of the present invention, the upper and lower wiring layers have through holes (connection grooves, not shown).
Are connected through. The above-mentioned connection can be made by forming a through hole (connection groove) having a desired diameter (usually about 1.5 μm) in the insulating film by dry etching using the RIE (Reactive Ion Etching) method, and making a connection by sputtering. Further, when forming the circuit of the upper layer, by applying the ultrasonic wave while applying the coating liquid for forming an integrated circuit as in the case of forming the circuit described above, the conductive fine particles are densely deposited in the wiring groove and the connection groove. You can also connect. When connecting using the coating liquid for forming an integrated circuit, it is preferable to form a metal thin film on the inner wall of the through hole (connection groove) as in the case of forming the circuit.

As in the present invention, when the coating liquid for forming an integrated circuit is applied to the wiring groove while irradiating with ultrasonic waves, when the coating liquid contains a metal fine particle forming component, the fine particles of metal are generated by the ultrasonic irradiation, The coating liquid is heated and the dispersion medium evaporates and concentrates, and the coating liquid is applied while being concentrated. Further, since the vibration energy of ultrasonic waves is transferred to the conductive particles, the conductive particles collide with the wall of the wiring item, The particles are densely arranged by the impact, so that even when the width of the wiring groove is narrow, the conductive particles can be selectively and densely stacked in the wiring groove.

When the coating liquid contains fine metal particles,
The ultrasonic irradiation causes the coating liquid to reach a high temperature and evaporates and concentrates the dispersion medium so that the coating liquid is applied and the vibration energy of the ultrasonic waves is transmitted to the conductive particles, so that the conductive particles form a metal thin film. Further, the particles collide with the wall of the wiring groove, and the particles are densely arranged by the impact. Therefore, even when the width of the wiring groove is narrow, the conductive particles can be selectively and densely laminated in the wiring groove.

Further, since the metal thin film is formed in the wiring groove, the conductive fine particles can be deposited in the wiring groove densely and with good adhesiveness, and as a result, the adhesiveness with the wiring groove is excellent with a small number of coatings. It is possible to obtain a highly integrated circuit.

[0053]

According to the method of manufacturing an integrated circuit of the present invention,
Since the above-mentioned metal thin film is provided, even if the width of the wiring groove is narrow, the conductive fine particles can be densely deposited in the wiring groove in which the metal thin film is formed. Thus, it is possible to form a highly integrated circuit with few voids and excellent adhesion to the wiring groove. Further, even when the chip size is large, the propagation delay time of the electric signal does not increase.

Further, since the circuit can be formed so that the upper end surface of the wiring groove and the upper end surface of the conductive fine particle layer are substantially aligned with each other, the conductive layer may be formed higher than the upper end surface of the wiring groove. Therefore, the flattening process is extremely easy and the end face after the process has excellent flatness. Therefore, the method according to the present invention is also excellent in economical efficiency in manufacturing a substrate with an integrated circuit.

The obtained substrate with integrated circuit has a highly integrated circuit formed in the horizontal direction as well as in the vertical direction, so that the propagation delay time is shortened and the reliability is excellent.

[0056]

EXAMPLES The present invention will be described below with reference to examples, but the present invention is not limited to these examples.

[0057]

Preparation Example Preparation of Conductive Fine Particle Dispersion Liquids Table 1 shows the compositions of the dispersion liquids of the metal fine particles and the conductive fine particles used in the examples and comparative examples. Metal fine particles (Q-1,
The dispersions of Q-2 and Q-3) were prepared by the following method.

Trisodium citrate was added in advance to 100 g of pure water so as to be 0.01 parts by weight per 1 part by weight of metal fine particles, and the concentration was 10% by weight in terms of metal, and the weight of the metal species was as shown in Table 1. Silver nitrate, palladium nitrate, and copper chloride aqueous solution are added so that the ratio becomes equal, and further an aqueous solution of ferrous sulfate having the same mole number as the total mole number of silver nitrate, palladium nitrate, and copper chloride is added, and the mixture is stirred for 1 hour under a nitrogen atmosphere. Thus, a dispersion liquid of fine metal particles was obtained. The obtained dispersion is washed with water by a centrifuge to remove impurities, dispersed in water, and then mixed with the solvent (1-ethoxy-2 propanol) shown in Table 1 and then water is removed by a rotary evaporator. And then concentrated to prepare metal fine particle dispersions (S-1, S-2, S-3) having the solid content concentrations shown in Table (1).

[0059]

[Table 1]

B) Preparation of coating liquid for forming integrated circuit b-1) Preparation of coating liquid for forming integrated circuit containing fine metal particles Each of the metal fine particle dispersions (S-1, S-2, S-3) prepared above )
In addition, the weight ratio of ethanol to 1-ethoxy-2-propanol is ethanol / 1-ethoxy-2-propanol = 3 /
The mixed solvent of No. 1 was added and diluted to prepare coating solutions (SC-1, SC-2, SC-3) for forming integrated circuits each having a concentration of 0.5% by weight.

B-2) Integrated circuit containing metal fine particle forming component
Preparation of coating liquid for formation In 100 g of pure water, trisodium citrate was previously converted into metal for forming fine metal particles, and the amount was 0.1 part by weight.
In addition to 01 parts by weight, the concentration was 0.5% by weight in terms of metal, and silver nitrate, palladium nitrate, and copper chloride were dissolved so that the metal species had the weight ratio shown in Table 2. For forming an integrated circuit containing a metal fine particle forming component by adding sodium dodecylsulfate as a surfactant so that the metal fine particle forming component is converted to metal in an amount of 1 part by weight per 1 part by weight and stirring for 30 minutes in a nitrogen atmosphere. Coating liquid (SB-
1, SB-2, SB-3) were prepared.

[0062]

[Table 2]

B-3) The metal fine particle forming component and the metal fine particles are
Preparation of Coating Solution for Forming Integrated Circuit Containing the Coating Solution for Forming Integrated Circuit (SB-1) and the Coating Solution for Forming Integrated Circuit (SC-1) at a Weight Ratio of 1: 1 Coating solution for forming integrated circuits (SD-1)
Was prepared.

[0064]

Example 1 [Creation of a substrate with integrated circuit] As an insulating film, an insulating film B made of silica (thickness 0.4 μm) is laminated on the surface of an insulating film A made of silicon nitride (thickness 0.2 μm). Further, a positive type photoresist is coated on a silicon wafer (8 inch wafer) substrate in which an insulating film C (thickness 0.2 μm) made of silicon nitride is sequentially formed on the surface of the insulating film B, and the thickness is 0.3 μm. Line and space exposure processing was performed. Then, the exposed portion was removed with a developing solution of tetramethylammonium hydride (TMAH). Then, a mixed gas of CF ₄ and CHF ₃ is used to form a pattern on the lower insulating film, and then the resist is removed by O ₂ plasma to obtain a width (W _C ) of 0.3 μm and a depth (D _C ). ) Is 0.6 μm, and the aspect ratio D / W _C is 2. Then, CVD is performed on the substrate on which the wiring groove is formed.
By the method, a silver thin film layer having a thickness of 15 nm was formed.

Next, the previously prepared dispersion liquid for forming an integrated circuit (SC-1) was filled in a container with a nozzle having a nozzle diameter of 5 mm, and then applied along the wiring groove on which the silver thin film layer was formed. In addition to this, an ultrasonic generator (Kaiyo Denki KK:
A circuit was formed by irradiating ultrasonic waves of 27 kHz and 300 W with AUTOCHDER-300, type-5271) and depositing metal fine particles (Q-1) in the wiring groove. Then, the metal fine particle layer and the silver thin film slightly deposited over the upper end surface of the wiring groove are flattened by CMP treatment and cured at 400 ° C. for 30 minutes in a nitrogen atmosphere, and then a 200 nm thick SiO ₂ film is formed by a CVD method ( An insulating film) was formed to obtain a substrate with integrated circuit (A). Table 2 shows the degree of difficulty of polishing by comparing the deposition amount of the conductive fine particles, the flatness, and the CMP processing speed. Further, with respect to the obtained substrate (A) with an integrated circuit, circuit continuity and denseness of deposited particles were examined. The results are shown in Table 3.

The evaluations in Table 3 were carried out as follows. (A) The flatness circuit cross section after coating was observed by a scanning electron microscope photograph (SEM) of 10 points, and evaluated according to the following criteria. Flat: ○ Almost flat: △ Clearly uneven: × (b) Difficulty in polishing The sacrificial layer (see FIG. 2) on the substrate after coating and drying was polished by a polishing device (Nano Factor (manufactured by KK)). : Wafer polishing system NF-300) with a load of 200 g / cm ² ,
Polishing was performed under the condition that the relative speed between the wafer and the polishing pad was 450 cm / min, and the following required polishing time was used as a reference for evaluation.

Polishing time less than 1 minute: ○ Polishing time less than 2 minutes: △ Polishing time more than 2 minutes: × (c) Conductivity After forming an insulating film in the same manner as in Example, a positive type photo film was formed on the silicon wafer substrate. A resist is applied and one 0.3 μm line and a tester terminal (T _a
And T _b ), the resist portion is exposed to light, then the exposed portion is removed, a pattern is formed in the lower insulating film by using a mixed gas of CF ₄ and CHF ₃ , and then O 2 is added.
The resist is removed by plasma and the width (W _C ) is 0.3μ
m, a wiring groove having a depth (D) of 0.6 μm and an aspect ratio D / W _C of 2 was formed. The by connecting a tester resistance (between T _a -T _b) value in both tester terminals was measured.

As a blank for measuring the resistance value, FIG.
The resistance value between R _c-1 and R _c-2 was measured and the conductivity was evaluated according to the following criteria. The resistance value between T _a and T _b is the resistance value between R _{c-1 and} R _c-2.
Less than 10/1: ○ The resistance value between T _a and T _b is the resistance value between R _{c-1 and} R _c-2.
Less than 100/3: △ The resistance value between T _a and T _b is the resistance value between R _{c-1 and} R _c-2.
100/3 or more: × (d) Circuit density When evaluating the flatness after application of the coating liquid for forming an integrated circuit,
It was observed by SEM. Dense deposition with no voids: ◎ Dense deposition with a few voids: ○ Sparse deposition with a few voids: △ Cavities are observed: × (e) Adhesion Similar to the above integrated circuit board (A) Then, a substrate (A) with an integrated circuit before forming a SiO ₂ film (insulating film) is prepared, a cellophane tape is adhered so as to cover the circuit surface, and then the circuit is observed when the cellophane tape is peeled off. The following criteria were evaluated.

[0069]           No change at all: ○           A slight rise from the flat surface is observed in a part of the circuit: △           Peeling from the wiring groove is observed in at least part of the circuit: ×

[0070]

Example 2 A wiring groove having a width (W _C ) of the wiring groove of 0.4 μm, a depth (D) of 1.6 μm and a ratio D / W _C of 4 is formed,
Example 1 except that the coating liquid for forming an integrated circuit (SC-2) was used
A substrate with integrated circuit (B) was obtained in the same manner as in. Regarding the obtained substrate (B) with an integrated circuit, in the same manner as in Example 1,
The flatness, the difficulty of polishing, the conductivity of the circuit, the adhesion, and the denseness of the deposited particles were examined. The results are shown in Table 3.

[0071]

Third Embodiment In the first embodiment, a thickness of 15 is formed by the sputtering method.
nm copper thin film layer was formed. Then, a substrate with an integrated circuit (C) was obtained in the same manner as in Example 1 except that the dispersion liquid for forming an integrated circuit (SC-3) was used. Obtained substrate with integrated circuit (C)
As to Example 1, the flatness, the difficulty of polishing, the circuit conductivity, the adhesion, and the denseness of the deposited particles were examined. The results are shown in Table 3.

[0072]

Example 4 A substrate with an integrated circuit (D) was obtained in the same manner as in Example 1 except that the coating solution for forming an integrated circuit (SB-1) was used. With respect to the obtained substrate (D) with an integrated circuit, the flatness, the degree of difficulty of polishing, the circuit continuity, the adhesion, and the denseness of the deposited particles were examined in the same manner as in Example 1.
The results are shown in Table 3.

[0073]

Example 5 A substrate with an integrated circuit (E) was obtained in the same manner as in Example 1 except that the coating solution for forming an integrated circuit (SB-2) was used. With respect to the obtained substrate with integrated circuit (E), the flatness, the difficulty of polishing, the circuit continuity, the adhesion, and the denseness of the deposited particles were examined in the same manner as in Example 1.
The results are shown in Table 3.

[0074]

Example 6 A substrate (F) with an integrated circuit was obtained in the same manner as in Example 1 except that the coating solution for forming an integrated circuit (SB-3) was used. With respect to the obtained substrate (F) with an integrated circuit, the flatness, the difficulty of polishing, the circuit continuity, the adhesion, and the denseness of the deposited particles were examined in the same manner as in Example 1.
The results are shown in Table 3.

[0075]

Example 7 A substrate (G) with an integrated circuit was obtained in the same manner as in Example 1 except that the coating solution for forming an integrated circuit (SD-1) was used. With respect to the obtained substrate (G) with an integrated circuit, the flatness, the degree of difficulty of polishing, the circuit continuity, the adhesion, and the denseness of the deposited particles were examined in the same manner as in Example 1.
The results are shown in Table 3.

[0076]

[Embodiment 8] In Embodiment 1, the silver thin film layer has a thickness of 5 n.
A substrate with integrated circuit (G) was obtained in the same manner except that m was used. Regarding the obtained substrate with integrated circuit (G), Example 1
Similar to, flatness, polishing difficulty, circuit continuity,
The adhesion and denseness of the deposited particles were investigated. The results are shown in Table 3.

[0077]

Example 9 In Example 1, the thickness of the silver thin film layer was set to 30.
A substrate with integrated circuit (H) was obtained in the same manner except that the thickness was set to nm. Regarding the obtained substrate with integrated circuit (H), Example 1
Similar to, flatness, polishing difficulty, circuit continuity,
The adhesion and denseness of the deposited particles were investigated. The results are shown in Table 3.

[0078]

Comparative Example 1 A substrate (I) with an integrated circuit was obtained in the same manner as in Example 1 except that the silver thin film layer was not provided. With respect to the obtained substrate (I) with an integrated circuit, the flatness, the difficulty of polishing, the circuit continuity, the adhesion and the denseness of the deposited particles were examined in the same manner as in Example 1. The results are shown in Table 3.

[0079]

Comparative Example 2 A substrate with integrated circuit (J) was obtained in the same manner as in Example 3 except that the copper thin film layer was not provided. With respect to the obtained substrate with integrated circuit (J), the flatness, the difficulty of polishing, the circuit continuity, the adhesiveness, and the denseness of the deposited particles were examined in the same manner as in Example 1. The results are shown in Table 3.

[0080]

[Comparative Example 3] In Comparative Example 1, the dispersion liquid for forming an integrated circuit (SC-1) was applied by a spinner method without irradiating ultrasonic waves, and then dried at 90 ° C for 5 minutes. A substrate with an integrated circuit (K) was obtained in the same manner as in Comparative Example 1 except that the coating and drying were repeated 20 times to deposit the metal fine particles (Q-1) in the wiring groove to form a circuit. In addition, the metal fine particles are thickly deposited on the insulating film after being applied 20 times, and the upper part of the insulating film is convex,
The upper part of the wiring groove had concave and convex unevenness.

With respect to the obtained substrate with integrated circuit (K),
The flatness, the difficulty of polishing, the conductivity of the circuit, the adhesion, and the denseness of the deposited particles were examined. The results are shown in Table 3.

[0082]

[Table 3]

[Brief description of drawings]

FIG. 1 is a schematic sectional view of a wiring grooved substrate used in the present invention.

FIG. 2 is a schematic diagram showing an outline of a flattening process.

FIG. 3 is a schematic sectional view of an embodiment of a substrate with integrated circuit according to the present invention.

FIG. 4 shows a schematic diagram of a pattern for evaluating conductivity.

FIG. 5 is a schematic sectional view of a semiconductor integrated circuit.

[Explanation of symbols]

1 ... Substrate 2 ... Insulating film 3 ... Wiring groove 11 ... Substrate 12 ... Insulating film 13 ... Conductive fine particle layer 14 ... Barrier metal layer 15 ... Metal thin film 21 ... Substrate 22 ... First insulating film 23 ... Wiring layer 24 ... Second insulating film 31 ... substrate 32 ... First insulating film 33 ... First wiring layer 34 ... Interlayer insulating film 35 ... Silica insulating film (planarizing film) 36 ... Second insulating film

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Toshiro Komatsu             No. 13-2 Kitaminato-cho, Wakamatsu-ku, Kitakyushu City, Fukuoka Prefecture             Medium Chemical Industry Co., Ltd. Wakamatsu Factory F-term (reference) 4M104 AA01 BB04 BB08 BB17 BB30                       BB32 BB36 CC01 DD08 DD15                       DD16 DD17 DD19 DD20 DD37                       DD43 DD51 DD52 DD53 DD75                       DD78 FF17 FF18 FF22 HH04                       HH12 HH14 HH16 HH20                 5F033 HH00 HH07 HH08 HH11 HH13                       HH14 HH15 HH16 HH18 HH19                       HH21 HH32 HH33 HH35 JJ00                       JJ07 JJ08 JJ11 JJ13 JJ14                       JJ15 JJ18 JJ19 JJ21 JJ32                       JJ33 JJ35 KK00 KK07 KK08                       KK11 KK13 KK14 KK15 KK18                       KK19 KK21 KK32 KK33 KK35                       MM01 MM12 MM13 NN06 NN07                       PP06 PP15 PP26 PP27 PP28                       PP33 QQ09 QQ11 QQ13 QQ14                       QQ37 QQ48 QQ73 RR01 RR03                       RR04 RR06 RR09 RR21 SS08                       SS11 SS15 SS21 WW00 WW01                       XX00 XX01 XX03 XX04 XX10                       XX13 XX14 XX28

Claims (6)

[Claims] 1. A method of manufacturing an integrated circuit, comprising the following steps (a) and (b). (A) A step of forming a metal thin film on the surface of the wiring groove formed on the substrate. (B) Next, a step of applying a coating solution for forming an integrated circuit containing a conductive fine particle forming component and / or conductive fine particles to the wiring groove formed with the metal thin film while irradiating with ultrasonic waves. 2. The method of manufacturing an integrated circuit according to claim 1, further comprising the step of: (c) applying the coating solution for forming an integrated circuit and then flattening the applied surface. 3. The conductive fine particles are Au, Ag, Pd, P
t, Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti, In, A
3. The method for manufacturing an integrated circuit according to claim 1, wherein the fine metal particles are metal fine particles containing at least one metal selected from the group consisting of l, Sb and W. 4. The conductive fine particle forming component is Au, Ag,
Pd, Pt, Rh, Ru, Cu, Fe, Ni, Co, Sn, Ti,
4. The method for manufacturing an integrated circuit according to claim 1, further comprising ions of at least one metal selected from the group consisting of In, Al, Sb and W. 5. The depth (D) of the wiring groove is 0.05 to 10
In the range of μm, the width (WC) of the wiring groove is 0.05 to 1
It is in the range of 00 μm, and the ratio (D / WC) of the depth (D) of the wiring groove and the width (WC) of the wiring groove is in the range of 0.1 to 20. A method for manufacturing an integrated circuit according to any one of 1. 6. An integrated circuit formed on a substrate, comprising:
5. A substrate with an integrated circuit, which is an integrated circuit formed by the method according to any one of 5 above.