JP2003264528A - Signal detecting device, mode detecting device, receiver mounted with the mode detecting device, signal detection method and mode detection method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To automatically detect the mode of an OFDM (orthogonal frequency division multiplexing) signal, guard interval length, effective symbol length or the like. <P>SOLUTION: A symbol synchronizing part 16 consists of: a first detector 40<SB>1</SB>, a second detector 40<SB>2</SB>and a third detector 40<SB>3</SB>for detecting a received OFDM signal x(n); a logical AND element 41 for performing an AND operation of detected signals v<SB>1</SB>(n), v<SB>2</SB>(n) and v<SB>3</SB>(n) outputted from the detectors 40<SB>1</SB>to 40<SB>3</SB>and outputting a logic signal AV; and a determination circuit 42 for generating and outputting a synchronous timing signal T<SB>0</SB>by using the logic signal AV. The symbol synchronizing part 16 has a function for detecting the mode of the received OFDM signal x(n) out of three kinds of modes (mode 1, mode 2 and mode 3) and detecting the start point of each symbol, guard interval length, effective symbol length or the like. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus and method for detecting a modulation signal by a frequency division multiplexing (FDM) system, and more particularly, it detects an OFDM modulation signal modulated by an orthogonal frequency multiplexing (OFDM) system. Apparatus and method.

[0002]

2. Description of the Related Art As a modulation method for terrestrial digital broadcasting,
OFD for individually modulating, multiplexing, and transmitting hundreds to thousands of subcarriers (subcarriers) that are orthogonal to each other
M (Orthogonal Frequency Div.
ision Multiplexing) method is adopted in Japan and Europe. This OFDM system has the advantages that the frequency utilization efficiency is very high and the frequency selective fading is strong because the narrow band subcarriers overlap each other on the transmission spectrum. Such an OFDM system is applied to not only terrestrial digital broadcasting but also the field of wire communication using telephone lines and power lines, satellite broadcasting and wireless LAN (Local Area).
It has been adopted in the field of wireless communication such as Network).
For example, in the field of wireless LAN, 5 GHz band wireless LAN
The OFDM modulation / demodulation method is adopted in (IEEE802.11a standard).

Further, the OFDM system has a long symbol period (symbol length) and has a guard interval at the beginning of each symbol, and therefore has an advantage of being resistant to multipath fading. FIG. 18 is a schematic diagram showing the structure of a time domain OFDM signal. One symbol of the OFDM signal is composed of an effective symbol including data and a control signal, and a guard interval which is a copy of the end portion of this effective symbol. The delay time of the radio wave due to multipath (multiple paths) on the transmission path is the guard interval length T
Within g, inter-symbol interference (ISI; Inter Symb)
It is possible to extract the complete data for one symbol without ol Interference) and restore the original data on the transmission side. In other words, when two or more radio waves having different propagation times are received, the effect of multipath can be ignored if the propagation time difference between the radio waves is equal to or less than the guard interval length Tg.

In the Japanese OFDM system, an approximately 6 MHz band is divided into 14 segments, and 13 segments among them constitute an OFDM modulated signal, and a plurality of OFDM modulated signal formats are used. The mode is specified. According to the "Digital Broadcasting System Committee Report" (published by the Japan Telecommunications Technology Council),
1 in mode 1, mode 2 and mode 3, respectively
Number of subcarriers included in symbol is 1405, 280
9 and 5617.

The guard interval length Tg is common to all modes and is 1/4 or 1 / the effective symbol length Tu.
It is set to any of 8, 1/16 and 1/32. Also,
The effective symbol length Tu of each mode is about 252 μsec (mode 1), about 504 μsec (mode 2) and 1.008 m.
Seconds (mode 3). One frame is composed of 204 symbols in common in all modes, and modulation / demodulation processing of the OFDM system is performed in frame units.

Further, the OFDM modulation is performed by inverse Fourier transform, and the demodulation is performed by Fourier transform. The Japanese standard also defines the number of samples used in the inverse Fourier transform on the modulation side and the Fourier transform on the demodulation side (hereinafter referred to as the FFT sample number). The number of FFT samples is 2
There are 048 (mode 1), 4096 (mode 2) and 8192 (mode 3).

It is up to each broadcaster to decide which of the above three modes is used and which guard interval length Tg is selected. Therefore, it is assumed that different modes are used depending on the broadcaster and the broadcast area, and the receiving device needs to have a function of automatically detecting the mode of the received signal. Guard interval length Tg
As for the above-mentioned four types of periods (Tu / 4, Tu /
(8, Tu / 16, Tu / 32) may change depending on the broadcasting company and the broadcasting area, and therefore an automatic detection function of the guard interval length Tg is required. If the mode of the received signal and the guard interval length Tg remain unknown, the start point of each symbol cannot be known and the received signal cannot be accurately demodulated.

[0008]

SUMMARY OF THE INVENTION In view of the above circumstances, an object of the present invention is to provide a signal detection device, a mode detection device, etc. capable of automatically detecting the mode, guard interval length, etc. of an OFDM signal. It is in.

[0009]

In order to solve the above problems, the invention according to claim 1 is configured by multiplexing a plurality of subcarriers (subcarriers), and a copy of the end portion of each symbol A signal detecting device for detecting an FDM (Frequency Division Multiplexing) signal included in a head portion
A delay device that takes in the FDM signal and outputs a delayed signal that is delayed from the FDM signal for a predetermined period, a multiplier that multiplies the FDM signal and the delayed signal, and outputs the delayed signal, and a signal that is output from the multiplier. And a polarity detection unit that detects one of positive and negative polarities.

The invention according to claim 2 is the signal detecting device according to claim 1, wherein the complex signal output from the multiplier is separated into an imaginary part and a real part, and the imaginary part and the real part are separated. The multiplier further includes a separator that outputs one of the signals to the polarity detection unit, and the multiplier multiplies one signal of the FDM signal and the delayed signal by a complex conjugate of the other signal to obtain the signal. The signal is output to the separator, and the polarity detection unit detects either the positive polarity or the negative polarity of the signal output from the separator.

The invention according to claim 3 is the invention according to claim 1 or 2.
In the signal detection device described above, the polarity detection unit further includes a rectifier that half-wave rectifies the input signal and outputs a signal having a positive polarity.

The invention according to claim 4 is the signal detecting device according to claim 3, wherein the polarity detecting section further comprises a low-pass filter for extracting a low-frequency signal from the signal output from the rectifier. To be done.

According to a fifth aspect of the present invention, in the signal detecting apparatus according to the fourth aspect, the polarity detecting section further includes a signal discriminator that binarizes the low frequency signal output from the low pass filter. It is equipped with.

The invention according to claim 6 is the invention according to claim 1 or 2.
In the signal detection device described above, the polarity detection unit further includes a rectifier that half-wave rectifies an input signal and outputs a signal having a negative polarity.

The invention according to claim 7 is the signal detecting device according to claim 6, wherein the polarity detecting section outputs an inverted signal obtained by inverting the polarity of the signal output from the rectifier. It further comprises an inverter and a low-pass filter for extracting a low-frequency signal from the inverted signal.

The invention according to claim 8 is the signal detecting device according to claim 7, wherein the polarity detecting section further comprises a signal discriminator for binarizing the low-frequency signal output from the low-pass filter. It is equipped with.

The invention according to claim 9 is the invention according to claim 4 or 5.
The polarity detection unit according to claim 7 or 8 is mounted together, the signal output from the polarity detection unit according to claim 4 or 5, and the polarity detection unit according to claim 7 or 8. It further comprises a logical product operator for performing a logical product operation with the output signal.

The invention according to a tenth aspect is the signal detecting apparatus according to any one of the first to ninth aspects, wherein the FDM
OFDM (Orthogonal Frequency Division Multiplexing) configured by multiplexing multiple subcarriers that are orthogonal to each other
It is a signal.

Next, the invention according to claim 11 is constituted by multiplexing a plurality of subcarriers (subcarriers), and has an FDM (frequency division multiplexing) having a copy of the end portion of each symbol at the head portion of the symbol. ) A signal detecting method for detecting a signal, comprising: (a) taking in the FDM signal and outputting a delayed signal delayed from the FDM signal by a predetermined period; and (b) multiplying the FDM signal by the delayed signal. And a step (c) of detecting the positive or negative polarity of the signal output in the step (b).

The invention according to claim 12 is the signal detecting method according to claim 11, wherein (d) the complex signal output in the step (b) is separated into an imaginary part and a real part, and the imaginary number is separated. And outputting a signal of any one of the real part and the real part, wherein the step (b) multiplies one of the FDM signal and the delayed signal by a complex conjugate of the other signal. And outputting the complex signal by
The step (c) includes a step of detecting either positive or negative polarity of the signal output in the step (d).

The invention according to claim 13 is the signal detecting method according to claim 11 or 12, wherein the step (c) is performed.
Further comprises (c-1) a step of half-wave rectifying the signal output in the step (b) or the step (d) to output a signal having a positive polarity.

The invention according to claim 14 is the signal detecting method according to claim 13, wherein the step (c) includes (c-
2) The step of extracting a low frequency signal from the signal output in the step (c-1) is further provided.

The invention according to claim 15 is the signal detecting method according to claim 14, wherein the step (c) includes (c-
3) The low frequency signal output in the step (c-2) is set to 2
The method further comprises a step of valuing.

The invention according to claim 16 is the signal detecting method according to claim 11 or 12, wherein the step (c) is performed.
Further comprises (c-4) a step of half-wave rectifying the signal output in the step (b) or the step (d) to output a signal having a negative polarity.

The invention according to claim 17 is the signal detecting method according to claim 16, wherein the step (c) includes (c-
5) outputting an inversion signal obtained by inverting the polarity of the signal output in the step (c-4), and (c-6) using the inversion signal output in the step (c-5). And a step of extracting a low frequency signal.

An invention according to claim 18 is the signal detecting method according to claim 17, wherein the step (c) includes (c-
7) The low frequency signal output in the step (c-6) is set to 2
The method further comprises a step of valuing.

The invention according to claim 19 comprises both the step (c) according to claim 14 or 15 and the step (c) according to claim 17 or 18, wherein the step (c) comprises
(C-8) The step (c-2) or the step (c-
It further comprises a step of performing a logical product operation of the signal output in 3) and the signal output in the step (c-6) or the step (c-7).

The invention according to claim 20 is the invention according to claims 11 to 1.
9. The signal detection method according to any one of 9,
The DM signal is an OFDM (Orthogonal Frequency Division Multiplexing) signal that is configured by multiplexing a plurality of subcarriers that are orthogonal to each other.

Next, the invention according to claim 21 is constituted by multiplexing a plurality of subcarriers (subcarriers), and has an FDM (frequency division multiplexing) having a copy of the end portion of each symbol at the head portion of the symbol. ) A mode detection device for detecting a specific mode of a signal, comprising a plurality of the signal detection devices according to any one of claims 1 to 10, wherein each of the plurality of signal detection devices includes a delay device. FM for each
The predetermined period for delaying the D signal is set to be different from each other.

Next, the invention according to claim 22 is configured by multiplexing a plurality of subcarriers (subcarriers), and has an FDM (frequency division multiplexing) having a copy of the end portion of each symbol at the head portion of the symbol. ) A mode detection method for detecting the mode of a signal, comprising a plurality of sets of steps (a) to (d) of the signal detection method according to any one of claims 11 to 20, and In the step (a), the FM
The predetermined period for delaying the D signal is set to be different from each other.

The invention according to claim 23 is configured by multiplexing a plurality of subcarriers (subcarriers) and has a copy of the end portion of each symbol at the head portion of the symbol.
A receiving device for demodulating a DM (Frequency Division Multiplexing) signal, characterized in that the mode detecting device according to claim 21 is mounted.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION Before describing the configuration of an OFDM receiver according to the present invention, an outline of modulation processing in an OFDM transmitter (not shown) will be described below. OFD
The input data to the M transmitter is mapped to complex data symbols, and then sequentially processed by a serial-parallel conversion circuit, an inverse fast Fourier transform circuit (IFFT circuit), a parallel-serial conversion circuit, etc. to be converted into an OFDM signal. It Here, the guard interval described above is added to the beginning of each symbol of the OFDM signal.

The complex data symbol input to the IFFT circuit is data for modulating a subcarrier,
It is a numerical sequence consisting of an I component (real part) and a Q component (imaginary part). The modulation method for each subcarrier is PSK (Phas
e-Shift Keying; Phase modulation, DPSK (Differential)
PSK: Differential Phase Modulation, Multilevel QAM (Multilevel QuadratureA)
M; multi-level quadrature amplitude modulation) or the like is adopted.

The real number sequence and the imaginary number sequence of the OFDM signal (baseband signal) are subjected to orthogonal transformation to OFD.
It is converted into an M-modulated signal. Further, the OFDM modulated signal undergoes D / A conversion and is passed through a low pass filter to obtain R
After being frequency-converted into an F (Radio Frequency) signal, the signal is transmitted to the transmission path.

OFDM receiver. Next, an OFDM receiver for receiving the RF signal will be described. Figure 1
FIG. 3 is a functional block diagram showing a schematic configuration of an OFDM receiver 1 according to an embodiment of the present invention.

The RF signal 10 propagated through the transmission line is
The signal is received by the receiving antenna 11 of the FDM receiver 1 and output to the front end unit 12. The front end unit 12 receives the input RF signal 10 from the IF (Intermediate F).
The frequency is converted to a requency) signal, converted into an analog baseband signal of about 6 MHz band, and output to the A / D converter 13. The A / D converter 13 converts the baseband signal into a digital baseband signal (received OFDM signal) at a predetermined sampling rate, and then outputs the digital baseband signal to the mixer 14.

The baseband signal output from the A / D converter 13 is frequency-synchronized by the mixer 14, is A / D-converted by the resampler 15, and is then serial-parallel converter 17. It is converted from a serial signal to a parallel signal, and then output to the FFT calculator 18.

The FFT calculator 18 applies a fast Fourier transform to the N-point (N: FFT sample number) time-domain received OFDM signal x (n) (n: integer) input from the serial-parallel converter 17. Therefore, OFDM at N points in the frequency domain
A demodulated signal is generated and output to the frame synchronization unit 22, the second frequency error detector 20 and the A / D conversion error detector 21. The first frequency error detector 19 and the second frequency error detector 20 both have a shift amount (error) in the frequency direction of the received signal.
Is a circuit for detecting. The first frequency error detector 19 is
Reception OFDM transmitted in parallel from the serial-parallel converter 17
It has a function of detecting a narrow band frequency error using a signal and outputting a signal Δf ₁ for optimizing the error, and the second frequency error detector 20 uses a signal transmitted from the FFT calculator 18 It has a function of detecting a frequency error and outputting a signal Δf ₂ for optimizing it. The mixer 14
Detection signals Δf ₁ , Δ input from these circuits 19 and 20
and it corrects the frequency error of the wideband and narrowband using f _2.

Further, the symbol synchronizing section (mode detecting device)
16 takes in the received OFDM signal x (n) transmitted from the resampler 15 and detects the mode of the received OFDM signal x (n) from the above-mentioned three types of modes (mode 1, mode 2, mode 3). , Has a function of detecting the start point of each symbol, the guard interval length, the effective symbol length, and the like. Further, the symbol synchronization unit 16 is configured so that the serial-parallel converter 17 can extract and supply the data at N points in each symbol to the FFT calculator 18 at accurate timing.
The synchronization timing signal T ₀ is generated based on the detection result and is supplied to the serial-parallel converter 17.

Further, in the A / D converter 13, an A / D conversion error mainly caused by a sampling rate error occurs. Therefore, the A / D conversion error detector 21
A signal δ for detecting the A / D conversion error using the frequency domain signal input from the FT calculator 18 and optimizing it.
Is output to the resampler 15. The resampler 15 executes a synchronization process of adjusting the signal rate so as to correct the A / D conversion error.

Next, the frame synchronization unit 22 synchronizes the OFDM demodulated signal input from the FFT calculator 18 on a frame-by-frame basis and outputs it to the equalizer 23. The equalizer 23 performs equalization processing on the input OFDM demodulated signal. When multipath interference occurs in the transmission path, the amplitude and phase of the OFDM signal are distorted in subcarrier units, so the equalizer 23
Is to perform equalization processing for correcting the amplitude and phase distortion of a reference signal (pilot signal) embedded in an OFDM signal in a known signal arrangement.

The OFDM demodulated signal output from the equalizer 23 is converted from a parallel signal to a serial signal by the parallel / serial converter 24. Then, the channel decoder 25
Performs carrier demodulation and demapping on the serial signal output from the parallel-serial converter 24, and then performs processing such as deinterleaving, Viterbi decoding, and Reed-Solomon decoding before outputting.

Principle of signal detection processing. Next, the principle of the signal detection processing according to the present invention will be described. In the present embodiment, the signal detection processing for the received OFDM signal x (n) is performed by symbol synchronization section 16 shown in FIG.

FIG. 2 shows the serial received OFDM signal x
It is a schematic diagram which shows (n). In FIG. 2, reference numerals GI ₁ and G
I ₂ , GI ₃ are guard intervals, codes ES ₁ , ES ₂ ,
ES ₃ represents an effective symbol. The guard intervals GI ₁ , GI ₂ and GI ₃ are copies of the end portions O ₁ , O ₂ and O ₃ of the effective symbols ES ₁ , ES ₂ and ES ₃ , respectively. Further, in FIG. 2, Ts represents the guard interval length, and T _N represents the effective symbol length.

In FIG. 2, a delayed signal x (n−N) obtained by delaying the received OFDM signal x (n) by the effective symbol length T _N.
Are also shown. Here, N represents the number of points of the received OFDM signal corresponding to the effective symbol length T _N.

In the signal detection processing according to the present invention, the reception
Conjugation of OFDM signal x (n) and delayed signal x (n-N)
Product signal x (n) × x^*(N−N) (= y (n)) is calculated
To be done. As shown in FIG. 2, the received OFD in the same symbol
End portion O of M signal x (n) ₁, O₂Or O₃Period of
And the guard interval G of the delay signal x (n−N)
I₁, GI₂Or GI₃And the period of
I understand. Therefore, fading and ho
Distortion caused by disturbance such as white noise is received by OFDM.
In the ideal state where the signal x (n) does not act, both signals x
(N), x (n-N) guard interval and tail part
The conjugate product signal y (n) is always positive during the period when
It outputs a real number sequence signal with polarity (plus sign).

FIG. 3 and FIG. 4 exemplify the signal waveform of the conjugate product signal y (n) in the ideal state. 3 is a signal waveform of the real part Re (y) of the conjugate product signal y (n), and FIG.
The signal waveform of the imaginary part Im (y) of the conjugate product signal y (n) is shown. 3 and 4, the symbol Ns represents the number of points corresponding to the guard interval length Ts, and the symbol N represents the number of points corresponding to the effective symbol length T _N.

As shown in FIG. 3, both signals x (n) and x (n
The period 30, 31, ... In which the guard interval of −N) coincides with the end portion is the real part Re of the conjugate product signal y (n).
(Y) always shows a positive value, and it is understood that it is distributed like white noise in the other periods. On the other hand, as shown in FIG. 4, both signals x (n) and x (n-
The period 30, 31, ... In which the guard interval of (N) and the end portion are the same are imaginary parts Im of the conjugate product signal y (n).
(Y) always shows a zero value.

As described above, the distortion caused by the disturbance is the reception OFD.
In the description when it is not included in the M signal x (n),
When such a disturbance is included in the received OFDM signal x (n), the amplitude and phase of the received OFDM signal x (n) will be distorted. Delay signal x (n-N) in such a case
Is expressed by the following equation (1).

[0050]

[Equation 1]

In the above equation (1), j ² = -1, and α and ε are real numbers. Note that α and ε can be regarded as substantially constant values within one symbol. During a period in which the guard interval of both signals x (n) and x (n−N) coincides with the tail portion, the conjugate product signal y (n) of both signals x (n) and x (n−N) is It becomes like (2).

[0052]

[Equation 2]

As can be seen from the equation (2), focusing on the fact that α (> 0) and ε take a substantially constant value within one symbol, the polarity of the real part of the first term on the right side of the equation (2) ( The sign) and the polarity (sign) of the imaginary part in its second term are invariant. Whether the polarities of these real and imaginary parts are negative or positive,
It can be seen that it is determined by the magnitude of the phase shift ε. Therefore, since the period in which the polarity of the conjugate product signal y (n) is constant appears periodically, the start point of each symbol, the guard interval length Ts, and the effective symbol length T _N are detected by detecting the period. Is possible.

FIGS. 5 and 6 are diagrams illustrating the signal waveform of the conjugate product signal y (n) when there is an influence of disturbance. 5 is a signal waveform of the real part Re (y) of the conjugate product signal y (n), and FIG. 6 is an imaginary part Im of the conjugate product signal y (n).
The signal waveform of (y) is shown. As shown in FIG.
In the periods 32, 33, ... In which the guard intervals of both signals x (n) and x (n−N) coincide with the tail part, the real part Re (y) always shows a positive value, and other than that. It is distributed like white noise during the period. here,
In the matching periods 32, 33, ..., The above equation (2)
Cos (2πε) in the first term on the right side of is negative. On the other hand,
As shown in FIG. 6, periods 32 and 3 in which the guard intervals of both signals x (n) and x (n−N) coincide with the tail portion.
3, the imaginary part Im (y) always shows a negative value. Here, sin (2πε) in the second term on the right side of the above equation (2) is positive in the matching periods 32, 33, ....

As described above, the received OFDM signal x
A plurality of types of modes can be considered for the format of (n). Therefore, in order to detect the mode of the received OFDM signal x (n), the delay period T _N may be associated with the mode. That is, the number of points corresponding to the delay period T _N is set to the FF corresponding to the mode of the received OFDM signal x (n).
When the number of T samples is the same, the conjugate product signal y (n)
Since the period in which the polarity of is constant appears periodically, the mode can be detected. The delay period T _N
If the number of points corresponding to the signal does not correspond to the mode, the guard interval of both signals x (n) and x (n−N) and the tail portion are completely deviated on the time axis, and thus the conjugate product signal y No periodicity with respect to polarity appears in (n).

Symbol synchronizer (mode detector). Next, the symbol synchronization unit (mode detection device) according to the embodiment of the present invention will be described. FIG. 7 is a block diagram showing a schematic configuration of the symbol synchronization unit 16. The symbol synchronization unit 16 includes a first detector 40 ₁ , a second detector 40 _2, and a third detector 40 that detect the received OFDM signal x (n) input from the resampler 15 shown in FIG.
₃ , a logical AND element 41 for performing a logical product operation of the detection signals v ₁ (n), v ₂ (n), v ₃ (n) output from these signal detectors 40 ₁ to 40 ₃ , and this logical AND element The synchronization timing signal T ₀ is generated by using the logic signal AV output from 41, and the synchronization timing signal T ₀ is generated by the serial-parallel converter 17 shown in FIG.
And a determination circuit 42 for supplying the

In the present embodiment, the first detector 40₁, First
2 detector 40₂And the third detector 40 ₃Are respectively
Mode 1, mode 2 and mode 3
Number of FFT samples N₁, N₂, N₃Hold the data of
I shall.

FIG. 8 shows a schematic configuration of the signal detector 40 _k (k is one of 1 to 3), and its function will be described below.
This signal detector 40 _k receives the input received OFDM signal x
A delay unit 43 that outputs a delay signal x (n−N) delayed by N points from (n), and a complex conjugate unit 44 that outputs a complex conjugate x ^* (n−N) of the delay signal x (n−N). And are equipped with. The number of delay points N is set to the number of FFT samples N ₁ , N ₂ or N ₃ corresponding to any of mode 1, mode 2 and mode 3.

Further, the complex multiplier 45 receives the received OFDM signal x (n) and the signal x ^* output from the complex conjugate unit 44 ^.
Conjugate product signal x (n) × x ^* obtained by multiplying with (n−N)
It outputs (n−N) (= y (n)) to the separation unit 46. Further, the separating unit 46 separates the conjugate product signal y (n) input from the complex multiplier 45 into a real number part and an imaginary number part, and outputs one of these signal sequences to the polarity detecting unit 55. It is a thing. In the present embodiment, the separation unit 46 outputs the real part signal r ₀ (n) of the conjugate product signal y (n), but in the present invention, the imaginary part signal thereof may be output. .

As described above, when the number N of delay points set by the delay unit 43 corresponds to the effective symbol length of the received OFDM signal x (n), the signal r ₀ (output from the separating unit 46 n) has a waveform as shown in FIG.
As shown in FIG. 9, a period 34 ₁ in which the guard interval of both signals x (n), x (n−N) and the end portion match,
In 34 ₂ , 34 ₃ , ..., The signal r ₀ (n) of the real part always takes a negative value. Here, those periods 34 ₁ , 34 ₂ , 34
₃ , cos (2 in the first term on the right side of the above equation (2) in
πε) is negative.

The polarity detecting section 55 detects the positive or negative polarity (sign) of the signal r ₀ (n) input from the separating section 46, and detects the detected signal v _k (n).
Has the function of outputting. Specifically, the polarity detection unit 55
Is a first diode 47 that half-wave rectifies the input signal r ₀ (n) only when the input voltage is positive and outputs a signal z ₀ (n) having only positive polarity, and the signal z ₀ (n). a first low-pass filter 48 for extracting a low frequency signal z ₁ (n), the first signal discrimination circuit 49 for outputting the low-frequency signal z ₁ (n) obtained by binarizing the binary signal z ₂ (n) , Are provided.

The first diode 47 half-wave rectifies the input signal r ₀ (n) transmitted from the separating section 46 and outputs a signal z ₀ (n) consisting of a positive numerical sequence. Figure 10
It is a diagram showing a waveform of a half-wave rectified signal z ₀ (n).
In the above periods 34 ₁ , 34 ₂ , 34 ₃ , ..., The signal level is substantially zero.

Next, the first low-pass filter 48 operates as shown in FIG.
The signal r ₀ (n) shown in ₀ is smoothed to remove high frequency components,
A low-frequency signal z showing a rough envelope of the signal r ₀ (n)
Outputs ₁ (n). FIG. 11 shows the low frequency signal z ₁ (n)
It is a figure which shows the waveform of.

Next, the first signal discriminating circuit 49 converts the level of the input signal z ₁ (n) equal to or higher than the preset threshold value to "1", and the input signal z ₁ (n) below the threshold value is converted. A binarization operation of converting the level to zero is performed, and as a result, a binary signal z ₂ (n) is output. FIG. 12 is a diagram showing a pulse waveform of the binary signal z ₂ (n). In FIG. 12, the length Ns corresponds to the guard interval length of the received OFDM signal x (n), and the length N is the received OFDM signal x.
This corresponds to the effective symbol length of (n). Also, part 2
The first falling time 36 of the pulse of the value signal z ₂ (n)
Indicates the start point of the symbol of the delayed signal x (n−N).

Further, the polarity detecting section 55 further rectifies the input signal r ₀ (n) by half-wave only when the input voltage is negative and outputs a signal w ₀ (n) having only negative polarity. a diode 50, the signal w ₀ polarity (n) inverts the signal inversion circuit 51 which outputs an inverted signal w ₁ (n), its inverted signal w ₁ (n) from the low frequency signal w ₂ (n) Second to extract
The low-pass filter 52 and its low-frequency signal w ₂ (n) are set to 2
A second signal identifying circuit 53 that outputs a binarized binary signal w ₃ (n).

The second diode 50 half-wave rectifies the input signal r ₀ (n) transmitted from the separating section 46 and outputs a signal w ₀ (n) consisting of a negative numerical value sequence. Figure 13
It is a diagram showing a waveform of a half-wave rectified signal w ₀ (n).
FIG. 13 shows a signal waveform such as white noise in all periods. Next, the signal inversion circuit 51
In the signal w ₀ (n) is inverted to a positive numeric column, signals w ₁ having a signal waveform as shown in FIG. 14 (n)
Will be output.

Next, the second low pass filter 52
Except for the signal w ₁ (n) the smoothed high-frequency component inputted from the signal inversion circuit 51, and outputs a low frequency signal w ₂ (n) indicating the envelope of outline of the signal w ₁ (n). FIG. 15 is a diagram showing a waveform of the low frequency signal w ₂ (n).

The second signal identification circuit 53 also converts the level of the input signal w ₂ (n) above a preset threshold into "1", and the level of the input signal w ₂ (n) below the threshold. The "
A binary operation of converting into 0 (zero) "is performed, and as a result, a binary signal w ₃ (n) is output.
Its is a diagram showing a waveform of the binary signal w ₃ (n). FIG.
In, the signal level is maintained at "1" over the entire period.

Then, the logical AND element 54 outputs the first signal
Signal z output from discrimination circuit 49 ₂(N) (Fig. 12)
And the signal w output from the second signal identification circuit 53
₃(N) (FIG. 16) is ANDed and the result is obtained.
Signal v_k(N) is output. FIG. 17 shows the signal v
_kIt is a figure which shows the waveform of (n). In the present embodiment,
Output signal w of the two-signal identification circuit 53₃(N) is always "
Since it is maintained at a high level of 1 ", the first signal identification circuit 4
9 output signal z₂(N) is the output of the logical AND element 54
Signal v_kSame as (n).

As described above, the polarity detecting section 55 includes the polarity detecting unit including the first diode 47, the first low pass filter 48 and the first signal identifying circuit 49, the second diode 50, the signal inverting circuit 51 and the second low pass filter. 52
Also, since the polarity detection unit including the second signal identification circuit 53 is mounted, the input signal r ₀ (n can be obtained by either one of the polarity detection units regardless of the magnitude of the phase ε in the above equation (2). It is possible to reliably detect the polarity of).

Next, in the symbol synchronization unit 16 shown in FIG. 7, the first to third detectors 40 ₁ to 40 ₃ have the same circuit configuration as the signal detector 40 _k described above. The difference between them is that the FFTs set by the signal detectors 40 ₁ to 40 ₃ according to mode 1, mode 2 and mode 3 are different.
Only the values of the sample numbers N _{1 to} N ₃ are available. In addition, these FFT
The sample numbers N _{1 to} N ₃ correspond to the effective symbol length of the OFDM signal. Therefore, when the received OFDM signal x (n) is modulated according to the mode k (k is 1, 2, or 3), the kth detector 40 _k detects the delayed signal x (n−
The pulse signal v _k (n) as shown in FIG. 12 including the information of the symbol start point of N), the guard interval length, and the effective symbol length is output. Other m-th detector 40 _m (m
Is a value other than k), a high level signal as shown in FIG. 16 is output.

Further, the logical AND element 41 shown in FIG.
A logical signal AV obtained by performing an AND operation on _three detection signals v ₁ (n), v ₂ (n), v ₃ (n) input from the _first to _third detectors 40 ₁ to 40 ₃ is determined. Output to the circuit 42. The logic signal AV remains the pulse signal detected by any of the _first to _third detectors 40 ₁ to 40 ₃ . Therefore, the determination circuit 42 compares the information of the guard interval length and the effective symbol length included in the logic signal AV with the respective information of the mode 1, the mode 2 and the mode 3 which is held in advance, and then both of them are compared. It is determined whether or not they match with each other with a predetermined accuracy, and if they match, the mode of the received OFDM signal x (n) is determined. Then, the determination circuit 42
Generates a synchronization timing signal T ₀ using the guard interval length and effective symbol length of the determined mode and the information of the symbol start point included in the logical signal AV,
This is supplied to the serial-parallel converter 17 shown in FIG.

Even if a disturbance such as fading, Doppler shift, or white noise in the transmission path distorts the amplitude and the phase of the OFDM signal, the symbol synchronization unit 16 can receive the received signal regardless of the disturbance. It is possible to perform the synchronization processing for detecting the symbol start point and the mode.

The symbol synchronization section 16 according to the above embodiments is applied to an OFDM signal receiving apparatus, but the present invention is not limited to this, and is not necessarily in a mutually orthogonal relationship. It may be applied to an FDM (Frequency Division Multiplexing) signal receiving apparatus configured by multiplexing a plurality of subcarriers. Compared to an FDM signal in which subcarriers are not orthogonal to each other, an OFDM signal has an advantage that a frequency band can be effectively used without providing a guard band between subcarriers in the frequency domain. There is.

[0075]

As described above, according to the signal detecting device and the signal detecting method according to claim 1 of the present invention, in the delay device and the step (a), the FDM is used.
By setting the predetermined period for delaying the signal to the length of the effective symbol excluding the head portion (guard interval) from the symbol, the tail portion of each symbol in the FDM signal and the tail portion of the delayed signal are set. It is possible to match the timing with the beginning portion that is a copy. When a disturbance such as fading or white noise does not distort the FDM signal in the transmission path, the multiplier always operates during a period in which the leading portion of the FDM signal and the trailing portion of the delayed signal in the same symbol substantially match each other. , And outputs a signal having either positive or negative polarity (step (b)). That is, since the multiplier periodically outputs a signal having either polarity, the polarity detection unit detects the polarity of the signal (step (c)).
It is possible to obtain the starting point of each symbol, the length of the leading portion, the effective symbol length, and the like.

According to the second and the twelfth aspects, even when disturbances such as fading, frequency error, and white noise in the transmission line distort the amplitude and phase of the FDM signal, the separator and the step (d). 2), the complex signal output in the multiplier and the step (b) can be separated into a real number part and an imaginary number part, and either one of them can be supplied to the polarity detection part. Therefore, the starting point of each symbol can be detected regardless of the disturbance.

According to claims 3 and 6 and claims 13 and 16, since the rectifier half-wave rectifies the signal output from the multiplier (steps (c-1) and (c-4)), It is possible to easily detect the polarity of the signal.

According to claims 4 and 7 and claims 14 and 17, the signal output from the rectifier is smoothed (steps (c-2), (c-5), (c-6)). ), The noise included in the high frequency component is removed, and the envelope of the signal can be extracted. Therefore, the polarity of the signal output from the multiplier can be reliably detected.

According to claims 5 and 8 and claims 15 and 18, in order to generate a binary signal having a value corresponding to the polarity of the signal output from the multiplier (steps (c-3), ( c
-7)), the polarity can be detected more reliably.

According to the ninth and the nineteenth aspects, when the disturbance such as the fading distorts the amplitude or phase of the FDM signal, the polarity can be reliably detected regardless of the magnitude of the phase. You can

According to the tenth and twentieth aspects, the signal detecting apparatus and the signal detecting method according to the present invention can be applied to the OFDM system in which the frequency band can be effectively used.

According to the mode detecting device of the twenty-first aspect, the mode detecting method of the twenty-second aspect, and the receiving device of the twenty-third aspect, in the delay device of each of the signal detecting devices or the step (a) of each of the groups. , Respectively, by setting the delay period corresponding to the mode that the FDM signal can take,
It is possible to detect the mode of the received FDM signal with any signal detection device or set. That is, if the delay period does not overlap with the effective symbol length of the FDM signal,
In the multiplier or step (b), a periodic signal having one polarity is not output, and when the delay period is substantially equal to the effective symbol length of the FDM signal, the signal having one polarity is periodic. Is output to. Therefore, the mode of the received FDM signal can be detected based on the signal width and period.

[Brief description of drawings]

FIG. 1 is a functional block diagram showing a schematic configuration of an OFDM receiving apparatus according to an embodiment of the present invention.

FIG. 2 is a schematic diagram showing a received OFDM signal and a delayed signal.

FIG. 3 is a diagram illustrating a signal waveform of a conjugate product signal of a received OFDM signal and a delayed signal.

FIG. 4 is a diagram exemplifying a signal waveform of a conjugate product signal of a received OFDM signal and a delay signal.

FIG. 5 is a diagram illustrating a signal waveform of a conjugate product signal of a received OFDM signal and a delayed signal.

FIG. 6 is a diagram illustrating a signal waveform of a conjugate product signal of a received OFDM signal and a delayed signal.

FIG. 7 is a block diagram showing a schematic configuration of a symbol synchronization unit (mode detection device) according to the embodiment of the present invention.

FIG. 8 is a diagram showing a schematic configuration of a signal detector according to an embodiment of the present invention.

FIG. 9 is a diagram showing a signal waveform in a signal detector.

FIG. 10 is a diagram showing a signal waveform in a signal detector.

FIG. 11 is a diagram showing a signal waveform in a signal detector.

FIG. 12 is a diagram showing a signal waveform in a signal detector.

FIG. 13 is a diagram showing a signal waveform in a signal detector.

FIG. 14 is a diagram showing a signal waveform in a signal detector.

FIG. 15 is a diagram showing a signal waveform in a signal detector.

FIG. 16 is a diagram showing a signal waveform in a signal detector.

FIG. 17 is a diagram showing a signal waveform in a signal detector.

FIG. 18 is a schematic diagram showing the structure of an OFDM signal in the time domain.

[Explanation of symbols]

1 OFDM receiver 16 Symbol synchronization unit 40 ₁ First detector 40 ₂ Second detector 40 ₃ Third detector 41 Logical AND element 42 Judgment circuit

Claims (23)

[Claims] 1. A signal detection device for detecting an FDM (Frequency Division Multiplexing) signal that is configured by multiplexing a plurality of subcarriers and has a copy of the end portion of each symbol at the beginning portion of the symbol. A delay unit that takes in the FDM signal and outputs a delayed signal that is delayed from the FDM signal by a predetermined period; a multiplier that multiplies the FDM signal and the delayed signal and outputs the delayed signal; And a polarity detection unit that detects either the positive polarity or the negative polarity of the signal. 2. The signal detection device according to claim 1, wherein the complex signal output from the multiplier is separated into an imaginary part and a real part, and one of the imaginary part and the real part is a signal. Further comprising a separator for outputting to the polarity detection unit, wherein the multiplier multiplies one of the FDM signal and the delayed signal by a complex conjugate of the other signal and outputs the product to the separator. The signal detection device, wherein the polarity detection unit detects one of positive and negative polarities of the signal output from the separator. 3. The signal detection device according to claim 1, wherein the polarity detection unit further includes a rectifier that half-wave rectifies the input signal and outputs a signal having a positive polarity. 4. The signal detecting device according to claim 3, wherein:
The said polarity detection part is a signal detection apparatus further equipped with the low pass filter which extracts a low frequency signal from the signal output from the said rectifier. 5. The signal detection device according to claim 4, wherein:
The polarity detection unit further includes a signal discriminator that binarizes the low frequency signal output from the low pass filter,
Signal detection device. 6. The signal detection device according to claim 1, wherein the polarity detection unit further includes a rectifier that half-wave rectifies the input signal and outputs a signal having a negative polarity. 7. The signal detection device according to claim 6, wherein:
The polarity detection unit further comprises a signal inverter that outputs an inverted signal obtained by inverting the polarity of the signal output from the rectifier, and a low-pass filter that extracts a low-frequency signal from the inverted signal, the signal Detection device. 8. The signal detection device according to claim 7, wherein:
The polarity detection unit further includes a signal discriminator that binarizes the low frequency signal output from the low pass filter,
Signal detection device. 9. A polarity detection unit according to claim 4 or 5 and a polarity detection unit according to claim 7 or 8 are mounted together, and a signal output from the polarity detection unit according to claim 4 or 5, 9. The signal detection device further comprising a logical product operator that performs a logical product operation with the signal output from the polarity detection unit according to item 7 or 8. 10. The signal detection device according to claim 1, wherein the FDM signal is formed by multiplexing a plurality of subcarriers that are orthogonal to each other.
A signal detecting device which is an FDM (Orthogonal Frequency Division Multiplexing) signal. 11. A signal detection method for detecting an FDM (Frequency Division Multiplexing) signal that is configured by multiplexing a plurality of subcarriers and has a copy of the end portion of each symbol at the beginning portion of the symbol. (A) capturing the FDM signal and outputting a delayed signal delayed from the FDM signal by a predetermined period; (b) multiplying the FDM signal by the delayed signal and outputting the product. ) A step of detecting either positive or negative polarity of the signal output in the step (b), the signal detecting method. 12. The signal detecting method according to claim 11, wherein (d) the complex signal output in step (b) is separated into an imaginary part and a real part, and the imaginary part and the real part are And a step of outputting one of the signals, wherein the step (b) outputs the complex signal by multiplying one of the FDM signal and the delayed signal by a complex conjugate of the other signal. The step (c) includes the step of detecting the positive or negative polarity of the signal output in the step (d).
Signal detection method. 13. The signal detection method according to claim 11, wherein said step (c) comprises (c-1) a half-wave of the signal output in said step (b) or said step (d). A signal detection method further comprising the step of rectifying and outputting a signal having a positive polarity. 14. The signal detecting method according to claim 13, wherein said step (c) comprises: (c-2) extracting a low frequency signal from the signal output in said step (c-1). A signal detection method further comprising: 15. The signal detection method according to claim 14, wherein said step (c) comprises: (c-3) binarizing said low frequency signal output in said step (c-2). A signal detection method further comprising: 16. The signal detection method according to claim 11, wherein said step (c) comprises (c-4) a half-wave of the signal output in said step (b) or said step (d). A signal detecting method further comprising the step of rectifying and outputting a signal having a negative polarity. 17. The signal detection method according to claim 16, wherein said step (c) is (c-5) inversion obtained by inverting the polarity of the signal output in said step (c-4). The signal detecting method further comprising: a step of outputting a signal; and (c-6) a step of extracting a low frequency signal from the inverted signal output in the step (c-5). 18. The signal detection method according to claim 17, wherein the step (c) comprises: (c-7) binarizing the low-frequency signal output in the step (c-6). A signal detection method further comprising: 19. The step (c) according to claim 14 or 15, and the step (c) according to claim 17 or 18, both of which include: (c-8) the step (c-8). -2) or the step (c-
The signal detection method further comprising a step of performing a logical product operation of the signal output in 3) and the signal output in the step (c-6) or the step (c-7). 20. The signal detection method according to claim 11, wherein the FDM signal is formed by multiplexing a plurality of subcarriers that are orthogonal to each other. (Division-multiplexing) signal detection method. 21. A specific mode of an FDM (Frequency Division Multiplexing) signal that is configured by multiplexing a plurality of subcarriers and has a copy of the end portion of each symbol at the beginning portion of the symbol is detected. A mode detection device comprising a plurality of the signal detection devices according to any one of claims 1 to 10, wherein a plurality of the signal detection devices have a predetermined delay for delaying the FMD signal for each delay device. A mode detecting device characterized in that the periods are set to be different from each other. 22. Mode detection for detecting a mode of an FDM (Frequency Division Multiplexing) signal which is configured by multiplexing a plurality of subcarriers and has a copy of the end portion of each symbol at the head portion of the symbol. A method, comprising a plurality of sets of steps (a) to (d) of the signal detection method according to any one of claims 11 to 20, wherein the FMD signal is included in the step (a) of each set. The mode detection method is characterized in that the predetermined periods for delaying are set so as to be different from each other. 23. A receiver for demodulating an FDM (Frequency Division Multiplexing) signal which is configured by multiplexing a plurality of subcarriers and has a copy of the end portion of each symbol at the head portion of the symbol. 22. A receiving device comprising the mode detecting device according to claim 21.