JP2003264224A - Vacuum treatment device - Google Patents

Vacuum treatment device

Info

Publication number
JP2003264224A
JP2003264224A JP2002064904A JP2002064904A JP2003264224A JP 2003264224 A JP2003264224 A JP 2003264224A JP 2002064904 A JP2002064904 A JP 2002064904A JP 2002064904 A JP2002064904 A JP 2002064904A JP 2003264224 A JP2003264224 A JP 2003264224A
Authority
JP
Japan
Prior art keywords
wafer
pressure
static elimination
processing
heat transfer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002064904A
Other languages
Japanese (ja)
Inventor
Takuya Umeno
卓哉 梅野
Kazuya Utsunomiya
和哉 宇都宮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2002064904A priority Critical patent/JP2003264224A/en
Publication of JP2003264224A publication Critical patent/JP2003264224A/en
Pending legal-status Critical Current

Links

Abstract

<P>PROBLEM TO BE SOLVED: To reduce carriage abnormality by releasing a wafer safely without causing dislocation by the rear pressure of the wafer, in a vacuum treatment device which is equipped with a mechanism for holding the wafer by electrostatic adsorptive force. <P>SOLUTION: This vacuum treatment device monitors the pressure of a vacuum chamber and a heat conductive gas line until it shifts from the termination of wafer treatment to static elimination, and stops electrostatic adsorption and performs the static elimination after the relation between the upward force (Fup) to the wafer and the downward force (Fdw) to the wafer comes to |Fdw|>|Fup| thereby fulfilling the pressure of the gas line. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は静電吸着により固定
されたウエハの裏面に伝熱ガスを流す構成を持った真空
処理装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vacuum processing apparatus having a structure in which a heat transfer gas is flown to the back surface of a wafer fixed by electrostatic attraction.

【0002】[0002]

【従来の技術】ドライエッチング、スパッタリング等の
半導体製造装置では、ステージ上にて静電吸着によりウ
エハを固定し、さらにウエハの裏面に伝熱ガスを流して
ウエハの温度を正確に制御する構成が用いられている。
2. Description of the Related Art In semiconductor manufacturing equipment such as dry etching and sputtering, a wafer is fixed by electrostatic attraction on a stage, and a heat transfer gas is caused to flow on the back surface of the wafer to accurately control the temperature of the wafer. It is used.

【0003】ウエハの脱離に関しては、処理後の吸着力
の高い状態で押し上げピンによるウエハの離脱を行う
と、ウエハの割損やウエハのずれが発生する可能性があ
るため、一般的に除電処理を設けるなどして静電吸着力
を弱める処理を行っている。
Regarding the detachment of the wafer, if the wafer is detached by the push-up pin in a state where the suction force after processing is high, there is a possibility that the wafer is broken or the wafer is displaced. A treatment is provided to weaken the electrostatic attraction force.

【0004】図3(a)〜(c)は、従来の真空処理装
置の一般的なウエハ加工から脱離までの概略を示したも
のである。1は真空処理室、2はウエハ、3は静電吸着
機構を備えたステージ、4は伝熱ガス供給ライン、5は
ウエハ加工中のプラズマ状態、6は除電処理中のプラズ
マ状態、7はリフトピンである。
FIGS. 3 (a) to 3 (c) show an outline of a conventional vacuum processing apparatus from general wafer processing to desorption. 1 is a vacuum processing chamber, 2 is a wafer, 3 is a stage equipped with an electrostatic adsorption mechanism, 4 is a heat transfer gas supply line, 5 is a plasma state during wafer processing, 6 is a plasma state during static elimination processing, and 7 is a lift pin. Is.

【0005】図3(a)はウエハ加工中を示しており、
ウエハ2はステージ3上に静電吸着され、伝熱ガス供給
ライン4よりガスがウエハ裏面に供給され温度制御され
ている。処理室内圧力は、一般的に0.1〜100Pa
の条件が使用され、ウエハ裏面の伝熱ガス圧力は数kP
aである。
FIG. 3A shows a wafer being processed.
The wafer 2 is electrostatically adsorbed on the stage 3, and gas is supplied from the heat transfer gas supply line 4 to the back surface of the wafer for temperature control. The pressure in the processing chamber is generally 0.1 to 100 Pa.
Conditions are used and the heat transfer gas pressure on the backside of the wafer is several kP.
a.

【0006】ウエハ処理後は静電吸着を停止し、残留吸
着力除去のための除電処理を実行し(図3(b))、リ
フトピン7にてウエハを搬送位置までリフトアップする
(図3(c))。
After the wafer processing, electrostatic attraction is stopped, static elimination processing for removing the residual attraction force is executed (FIG. 3B), and the lift pins 7 lift the wafer up to the transfer position (FIG. 3 ( c)).

【0007】[0007]

【発明が解決しようとする課題】しかしながら、前記従
来の技術においては、静電吸着を停止し、除電処理を実
行した際、伝熱ガスラインの残留ガス圧力によって吸着
力の弱まったウエハに上向の力が作用する。図4は、縦
軸にウエハにかかる力|Fup|および|Fdw|を、
横軸に時間を示したものであり、ウエハ加工終了時を0
としている。従来技術においては、ウエハ加工終了後、
除電処理条件が整うと直ちに除電処理を開始しているた
め除電処理開始ポイントは図4のt1となる。このため
ウエハが吹き上げられてステージからずれ、搬送に異常
をきたす原因となる。
However, in the above-mentioned conventional technique, when electrostatic attraction is stopped and static elimination processing is performed, the wafer is weakened in attraction force due to the residual gas pressure in the heat transfer gas line. Force of. In FIG. 4, the vertical axis represents forces | Fup | and | Fdw |
The horizontal axis shows time, and the end of wafer processing is 0.
I am trying. In the conventional technique, after the wafer processing is completed,
Since the static elimination processing is started immediately after the static elimination processing conditions are satisfied, the static elimination processing start point is t1 in FIG. Therefore, the wafer is blown up and deviates from the stage, which causes an abnormality in the transportation.

【0008】本発明は、前記従来の除電処理実行時に生
じるウエハずれ等の問題点を解決する真空処理装置を提
供しようとするものである。
An object of the present invention is to provide a vacuum processing apparatus which solves the problems such as a wafer shift that occurs when the conventional static elimination processing is executed.

【0009】[0009]

【課題を解決するための手段】前記の課題を解決するた
めの本発明の真空処理装置は、処理室圧力と伝熱ガス供
給ライン圧力を監視し、前記圧力の比較および条件(|
Fdw|>|Fup|)の判定を行い信号を出力する制
御手段を備えたものであり、従来問題であったウエハ裏
面圧力によるウエハの位置ずれおよび搬送異常を発生さ
せることなくウエハを安全に脱離させることができる。
A vacuum processing apparatus according to the present invention for solving the above-mentioned problems monitors a processing chamber pressure and a heat transfer gas supply line pressure, and compares the pressures and conditions (|
Fdw |> | Fup |) is provided and a control means for outputting a signal is provided, and the wafer can be safely removed without causing the positional deviation of the wafer and the transfer abnormality due to the backside pressure of the wafer, which have been problems in the past. Can be separated.

【0010】[0010]

【発明の実施の形態】以下、本発明による実施の形態に
ついて、図を用いて説明する。図1は、本発明による除
電処理開始ポイントを示すものである。縦軸はウエハに
かかる力|Fup|および|Fdw|、横軸は時間を示
しており、ウエハ加工終了時を0としている。ウエハに
対する上向きの力Fupが下向きの力Fdwよりも小さ
くなるポイント(図1の点t2)を超えた後に除電処理を
実行することで、静電吸着力が除去されたウエハは裏面
圧力によって吹き上げられることなく安全にステージか
ら脱離される。
BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows the charge removal processing start point according to the present invention. The vertical axis represents the forces | Fup | and | Fdw | applied to the wafer, the horizontal axis represents time, and 0 is set at the end of wafer processing. By performing the static elimination process after the upward force Fup on the wafer exceeds the point (point t2 in FIG. 1) that is smaller than the downward force Fdw, the wafer from which the electrostatic adsorption force is removed is blown up by the back surface pressure. Without being safely removed from the stage.

【0011】図2は、本発明による処理室内圧力と伝熱
ガスライン圧力を比較する機構を搭載した真空処理装置
の断面図である。1は真空処理室、2はウエハ、3は静
電吸着機構を備えたステージ、4は伝熱ガス供給ライ
ン、8は伝熱ガスライン4の圧力計、9は処理室1の圧
力計、10は制御手段であり、圧力計8、9を比較し、
信号を出力する機構を備えたものである。
FIG. 2 is a sectional view of a vacuum processing apparatus equipped with a mechanism for comparing the pressure in the processing chamber with the pressure of the heat transfer gas line according to the present invention. 1 is a vacuum processing chamber, 2 is a wafer, 3 is a stage equipped with an electrostatic adsorption mechanism, 4 is a heat transfer gas supply line, 8 is a pressure gauge for the heat transfer gas line 4, 9 is a pressure gauge for the processing chamber 1, and 10 is a pressure gauge. Is a control means, compares the pressure gauges 8 and 9,
It is equipped with a mechanism for outputting a signal.

【0012】図2は、ウエハ加工直後の状態を示してお
り、ウエハ2はステージ3上に静電吸着されている。伝
熱ガスライン4は排気が開始され、処理室1は排気後除
電処理条件の圧力に制御される。このときの圧力計8お
よび9にて検出された値を制御手段10にて演算処理す
る。制御手段10では、圧力計8と圧力計9の値を比較
し、条件|Fdw|>|Fup|を満たす前記圧力計の
値を検出した後信号を出力する。ウエハに対する上向き
の力Fupが下向きの力Fdwよりも小さくなったとき
(図1の点t2)が、制御手段10が信号を出力するタイ
ミングとなる。
FIG. 2 shows a state immediately after wafer processing, in which the wafer 2 is electrostatically adsorbed on the stage 3. Exhaust of the heat transfer gas line 4 is started, and the processing chamber 1 is controlled to have a pressure of the static elimination processing condition after exhaust. The values detected by the pressure gauges 8 and 9 at this time are calculated by the control means 10. The control means 10 compares the values of the pressure gauge 8 and the pressure gauge 9, detects the value of the pressure gauge that satisfies the condition | Fdw |> | Fup |, and then outputs a signal. When the upward force Fup on the wafer becomes smaller than the downward force Fdw
(Point t2 in FIG. 1) is the timing when the control means 10 outputs a signal.

【0013】Fup、Fdwは、それぞれ Fup=P1×S1 Fdw=P2×S2+gw で与えられるので、制御手段10は、P1およびP2す
なわち圧力計8、9の値を監視することで信号を出力す
ることができる。真空処理室1の処理シーケンサはこの
信号を受け、静電吸着を停止し、除電処理を開始する。
Since Fup and Fdw are given by Fup = P1 × S1 Fdw = P2 × S2 + gw respectively, the control means 10 outputs signals by monitoring the values of P1 and P2, that is, the pressure gauges 8 and 9. You can Upon receipt of this signal, the processing sequencer in the vacuum processing chamber 1 stops electrostatic attraction and starts static elimination processing.

【0014】除電処理がなされたウエハ2は、伝熱ガス
圧力によって吹き上げられることなく安全にステージ3
から脱離される。
The wafer 2 which has been subjected to the static elimination processing is safely blown up by the pressure of the heat transfer gas and is safely transferred to the stage 3
Be detached from.

【0015】[0015]

【表1】 [Table 1]

【0016】表1は、本発明によるウエハ脱離方法およ
び真空処理装置を用いた搬送テスト結果を従来技術のそ
れと比較したものである。ウエハ1000枚の搬送テス
トを実施し、ウエハ裏面圧力による搬送ずれの回数を示
している。従来技術では30回発生していた搬送ずれ
が、本発明による真空処理装置を用いた搬送テストでは
発生せず安全なウエハの脱離が可能となった。
Table 1 compares the transfer test results using the wafer desorption method and the vacuum processing apparatus according to the present invention with those of the prior art. A transfer test of 1000 wafers was performed, and the number of transfer deviations due to the wafer backside pressure is shown. The transfer deviation, which has occurred 30 times in the conventional technique, does not occur in the transfer test using the vacuum processing apparatus according to the present invention, and safe wafer detachment is possible.

【0017】[0017]

【発明の効果】以上のように本発明では、ウエハが吹き
上げられない条件(|Fdw|>|Fup|)を満たし
てから除電処理を実行することにより、ウエハの位置ず
れおよび搬送異常を発生させることなく静電吸着された
ウエハを安全に脱離することができる。
As described above, according to the present invention, the positional deviation of the wafer and the abnormal conveyance are caused by executing the static elimination process after satisfying the condition (| Fdw |> | Fup |) that the wafer is not blown up. The wafer that has been electrostatically adsorbed can be safely released.

【0018】また、本発明では、処理室内圧力と伝熱ガ
スライン圧力を比較、演算し、信号を出力する機構を備
えた真空処理装置を用いて除電処理を実行することによ
り、ウエハの位置ずれおよび搬送異常を発生させること
なく静電吸着されたウエハを安全に脱離することができ
る。
Further, according to the present invention, the position shift of the wafer is performed by performing the static elimination processing by using the vacuum processing apparatus equipped with a mechanism for comparing and calculating the pressure in the processing chamber and the pressure of the heat transfer gas line and outputting a signal. Also, the electrostatically adsorbed wafer can be safely detached without causing a conveyance abnormality.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明における除電処理開始ポイントを示すグ
ラフ
FIG. 1 is a graph showing charge removal processing start points in the present invention.

【図2】本発明による実施の形態における装置断面図FIG. 2 is a sectional view of a device according to an embodiment of the present invention.

【図3】従来の真空処理装置のウエハ加工状態の装置断
面図
FIG. 3 is a sectional view of a conventional vacuum processing apparatus in a wafer processing state.

【図4】従来技術における除電処理開始ポイントを示す
グラフ
FIG. 4 is a graph showing charge removal processing start points in the related art.

【符号の説明】[Explanation of symbols]

1 真空処理室 2 ウエハ 3 静電吸着機構を備えたステージ 4 伝熱ガス供給ライン 5 ウエハ加工中のプラズマ状態 6 除電処理中のプラズマ状態 7 リフトピン 8 伝熱ガス供給ライン4の圧力計 9 処理室1の圧力計 10 制御手段 1 vacuum processing chamber 2 wafers 3 Stage equipped with electrostatic adsorption mechanism 4 Heat transfer gas supply line 5 Plasma state during wafer processing 6 Plasma state during static elimination 7 lift pins 8 Pressure gauge for heat transfer gas supply line 4 9 Pressure gauge in processing chamber 1 10 Control means

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 5F004 BA04 BB22 BB25 BC03 5F031 CA02 HA16 HA33 HA35 HA39 JA10 JA21 JA47 MA29 MA32 NA05 PA30    ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5F004 BA04 BB22 BB25 BC03                 5F031 CA02 HA16 HA33 HA35 HA39                       JA10 JA21 JA47 MA29 MA32                       NA05 PA30

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 静電吸着力で固定されたウエハの裏面に
伝熱ガスを流す構成の真空処理装置において、処理室圧
力と伝熱ガス供給ライン圧力を比較し、所望の条件を満
たした後に除電処理を実行する制御手段を備えたことを
特徴とする真空処理装置。
1. In a vacuum processing apparatus having a structure in which a heat transfer gas is caused to flow to the back surface of a wafer fixed by electrostatic attraction, the pressure of a processing chamber and the pressure of a heat transfer gas supply line are compared, and after a desired condition is satisfied, A vacuum processing apparatus comprising a control means for executing static elimination processing.
【請求項2】 前記所望の条件はウエハに対する上向き
の力がウエハに対する下向きの力よりも小さくなった状
態であることを特徴とする請求項2に記載の真空処理装
置。
2. The vacuum processing apparatus according to claim 2, wherein the desired condition is that the upward force on the wafer is smaller than the downward force on the wafer.
JP2002064904A 2002-03-11 2002-03-11 Vacuum treatment device Pending JP2003264224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002064904A JP2003264224A (en) 2002-03-11 2002-03-11 Vacuum treatment device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002064904A JP2003264224A (en) 2002-03-11 2002-03-11 Vacuum treatment device

Publications (1)

Publication Number Publication Date
JP2003264224A true JP2003264224A (en) 2003-09-19

Family

ID=29197463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002064904A Pending JP2003264224A (en) 2002-03-11 2002-03-11 Vacuum treatment device

Country Status (1)

Country Link
JP (1) JP2003264224A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010110044A1 (en) * 2009-03-23 2010-09-30 東京エレクトロン株式会社 Method for removing subject to be processed, and apparatus for processing subject to be processed
JP2012164990A (en) * 2012-03-26 2012-08-30 Tokyo Electron Ltd Substrate processing method
JP2015095396A (en) * 2013-11-13 2015-05-18 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010110044A1 (en) * 2009-03-23 2010-09-30 東京エレクトロン株式会社 Method for removing subject to be processed, and apparatus for processing subject to be processed
JP2010225718A (en) * 2009-03-23 2010-10-07 Tokyo Electron Ltd Method of separating workpiece, and workpiece processing device
JP2012164990A (en) * 2012-03-26 2012-08-30 Tokyo Electron Ltd Substrate processing method
JP2015095396A (en) * 2013-11-13 2015-05-18 東京エレクトロン株式会社 Substrate processing method and substrate processing apparatus
KR20150055549A (en) * 2013-11-13 2015-05-21 도쿄엘렉트론가부시키가이샤 Substrate processing method and substrate processing device
KR102332028B1 (en) * 2013-11-13 2021-11-26 도쿄엘렉트론가부시키가이샤 Substrate processing method and substrate processing device

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