JP2003242103A - Serial bus communication system, and serial bus communication method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a serial bus communication system capable of preventing useless disposal of a transferred data file when a cable is pulled off or if a bus reset signal is generated in the middle of data transfer during serial bus communication in compliance with or in conformity to USB standards. <P>SOLUTION: In this serial bus communication system, a host PC 2 and a PC peripheral device 1 are connected through a serial bus cable 3, so that data communication is bidirectionally conducted by a serial bus. One or more receiving buffers are provided to temporarily store data sent from the host PC 2. When the serial bus cable 3 is disconnected, data in the receiving buffer sent from the host PC are read as effective data when the data are recognized as an end of a file. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial bus communication system and a serial bus communication method, and more particularly to serial bus communication conforming to or conforming to the USB standard.

[0002]

2. Description of the Related Art USB (Universal Seri)
The Al Bus standard is a personal computer (P
C) is a serial bus interface standard established to connect a plurality of PC peripheral devices and data communication. It features simple connectivity and extensibility not found in conventional interface standards. In recent years, many PC peripheral devices (mouse, keyboard, printer, scanner, modem, etc.) have come to support the USB standard. .

On the other hand, the IEEE 1394 standard is also a new interface standard for the purpose of connecting a PC peripheral device to a PC, and has the same characteristics as the USB standard.

One of the features of the connectivity common to the USB standard and the IEEE 1394 standard is a hot plug mechanism that allows the cable to be connected / disconnected while the power is on. However, if the cable is pulled out while data is being transferred on the bus, it is necessary to discard part or all of the transferred data file. Japanese Patent Laid-Open No. 11-19
In "Data Communication Method and Device" of JP 6099,
In a device using the EEE1394 interface, if the cable connection is broken during data transfer, the data transfer can be continued after the cable is reconnected.

In addition, the USB standard and IEEE1394
The standard defines an initialization command for executing re-recognition (address allocation, etc.) of a connected device called bus reset. Even if a bus reset occurs before the data file transfer is completed, some or all of the transferred data files need to be discarded. However, regarding the mechanism of bus reset, the USB standard and IE
The EE1394 standard has the following differences.

A USB standard bus reset is issued individually for each of a plurality of connected peripheral devices. In addition, since the USB standard bus reset is issued after the host PC confirms that the data transfer to the target peripheral device has been completed, there is no principle that the bus reset is issued before the data transfer is completed. become.

On the other hand, a bus reset of the IEEE 1394 standard is issued to all connected peripheral devices when a peripheral device is newly connected in the bus topology and when the connected peripheral device is removed from the bus. To be done. Therefore, if a peripheral device is connected or disconnected regardless of whether the connected peripheral device is transferring data or not, a bus reset signal is unconditionally issued to all peripheral devices. become. For this reason, various methods of processing interrupted data have been devised for the purpose of guaranteeing data continuity. For example, in “Image Forming Apparatus, Image Forming Method, and Recording Medium” of Japanese Patent Application Laid-Open No. 2000-79746, IEEE
In an image forming apparatus using an E1394 standard interface, if one page of print data is transferred when a bus reset signal is generated during data transfer, printing of one page is performed and the bus reset signal is printed. If an error occurs due to the occurrence of, the user is informed that printing has been interrupted.

[0008]

However, when the cable connection is broken during the above-mentioned data transfer or when the bus reset signal is generated before the completion of the data file transfer, the prior art (Japanese Patent Laid-Open No. 11-196099, JP 2
No. 000-79746) relates to the IEEE 1394 standard and cannot be directly applied to the USB standard of a different system.

For example, depending on the state of the peripheral device, a problem may occur due to a bus reset even when data is not being transferred. Hereinafter, this problem will be described by taking a printer device as an example. The print data transferred from the host PC to the printer device is converted into data called a printer description language, temporarily stored in a FIFO memory (reception buffer) provided inside the USB device controller in the printer device, and then the reception buffer It is stored in the data receiving area of the internal memory of the printer device. Furthermore, the print data stored in the data receiving area is converted from the printer description language into bitmap print data,
It is moved to another area of the internal memory of the printer device. The time required for this conversion changes depending on the type and size of print data or the state of the printer.

Here, if the conversion time to print data is earlier than the data transfer time from the host PC to the FIFO memory (reception buffer), the data reception area is always F.
There is no problem because an area for receiving data from the IFO memory (reception buffer) is secured. However, if the time required to convert the print data into the print data is longer than the time required to transfer the data from the host PC to the FIFO memory (reception buffer), the data cannot be transferred to the FIFO memory (reception buffer).

If all the data to be transferred on the serial bus have been transferred and the final data has been stored in the FIFO memory and the above-mentioned state occurs, the host P
C cannot know whether or not data is stored in the FIFO memory. Therefore, at least the data transfer on the serial bus has been completed, and there is a possibility that a bus reset will be requested.

The printer device needs to recognize this bus reset request and initialize the internal state of the USB device controller. Since this initialization is usually performed by hardware, the data left in the FIFO memory is lost by this initialization, and the data file transfer on the serial bus is completed. Some of the transferred data will be lost. The same problem also occurs when the cable is pulled out while the final data is stored in the FIFO memory.

The present invention has been made in consideration of the above situation, and when serial bus communication conforming to or conforming to the USB standard is performed, a cable is pulled out during data transfer, or a bus reset is performed. An object of the present invention is to provide a serial bus communication system and a serial bus communication method that prevent the transferred data file from being unnecessarily discarded when a signal is generated.

[0014]

In order to solve the above problems, a serial bus communication system according to claim 1 of the present invention connects a host PC and a PC peripheral device through a serial bus cable, In a serial bus communication system for bidirectional data communication by
The C peripheral device includes one or more reception buffers that temporarily store the data sent from the host PC, connection state detection means that detects connection and non-connection of the serial bus cable, and the serial bus cable. When the data in the reception buffer is recognized as a file delimiter in the case of disconnection, the reception buffer reading means for reading the data as valid data is provided.

According to a second aspect of the present invention, there is provided a serial bus communication system in which a host P is connected via a serial bus cable.
In a serial bus communication system in which C and a PC peripheral device are connected and data is bidirectionally communicated by a serial bus, the PC peripheral device temporarily stores data sent from the host PC. A buffer,
Bus reset detection means for detecting a bus reset signal from the host PC; and when the data in the reception buffer is recognized as a file delimiter when the bus reset signal is detected, the data is regarded as valid data. And a receiving buffer reading means for reading.

Further, according to a third aspect of the present invention, in the serial bus communication system according to the second aspect, when the bus reset signal is detected, the circuit is initialized from the reception buffer after reading the signal from the reception buffer as needed. It is characterized in that it is provided with a circuit initialization means for performing. Further, claim 4 of the present invention
In the serial bus communication system according to claim 1, 2 or 3, the serial bus conforms to or conforms to the USB standard. Also,
A fifth aspect of the present invention is characterized in that, in the serial bus communication system according to the fourth aspect, the reception buffer is a USB standard bulk-out transfer endpoint. Further, claim 6 of the present invention includes claim 1 or 2.
In the serial bus communication system according to [1], the PC
The peripheral device is a printer device.

A serial bus communication method according to a seventh aspect of the present invention is a serial bus communication method in which a host PC and a PC peripheral device are connected via a serial bus cable and bidirectional data communication is performed by a serial bus. When the disconnection of the serial bus cable is detected, when the data sent from the host PC is recognized as a file delimiter, the data is read as valid data by the PC peripheral device. Characterize.

The serial bus communication method according to claim 8 of the present invention is a serial bus communication method in which a host PC and a PC peripheral device are connected via a serial bus cable and bidirectional data communication is performed by a serial bus. When the bus reset signal sent from the host PC is detected, when the data sent from the host PC is recognized as a file delimiter, the data is read as valid data by the PC peripheral device, and then the data is read. It is characterized in that the circuit is initialized.

Therefore, when the host PC and the PC peripheral device are connected by the USB cable to transfer data,
Even if the USB cable is pulled out during file data transfer, it recognizes whether or not there is a file delimiter in the data in the receive buffer inside the USB device controller, and if there is a file delimiter, the data remaining in the receive buffer is recognized. It is possible to obtain and obtain a normal print image.

When there is a bus reset request during file data transfer, whether or not there is a file delimiter in the data in the receive buffer inside the USB device controller is recognized, and if there is such a file delimiter, it is stored in the receive buffer. A normal print image can be obtained by executing the circuit initialization corresponding to the bus reset request after obtaining the remaining data.

[0021]

BEST MODE FOR CARRYING OUT THE INVENTION The USB standard supports four types of transfer modes: control transfer, interrupt transfer, bulk transfer, and isochronous transfer. U
The SB standard defines device class specifications for each application, and in the case of a printer device, a configuration in accordance with the printer class specifications is recommended. As the bidirectional configuration of the printer class specification, the bulk-out transfer mode is used for the print data transfer from the host PC to the printer device, and the bulk-in transfer mode is used for the printer status data transfer from the printer device to the host PC. Is recommended.

A page data file transferred using bulk transfer of the USB standard is 5 in the USB 2.0 specification.
The data is divided into 12-byte packets and transferred.
It is recognized as a file delimiter by transmitting / receiving a data packet of less than 2 bytes (see FIG. 3). For example, if the data is 5
When it is an integral multiple of 12 bytes, transmission / reception of a zero-length packet (packet having a data length of zero) indicates a file delimiter, and when the data is not an integral multiple of 512 bytes, a short packet (1 byte or more 511 bytes Transmission / reception of packets with a data length of less than or equal to bytes indicates a file delimiter.

When the printer device receives the zero length packet or the short packet, the printer device recognizes that the file delimiter is reached and executes the printing operation. Therefore, if the print operation is performed in a state in which the file divisions cannot be recognized, an incomplete image will be printed.

However, even if the cable is pulled out during the data transfer or the bus reset signal is generated, if the zero length packet or the short packet is stored in the reception buffer, the data is not transferred on the serial bus. Since the transfer is completed, the data in the reception buffer can be read and the printing can be completed normally.

Embodiments of the present invention will be described below with reference to the drawings. In the following description, a case where the PC peripheral device is a printer device and communication is performed between the host PC and the printer device via a serial bus compatible with the USB standard will be described as an example.
As the PC peripheral device, any device that transmits and receives a large amount of data, such as a digital copying machine, a digital multifunction peripheral, a facsimile machine, a digital camera and a digital video camera, can be similarly applied.

FIG. 1 is a hardware configuration diagram of the serial bus communication system of the present invention. In FIG. 1, the serial bus communication system connects a printer device 1 and a host PC 2 with a serial bus cable (hereinafter referred to as a USB cable) 3. Further, the printer device 1 includes a device controller (hereinafter, referred to as a USB device controller) 11 having a USB 2.0 specification, and a CPU that executes a program for controlling the printing device 1.
A (central processing unit) 12, a ROM 13 for storing programs and data for controlling the printer device 1 and a printer memory 14 for storing print data transferred from the host PC 2 are mounted.

FIG. 2 shows the USB device controller 11
3 is a block diagram showing the internal configuration of FIG. The USB device controller 11 is a PHY (PHYsical L) that is a transceiver / receiver that transmits and receives USB signals.
layer interface (111), SIE (Serial Interface) that performs USB protocol processing
ce engine) 112, EPZ transmission / reception FIFO (control transfer end point) 113 which is a 64-byte FIFO memory 113, 512 bytes EPA reception FIFO (bulk-out transfer end point) 114 which is a 2-sided FIFO memory, EPB transmission FIFO, which is a FIFO memory consisting of 512 bytes and two sides
O (End point for bulk-in transfer) 115, SIE
An internal register group 116 for state / control of 112 and each FIFO (113, 114, 115) and an interface block 117 for reading / writing the internal register group 116 and reading / writing transfer data are provided.

In the EPZ transmission / reception FIFO 113, the data transfer direction of control transfer must correspond to both the in direction from the printer device 1 to the host PC 2 and the out direction from the host PC 2 to the printer device 1. Each is equipped with a 64-byte FIFO memory.

In the case of bulk-out transfer (data transfer from the host PC 2 to the printer device 1), it is necessary to transfer a large amount of print data, so a FIFO memory in the out direction is used for the purpose of improving performance. In many cases, two surfaces (or three or more surfaces) are provided.

<Embodiment 1> FIG. 4 is a flow chart showing the processing procedure when the serial cable is pulled out in the serial bus communication system of the present invention. When print data is being sent from the PC 2 to the printer device 1 via the serial bus, it is detected that the USB cable 3 has been pulled out (steps S1 and S2).
This is because the connection state detecting means (included in SIE112) detects that the USB cable 3 is pulled out, and
B device controller 11 to CP of printer device 1
An interrupt is generated for U12. The cause of this interrupt is determined by the control program stored in the ROM 13 reading the internal register group 116.

When an interrupt is detected, it is checked whether or not there is valid data (step S3). Here, the valid data indicates that the CRC error detection process defined by the USB standard is completed and the data can be read from the printer device 1 side. Whether or not there is valid data is checked by referring to the register in the internal register group 116 that records the number of valid data in the EPA reception FIFO 114.

If there is valid data (step S3)
Yes), and the number of valid data in the EPA reception FIFO 114 is read (step S5). It is checked whether the number of valid data is the maximum packet length of bulk transfer (512 bytes) (step S6). When the number of valid data is the maximum packet length of bulk transfer, this data is transferred to the printer memory 14 (step S7). . When the data transfer is completed, the readable EPA reception FIFO 114 is switched (from the first surface to the second surface or from the second surface to the first surface) (step S8), and it is checked whether or not there is valid data in the switched reception buffer. To return to step S3. When switched, the number of data of the maximum packet length of bulk transfer is subtracted from the register that holds the number of valid data of the internal register group 116.

When there is no valid data in step S3 (No in step S3), that is, EPA reception FIF
It is determined that there is no short packet or zero length packet in O114, and the EPA reception FIFO 114
The data stored therein and the data already transferred to the printer memory 14 are discarded, and the process ends (step S4). In this case, since the data remaining in the EPA reception FIFO 114 is data that is being transferred and is not valid data, it cannot be recognized as a short packet.

When the number of valid data is equal to or smaller than the maximum bulk transfer packet length (512 bytes) in step S6 (No in step S6), it is checked whether or not the valid data is a zero length packet (step S9). If it is a zero-length packet (Yes in step S9), the file delimiter can be recognized, so that the printer memory 14 has already been recognized.
A normal print image is obtained by performing a printing operation using the print data that has been transferred to (step S10). If it is a short packet (1 to 511 bytes) (No in step S9), the delimiter of the file can be recognized.
A normal print image is obtained by transferring the data from the reception buffer in the A reception FIFO 114 to the printer memory 14 (step S11) and performing the printing operation together with the print data already transferred to the printer memory 14 (step S10).

US, which generally supports bulk transfers
The B device controller is a DMA that transfers data between the FIFO memory and the printer memory without intervention of the CPU.
The transfer is configured so that DMA transfer is used for normal print data transfer. However, for the data transfer between the EPA reception FIFO 114 and the printer memory 14 after the USB cable 3 is pulled out, it is easier to use the PIO transfer via the CPU 12 for a simpler circuit configuration.

<Second Embodiment> In the second embodiment, the print data conversion processing speed in the printer device 1 is USB.
When the host PC2 issues a bus reset request while the final data (short packet or zero-length packet) of the print data file remains in the EPA reception FIFO 114 without catching up with the data transfer rate transferred from the host PC2 via the serial bus. think of.

A general USB device controller is
When a bus reset request is detected, initialization of all circuits except the internal register group is executed by hardware.
All data in the A receive FIFO will be lost. In the second embodiment, when the bus reset request occurs, the data in the EPA reception FIFO 114 is transferred to the printer memory 14 and the printing operation is performed before the circuit initialization by the hardware. In addition, the initialization start bit is set in the register in the internal register group 116,
When a bus reset request is detected and this bit is 1,
The configuration is such that initialization of all buffers except the internal register group 116 is started (the hardware for this initialization is called circuit initialization means). Also, the start bit is set to zero when the circuit initialization means is executed.

FIG. 5 is a flow chart showing a processing procedure when a bus reset request is issued from the host PC in the serial bus communication system of the present invention. A bus reset request interrupt, in which print data is transmitted from the PC 2 to the printer device 1 via the serial bus, is detected (steps S21 and S22). The bus reset detection means detects that a bus reset request has occurred (the bus reset request is an SI in the USB device controller 11).
(Detected by E112), an interrupt is generated from the USB device controller 11 to the CPU 12 of the printer device 1, and the control program stored in the ROM 13 sets the initialization start bit in the internal register group 116 to zero.

When an interrupt is detected, it is checked whether or not there is valid data (step S23). Here, the valid data indicates that the CRC error detection process defined by the USB standard is completed and the data can be read from the printer device 1 side. Whether or not there is valid data is checked by referring to the register in the internal register group 116 that records the number of valid data in the EPA reception FIFO 114.

If there is valid data (step S2)
3), the number of valid data in the EPA reception FIFO 114 is read (step S26). It is checked whether this number of valid data is the maximum packet length of bulk transfer (512 bytes) (step S27). If the number of valid data is the maximum packet length of bulk transfer, this data is stored in the printer memory 1
4 (step S28). When the data transfer is completed, the readable EPA reception FIFO 114 is switched (from 1st side to 2nd side, or from 2nd side to 1st side) (step S29), and it is checked whether or not there is valid data in the switched reception buffer. To return to step S23. When switched, the number of data of the maximum packet length of bulk transfer is subtracted from the register that holds the number of valid data of the internal register group 116.

When there is no valid data in step S23 (No in step S23), that is, EPA reception F
It is judged that there is no short packet or zero length packet in the IFO 114, and the EPA reception FIFO 1
The data in 14 and the data already transferred to the printer memory 14 are discarded (step S24),
By writing 1 to the initialization start bit of the internal register group 116, the circuit corresponding to the bus reset request is initialized (step S25). In this case, EPA
The data remaining in the reception FIFO 114 is not valid because it is data in the process of being transferred, so it cannot be recognized as a short packet.

When the number of valid data is equal to or smaller than the maximum bulk transfer packet length (512 bytes) in step S27 (No in step S27), it is checked whether or not the valid data is a zero length packet (step S30). If it is a zero-length packet (Yes in step S30)
s), by writing 1 to the initialization start bit of the internal register group 116, the initialization of the circuit corresponding to the bus reset request is executed (step S33), and the file delimiter can be recognized. 14
A normal print image is obtained by performing a printing operation using the print data that has been transferred to (step S31). If it is a short packet (1 to 511 bytes) (No in step S30), the delimiter of the file can be recognized.
Transfer from the reception buffer in the PA reception FIFO 114 to the printer memory 14 (step S32), and by writing 1 to the initialization start bit of the internal register group 116, initialization of the circuit corresponding to the bus reset request is executed (step S32). S33), and already the printer memory 14
A normal print image is obtained by performing the print operation together with the print data that has been transferred to (step S31).

[0043]

As described above, according to the present invention, U
When transferring data by connecting the host PC and PC peripherals with the SB cable, US during file data transfer
Even if the B cable is pulled out, it recognizes whether or not there is a file delimiter in the data in the receive buffer inside the USB device controller, and if there is a file delimiter, the data remaining in the receive buffer is acquired, and it is normal. It is possible to obtain various printed images.

When there is a bus reset request during file data transfer, it is recognized whether or not there is a file delimiter in the data in the receive buffer inside the USB device controller, and if there is a file delimiter, it is stored in the receive buffer. A normal print image can be obtained by executing the circuit initialization corresponding to the bus reset request after obtaining the remaining data.

[Brief description of drawings]

FIG. 1 is a hardware configuration diagram constituting a serial bus communication system of the present invention.

FIG. 2 is a block diagram showing an internal configuration of a USB device controller.

FIG. 3 is a diagram for explaining a packet of a transfer unit of transfer data.

FIG. 4 is a flowchart showing a processing procedure when a serial cable is pulled out.

FIG. 5 is a flowchart showing a processing procedure when a bus reset signal is generated.

[Explanation of symbols]

1 ... Printer device, 2 ... Host PC, 3 ... USB cable, 11 ... USB device controller, 12 ... CP
U, 13 ... ROM, 14 ... Printer memory, 111 ... P
HY, 112 ... SIE, 113 ... EPZ transmission / reception FIFO
O, 114 ... EPA transmission / reception FIFO, 115 ... EPB transmission / reception FIFO, 116 ... Internal register group, 117 ... Interface block.

Claims (8)

[Claims] 1. A host P via a serial bus cable.
In a serial bus communication system in which C and a PC peripheral device are connected and data is bidirectionally communicated by a serial bus, the PC peripheral device temporarily stores data sent from the host PC. A buffer,
Connection state detection means for detecting connection and disconnection of the serial bus cable, and when the data in the reception buffer is recognized as a file delimiter when the serial bus cable is disconnected, the data is detected. A serial bus communication system comprising: a reception buffer reading means for reading as valid data. 2. The host P via a serial bus cable
In a serial bus communication system in which C and a PC peripheral device are connected and data is bidirectionally communicated by a serial bus, the PC peripheral device temporarily stores data sent from the host PC. A buffer,
Bus reset detection means for detecting a bus reset signal from the host PC; and when the data in the reception buffer is recognized as a file delimiter when the bus reset signal is detected, the data is regarded as valid data. A serial bus communication system comprising: a receiving buffer reading means for reading. 3. The serial bus communication system according to claim 2, wherein when the bus reset signal is detected,
A serial bus communication system comprising circuit initialization means for performing circuit initialization after reading from the reception buffer as required. 4. The serial bus communication system according to claim 1, wherein the serial bus is US
A serial bus communication system characterized by conforming to or conforming to the B standard. 5. The serial bus communication system according to claim 4, wherein the reception buffer is a USB standard bulk-out transfer endpoint. 6. The serial bus communication system according to claim 1, wherein the PC peripheral device is a printer device. 7. The host P via a serial bus cable
In a serial bus communication method for connecting C and a PC peripheral device and bidirectionally performing data communication by a serial bus,
When the disconnection of the serial bus cable is detected,
A serial bus communication method, wherein when the data sent from the host PC is recognized as a file delimiter, the data is read as valid data by the PC peripheral device. 8. The host P via a serial bus cable
In a serial bus communication method for connecting C and a PC peripheral device and bidirectionally performing data communication by a serial bus,
When the bus reset signal sent from the host PC is detected, when the data sent from the host PC is recognized as a file delimiter, the data is read as valid data by the PC peripheral device, and then the data is read. A serial bus communication method characterized in that the circuit is initialized.