JP2003241863A - Electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To evade interrupting writing data in a non-volatile memory 21 when an accessory switch SW is turned off in an on-vehicle navigation device. <P>SOLUTION: A capacitor 90 is adopted in order to supply power to the non- volatile memory 21 and a main CPU 10A after turning off the accessory switch SW. In addition to it, even when the accessory switch SW is turned off during writing data in the non-volatile memory 21, the main CPU 10A can complete writing data in the non-volatile memory 21. Thus, the interruption of writing data to the non-volatile memory 21 is evaded, so that the loss of data to be written in the memory 21 is evaded. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device including a memory that stores data.

[0002]

2. Description of the Related Art Conventionally, for example, a vehicle-mounted navigation device is provided with a volatile memory, and in order to retain the data stored in the volatile memory even when the accessory switch is off, the volatile memory has to be stored in the volatile memory. Thus, a vehicle battery has been developed which is supplied with electric power.

An example of a schematic electric circuit configuration of such a conventional vehicle-mounted navigation device 1 will be described with reference to FIG.

The vehicle-mounted navigation device 1 has a main CPU
10, volatile memory 20, main power supply device 30, backup power supply device 40, resistance elements 50, 51, reset CPU
60, a semiconductor switch 70, and a transistor 80,
It is composed of 81. The symbol S in FIG. 5 indicates a signal bus.

The main CPU 10 executes control processing for displaying a map, setting a traveling route, and guiding a route for navigation. In addition, the volatile memory 2
Reference numeral 0 is, for example, an SDRAM, in which data is written at the time of power supply and a holding operation of this data is performed, and the data is lost when the power supply is stopped. Volatile memory 20
Stores data associated with control processing by the main CPU 10 (for example, destination data, current location data, personal data, etc.) in addition to the computer program.

The semiconductor switch 70 is, for example, a P-type FE.
T, which is disposed between the main power supply device 30 and the on-vehicle battery Ba. The semiconductor switch 70 is controlled by the reset CPU 60 to connect or disconnect the main power supply device 30 and the vehicle-mounted battery Ba.

The main power supply device 30 is supplied with power from the vehicle-mounted battery Ba via the semiconductor switch 70, and, for example,
It outputs a constant voltage such as 7V, 5V, 3.3V. The backup power supply device 40 is directly supplied with power from the vehicle-mounted battery Ba and outputs a constant voltage (3.3 V).

The resistance elements 50 and 51 are connected in series between the accessory switch (ACC switch) and the ground, and the resistance elements 50 and 51 generate a divided voltage from the common connection terminal 52. The accessory switch SW is
This is a component of the ignition switch, and it is turned on and off by operating the ignition key.

The reset CPU 60 has a vehicle-mounted battery Ba.
Is directly supplied with electric power to drive the semiconductor switch 70 and the transistors 80 and 81 based on the divided voltage from the common connection terminal 52 of the resistance elements 50 and 51.

The transistor 80 is connected between the output terminal of the main power supply device 30 and the power supply terminal of the volatile memory 20. The transistor 81 is the backup power supply 4
It is connected between the output terminal of 0 and the power supply terminal of the volatile memory 20.

In the vehicle-mounted navigation device 1 thus configured, when the user turns on the accessory switch SW by the ignition key to turn on the accessory switch SW, the output of the accessory switch SW becomes high level. Become.

Therefore, the reset CPU 60 receives the high level signal as the divided voltage from the common connection terminal 52 of the resistance elements 50 and 51. Along with this, the reset CPU
60 turns on the semiconductor switch 70 and the transistor 80, and turns off the transistor 81.

Here, when the semiconductor switch 70 is turned on, the main power supply device 30 is supplied with power from the vehicle-mounted battery Ba via the semiconductor switch 70, and a constant voltage is supplied to the main CPU.
Output to 10. Further, when the transistor 80 is turned on, the output terminal of the main power supply device 30 and the power supply terminal of the volatile memory 20 are connected, and the volatile memory 20 is connected to the main power supply device 3.
Powered from 0.

Therefore, the main CPU 10 starts the control processing, and in accordance with this control processing, data is written in the volatile memory 20 or data is read from the volatile memory 20. When the transistor 81 is turned off, the output terminal of the backup power supply device 40 and the power supply terminal of the volatile memory 20 are cut off from each other.

After that, when the user turns off the power of the accessory switch SW with the ignition key to turn off the accessory switch SW, the output of the accessory switch SW becomes low level.

Therefore, the reset CPU 60 receives the low level signal as the divided voltage from the common connection terminal 52 of the resistance elements 50 and 51. Along with this, the reset CPU
60 turns off the semiconductor switch 70 and the transistor 80 and turns on the transistor 81.

Here, when the semiconductor switch 70 is turned off, the output terminal of the vehicle battery Ba and the input terminal of the main power supply device 30 are cut off, so that the main power supply device 30 stops the output of each constant voltage. . Further, when the transistor 81 is turned on, the output terminal of the backup power supply device 40 and the power supply terminal of the volatile memory 20 are connected. Therefore, the volatile memory 20 is supplied with power from the backup power supply device 40 and operates to hold data.

The power consumption of the backup power supply 40 is set lower than that of the main power supply 30. Therefore, by supplying the power required for data retention by the volatile memory 20 from the backup power supply device 40 during the off period of the accessory switch SW, it is possible to reduce the power consumption during the off period of the accessory switch SW. it can.

[0019]

However, in the above-mentioned vehicle-mounted navigation device, the accessory switch SW is used.
In order to retain the data in the volatile memory 20 even during the off period, the backup power supply device 40 needs to be supplied with power from the vehicle battery. Therefore, even when the alternator (vehicle-mounted generator) is stopped
The in-vehicle battery Ba needs to continue to supply power to the backup power supply device 40.

Therefore, in order to suppress the electric power required for holding data by the volatile memory 20, it is possible to use a non-volatile memory such as a flash memory instead of the volatile memory 20. In this case, for example, as shown by an arrow Y in FIG. 6, when the accessory switch SW is turned off while the main CPU 10 is rewriting data in the nonvolatile memory, power is supplied to the main CPU 10 and the nonvolatile memory. Stops.

Here, the nonvolatile memory does not need to be supplied with power to hold data, but needs to be supplied with power when writing data. Therefore, the main CP
When the power supply to U10 and the non-volatile memory is stopped, the rewriting of the data in the non-volatile memory is interrupted, so that the new data to be rewritten in the non-volatile memory disappears and the original data is stored in the non-volatile memory. Even old data that has been stored may be lost.

The present invention has been made in view of the above points, and it is possible to avoid interruption of data writing to the nonvolatile memory when the power switch is turned off while reducing power consumption. It is an object to provide an electronic device.

[0023]

According to the invention described in claim 1, when the power switch (SW) is turned off, the continuation means (90, 60B) is based on the power supply from the battery. The power supply to the non-volatile memory and the control unit is continued for a predetermined period. Therefore, power consumption can be reduced as compared with the case where power is supplied to the memory during the off period of the power switch. In addition to this, when the power switch is turned off, the control unit controls the non-volatile memory so as to avoid interruption of data writing. It is possible to avoid interruption of writing data to the non-volatile memory.

Specifically, as in the invention described in claim 2, when the power switch is turned on, in order to supply the power from the battery to the non-volatile memory and the control unit, the non-volatile It has a switch control means (60A) for connecting between the memory and the control section and the battery by the switch means, and when the power switch is operated to turn off the power, the switch control means is provided to the non-volatile memory and the control section. In order to stop the power supply from the battery by means of the battery, the non-volatile memory and the control unit may be disconnected from the battery by the switch means.

Further, as in the invention described in claim 3,
As the continuation means, the electric power from the battery is supplied through the switch means, the supplied electric power is stored, and the stored electric power is supplied to the non-volatile memory and the control unit only for a predetermined period of time. The power supply to the memory and the control unit may be continued for a predetermined period.

In particular, if a capacitor is used as the continuation means as in the invention described in claim 4, the continuation means can be realized with a simple structure.

According to a fifth aspect of the present invention, the constant output supply means (30) for supplying constant power to the non-volatile memory and the control unit based on the electric power supplied from one of the battery and the continuation means. ) Is preferably used.

Further, as in the invention described in claim 6,
As the continuation means (60B), the nonvolatile memory and the control section are connected to the nonvolatile memory and the control section by connecting the nonvolatile memory and the control section with the battery for a predetermined period after the power switch is turned off. The power supply is preferably configured to continue for a predetermined period.

According to the seventh aspect of the invention, the constant output supply means (30) for supplying a constant output power to the non-volatile memory and the control unit based on the electric power supplied from the battery via the switch means. ) Is preferably used.

Specifically, as in the invention described in claim 8, when the power switch is turned off, the control unit determines whether or not data is being written to the nonvolatile memory. And the determination means (100) that determines whether the data is being written to the non-volatile memory, and the interruption of the data writing is avoided by completing the data writing to the non-volatile memory. It is preferable to have the avoiding means (110) for causing the avoidance means.

When the electronic device is constructed by using the volatile memory (20) in addition to the non-volatile memory, it is written in the volatile memory by constructing the electronic device according to the invention of claim 9. Since the saved data can be saved in the non-volatile memory, it is possible to avoid the loss of the data to be saved in the volatile memory.

The electronic device may be applied to a navigation device, and the electronic device may be mounted in a vehicle.

Incidentally, the reference numerals in parentheses of the above-mentioned respective means are examples showing the correspondence with the concrete means described in the embodiments described later.

[0034]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is a block diagram showing an electric circuit configuration of a vehicle-mounted navigation device 1A to which an electronic device according to the present invention is applied.

The vehicle-mounted navigation device 1A is a main CP
U10A, non-volatile memory 21, volatile memory 20, main power supply device 30, resistance elements 50, 51, reset CPU 6
0A, the semiconductor switch 70, and the capacitor 90 are comprised. In FIG. 1, the same symbols as those in FIG. 5 indicate the same items.

The main CPU 10A executes a control process for displaying a map, setting a traveling route, and guiding a route for navigation. Also, the main CPU 10A
As will be described later, performs data loss avoidance processing for avoiding loss of data when the accessory switch SW is turned off.

The reset CPU 60A includes a resistance element 50,
The semiconductor switch 70 is driven based on the divided voltage from the common connection terminal 52 of 51. In addition, the reset CPU 60
Based on the divided voltage from the common connection terminal 52, A detects that the accessory switch SW is off and outputs a power off signal to the main CPU 10A. The reset CPU 60A
Is directly supplied with power from the vehicle-mounted battery Ba.

The non-volatile memory 21 is, for example, a flash memory, which is supplied with power to write data and can retain data without being supplied with power. The non-volatile memory 21 stores data associated with control processing by the main CPU 10A, in addition to computer programs.

The capacitor 90 is connected between the output terminal of the semiconductor switch 70 and the ground to charge the electric power supplied from the on-vehicle battery Ba via the semiconductor switch 70, and the charged electric power is supplied to the main power supply unit. Thirty
To discharge.

The operation of this embodiment will be described below with reference to FIG.
This will be described with reference to FIG. FIG. 2A is a time chart showing the output signal of the accessory switch SW.

First, when the user turns on the accessory switch SW with the ignition key to turn on the accessory switch SW, the output of the accessory switch SW becomes high level. Along with this, the reset CPU 60A receives a high level signal as a divided voltage from the common connection terminal 52 of the resistance elements 50 and 51.

As a result, the reset CPU 60A turns on the semiconductor switch 70, so that the main power supply device 30 and the vehicle-mounted battery Ba are connected. Therefore, the main power supply device 30 is supplied with power from the vehicle-mounted battery Ba via the semiconductor switch 70 and outputs a constant voltage to the main CPU 10A, the nonvolatile memory 21, and the volatile memory 20.

Along with this, the main CPU 10A starts execution of control processing for navigation, and data accompanying the control processing is stored in the nonvolatile memory 21 and the volatile memory 2.
0 is written, or data is read from the non-volatile memory 21 and the volatile memory 20.

When the semiconductor switch 70 is turned on,
Since the electric power from the vehicle-mounted battery Ba is supplied to the capacitor 90 via the semiconductor switch 70, the capacitor 90 can store the electric power.

After that, when the user turns off the power to the ignition switch with the ignition key to turn off the accessory switch SW, the output of the accessory switch SW becomes low level as shown in FIG. 2 (a). Therefore, the common connection terminal 52 of the resistance elements 50 and 51 generates a low level signal as a divided voltage.

Accordingly, when the reset CPU 60A receives the low level signal from the common connection terminal 52, the semiconductor switch 70 is turned on, so that the main power supply device 30 and the vehicle-mounted battery Ba are disconnected. Therefore, the power supply from the vehicle-mounted battery Ba to the main power supply device 30 is stopped. Along with this, the capacitor 90 starts discharging to the main power supply device 30.

The discharge of the capacitor 90 will be described below with reference to FIGS. 2 (b) and 2 (c). 2 (b),
(C) is a time chart for explaining changes in the potential of the input terminal A of the main power supply device 30.

First, when the capacitor 90 is not used, the potential of the input terminal A of the main power supply device 30 becomes as shown in FIG.
As shown in. On the other hand, the capacitor 90
2 is used, since the electric power is discharged from the capacitor 90, the potential of the input terminal A of the main power supply device 30 becomes
As shown in (c), it is possible to maintain a potential equal to or higher than the minimum operable potential Vmin for a predetermined period TE, although it decreases.

Here, the minimum operable potential Vmin is an input potential of the main power supply device 30 for compensating the writing operation of the non-volatile memory 21, the reading operation of the volatile memory 20, and the operation of the main CPU 10A. . Further, the predetermined time TE is the time required for the data loss avoidance processing by the main CPU 10A, with a time margin added. In addition,
The predetermined time TE is determined by the impedance of the capacitor 90, the main CPU 10A, the non-volatile memory 21, the volatile memory 20, and the like.

As described above, the capacitor 90 outputs a voltage equal to or higher than the minimum operable potential Vmin to the main power supply device 30 for a predetermined time TE. Therefore, when the main power supply device 30 continuously outputs a constant voltage to the main CPU 10A, the nonvolatile memory 21, and the volatile memory 20 for a predetermined period TE, the main CPU 10A causes the main CPU 10A to output the predetermined time T.
The processing operation becomes possible over E. In addition, the nonvolatile memory 2
In No. 1, data write operation can be performed for a predetermined time TE, and volatile memory 20 can read data operation for a predetermined time TE.

Further, as the accessory switch SW is turned off, the reset CPU 60A causes the common connection terminal 52 to operate.
When a low level signal is received as a divided voltage from the reset CPU 60A, the reset CPU 60A sends a power off signal to the main CPU 10A.
The main CPU 10A starts executing the data loss avoiding process.

The data loss avoiding process in the main CPU 10A will be described below with reference to FIGS. 2 (d), 2 (e) and 3. 2D and 2E are time charts for explaining the data loss avoidance process, and FIG. 3 is a flowchart showing the data loss avoidance process.

First, in step 100, the main CPU
10A itself determines whether or not data is being written in the nonvolatile memory 21 (see FIG. 2D). When it is determined that the data is being written to the non-volatile memory 21 (step 100: YES), it is determined whether the data writing to the non-volatile memory 21 is completed (step 110). .

If it is determined that the data writing to the non-volatile memory 21 is incomplete (step 110: NO), the process returns to step 110, and the step 110 is repeated until the data writing is completed. The process of is repeated.

After that, the writing of data to the non-volatile memory 21 is completed, and the processing in step 110 returns YE.
When it is determined to be S, it is determined whether or not there is data to be saved in the volatile memory 20 (step 120). If it is determined that there is data to be saved in the volatile memory 20 (step 120: YES), step 1
30, the data to be saved is stored in the nonvolatile memory 21.
(See FIG. 2E). Then, it is determined whether or not the data saving to the nonvolatile memory 21 is completed (step 140), and it is determined that the data saving to the nonvolatile memory 21 is completed (step 140:
(YES), the process proceeds to step 150, and writing of data to the non-volatile memory 21 is prohibited to prepare for power-off.

As described above, according to this embodiment,
After turning off the accessory switch SW, the nonvolatile memory 21
Also, a capacitor 90 for supplying power to the main CPU 10A is adopted. In addition to this, even when the accessory switch SW is turned off while writing data in the nonvolatile memory 21, the main CPU 10A can complete writing the data in the nonvolatile memory 21. Therefore, it is possible to avoid the interruption of the writing of data to the nonvolatile memory 21, and it is possible to avoid the loss of the data to be written to the nonvolatile memory 21.

Here, the capacitor 90 also supplies power to the volatile memory 20 after the accessory switch SW is turned off. Therefore, when the volatile memory 20 has data to be saved after the accessory switch SW is turned off, the main CPU 10A saves the data to be saved in the non-volatile memory 21. Therefore, it is possible to avoid the loss of data to be saved in the volatile memory 20.

Furthermore, the capacitor 90 supplies electric power to the volatile memory 20, the non-volatile memory 21, and the main CPU 10A only for a predetermined period TE after the accessory switch SW is turned off. Therefore, the accessory switch S
Power consumption can be suppressed as compared with the case where power is supplied during the off period of W.

The backup power supply device 40 shown in FIG. 5 is not used in the first embodiment. With this,
After turning off the accessory switch SW, the volatile memory 2
0, the nonvolatile memory 21, and the transistors 80 and 81 for switching the power supply device for supplying power to the main CPU 10A from the main power supply device 30 to the backup power supply device 40. Therefore, the configuration and processing can be simplified as compared with the configuration shown in FIG.

In the above embodiment, the example in which the capacitor 90 is used as the continuation means has been described, but the present invention is not limited to this, and various electronic parts and electronic parts can be used as long as they can store electric power and output the stored electric power. A circuit may be used. In particular, if a passive component such as a coil is used, the continuation means can be realized with a simple structure.

(Second Embodiment) In the first embodiment,
After turning off the accessory switch SW, the nonvolatile memory 2
1, the example in which the capacitor 90 is used for supplying power to the volatile memory 20 and the main CPU 10A has been described, but in the second embodiment, the operation of the semiconductor switch 70 is performed without using the capacitor 90, and the accessory switch is operated. An example will be described in which power is supplied to the nonvolatile memory 21, the volatile memory 20, and the main CPU 10A for a predetermined period TE after the SW is turned off. The configuration in this case is shown in FIG.

In the vehicle-mounted navigation device 1A of the second embodiment, as shown in FIG. 4, the capacitor 90 is deleted from the configuration shown in FIG. 1, and the reset CPU 60A shown in FIG. 1 is replaced with a reset CPU 60B. Is used. Other configurations are similar to those shown in FIG.

The reset CPU 60B is an in-vehicle battery B.
When power is directly supplied from a and a high level signal is received as a divided voltage from the common connection terminal 52 of the resistance elements 50 and 51, the semiconductor switch 70 is turned on. Further, the reset CPU 60B includes a built-in timer, and when receiving a low level signal as the divided voltage from the common connection terminal 52, starts the counting of the predetermined time TE based on the built-in timer, and after the completion of the counting of the predetermined time TE. To turn off the semiconductor switch 70.

As a result, even if the user turns on the accessory switch SW with the ignition key and turns off the accessory switch SW, the vehicle battery Ba is supplied to the main power supply unit 30 through the semiconductor switch 70 for a predetermined period. Power can be supplied over the TE. Therefore, the potential of the input terminal A of the main power supply device 30 is
As shown in FIG. 2F, the potential becomes equal to or higher than the minimum operable potential Vmin for a predetermined period TE after the accessory switch SW is turned off.

Along with this, the main power supply device 30 includes the non-volatile memory 21, the volatile memory 20, and the main CPU 10A.
On the other hand, when power is supplied for the predetermined period TE, the data writing operation of the non-volatile memory 21, the data reading operation of the volatile memory 20, and the operation of the main CPU 10A become possible for the predetermined period TE.

Further, the main CPU 10A is a reset CPU
When the power-off signal (which indicates that the accessory switch SW is turned off) is received from 60B, the data loss avoiding process is performed as in the first embodiment. Therefore, it is possible to avoid interruption of the writing of data to the non-volatile memory 21, and it is possible to avoid the loss of data to be written to the non-volatile memory 21. Further, it is possible to avoid the loss of the data to be saved after the accessory switch SW is turned off.

In the second embodiment, an example in which the reset CPU 60B is applied as the continuation means has been described, but the present invention is not limited to this, and when the power switch is turned off, the battery (vehicle-mounted battery Ba) is used. Based on the power supply from the nonvolatile memory 21 and the control unit (main C
Various electronic circuits may be adopted as long as the power supply to the PU 10) is continued for a predetermined period.

Further, in each of the above-described embodiments, an example in which the electronic device is applied to a vehicle-mounted navigation device has been described, but the present invention is not limited to this, and a portable navigation device,
It may be applied to various electronic devices such as communication devices such as mobile phones.

Furthermore, in each of the above-described embodiments, an example in which a flash memory is applied as the non-volatile memory 21 has been described, but the present invention is not limited to this, and data is written while power is supplied and data is held without power supply. If possible, various memories may be used.

Further, in each of the above-described embodiments, an example in which the CPU (main CPU 10A) is applied as the control unit has been described, but the present invention is not limited to this, and the non-volatile memory 21 is executed when the control process is executed. Various electronic circuits such as a DSP (digital signal processor) may be applied as long as data can be written in (and the volatile memory 20).

In each of the above embodiments, an example in which the semiconductor switch 70 is applied as the switch means has been described, but the present invention is not limited to this, and the nonvolatile memory 21, the control unit (main CPU 10A), the battery (vehicle-mounted battery Ba), and A mechanical relay may be used as long as it connects and disconnects between them. Furthermore, semiconductor switch 7
0 is not limited to the P-type FET, but a semiconductor element such as a bipolar transistor may be used.

Further, in each of the above-mentioned embodiments, the example in which the SDRAM is applied as the volatile memory has been described.
Not limited to this, various memories such as DRAM may be used as long as the data is written at the time of power supply, the data is retained, and the data is lost when the power supply is stopped.

Furthermore, in each of the above-described embodiments, an example in which the accessory switch SW that is turned on / off by operating the ignition key is applied as the power switch has been described, but the present invention is not limited to this, and regardless of the operation of the ignition key, Various switches may be used as long as they are turned on and off according to the operation of the user.

Furthermore, in each of the above-described embodiments, an example in which the main power supply device 30 that outputs a constant constant voltage is applied as the constant output supply means has been described, but the present invention is not limited to this, and the constant output based on the supplied power. Various electronic circuits may be applied as long as the power is supplied by.

In each of the above-described embodiments, an example in which the on-vehicle battery Ba mounted on the vehicle is applied as the battery has been described, but various batteries unrelated to vehicle mounting may be used.

Hereinafter, the correspondence relationship between each of the above-described embodiments and the configuration of the claims will be described. The main CPU 10
A and steps 100 to 150 correspond to the control section, the accessory switch SW corresponds to the power switch, step 100 corresponds to the determination means, step 110 corresponds to the avoidance means, and steps 130 and 140 correspond to the evacuation means. Equivalent to.

[Brief description of drawings]

FIG. 1 is a diagram showing an electric circuit configuration of a vehicle-mounted navigation device according to a first embodiment of the present invention.

FIG. 2 is an explanatory diagram of operations of a capacitor and a main CPU.

FIG. 3 is a flowchart showing an operation of a main CPU.

FIG. 4 is a diagram showing an electric circuit configuration of a vehicle-mounted navigation device according to a second embodiment of the invention.

FIG. 5 is a diagram showing an electric circuit configuration of a conventional vehicle-mounted navigation device.

FIG. 6 is an explanatory diagram of the operation of the main CPU of FIG.

[Explanation of symbols]

10A ... Main CPU, 21 ... Non-volatile memory, 90 ... Capacitor, SW ... Accessory switch.

Claims (9)

[Claims] 1. A non-volatile memory (21) which retains data without power supply, and a power supply from a battery (Ba), which executes a control process and stores the data in the non-volatile memory along with the execution of the control process. A control unit (10A, 10A that writes data to the
0-150) and the power switch (SW) is turned off,
Continuing means (90, 60B) for continuing the power supply to the non-volatile memory and the control unit for a predetermined period based on the power supply from the battery, and when the power switch is turned off. The electronic device is characterized in that the control unit controls the nonvolatile memory so as to avoid interruption of writing of the data. 2. The power supply from the battery to the nonvolatile memory and the control unit and the power supply to the nonvolatile memory and the control unit by connecting and disconnecting between the nonvolatile memory and the control unit and the battery. Switch means (70) for performing one of the stop of the non-volatile memory, and the non-volatile memory for supplying electric power from the battery to the non-volatile memory and the control unit when the power switch is turned on. Memory and a switch control means (60A) for connecting between the control unit and the battery by the switch means, and when the power switch is turned off, the switch control means In order to stop the power supply from the battery to the nonvolatile memory and the control unit, the nonvolatile memory and the The electronic device according to between the battery and the control section to claim 1, characterized in that blocked by the switch means. 3. The continuation means is supplied with electric power from the battery via the switch means, stores the supplied electric power, and stores the stored electric power in the nonvolatile memory and the control unit. The electronic device according to claim 2, wherein power is supplied to the nonvolatile memory and the control unit for the predetermined period by supplying the power for the predetermined period. 4. The electronic device according to claim 3, wherein the continuation unit is a capacitor. 5. A constant output supply means (30) for supplying electric power to the nonvolatile memory and the control section at a constant output based on electric power supplied from one of the battery and the continuation means. The electronic device according to claim 3 or 4. 6. The power supply from the battery to the nonvolatile memory and the control unit and the power supply to the nonvolatile memory and the control unit by connecting and disconnecting between the nonvolatile memory and the control unit and the battery. There is a switch means (70) for performing one of the stop of the supply, and the continuation means (60B) includes the nonvolatile memory and the control unit for the predetermined period from the time when the power switch is turned off. The electronic device according to claim 1, wherein power supply to the nonvolatile memory and the control unit is continued for the predetermined period by connecting the battery to the battery by the switch unit. 7. A constant output supply means (30) for supplying a constant output power to the nonvolatile memory and the control unit based on the power supplied from the battery via the switch means. The electronic device according to claim 6. 8. The determination unit (100) for determining whether or not the data is being written to the nonvolatile memory when the power switch is turned off. When the determining unit determines that the data is being written to the non-volatile memory, the avoiding unit (110) that completes the writing of the data to the non-volatile memory to avoid interruption of the data writing. ) And are included.
The electronic device according to any one of 1. 9. The power switch has a volatile memory (20) in which data is written when the control processing by the control unit is executed and the data is lost when the power is not supplied. In the case where it is done, the continuation means, the volatile memory, the non-volatile memory,
And, the power supply to the control unit is continued for the predetermined period, and the control unit (130, 140) saves the data written in the volatile memory to the non-volatile memory. The electronic device according to any one of claims 1 to 8, which is characterized.