JP2003233633A - Design method for integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To more easily and suitably assign functions required by specifications described in a program language to software and hardware. <P>SOLUTION: When the specifications of the integrated circuit are described in a C language (step 100), a database of a function block for dividing the function related to the specifications into a plurality of parts is created (step 110). A simulation model for simulating a designated function required by the above specifications with some of these functional blocks is created (step 120). Subsequently, the simulation model is operated on a computer, thereby detecting a part with a large number of communications between the function blocks (step 130, 140). Concerning the part with a large number of communications between the function blocks, grouping is performed taking a disable unit in assigning these function blocks to the software processing and hardware processing (step 150). <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for designing an integrated circuit having a central processing unit (processor), and more particularly to a method for assigning a function required by a specification written in a programming language to hardware and software.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a conventional design procedure for an integrated circuit of this type. As shown in FIG. 7, in this series of processing procedures, the specifications of the integrated circuit to be designed are first described in a programming language such as C language (step 300). When the specifications are described in the programming language in this way, a simulation model is created based on the specifications (step 310). Then, a simulation is executed based on this simulation model, and it is confirmed whether or not the program described above properly satisfies the desired function (step 320). Then, as a result of the simulation, when it is determined that the described program appropriately satisfies the desired function, each function required by the described specification is processed by hardware and software. Functions are assigned (step 330). That is, a central processing unit (processor) included in the integrated circuit
The function of software processing via the software and the function realized by dedicated hardware are separated.

[0003]

By the way, regarding the design of an integrated circuit having the above-mentioned central processing unit, the step of dividing and allocating the function realized by hardware and the function realized by software based on the specification is It has a great influence on the performance and cost of the integrated circuit. In other words, for an integrated circuit with a central processing unit,
It is important to select a combination of hardware and software function allocation that can perform processing within a given processing time and minimize cost factors (circuit scale, power consumption). Has become.

However, conventionally, it has been the actual situation that the function realized by the hardware and the function realized by the software are divided and assigned based on the experience of the designer. For this reason, after the function allocation is performed based on the experience as described above, as the further detailed design is advanced, the above-mentioned design constraint is not satisfied in the integrated circuit in some cases. Then, when the design constraint is not satisfied in this way, it is necessary to change the function allocation and redo from the upstream design process, resulting in a longer design period.

The present invention has been made in view of the above circumstances, and an object thereof is to design, in designing an integrated circuit having a central processing unit, functions required by software and hardware by a specification described in a programming language. It is an object of the present invention to provide a method of designing an integrated circuit that can be more easily and appropriately assigned to the integrated circuit.

[0006]

[Means for Solving the Problems] Means for achieving the above-mentioned objects and their effects will be described below. According to the invention described in claim 1, when designing an integrated circuit having a central processing unit, the design of the integrated circuit is performed by assigning the functions required by the specifications described by using the programming language to the hardware and the software. In an integrated circuit designing method to be performed, a functional block in which a function required by the specification is divided for each unit function is connected so as to correspond to an arbitrary operation of the specification, and an operation simulation is performed by a computer. Based on the information obtained as a result, the related functional blocks are grouped, and the grouped functional blocks are assigned to the hardware and software as a unit.

According to the above configuration, the functional block divided for each unit function is connected so as to correspond to the arbitrary operation of the specification and the simulation operation is performed, whereby the arbitrary operation of the specification is simulated. According to the information obtained as a result of this simulation, if it is better to make the functional blocks used for the simulation inseparable when allocating the functions to hardware or software, these should be considered as the related functional blocks to the designer's experience. You will be able to judge it regardless. Therefore, according to the above configuration, the function required by the specification described in the programming language can be appropriately assigned to the software and the hardware.

Here, the allocation to the software means the allocation to the processing performed by the central processing unit included in the integrated circuit based on the program stored in the storage device of the integrated circuit. Also, the program stored in this storage device does not necessarily match the program describing the above specifications. The programming language that describes the above specifications is a high-level description language such as C language or C ++ language, and the program stored in the storage device can be executed by the central processing unit by translating the programming language that describes the above specifications. It is desirable that the language be

According to a second aspect of the present invention, in the first aspect of the invention, each of the functional blocks has a function definition part defining the function and a communication definition part for calling the function definition part. The gist is that the connection of the functional blocks is performed as a definition of the connection between the communication definition units.

According to the above configuration, the functional block is configured to include a function defining section that defines a process related to the function and a communication defining section that calls the function defining section. Then, the connection of the functional blocks is performed as the definition of the connection between the communication definition units. Therefore, in the simulation,
It is possible to easily distinguish the processing performed in the actual integrated circuit from the processing required in the simulation but not performed in the actual integrated circuit. In other words, it becomes possible to easily distinguish the processing defined by the function definition unit from other processing.
Therefore, it is possible to easily grasp the actual operating characteristics of the integrated circuit by the simulation operation by the computer.

According to a third aspect of the present invention, in the first or second aspect of the present invention, as the information obtained as a result of the simulation, information regarding the functional blocks to be communicated and the number of communications for each functional block is provided. The gist is to acquire and group the related function blocks according to the number of communication between the acquired function blocks.

When the number of communications between the hardware and the software is large, the time required for the processing performed with the communications becomes long. Here, in the above configuration, as information obtained as a result of the simulation, information regarding the functional blocks to be communicated and the number of communications thereof is acquired for each of the functional blocks, and according to the number of communications between the acquired functional blocks. The related functional blocks are grouped. For this reason, it becomes possible to group those having a large number of communication between the functional blocks. Therefore, it becomes possible to suppress the communication overhead between the hardware and the software.

According to a fourth aspect of the present invention, in the third aspect of the present invention, as information obtained as a result of the simulation, information regarding a processing time in each of the functional blocks is acquired, and the obtained processing in each of the functional blocks is acquired. It is possible to calculate the total amount of processing time for each group of the functional blocks grouped on the basis of time-related information, and preferentially perform function allocation to the hardware from a group having a larger total amount of calculated processing time. The summary will be given.

In the above configuration, as the information obtained as a result of the simulation, the information regarding the processing time in each functional block is acquired. Then, the total amount of processing time for each group of the functional blocks grouped is calculated based on the acquired information regarding the processing time in each functional block. Then, the function is assigned to the hardware with priority given to the group having the largest total processing time for each group. As described above, the processing time in the integrated circuit can be appropriately suppressed by preferentially assigning the function related to the group having a long processing time to the hardware.

According to a fifth aspect of the present invention, in the third aspect of the invention, after the grouping, the operation simulation by the computer is performed again, and the grouped functional blocks are obtained as information obtained as a result of the simulation. The gist of the present invention is to acquire the total amount of processing time for each group and preferentially allocate the function to the hardware from the group having the larger total amount of acquired processing time.

In the above configuration, after grouping, the operation simulation by the computer is performed again, and the total amount of processing time for each group of the grouped functional blocks is acquired as information obtained as a result of this simulation. Then, the processing time can be suitably suppressed by preferentially assigning the function related to the group having a long processing time to the hardware.

According to the invention described in claim 4 or 5, the function allocation to the hardware for each of the grouped functional blocks is designed as the integrated circuit according to the invention described in claim 6. It may be executed sequentially until the constraint is satisfied.

According to a seventh aspect of the invention, in the invention according to any one of the first to sixth aspects, the functional blocks divided for each unit function are registered in a database in advance,
The gist is that the required functional block group is selected from the database according to the desired specifications of the integrated circuit.

According to the above configuration, when newly designing an integrated circuit, it is possible to reduce the number of man-hours required for description of specifications in a programming language and for the simulation after description of specifications.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of a method for designing an integrated circuit according to the present invention will be described below with reference to the drawings.

In this embodiment, the specification of the integrated circuit to be designed is described in C language. Then, the functions required by the specifications described in the C language are
Work on assigning to hardware and software. In other words, each of the required functions is selected to be realized by hardware or by software processing via a central processing unit included in the integrated circuit.

FIG. 1 shows the configuration of a design support device for supporting the design of the integrated circuit. As shown in FIG. 1, the design support apparatus includes a computer 10 that translates a program written in C language into a machine language and executes a process written in the C language. The computer 10 also includes a main storage device 20 such as a memory accessible by the computer 10 and an auxiliary storage device 30 such as a disk medium. Further, an input device 40, such as a keyboard or a mouse, for accessing the computer 10 from the outside, a calculation result of the computer 10, data stored in the main storage device 20, and an auxiliary storage device 30.
An output device 50, such as a display, that outputs the data stored in

FIG. 2 shows a design procedure of an integrated circuit performed using the design support device. As shown in FIG. 2, first, in step 100, the specifications of the integrated circuit to be designed are described in C language. Next, step 11
0, a function block database is created by dividing the functions required by this specification into a plurality of blocks, and the function block database shown in FIG.
It is stored in the auxiliary storage device 30 of. This division of functions divides the functions required by the above specifications into unit functions that have predetermined functions by themselves. For example, when a function related to communication is required by the above specifications, this can be divided into a unit function of a transmission function and a reception function. Further, the transmission function and the reception function can be further divided by dividing the transmission function into unit functions such as a filter processing function and an encoding function.

FIG. 3 shows an example of the functional block database thus divided. As shown in FIG. 3, each functional block forming the database is composed of a function definition section and a communication definition section. Here, the function definition section is made up of data that defines processing related to the function. Further, the communication definition part is composed of data for calling the function definition part of the function block to which the communication definition part belongs.

FIG. 4 shows an example of functional blocks. Here, a functional block for a function of calculating an average value of 10 pieces of input data is shown. As shown in FIG. 4, the function definition part of this function block is input 10
It is composed of a program written in C language for calculating and outputting the average value of each piece of data. By the way, here
“Fnc filter” is defined as a function that calculates and outputs an average value of 10 pieces of input data.

On the other hand, as shown in FIG. 4, the communication definition unit calls the function definition unit and defines the input data for the processing of the function definition unit and the output data for the processing of the function definition unit. To do. Specifically, the communication definition unit shown in FIG. 4 calls the above function “fnc filter” as a function of calculating and outputting an average value of 10 pieces of input data, and inputting data to the function and It is composed of a program written in C language for defining output data from the function.

When the functional block database is constructed using the functional blocks constructed in this way, as shown in step 120 of FIG. 2 above, these are used to perform any operation (specification of the integrated circuit assumed based on the above specifications). Create a simulation model that simulates the behavior of any of the above). In other words, a simulation model for a predetermined function required by the specifications is created. Here, the predetermined function is a series of functions related to the operation assumed in the integrated circuit to be designed among the functions required by the above specifications.

For example, when a function relating to communication is required by the above specifications, encoding processing, filtering processing, etc.
Create a model that simulates a series of processing related to transmission. In this simulation model, when there are a plurality of expected operations in the integrated circuit to be designed, a simulation model is created for each of these operations. At this time, it is desirable to create a simulation model for all expected operations.

This simulation model is constructed by defining the connections between the communication definition units of the respective functional blocks relating to the above-mentioned predetermined functions. That is, for each communication definition part, a communication definition part for inputting data to it and a communication definition part for outputting data are defined. In addition,
The communication definition part serving as the data input end and the communication definition part serving as the data output end are defined accordingly. Specifically, the definition of the connection between the communication definition units is described in C language. As a result, the simulation model becomes a program that describes a series of functions related to expected operations in the integrated circuit to be designed.

By constructing the simulation model by defining the connections between the communication definition units in this way, the processing performed in the actual integrated circuit and the processing required in the simulation but not performed in the actual integrated circuit are performed. It can be easily distinguished from processing. Therefore, it becomes possible to easily grasp the actual operating characteristics of the integrated circuit by the simulation using the simulation model.

The simulation model created in this way is stored in the main storage device 20 shown in FIG.
Then, in step 130 shown in FIG. 2, the simulation model is operated on the computer 10 shown in FIG. Here, a test signal model corresponding to the simulation model is separately prepared and supplied to the computer 10 via the input device 40 shown in FIG. Calculator 10
In (1), the test signal model is input from the input end of the simulation model to be simulated, and the operation of the simulation model is monitored until a predetermined process is performed on the test signal model. Specifically, this monitor operation is the number of communications, which is the number of communication transmissions between the functional blocks, and the number of cycles required for processing in each functional block. Here, the number of cycles is the number of operating clocks of the computer 10 required from the input of data to the functional block to the completion of the predetermined processing and the output thereof.

It is desirable to prepare a plurality of test signal models corresponding to the above simulation models.
This makes it possible to accurately deal with the case where the operation of the integrated circuit simulated by the simulation model can be changed by a given input signal. Then, when a plurality of test signal models are used in this way, the monitor result of the operation may be statistically processed. That is, the number of communications and the number of processing cycles may be statistically processed when each test signal model is used.

When the simulation is executed in this way, in step 140, information about the result of the simulation is stored in the auxiliary storage device 30 shown in FIG. The information regarding the result of this simulation is data regarding the operation of the monitored simulation model. That is, the number of communications between the functional blocks and the number of processing cycles in each functional block.

The information regarding the result of the simulation stored in the auxiliary storage device 30 in this way is appropriately output through the output device 50. And step 15 of FIG.
At 0, the functional blocks are grouped into units of allocation to hardware and software based on the information regarding the result of the simulation output by the output device 50. More specifically, this grouping is an operation in which, in the operation of each simulation model, these functional blocks are grouped into the same group in order from the functional block having the largest number of communications. This grouping may be performed, for example, for functional blocks whose communication count is greater than or equal to a predetermined value.

FIG. 5 shows an example of this grouping. As shown in FIG. 5, since the number of communications between the functional blocks B and C is large, the functional blocks B and C are in the same group (group 2). Further, since the number of communications between the functional blocks D and E is large, the functional blocks D and E are also in the same group (group 3). Further, regarding the functional block A, since the number of communications with other functional blocks is not particularly large, a group (group 1) is independently configured.

As described above, by grouping those having a large number of communication between the functional blocks, it becomes possible to suppress the communication overhead between the hardware and the software in the integrated circuit. As a result, it is possible to prevent the processing time from being lengthened due to the processing being performed with communication between the hardware and the software.

When there are a plurality of simulation models, the number of communications between the functional blocks monitored for each simulation model is statistically processed, and grouping is performed based on the number of communications subjected to the statistical processing.

When the grouping is performed in this way, the data relating to the grouped functional blocks is stored in the main storage device 20 via the input device 40.
Then, in step 160 shown in FIG. 2, the functional blocks are assigned to hardware and software for each functional block.

Next, with reference to FIG. 6, a procedure for allocating the hardware and the software will be described. Here, first, in step 200, the total number of processing cycles of each group is calculated using the number of processing cycles of each functional block among the simulation results stored in the auxiliary storage device 30. Then, in step 210, the total number of processing cycles of the simulation model is calculated based on the total number of processing cycles for each group. Then, in step 220,
Based on the total number of processing cycles of the calculated simulation model, it is determined whether or not this satisfies the design constraint. Here, the design constraint is a constraint on the processing time required for the operation (processing) of the integrated circuit simulated by the simulation model. Note that here, this design constraint is set as a predetermined number of cycles.

If it is determined in step 220 that the number of processing cycles (processing time) of the simulation model does not satisfy the design constraint, the process proceeds to step 230. In this step 230, each function of the functional blocks related to the group having the maximum total number of processing cycles among the groups forming the simulation model is assigned to the hardware. Then, in step 240, the number of processing cycles of the group assigned to the hardware is subtracted from the number of processing cycles of the simulation model. This step is the same as step 23 above.
It is roughly estimated that the number of processing cycles of the simulation model is reduced by assigning a group having a large number of processing cycles to 0 by hardware. Here, considering that the processing time of hardware processing is faster than that of software processing, the processing time required for hardware processing is approximately set to “0”.

In this manner, in consideration of the fact that the number of processing cycles of the simulation model is reduced by assigning the group having a large number of processing cycles to the hardware in the above step 230, it is judged in step 220 whether or not the design constraint is satisfied again. To be done. This step 22
The process of 0 to 240 is performed in step 220.
The process is repeated until it is determined that the design constraint is satisfied. And
When it is determined that the design constraint is satisfied, the function allocation to software and hardware is terminated. That is, at this time, the function related to the group assigned to the hardware is assigned to the hardware, and the other functions are assigned to the software. In addition,
The functions assigned to this hardware are stored in the main storage device 20.

Thus, by gradually increasing the allocation to the hardware until the design constraint is satisfied,
It is possible to suppress allocation to hardware as much as possible,
As a result, the circuit scale of the integrated circuit can be suppressed.

When a plurality of simulation models are included, the process shown in FIG. 6 is performed for each simulation model. Then, for all simulation models, the function associated with the group assigned to the hardware at the time when it is determined that the design constraint is satisfied is assigned to the hardware.

The data written in the C language that describes the functions assigned to the software is a program that can be executed by the central processing unit provided in the integrated circuit after being modified in the subsequent design process. It is translated into a language and stored in a storage device in the integrated circuit.

According to this embodiment described above, the following effects can be obtained. (1) Those in which the number of communications between the functional blocks is large when the simulation model is operated by the computer are grouped. Therefore, it becomes possible to suppress the communication overhead between hardware and software in the integrated circuit. Therefore, it is possible to suppress the extension of the processing time when the number of communications between the hardware and the software is large, and it is possible to appropriately perform the function allocation to the hardware and the software.

(2) The total number of processing cycles of each group was calculated based on the number of processing cycles of each functional block when the simulation model was operated by the computer. Then, the allocation of each group to the hardware and the software was performed in order from the largest sum of the number of processing cycles for each group. As a result, the processing time in the integrated circuit can be appropriately suppressed while the circuit scale of the integrated circuit is preferably suppressed.

(3) The function block is configured to include a function definition section that defines the processing related to the function and a communication definition section that calls the function definition section. Then, the simulation model is constructed by defining the connection between the communication definition units. Therefore, in the simulation model,
It is possible to easily distinguish the processing performed in the actual integrated circuit from the processing required in the simulation but not performed in the actual integrated circuit. Therefore, it becomes possible to easily grasp the actual operating characteristics of the integrated circuit by the simulation using the simulation model.

(4) The number of processing cycles was used as an index of the processing time of the functional block. Accordingly, even when the operating speed of the computer and the operating speed of the central processing unit of the integrated circuit are different, the processing time of these computers and the processing time of the central processing unit can be easily associated with each other.

The above embodiment may be modified and implemented as follows. -In the above-mentioned embodiment, when there are a plurality of test signal models, the monitor result by each of these test signal models was statistically processed, but it is not limited to this. For example, it is possible to adopt the result that is the most obstructive in satisfying the design constraint among the monitoring results, such as the one with the largest number of communications or the one with the largest number of processing cycles.

An arbitrary parameter indicating the processing time may be used instead of the number of processing cycles. In the above embodiment, when there are a plurality of simulation models, the number of communications between the functional blocks monitored for each simulation model is statistically processed, and grouping is performed based on the number of communications subjected to the statistical processing. Not limited to For example, the corresponding functional blocks may be grouped in order from the one having the largest communication number between the functional blocks corresponding to each simulation model without considering the number of the simulation models having the large communication number. Further, among functional blocks that may have a large number of communications, the larger the number of simulation models having a large number of communications, the more functional blocks may be grouped with priority.

In the above-described embodiment, the processing by the computer is not particularly assumed for the grouping work based on the information about the result of the simulation. But,
Grouping may be automatically performed based on the number of communications.

Allocation from the group having the maximum number of processing cycles (processing time) to the hardware does not necessarily have to be performed. For example, if there is a function that is desired to be processed by hardware due to other constraints, it may be implemented by hardware when the design constraint is not satisfied, regardless of the processing time of the group including this.
In short, it is only necessary to give priority to the allocation from the group having a large number of processing cycles (processing time) to the hardware.

The simulation result in step 140 shown in FIG. 2 may not include the number of processing cycles (processing time) for each functional block. In this case, after grouping, the simulation is performed again to calculate the number of processing cycles (processing time) for each group. Then, based on this, the group having the maximum number of processing cycles (processing time) is preferentially assigned to the hardware.

In the above-described embodiment, the processing by the computer is not particularly assumed for the work of allocating the hardware and the software based on the information about the result of the simulation. However, the allocation may be automatically performed based on the processing time and the like.

In the above embodiment, the program language executable by the computer 10 in which the simulation model described in C language is translated and the program language executable in the central processing unit included in the integrated circuit to be designed are provided. The correspondence was not specified. However, if these two programming languages are made equal, it is possible to more appropriately grasp the actual operation of the integrated circuit in the process of assigning functions to the above hardware and software.

In the above embodiment, the C language is illustrated as the programming language for describing the specifications, but the programming language is not limited to this. At this time, it is desirable to use a high-level description language such as a C ++ language. In this case, a program that can be executed by the central processing unit is translated into the storage device included in the integrated circuit. It is desirable to be stored. Further, at this time, a computer having a function of translating and simulating the high-level description language is used.

The integrated circuit is not limited to the configuration in which the program that can be executed by the central processing unit is stored because the programming language that describes the specifications is translated. For example, the integrated circuit may be configured to include an interpreter that immediately interprets and executes the programming language that describes the specifications, and stores the programming language that describes the specifications.

The function block is not limited to the configuration including the function definition section and the communication definition section. For example, a simulation model can be created even with a configuration including only the function definition unit.

By holding a database of functional blocks such as the database shown as an example in the above embodiment,
The required functional block group may be selected from the database according to the desired specifications of the integrated circuit. As a result, when newly designing an integrated circuit, it is possible to reduce the number of man-hours required for description of specifications in a programming language and for the simulation after description of specifications.

[Brief description of drawings]

FIG. 1 is a block diagram showing the overall configuration of a design support apparatus used in an embodiment of an integrated circuit designing method according to the present invention.

FIG. 2 is a flowchart showing a design procedure according to the embodiment.

FIG. 3 is a diagram showing an example of a functional block database in the same embodiment.

FIG. 4 is a diagram illustrating a configuration of the same functional block database.

FIG. 5 is a diagram showing an example of grouping of functional blocks in the same embodiment.

FIG. 6 is a flowchart showing a design procedure according to the embodiment.

FIG. 7 is a flowchart showing a conventional integrated circuit design procedure.

[Explanation of Codes] 10 ... Calculator, 20 ... Main storage device, 30 ... Auxiliary storage device, 40 ... Input device, 50 ... Output device.

Claims (7)

[Claims] 1. When designing an integrated circuit having a central processing unit, the function required by a specification written in a programming language is assigned to hardware and software, thereby designing the integrated circuit. In the design method, a function block in which the function required by the specification is divided for each unit function is connected so as to correspond to an arbitrary operation of the specification, an operation simulation is performed by a computer, and the result of this simulation is obtained. A method for designing an integrated circuit, comprising grouping functional blocks associated with each other based on information, and allocating the grouped functional blocks to the hardware and software as a unit. 2. Each of the functional blocks is described as having a function defining section that defines the function and a communication defining section that calls the function defining section, and the connection of the functional blocks is defined by the communication definition. The method for designing an integrated circuit according to claim 1, which is performed as a definition of connection between parts. 3. As information obtained as a result of the simulation, for each of the functional blocks, information regarding the functional block to be communicated and the number of communications is acquired, and according to the number of communications between the acquired functional blocks. 3. The integrated circuit design method according to claim 1, wherein the related functional blocks are grouped. 4. The integrated circuit design method according to claim 3, wherein, as information obtained as a result of the simulation, information about processing time in each of the functional blocks is acquired, and the acquired processing time in each of the functional blocks is acquired. A feature is that a total amount of processing time for each group of the functional blocks grouped is calculated based on information, and a function having a larger total amount of the calculated processing time is preferentially assigned to the hardware. Integrated circuit design method. 5. The integrated circuit design method according to claim 3, wherein after the grouping, the operation simulation by the computer is performed again, and the group of the functional blocks grouped as information obtained as a result of the simulation. A method for designing an integrated circuit, wherein a total amount of processing time for each is acquired, and a function having a larger total amount of the acquired processing time is preferentially assigned to the hardware. 6. The method for designing an integrated circuit according to claim 4, wherein the function assignment to the hardware for each of the grouped functional blocks is sequentially executed until a design constraint for the integrated circuit is satisfied. . 7. A functional block divided for each unit function is registered in a database in advance, and a required functional block group is selected from the database according to a desired integrated circuit specification. 7. The method for designing an integrated circuit according to claim 1, further comprising: