JP2003215535A - Liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display capable of ensuring brightness necessary for achieving satisfactory display by increasing ratio of light-emitting time to one frame period. <P>SOLUTION: The liquid crystal display 1 is adapted to have a period (non- video signal write period) Tc required for writing non-video signals different from video signals onto all the pixels before a video signal write period Ta. In the non-video signal write period Tc, the non-video signals are written onto the respective pixels, thereby starting response of the liquid crystal before the start of the video signal write period Ta. In the non-video signal write period Tc, a backlight is turned off, thereby prevents image degradation even when the non-video signals are written onto the respective pixels. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device capable of ensuring a sufficient light emission time in one frame period.

[0002]

2. Description of the Related Art In recent years, an active matrix type liquid crystal display device (hereinafter referred to as a liquid crystal display device) has been widely used as a display device used in a personal computer regardless of whether it is a notebook type or a desktop type.

In a conventional liquid crystal display device, a color filter system is generally used in which white light passes through a color filter of three primary colors of red, green, and blue provided in each pixel to perform color display. However, since such a color filter type liquid crystal display device displays three pixels of red, green and blue as one range as described above, its resolution is the liquid crystal of the liquid crystal display device. This is one third of the number of pixels included in the display panel. Therefore, for example, 64
In the case of a liquid crystal display panel having 0 × 3 × 480 pixels, only an image corresponding to the resolution of VGA standard (640 × 480) can be displayed. Similarly, 8
In the case of a liquid crystal display panel having 00 × 3 × 600 pixels, only an image corresponding to the resolution of SVGA standard (800 × 600) can be displayed. In other words, in order to obtain an image corresponding to a certain resolution, the number of pixels three times that is required.

In order to solve such a problem of resolution, unlike a conventional color filter system, a liquid crystal display of a field sequential color system in which one pixel is time-divided into three primary colors to emit light to perform color display. The device is being researched. In the case of this field sequential color system, one frame period is time-divided into three subframe periods, and red, green, and blue light emitting diodes (hereinafter, referred to as
The LED) is emitted to display an image corresponding to each color. In such a field sequential color system, no color filter is required, and the same resolution as the number of pixels of the liquid crystal display panel can be obtained.

FIG. 42 is a timing chart showing an example of a display operation in a conventional field sequential color type liquid crystal display device. FIG. 42 (a) shows a timing of outputting a scanning signal to a gate line of a liquid crystal display panel, (B) is a waveform of a video signal output to an arbitrary source line 32 of the liquid crystal display panel, (c) is a change in transmittance of pixels in each row of the liquid crystal display panel, and (d) is a backlight LED. The light emission time is shown. In addition,
Here, an example will be described in which display is performed in the red and green subframe periods, and display is not performed in the blue subframe period. Note that FIG. 42 illustrates the case where the liquid crystal display panel has N rows of pixels. Also,
In FIG. 42B, the waveform of the video signal is shown for the purpose of facilitating the understanding of the display operation, and the waveform of the actual video signal is not limited to this.

As shown in FIG. 42A, the liquid crystal display device sequentially outputs scanning signals to the gate lines from the first row to the Nth row in each sub-frame period. As a result, the switching element connected to each gate line is turned on, and the video signal corresponding to red, green or blue output to the source line is sequentially written to each pixel electrode as shown in (b). . As a result, as shown in FIG. 42 (c), the transmittance of the pixels in each row of the liquid crystal display panel rises or falls. In addition, the backlight is, as shown in FIG. 42 (d), in a part of each sub-frame period,
Red, green, and blue LEDs are sequentially emitted.

The video signal written in each pixel electrode as described above is generated by compressing the video signal corresponding to red, green or blue input from the outside to 1/3 or less in the time axis direction. It is the signal that was made.

[0008]

As shown in FIG. 42, in the conventional field-sequential color liquid crystal display device, a period required to write a video signal to all pixels (hereinafter referred to as a video signal writing period). Ta) and the period required for the liquid crystal to sufficiently respond in the pixel associated with the gate line to which the scanning signal is finally output (the gate line in the Nth row in FIG. 42) (hereinafter, referred to as
After the elapse of Tb (referred to as the liquid crystal response period), the backlight LED emits light. Therefore, when the response speed of the liquid crystal is slow, that is, when the liquid crystal response period Tb becomes long, the light emission time Th of the LED becomes short accordingly. As a result, the LED required to obtain sufficient brightness
However, there is a problem that it may not be possible to secure the light emission time Th.

In order to solve such a problem, it is considered that the LED is made to emit light before the above-mentioned liquid crystal response period Tb has elapsed. FIG. 43 is a timing chart showing an example of the display operation in the conventional field sequential color liquid crystal display device when the LEDs are made to emit light before the liquid crystal response period Tb has elapsed.

Referring to FIG. 43 (d), FIG. 42 (d)
The light emission time Th of the LED in each sub-frame period is longer than that in the above case. This makes it possible to obtain sufficient brightness.

However, as shown in FIG. 43 (c), the later the scanning signal is output, that is, the closer to the Nth row, the later the response of the liquid crystal in the pixel corresponding to the gate line is delayed. As a result, as shown in FIG. 44, in the plane of the liquid crystal display panel, a luminance gradient that the luminance in each pixel becomes lower as it goes in the scanning direction appears. Therefore, there is a problem that luminance unevenness occurs on the display screen and the image quality deteriorates. Here, the scanning direction means the direction in which the scanning signal is output to each gate line. Therefore, when scanning signals are sequentially output from the first-row gate line to the N-th gate line, this scanning direction indicates the direction from the first row to the N-th row.

Further, in the case of the field sequential color system, there occurs a problem that color breakup occurs when displaying a moving image. Here, color breakup is a phenomenon in which a color that does not actually exist is observed on the contour of the image, and when the LEDs are emitted in the order of red, green, and blue, the object to which the observer's eyes move This is because the front end of the target object is observed red and the rear end thereof is observed blue as well. For details of color breakup, see Japanese Patent Application Laid-Open No. 8-516.
It is disclosed in Japanese Patent No. 33.

This color breakup is mitigated by increasing the number of subframe periods in one frame period. This is because as the number of sub-frame periods increases, the period in which a single color is perceived and the light emission interval of the LEDs of each color become shorter.

However, when the number of sub-frame periods is increased in this way, the number of times a scanning signal is output in one frame period is increased, so that the ratio of the above-mentioned video signal writing period Ta in each frame period is increased. . As a result, the light emission time Th in each sub-frame period is shortened, so that there is a problem that it is not possible to secure the brightness necessary for realizing good display.

The present invention has been made in view of the above circumstances, and an object thereof is to increase the proportion of the light emission time in each frame period as compared with the conventional case so that the brightness required for realizing a good display is obtained. An object of the present invention is to provide a liquid crystal display device capable of ensuring the above.

Another object of the present invention is to provide a liquid crystal display device capable of reducing color breakup by increasing the number of subframe periods in one frame period.

[0017]

In order to solve the above-mentioned problems, a liquid crystal display device according to the present invention has a plurality of gate lines and a plurality of source lines arranged so as to intersect each other in a matrix. Conduction / non-conduction between the pixel electrode and the source line is switched according to a scanning signal supplied via the gate line, which is provided corresponding to each of the arranged pixel electrode and the pixel electrode. Accordingly, an array substrate having a switching element capable of writing a video signal supplied via the source line to the pixel electrode, a counter substrate facing the array substrate, and between the array substrate and the counter substrate. And a potential difference between the liquid crystal layer formed by filling the liquid crystal with the pixel electrode and the counter substrate or the array substrate. A counter electrode that drives the liquid crystal; and an illuminating device that has a light source that emits light of a plurality of colors. One frame period of the video signal includes a plurality of subframe periods, and the plurality of colors for each subframe period. The lighting device is controlled to emit colored light of one color to the liquid crystal layer, and a predetermined writing is performed on the pixel electrode in the order of first writing and second writing in at least one sub-frame period. By writing a signal, a video signal relating to the sub-frame period is supplied to the pixel electrode to drive the liquid crystal and display a video corresponding to the video signal.

With this structure, for example, when a video signal is written in each pixel electrode by the second writing, the first writing is performed to cause the liquid crystal to respond in advance, thereby shortening the liquid crystal response period as compared with the conventional case. It becomes possible. As a result, the light emission time in one frame period can be secured longer than in the conventional case,
A sufficiently bright and good display can be realized.

In the liquid crystal display device according to the invention, a non-video signal different from a video signal is written to at least some of the pixel electrodes in the first writing, and a video signal is written to each of the pixel electrodes in the second writing. It may be written. When a non-video signal is written in each pixel electrode in this way, the liquid crystal responds before the display signal voltage is applied to those pixel electrodes.
As a result, the light emission time in one frame period can be made longer than in the conventional case.

In this case, the liquid crystal is in the OCB mode (Opti
A liquid crystal of cally self-Compensated Birefringence mode) or a liquid crystal having spontaneous polarization may be used. These liquid crystals have a conventional TN mode (Twisted-Nemati).
Response is extremely fast compared to liquid crystals such as c mode). Therefore, the liquid crystal response period can be further shortened.

Further, in the liquid crystal display device according to the present invention, the voltage corresponding to the non-video signal is 0 V or more and less than or equal to the intermediate voltage between the voltage for white display and the voltage for black display. May be This makes it possible to speed up the response of the liquid crystal when the high voltage is changed to the low voltage.

In the liquid crystal display device according to the present invention, the first non-video signal close to the voltage for black display and the second non-video signal close to the voltage for white display in the first writing are in this order. The pixel electrodes may be written in.

Further, in the liquid crystal display device according to the invention, the non-video signal may be written to the pixel electrodes of all the gate lines at substantially the same timing in the first writing. By applying such a first non-display signal voltage, it is possible to improve the disconnection of the moving image and prevent the liquid crystal alignment state from reverse transitioning from bend alignment to splay alignment in the OCB mode, for example. Etc. are possible.

In the liquid crystal display device according to the invention, the plurality of gate lines are divided into a plurality of blocks, and the scanning signals are output to the gate lines at substantially the same timing for each block in the first writing, The non-video signal may be written to the pixel electrodes associated with the gate lines of each block at substantially the same timing. As a result, the video display device of the present invention can be realized with a simple circuit configuration.

In addition, in the liquid crystal display device according to the invention, the illuminating device emits light from one main surface, and the brightness decreases in the main surface in the scanning direction. It may have a distribution.
This makes it possible to correct the brightness inclination in the plane of the liquid crystal display panel as described above with reference to FIG. Therefore, even when the lighting device is turned on before the liquid crystal response period described above elapses, it is possible to suppress the occurrence of uneven brightness.

Further, in the liquid crystal display device according to the invention, a part of an image to be displayed in the sub-frame period is displayed by the first writing, and is displayed by the first writing and the second writing. All of the images to be displayed may be displayed.

With this configuration, before displaying all the images by the second writing, by writing the image signal related to a part of the images by the first writing and making the liquid crystal respond in advance, the conventional method can be realized. The liquid crystal response period can be shortened as compared with the case. As a result, the light emission time in one frame period can be secured longer than in the conventional case, and sufficiently bright and good display can be realized.

In this case, in order to further shorten the liquid crystal response period, the liquid crystal may be an OCB mode liquid crystal or a liquid crystal having spontaneous polarization.

In addition, in the liquid crystal display device according to the invention, a video signal to be written to one pixel electrode among a plurality of pixel electrodes adjacent to each other in the direction of arrangement of the gate lines in the first writing is applied to the plurality of pixel electrodes. Write to
A video signal may be written in each of the remaining pixel electrodes of the plurality of pixel electrodes in the second writing.

In the liquid crystal display device according to the invention, the same signal is written to a plurality of pixel electrodes adjacent to each other in the arrangement direction of the gate lines in the first writing, and each of the plurality of pixel electrodes is written in the second writing. You may make it write a video signal into.

Further, in the liquid crystal display device according to the invention, the same signal corresponds to a video signal corresponding to the highest voltage or a lowest voltage of the video signals to be written in each of the plurality of pixel electrodes. It may be used as a video signal.

In the liquid crystal display device according to the invention, the same signal may be a signal of an average value of video signals to be written in each of the plurality of pixel electrodes. As a result, the liquid crystal of each pixel can be made to respond uniformly on the basis of the first writing, so that the liquid crystal response period can be shortened without causing a significant image deterioration by only performing a simple calculation. .

Further, in the liquid crystal display device according to the invention, the same signal may be one of the video signals to be written in each of the plurality of pixel electrodes.

Further, in the liquid crystal display device according to the invention, the same signal is arranged in an odd number of the plurality of pixel electrodes in one subframe period of two consecutive subframe periods. The video signal may be the video signal to be written to the pixel electrode associated with the gate line, and may be the video signal to be written to the pixel electrode associated with the even-numbered gate line of the plurality of pixel electrodes in the other sub-frame period. . In this way, it is desirable that even if the image is deteriorated, the deterioration is not biased to either the odd number or the even number.

Further, in the liquid crystal display device according to the invention, a signal corresponding to a voltage having the same polarity may be written in the first writing and the second writing. As a result, the voltage difference between the signals written by the first writing and the second writing becomes small, so that the pixel electrode to which the signals are written requires less charging.

Further, in the liquid crystal display device according to the above invention, in one subframe period of two consecutive predetermined subframe periods, signals are sequentially written in a predetermined order for each pixel electrode of the gate line, and In the sub-frame period, the signal may be sequentially written for each pixel electrode of the gate line in the order opposite to the one sub-frame period. As a result, even if the luminance gradient occurs according to the scanning direction, the inclination direction of the luminance gradient changes for each sub-frame period, so that deterioration of the image is less likely to be perceived.

In the liquid crystal display device according to the present invention, the scanning signal is output to each gate line during the second writing while the scanning signal is output to each gate line during the first writing. It may be longer than the period.

In addition, in the liquid crystal display device according to the invention, after the white display signal is written in at least a part of the pixel electrodes in the first writing, a plurality of pixels adjacent in the arrangement direction of the gate lines in the first writing are arranged. A video signal to be written to one pixel electrode of the electrodes is written to the plurality of pixel electrodes, and a video signal is written to each of the remaining pixel electrodes of the plurality of pixel electrodes in the second writing. Good. Further, in this case, the liquid crystal may be an OCB mode liquid crystal.

Further, in the liquid crystal display device according to the invention, a black display signal is written to a part of the pixel electrodes in the first writing, and a video signal is written to the remaining pixel electrodes, and the part of the pixel electrodes is written in the second writing. The video signal may be written to the pixel electrodes and the black display signal may be written to the remaining pixel electrodes.

Further, in the liquid crystal display device according to the invention, the black display signal may be written after the video signal is written in the first writing and the second writing.

Further, in the liquid crystal display device according to the above invention, the black display signal may be written into the pixel electrodes associated with the plurality of gate lines at substantially the same timing. As a result, the writing period can be shortened, and the light emission time can be lengthened accordingly.

In the liquid crystal display device according to the present invention, the liquid crystal is occluded in order to shorten the liquid crystal response period.
A B-mode liquid crystal or a liquid crystal having spontaneous polarization may be used.

Further, in the liquid crystal display device according to the present invention, black display may be performed by the pixels corresponding to the same gate line over a plurality of consecutive subframe periods.

Further, in the liquid crystal display device according to the present invention, the one frame period may be composed of a number of sub-frame periods which is larger than the number of colors emitted by the light source.

Further, in the liquid crystal display device according to the invention, the illuminating device may be controlled so as to emit light of different colors in two consecutive sub-frame periods.

Further, in the liquid crystal display device according to the invention, the number of subframe periods relating to a specific one of the plurality of colors is larger than the number of subframe periods relating to other colors in the one frame period. The lighting device may be controlled as described above.

In the liquid crystal display device according to the present invention, the number of gate lines for supplying the scanning signal when writing the black display signal may be different depending on the sub-frame period for each color.

In the liquid crystal display device according to the invention, the illuminating device has light sources for emitting red, green, and blue color lights, respectively, and the number of gate lines to be scanned is in a green subframe period. In some cases, the lighting device may be controlled to have the largest number of cases and the smallest number of cases in the blue sub-frame period.

Further, in the liquid crystal display device according to the invention, the illuminating device has light sources which emit colored lights of red, green, and blue, respectively, and of the red, green, and blue for each subframe period. The illuminating device may be controlled so as to emit color light of one color or a color of a color generated by a combination of at least two colors of red, green, and blue to the liquid crystal layer.

Further, in the liquid crystal display device according to the invention, the illuminating device has light sources for emitting at least red, blue, and green color lights, respectively, and one of the colors is provided for each subframe period. The illuminating device may be controlled so as to emit the colored light of the above to the liquid crystal layer.

In addition, the liquid crystal display device according to the present invention corresponds to a plurality of gate lines and a plurality of source lines arranged so as to intersect with each other, pixel electrodes arranged in a matrix, and the pixel electrodes. A video signal supplied via the source line is provided by switching conduction / non-conduction between the pixel electrode and the source line according to a scanning signal supplied via the gate line. A switching element capable of writing to the pixel electrode, and red, blue,
An array substrate having a color filter of each color of green, a counter substrate facing the array substrate, a liquid crystal layer disposed between the array substrate and the counter substrate and filled with liquid crystal, The counter substrate is provided on the counter substrate or the array substrate, and includes a counter electrode that drives the liquid crystal by generating a potential difference between the pixel electrode and the pixel electrode, and an illumination device having a light source that emits white light. The lighting device is controlled to emit white light to the liquid crystal layer during a part of a frame period, and the lighting device controls the pixel electrode to be first for each frame period.
By writing a predetermined signal in the order of writing and second writing, a video signal related to the frame period is supplied to the pixel electrode to drive the liquid crystal and display a video corresponding to the video signal. It is configured. In this case, the liquid crystal may be an OCB mode liquid crystal.

As a result, it is possible to realize a blinking backlight type liquid crystal display device capable of ensuring a sufficiently long light emission time in one frame period.

[0053]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view schematically showing the structure of a liquid crystal display device according to the first embodiment of the present invention, and FIG. 2 shows a liquid crystal layer injected into the liquid crystal display device. It is sectional drawing which shows the alignment state of the liquid crystal typically. In the figure, for convenience, the X direction is the upper direction of the liquid crystal display device 1.

As shown in FIG. 1, the liquid crystal display device 1 includes a liquid crystal display panel 10, and the liquid crystal display panel 10 is provided.
The polarizing plate 11 is attached to both sides of the liquid crystal cell 12. Further, the liquid crystal cell 12 has two substrates, that is, the upper substrate 27 and the lower substrate 2 as shown in FIG.
8 and these upper substrate 27 and lower substrate 2
8 are arranged to face each other through a spacer (not shown). A liquid crystal layer 29 is formed by injecting the liquid crystal 26 into a gap between the upper substrate 27 and the lower substrate 28.

The liquid crystal display panel 10 thus configured
Applies a predetermined voltage between the upper substrate 27 and the lower substrate 28 to transfer the alignment state of the liquid crystal 26 from the splay alignment (FIG. 2A) to the bend alignment (FIG. 2B). An image is displayed in this bend orientation state. That is, it is a so-called OCB mode liquid crystal display panel.

Further, the liquid crystal display panel 10 displays white when a relatively low voltage (about 1.5 V or more and about 2 V or less) is applied between the upper substrate 27 and the lower substrate 28 described above, Relatively high voltage (about 4.5V or more 6.
Black display is performed when a voltage of about 5 V or less) is applied.
That is, it is a so-called normally white mode liquid crystal display panel. FIG. 3 is a graph showing an applied voltage-transmittance characteristic of such an OCB mode liquid crystal display panel which is a normally white mode. As shown in FIG. 3, in the case of the normally white mode, the range S1 that can be taken by the applied voltage used for the display is such that the lower limit of the range S1 is the voltage for displaying white (hereinafter, referred to as white display voltage) Vw.
And the upper limit thereof becomes the voltage for black display (hereinafter referred to as black display voltage) Vb.

A backlight 20 is arranged below the liquid crystal display panel 10. This backlight 20
Is a light guide plate 22 made of a transparent synthetic resin, a light source 21 arranged near one end face 22a of the light guide plate 22 so as to face the end face 22a, and a reflection plate 23 arranged below the light guide plate 22. And the diffusion sheet 2 arranged above the light guide plate 22.
4 is included.

The light source 21 included in the backlight 20 is an LED array in which LEDs emitting red, green and blue which are the three primary colors of light are sequentially and repeatedly arranged.

The LED is suitable as the light source 21 included in the backlight 20 of the liquid crystal display device of the present invention because it is easy to control blinking and the like, but the invention is not limited to this. For example, a cold cathode tube may be used as the light source 21 to achieve high brightness.

In this embodiment, the edge light type backlight in which the light source 21 is arranged near the one end face 22a of the light guide plate 22 so as to face the end face 22a has been described as an example. It may be a direct type backlight in which the light source 21 is disposed below the light source 22, or a flat type backlight using an electroluminescence (EL) light emitting element.

The backlight 20 constructed as described above
Then, the light emitted from the light source 21 enters the light guide plate 22 through the end face 22a. The incident light is multiple-scattered inside the light guide plate 22 and is emitted from the entire area of the upper surface thereof. At this time, light that leaks below the light guide plate 22 and enters the reflection plate 23 is reflected by the reflection plate 23 and returned to the inside of the light guide plate 22.
The light emitted from the light guide plate 22 is diffused by the diffusion sheet 24, and the diffused light enters the liquid crystal display panel 10. As a result, the liquid crystal display panel 10 is entirely red,
The green or blue light is emitted uniformly.

FIG. 4 is a block diagram showing the structure of the liquid crystal display device 1 according to the first embodiment of the present invention. Referring also to FIGS. 1 and 2, the liquid crystal display panel 10 is a well-known TFT (Thin Film Transistor) type display panel, and has a counter substrate (not shown) having a counter electrode (not shown) formed on its inner surface. (Not shown), the pixel electrode 40 and the gate line 3 on the inner surface.
1, the array substrate (not shown) on which the source line 32 and the switching element 33 are formed are arranged so as to face each other with the liquid crystal layer 29 in between. Further, in the array substrate, the gate lines 31 and the source lines 32 are arranged so as to alternately intersect, and the pixel electrode 40 and the switching element 33 are provided for each pixel divided by the gate lines 31 and the source lines 32. Has been formed. The gate line 31 and the source line 32 of the liquid crystal display panel 10 are driven by the gate driver 34 and the source driver 35, respectively, and the gate driver 34 and the source driver 35 are driven.
Are controlled by the control circuit 36.

The counter electrode may not be formed on the counter substrate side as described above, but may be formed on the array substrate side. Thus, for example, I
The configuration may be the same as that of the PS (In-Plane-Switching) mode liquid crystal display device.

In the liquid crystal display device 1 configured as described above, the control circuit 36 outputs a control signal to the backlight control circuit 37 in order to cause the LEDs emitting the respective colored lights to sequentially emit light at a predetermined cycle. Further, in order to perform display in synchronization with the light emission, the control circuit 36 also changes the video signal 38 input from the outside to a video signal for the field sequential color system (a time for displaying the video for each sub-frame period). A video signal compressed in the axial direction) is converted into the gate driver 34 according to the converted video signal.
And a control signal to the source driver 35, respectively. As a result, the gate driver 34 outputs a scanning signal corresponding to the voltage for turning on (conducting) the switching element 33 to the gate line 31 to sequentially turn on the switching element 33 of each pixel, while the source driver 35 At that timing, the video signal is sequentially written to the pixel electrode 40 of each pixel through the source line 32.

More specifically, the gate driver 34 is
By outputting the above-mentioned scanning signal to the gate line 31 of the first row, the switching element 33 connected to the gate line 31 of the first row is turned on. Then, when the switching element 33 is turned on in this manner, the video signal output from the source driver 35 to each source line 32 is written to the pixel electrode 40 of the pixel in the first row.

Next, the gate driver 34 outputs a signal corresponding to the voltage for turning off (non-conducting) the switching element 33 to the gate line 31 of the first row, and the gate line 31 of the first row. Switching element 33 connected to
Turn off. At the same time, the gate driver 34 outputs the scanning signal to the gate line 31 of the second row to turn on the switching element 33 connected to the gate line 31 of the second row. Then, as in the case of the first row, the video signal output from the source driver 35 to each source line 32 is written in the pixel electrode 40 of the pixel of the second row.

By operating in the same manner thereafter, video signals are sequentially written in the pixel electrodes 40 of the pixels in each row. As a result, a potential difference is generated between the counter electrode and the pixel electrode 40, the liquid crystal 26 is driven, and the transmittance of light emitted from the backlight 20 changes. As a result, an image corresponding to the image signal 38 appears in the eyes of the observer.

The control circuit 36 outputs the all-on signal 39 to the gate driver 34 in addition to the above-mentioned control signal. The all-on signal 39 is a signal that can take one of two values, High and Low. When the value of the all-on signal 39 is Low, the gate driver 34 which has received the all-on signal 39 receives each value as described above. Gate line 31
The scanning signals are sequentially output with respect to. Therefore, in this case, signals are sequentially written to the pixel electrodes row by row as in the normal display operation.

On the other hand, when the value of the all-on signal 39 is High, the gate driver 34 receiving the all-on signal 39 outputs the scanning signal to all the gate lines 31 at the same timing. As a result, in this case, signals are written to all the pixel electrodes 40 at the same timing.

Next, the operation of the liquid crystal display device 1 of this embodiment will be described.

The control circuit 36 included in the liquid crystal display device 1 of the present embodiment has a signal (hereinafter, referred to as a non-video signal) that is independently defined in addition to the above-described video signal 38 and is not related to the video signal 38. ) Is output to the source line 32, the source driver 35 is controlled. In addition, the control circuit 36
Is high in synchronization with the output of this non-video signal.
The all-on signal 39 of h is output to the gate driver 34. As a result, the non-video signal is written in all the pixel electrodes 40. Here, in the present embodiment, the first writing is writing a non-video signal, and the second writing is writing a video signal. Hereinafter, this display operation will be described with reference to FIG.

FIG. 5 is a timing chart showing an example of the display operation of the liquid crystal display device 1 of the present invention according to the first embodiment. FIG. 5A shows a scanning signal output to the gate line of the liquid crystal display panel 10. (B) shows the waveform of the signal output to an arbitrary source line 32 of the liquid crystal display panel 10, (c) shows changes in the transmittance of pixels in each row of the liquid crystal display panel 10, and (d) shows the background. The light emission time of the LED of the light 20 is shown. In addition, here, the case where the display is performed in the red and green sub-frame periods and the display is not performed in the blue sub-frame period is illustrated. Further, FIG. 5B shows a signal waveform for the purpose of facilitating the understanding of the display operation of the present embodiment, but the actual signal waveform is not limited to this.

As shown in FIG. 5, in the liquid crystal display device 1, before the video signal writing period Ta for performing the second writing, the above-described period for performing the first writing, that is, the non-video signal is applied to all pixels. A period (hereinafter, referred to as a non-video signal writing period) Tc for writing in is provided. Then, in the non-video signal writing period Tc, the control circuit 36 controls the source driver 35 so as to output the non-video signal to each source line 32, and outputs the all-on signal 39 whose value is High to the gate driver. It outputs to 34. Therefore, the gate driver 34
Outputs a scanning signal to all gate lines 31 at the same timing (see FIG. 5A), and in synchronization with this, the source driver 35 outputs a video signal to each source line 32 (FIG. 5). (See (b)). As a result, the non-video signal is written in all the pixel electrodes.

When the non-video signal is written in the pixel electrode 40 of each pixel in this way, as shown in FIG. 5C, in the liquid crystal display panel 10, before the video signal writing period Ta starts. It will be modulated in response. As a result, since the liquid crystal response period Tb described above can be shortened, the light emission time of the LED in each sub-frame period can be lengthened as compared with the conventional case (FIG. 5).
(See (d)).

Further, as shown in FIG. 5D, the backlight 20 is turned off during the non-video signal writing period Tc. Therefore, even if a predetermined non-video signal is written in each pixel in the non-video signal writing period Tc, it is possible to suppress deterioration of the video. Here, when the afterglow of the light source and the like are taken into consideration, it is possible to further reduce the deterioration of the image by turning off the backlight 20 by a predetermined time earlier than the start of the non-image signal writing period Tc. It should be noted that if the main purpose is to improve the brightness and the deterioration of the image can be tolerated to some extent, the backlight 2 is provided in a part of the non-image signal writing period Tc.
The 0 LED may be made to emit light.

Next, the voltage value of the non-video signal described above will be described with reference to FIG. Since the liquid crystal display device 1 of the present embodiment includes the normally white mode liquid crystal display panel 10 as described above, white display is performed when a relatively low voltage is applied and a relatively high voltage is applied. Is displayed when black is applied.

In general, the response speed of the liquid crystal is higher in the case of shifting from the low voltage to the high voltage (rising) than in the case of shifting from the high voltage to the low voltage (falling). This is because the energy when the high voltage is applied is larger than that when the low voltage is applied. Therefore, it is desirable that the voltage applied to the liquid crystal display panel 10 as a non-video signal be a value that makes the response speed of the liquid crystal high at the time of falling rather than at the time of rising.

Therefore, in the present embodiment, the white display voltage V
A voltage Vm intermediate between w and the black display voltage Vb is set as an upper limit of a range S2 that a voltage (hereinafter, referred to as a non-video signal voltage) applied to the liquid crystal display panel 10 as a non-video signal can take. As described above, by setting the non-video signal voltage to the voltage Vm or less, the difference between the white display voltage Vw and the non-video signal voltage becomes equal to or less than the difference between the black display voltage Vb and the non-video signal voltage, and thus the fall occurs. In this case, the response speed of the liquid crystal is increased. In addition, as an example, Vm = (V
w + Vb) / 2 is preferable.

On the other hand, the range S2 that the non-video signal voltage can take
The lower limit of is 0 V as shown in FIG. As shown in FIG. 6, the white display signal voltage Vw is higher than 0V, but when the white display is performed, by temporarily applying a voltage lower than the white display signal voltage Vw, the liquid crystal 26 becomes faster. It is desirable to set the lower limit of the range S2 to 0V in this way, because the alignment state is for white display.

By determining the non-video signal voltage within such a range S2, the liquid crystal response period Tb shown in FIG. 5 can be shortened, and the light emission time T of the LED is accordingly reduced.
h can be lengthened. As a result, a sufficiently bright display can be realized.

By the way, even if the non-video signal voltage may be set within the range S2, what value is specifically set depends on various modes and liquid crystal materials. For example, TN or MVA (Multi domain Vertically Aligne)
In modes such as d), the gray level is higher than the gray level (white display) to the gray level (black display) or the gray level is higher than the gray level. There may occur a phenomenon that the response speed of the liquid crystal display panel becomes slower when shifting to a higher gradation or a lower gradation. Therefore, when the liquid crystal display device 1 of the present embodiment is applied to these modes, the non-video signal voltage is set so as to increase the response speed of the liquid crystal display panel when shifting from halftone to another gradation. It is desirable to do.

Therefore, it is desirable to set the non-video signal voltage based on either of the following two policies. 7 and 8 are diagrams for explaining the set value of the non-video signal voltage, and FIG. 7A shows the liquid crystal display panel 10 when a certain gray scale is shifted to a lower gray scale. FIG. 7B is a graph showing the applied voltage, and FIG. 7B is a graph showing the transmittance of the liquid crystal display panel 10 in that case. Further, FIG. 8A is a graph showing the voltage applied to the liquid crystal display panel 10 when shifting from a certain gradation to a higher gradation, and FIG. 8B is a liquid crystal display in that case. The graph showing the transmittance of the panel 10 is shown. 7 and 8, the non-video signal voltage applied in the non-video signal writing period Tc is Vs, and the video signal voltage corresponding to the video signal of gradation n is Vn. In addition, the time required to obtain the transmittance required for displaying at the gradation n is Tn.

First, the first policy is to improve the case where the response of the liquid crystal is the slowest. When based on this policy, the time T when moving from an arbitrary gradation to another gradation in advance
When the time Tn is the longest, that is, when the response of the liquid crystal is the slowest, the time Tnm
Specify ax. Then, the specified time Tnmax
Is a voltage which can shorten the response of the liquid crystal, that is, a voltage which can speed up the response of the liquid crystal as the non-video signal voltage Vs.

When the first policy is followed, the case where the response speed of the liquid crystal is the slowest can be improved, so that the display with less luminance unevenness can be realized as compared with the conventional case.

The second policy is to increase the response speed of the liquid crystal on average. Also based on this policy, as in the case of the first policy, the time Tn when moving from an arbitrary gradation to another gradation is measured in advance. Then, the voltage capable of shortening the average value of the time Tn is set as the non-video signal voltage Vs.

When this second policy is followed, the response speed of the liquid crystal can be increased on average, so that unevenness in brightness occurs when the response is slowest, but a brighter display is realized as compared with the conventional case. can do.

As described above, according to the present embodiment,
For example, even when the video signal of a level at which the response of the liquid crystal is delayed to the gate line to which the scanning signal is finally output is written in the pixel electrode of each pixel, as described above in the non-video signal writing period Tc. By applying the non-video signal voltage determined as described above, the end time of the liquid crystal response period can be advanced. Therefore, the light emission time of the LED of the backlight can be made longer than in the conventional case, and thus brighter display can be performed.

In the non-video signal writing period Tc, the liquid crystal display device 1 of this embodiment outputs the scanning signal to all the gate lines 31 at the same timing, but this embodiment does not. It is not limited. For example, as shown in FIG. 9, the non-video signal writing period Tc
In the above, the configuration may be such that by sequentially outputting the scanning signal to each gate line, the scanning signal is finally output to all the gate lines. Since a gate driver that sequentially outputs a scanning signal to each gate line in this way is already on the market, it is possible to realize the configuration described above without developing a new gate driver. it can.

Further, the structure shown in FIG. 10 may be adopted. FIG. 10 is a circuit diagram showing an equivalent circuit of another configuration example of the liquid crystal display panel 10 in the first embodiment.
In this configuration, as shown in FIG. 10, switching elements 41 are provided on the inner surface of the array substrate at the connecting portions between the gate lines 31 and the voltage supply lines 42, respectively. These switching elements 41 are turned on when the value of the all-on signal output via the voltage supply line 42 is High,
It turns off when the value is Low. When the switching element 41 is turned on, an on signal 43 (scanning signal) is output to each gate line 31, and as a result, the switching element 33 connected to the gate line 31 is turned on. As a result, it becomes possible to output scanning signals to all the gate lines 31 at the same timing.
When the scanning signal is output in this way, the switching element 33 is turned on as described above, and the non-video signal output via the source line 32 is changed to the liquid crystal capacitance Cl.
c and the storage capacity Cst.

By thus forming the switching function in the array substrate, it is possible to realize the liquid crystal display device of the present embodiment by using a ready-made gate driver, and thus to reduce the cost. You can

The switching element 4 as described above
Driving 1 requires a larger current than driving the switching element 33 provided in each pixel. Therefore, in the case of having such a structure, it is preferable to use a switching element using low temperature polycrystallized Si.

(Second Embodiment) In the second embodiment, a liquid crystal display device in which the non-video signal writing period in the first embodiment is further divided into two periods and a different non-video signal voltage is applied in each period. To illustrate. That is, a liquid crystal display device which performs writing of two different non-video signals in the first writing is shown. Note that the configuration of the liquid crystal display device of the present embodiment is the same as that of the first embodiment, so description thereof will be omitted.

FIG. 11 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to the second embodiment, and (a) is the timing of outputting a scanning signal to the gate line of the liquid crystal display panel. (B) shows the waveform of the signal output to an arbitrary source line 32 of the liquid crystal display panel,
(C) shows the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) shows the light emission time of the LED of the backlight. Note that FIG. 5B shows signal waveforms for the purpose of facilitating the understanding of the display operation of the present embodiment, and the actual signal waveforms are not limited to this.

As shown in FIG. 11A, in the liquid crystal display device of this embodiment, before the video signal writing period Ta for performing the second writing, the non-video signal writing period for performing the first writing is performed. The non-video signal writing period includes a first non-video signal writing period Tc1 for writing the first non-video signal and a second non-video signal writing period Tc2 for writing the second non-video signal. It is divided. Then, the first non-video signal writing period Tc1
In, the first non-video signal voltage close to the black display voltage is applied, and in the second non-video signal writing period Tc2, the second non-video signal voltage close to the white display voltage is applied. Since the liquid crystal display device of the present embodiment includes the normally white mode liquid crystal display panel, the first non-video signal voltage is set higher than the second non-video signal voltage. On the contrary, when the liquid crystal display panel of the mari black mode is provided, the second non-video signal voltage is set higher than the first non-video signal voltage.

Here, the second non-video signal voltage is a voltage for shortening the liquid crystal response period as in the case of the first embodiment, and its value is set as described in the first embodiment. It

In this way, when the first non-video signal and the second non-video signal are written to the pixel electrode of each pixel by the first writing, as shown in FIG. 11C, the liquid crystal display panel 10 is , The transmissivity decreases once in the first non-video signal writing period Tc1 immediately before the start of each subframe period, and then the transmissivity increases because the liquid crystal is modulated in response in the second non-video signal writing period Tc2. To do. As described above, the liquid crystal is responsively modulated before the start of the video signal writing period Ta.
As in the case of, the time required for response is shortened,
The light emission time of the LED in one subframe period can be made longer than that in the conventional case (see FIG. 11C).

By applying the first non-video signal voltage in this way, the following three effects are produced.

First of all, charging error caused by dielectric anisotropy (JJAP Vol.36, No.2, pp.720 and SID'98 Dig
est, pp.143)). The charging error due to the dielectric anisotropy occurs due to the difference in the voltage applied to the liquid crystal immediately before scanning even when the voltage of the video signal is the same. According to the present embodiment, by applying the first non-video signal voltage close to the black display voltage,
Further, by applying the second non-video signal voltage close to the white display signal voltage, the liquid crystal capacitances immediately before the video signal voltage is applied can be made substantially equal. Therefore, it is possible to prevent the occurrence of the charging error described above.

Secondly, there is an effect of increasing the response speed of the liquid crystal display panel in the mode in which the halftone response is slow. That is, once the first non-video signal voltage is applied to make the voltage of the highest (or lowest) gradation, and then the second non-video signal voltage is applied, the halftone response of TN, MVA, etc. is slow. Even in the mode, the response speed of the liquid crystal display panel can be increased.

Thirdly, there is an effect of preventing reverse transition in modes such as OCB. In the case of the OCB mode, it is general to display after the splay alignment (FIG. 2A) is changed to the bend alignment (FIG. 2B) by applying a high voltage once as described above. . However,
When a voltage close to 0 V is repeatedly applied, the bend alignment may reversely transition to the splay alignment, which makes it impossible to display images normally. According to this embodiment,
By applying the first non-video signal voltage (voltage higher than the white display signal voltage Vw), it is possible to prevent such reverse transition.

(Third Embodiment) In the first embodiment, one frame period is divided into three subframe periods. On the other hand, the third embodiment exemplifies a liquid crystal display device in which one frame period is divided into four subframe periods.
Note that the configuration of the liquid crystal display device of the present embodiment is the same as that of the first embodiment, so description thereof will be omitted.

FIG. 12 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to the third embodiment, and (a) is the timing of outputting the scanning signal to the gate line of the liquid crystal display panel. (B) shows the waveform of the signal output to an arbitrary source line 32 of the liquid crystal display panel,
(C) shows the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) shows the light emission time of the LED of the backlight. Note that FIG. 12B shows signal waveforms for the purpose of facilitating understanding of the display operation of the present embodiment, and the actual signal waveforms are not limited to this.

As shown in FIG. 12, in the liquid crystal display device of this embodiment, one frame period is time-divided into four sub-frame periods, and red, green, and blue backlight LEDs are provided for each ¼ frame period. After illuminating, emit the remaining 1/4
White light is turned on by causing all the red, green, and blue LEDs to emit light during the frame period. This can reduce color breakup.

As described above, in the present embodiment, the white light is turned on in the fourth sub-frame, but other than this, for example, the red and green LEDs are made to emit light so that the yellow light is turned on. In the same manner, the effect of reducing color breakup can be obtained.

By the way, when the four sub-frame periods are provided in this way, conventionally, color breakup can be reduced, while the light emission time of the LED in one frame period is shortened, so that sufficient brightness is secured. There was a problem that I could not do it. However, in the case of this embodiment,
As shown in FIG. 12, as in the case of the second embodiment, the first non-video signal writing period Tc1 and the second non-video signal writing period Tc2 are provided to perform the first writing. It is possible to make the light emission time of the LED longer. Therefore, even if four sub-frame periods are provided in one frame period, a sufficiently bright display can be realized.

Since the color breakup can be reduced as the number of subframe periods in one frame period increases, five or more subframe periods may be provided. In this case, for example, one frame period is red, green,
As an example, there are seven sub-frame periods in the order of blue, red, green, blue and white. Also, the backlight is red,
In addition to blue and green, it is configured to have a light source that emits yellow, cyan, and magenta colored light, or emits two colors of red, blue, and green to emit yellow, cyan, and magenta colored light. And one frame period is composed of six subframe periods in the order of red, cyan, green, magenta, blue, and yellow, or one frame period is red, cyan, green, magenta, blue, yellow, An example or the like in which seven subframe periods are formed in the order of white can be considered. Various combinations are conceivable in this way, and the present embodiment can be applied to any combination.

Even when five or more sub-frame periods are provided in this way, the first non-video signal writing period Tc1 and the second non-video signal writing period Tc2 are provided to perform the first writing. As described above, the light emission time of the LED can be made longer than in the conventional case, and as a result, a sufficiently bright display can be realized as described above.

Further, the non-video signal writing period is not divided such as the first video signal writing period Tc1 and the second non-video signal writing period Tc2 in this way, but one non-video signal writing period is set in the same manner as in the first embodiment. It goes without saying that the non-video signal writing period may be provided.

(Embodiment 4) In Embodiments 1 to 3, scanning signals are output at the same timing to all gate lines in the non-video signal writing period, and as a result, all of them are output. The non-video signal is written in the pixel electrode at the same timing. On the other hand, the fourth embodiment exemplifies a liquid crystal display device in which each gate line is divided into several blocks and a scanning signal is output for each block at the same timing. Note that the liquid crystal display device of this embodiment has the same structure as that of Embodiment 1 except that the control circuit does not include a signal line used for outputting all ON signals to the gate driver. Therefore, the description is omitted.

In the following, in the video signal writing period, a gate line from which a scanning signal is output earlier and a gate line from which a scanning signal is output later are divided into a first block and a second block, respectively. Will be illustrated.
It is arbitrary how many gate lines are assigned to each block, but here, 3/4 of all gate lines are assigned to the first block, and 1/4 of them are assigned to the second block. I will allocate it. Therefore, for example, when the number of gate lines is 480, the gate lines from the first row to the 360th row are 361 in the first block.
Gate lines from the row to the 480th row are assigned to the second blocks, respectively.

FIG. 13 is a timing chart showing an example of the operation of the liquid crystal display device of the present invention according to the fourth embodiment, in which (a) shows the timing of outputting a scanning signal to the gate line of the first block and The change in the voltage (pixel voltage) applied to the pixel electrodes associated with those gate lines is shown in (b), the scan timing for the gate lines in the second block and the change in the pixel voltage applied to the pixel electrodes associated with those gate lines. ,
(C) has shown the light emission time of LED of a backlight, respectively.

As shown in FIGS. 13A and 13B, in the present embodiment, the scanning signal is output to the gate line of the second block in the non-video signal writing period Tc. Then, the control circuit controls the source driver so that the non-video signal voltage is applied only when the scanning signal is output to the gate line of the second block. Therefore, as shown in FIG. 13A, the pixel voltage of the pixel electrode related to the gate line of the first block does not change in the non-video signal writing period Tc, and the video signal writing period T
It will change only at a. On the other hand, FIG.
As shown in (b), the pixel voltage of the pixel electrode related to the gate line of the second block starts to change in the non-video signal writing period Tc because the non-video signal voltage is applied. As a result, only the response of the liquid crystal in the pixel corresponding to the gate line of the second block can be accelerated.

By the way, FIG. 42 (c) and FIG. 43 (c)
As described above with reference to FIG. 5, the later the scanning signal is output from each gate line (the closer to the Nth row in the figure), the later the response of the liquid crystal starts in the pixel corresponding to the gate line. . Therefore, it is desirable to accelerate the response of the liquid crystal in the pixels corresponding to the gate lines of the second block from which the scanning signal is output later than the gate lines of the first block from which the scanning signal is output earlier. This embodiment responds to this demand, and as described above,
It is possible to speed up the response of the liquid crystal in the pixel corresponding to the gate line of the second block. In addition, in the case of the present embodiment, the number of gate lines to which the non-video signal voltage is applied is smaller than that in the first to third embodiments, so that the current supply amount of the source driver is small. However, there is an advantage that writing shortage is unlikely to occur.

In the present embodiment, the non-video signal voltage is not applied when the scanning signal is being output to the gate lines of the first block in the non-video signal writing period Tc, but this The configuration may be such that a non-video signal voltage is applied from time to time. With such a configuration, the non-video signal voltage applied to the pixel electrode associated with the gate line of the first block is different from the non-video signal voltage applied to the pixel electrode associated with the gate line of the second block. It can be a value. This makes it possible to apply a suitable voltage to each block.

Next, another example of the liquid crystal display device of the present embodiment will be described. This is an example of a liquid crystal display device in which the gate lines in the odd-numbered rows and the gate lines in the even-numbered rows are divided into different blocks and the scanning signals are output at the same timing for each block.

FIG. 14 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to the fourth embodiment, in which (a) shows the scanning signal to the gate line of the (N-1) th row. The change in the pixel voltage of the pixel electrode (pixel electrode of the (N-1) th row) related to the output timing and its gate line is shown in (b).
Is the timing of outputting the scanning signal to the gate line of the Nth row and the change of the pixel voltage of the pixel electrode (pixel electrode of the Nth row) related to the gate line, and (c) is the LE of the backlight.
The light emission time of D is shown respectively.

As shown in FIGS. 14A and 14B, in the present embodiment, in the non-video signal writing period Tc, after the scanning signal is output to the gate line of the (N-1) th row, the Nth row is output. The scanning signal is output to the gate line of. Then, during the non-video signal writing period Tc, N−
A non-video signal voltage having a different polarity is applied to the pixel electrode associated with the first row gate line and the pixel electrode associated with the Nth row gate line.

Generally, a liquid crystal display device using a liquid crystal display panel is driven by an alternating current in order to prevent image sticking. Since the liquid crystal display device according to this example applies non-video signal voltages of different polarities to the pixel electrodes associated with two consecutive gate lines as described above, only the video signal writing period Ta is applied. Of course, it is possible to perform such AC driving even in the non-video signal writing period Tc.

The scanning signals may not be output to the plurality of gate lines at the same timing as described above, but the scanning signals may be sequentially output to the gate lines at different timings.

(Embodiment 5) Embodiment 5 is an example of a liquid crystal display adopting a so-called capacitive coupling drive method (hereinafter referred to as CC drive). The liquid crystal display device of the present embodiment is
Unlike the cases of the first to fourth embodiments, a non-video signal voltage is applied via a capacitance line described later. For details of this CC drive, see Japanese Patent Laid-Open No. 2-157.
No. 815 or AM-LCD95 Digest of Technic
See al papers page 59.

FIG. 15 is a circuit diagram showing an equivalent circuit of liquid crystal display panel 10 in the fifth embodiment. As shown in FIG. 15, the liquid crystal display panel 10 according to the present embodiment.
On the inner surface of the array substrate, an independent capacitance line (hereinafter referred to as a common capacitance line) 61 is formed in parallel with the gate line 31. A switching element 33 is connected to the source line 32, and a liquid crystal capacitance Clc is provided between the switching element 33 and the counter electrode 62 formed on the inner surface of the array substrate.
Is connected to the switching element 33 and the common capacitance line 6
A storage capacitor Cst is connected between the storage capacitor 1 and the storage capacitor 1.

By the way, although the capacitance line is usually connected to the counter electrode 62, the common capacitance line 61 is connected to a dedicated driver (not shown). This is because it is necessary to apply a predetermined voltage to the common capacitance line 61 in synchronization with the scanning signal output to the gate line 31, so it is necessary to drive the common capacitance line 61 independently. Because.

In CC driving, a voltage corresponding to the scanning signal voltage applied to the gate line 31 is applied to the common capacitance line 61 by the dedicated driver at a predetermined timing. In this CC drive, the change amount ΔVlc of the voltage applied to the liquid crystal has a value shown in the following equation.

ΔVlc = Cst / (Cst + Clc) × ΔV Here, ΔV represents the amount of change in the voltage applied to the common capacitance line 61.

In this embodiment, a non-video signal voltage is applied via the common capacitance line 61. In this case, as can be seen from the above equation, the voltage applied to each pixel varies depending on the liquid crystal capacitance Clc before the non-video signal voltage is applied.

Therefore, after a non-video signal voltage close to the target value is applied to each pixel through the common capacitance line 61,
By applying the non-video signal voltage to each pixel via the source line 32, the non-video signal voltage can be accurately applied in a short time.

In this embodiment, the common capacitance line 61 is used.
Although the CC drive using is used, the CC drive of the method of providing the storage capacitor on the gate line 31 may be adopted.

(Embodiment 6) In Embodiment 6, unlike the case of Embodiments 1 to 5, a liquid crystal display device in which an LED of a backlight emits light before a liquid crystal responds sufficiently is exemplified. To do.

However, when the LED of the backlight is made to emit light without waiting for the liquid crystal display panel to respond sufficiently in this way, as described above, the brightness gradient is obtained in the order in which the scanning signal is output to each gate line. Will appear (see FIGS. 43 and 44). Therefore, in the present embodiment, such a brightness gradient is corrected by configuring a backlight as described later.

FIG. 16 is a diagram showing the structure of the liquid crystal display device of the present invention according to the sixth embodiment. FIG. 16A is a sectional view schematically showing the structure of the liquid crystal display device, and FIG. It is a top view of a light guide plate. As shown in FIG. 16, in the present embodiment, the dot pattern 25 for scattering light is formed on the upper surface of the light guide plate 22. Since the other configurations are similar to those in the first embodiment, the same reference numerals are given and the description thereof is omitted.

The dot pattern 25 described above is used for the light guide plate 2.
On the upper surface of No. 2, the density is changed so that the position corresponding to the pixel electrode related to the gate line to which the scanning signal is output later becomes brighter. In other words, as shown in FIG. 16B, the density is increased in the scanning direction. The dot pattern 25 is formed by printing white paint or the like.

The backlight 20 configured as described above
Then, the light emitted from the light source 21 enters the light guide plate 22 through the end face 22a. At this time, the light leaked below the light guide plate 22 is reflected by the reflection plate 23 and returned to the inside of the light guide plate 22. The light thus entering the light guide plate 22 is multiply reflected inside the light guide plate 22 and emitted from the upper surface thereof. Then, the light emitted from the upper surface of the light guide plate 22 is scattered by the dot pattern 25, further diffused by the diffusion sheet 24, and applied to the liquid crystal display panel 10.

As described above, the dot pattern 25 is
The upper surface of the light guide plate 22 is formed to have a higher density at the position corresponding to the pixel electrode related to the gate line in which the order of outputting the scanning signals is later. Therefore, in the plane of the light guide plate 22, as shown in FIG. 17, the luminance distribution can be inclined so that the luminance becomes higher as it goes in the scanning direction.

On the other hand, when the LED of the backlight 20 is made to emit light before the liquid crystal display panel 10 responds sufficiently,
As described above with reference to FIGS. 43 and 44, it becomes darker in the scanning direction. Therefore, as described above, by making the brightness distribution of the backlight 20 brighter in the scanning direction, the liquid crystal display panel 1
It is possible to correct the inclination of the luminance distribution in the 0 plane. As a result, uneven brightness can be suppressed.

Instead of the dot pattern, for example, a lens, a prism, a groove or the like may be formed on the upper surface of the light guide plate 22 to adjust the luminance distribution.

By the way, instead of using the dot pattern as described above, the light source is divided into a plurality of blocks by using, for example, a plurality of cold cathode fluorescent lamps, and the brightness and light emission timing of each block are controlled, whereby a liquid crystal display is obtained. Panel 1
It is also possible to correct the inclination of the luminance distribution in the 0 plane. In this case, the light guide plate 22 is not provided.

FIG. 18 is a diagram showing the operation when the light source is divided into a plurality of blocks (here, three blocks B1, B2, and B3). FIG. 18A shows the surface of the light source. FIG. 3B shows the luminance distribution in the figure, and (b) shows the light emission time of the light source in each block.

As shown in FIG. 18A, block B
Cold cathode tubes having different luminances are arranged so that the luminance becomes higher in the order of 3, B2, and B1. And in FIG.
As shown in (b), in each subframe, the light emission in the block B3 starts earliest and the light emission in the block B1 starts latest. This makes it possible to correct the inclination of the brightness distribution in the plane of the liquid crystal display panel 10 as shown in FIG. 43 and suppress the brightness unevenness.

If the above-mentioned dot patterns are used together to make the luminance distribution inclined in each block, the luminance unevenness can be further suppressed.

(Embodiment 7) In Embodiments 1 to 6 described above, a non-video signal unrelated to a video signal is written in the pixel electrode. On the other hand, in the seventh embodiment of the present invention, the liquid crystal response period is shortened by dividing the video signal writing period into two periods and writing the video signal to the pixel electrode in each of the two periods. A liquid crystal display device is illustrated.

FIG. 19 is a block diagram showing the structure of the liquid crystal display device according to the present embodiment. The liquid crystal display device according to the present embodiment is the same as that of the first embodiment except that the control circuit does not include a signal line used to output all ON signals to the gate driver. For convenience of explanation, it is necessary to distinguish each gate line.
In FIG. 9, reference numerals are given to the gate lines. That is, reference numerals 31A to 31F indicate the gate lines from the first row to the sixth row, respectively.

The operation of the liquid crystal display device of this embodiment will be described below.

FIG. 20 is a timing chart showing an example of the operation of the liquid crystal display device of the present invention according to the seventh embodiment. FIG. 20 (a) is a diagram showing the input timing of a video signal to an arbitrary source line 32. FIG. 6B is a diagram showing the timing of outputting a scanning signal to each gate line.

In this embodiment, the video signal writing period Ta is divided into the first video signal writing period Ta1 and the second video signal writing period Ta2, and the video signal is written in the pixel electrode in each of these periods.

As shown in FIG. 20A, in the first video signal writing period Ta1, the video signals 100B and 10B are generated.
0D, 100F ... Are input to the source line 32 in this order, and the video signals 100A, 100C, 100E ... Are input to the source line 32 in this order in the second video signal writing period Ta2. Where 100A to 10
0F represents video signals to be written in the pixel electrodes 40A to 40F related to the gate lines 31A to 31F, respectively. Therefore, in the first video signal writing period Ta1, even-numbered gate lines 31B, 31D,
The video signals to be written in the pixel electrodes 40B, 40D, 40F, ... Of 31F ... Are gate lines 31A, 31C, 3 of odd rows in the second video signal writing period Ta2.
The video signals to be written in the pixel electrodes 40A, 40C, 40E, ...
Will be entered in.

Further, as shown in FIG. 20B, in the first video signal writing period Ta1, gate lines 31A and 31B, 31C and 31D, 31E and 31F, ... However, in the second video signal writing period Ta2, the gate lines 31A, 31
.. are sequentially output to C, 31E, ...

As a result, the first video signal writing period Ta
In 1, the half of one frame of the video signal is written, and in the second video signal writing period Ta2, the other half of the video signal is written. In addition, in the first video signal writing period Ta1, the gate lines 3 in odd rows are
Pixel electrodes 40A, 40 relating to 1A, 31C, 31E ...
C, 40E ... Have even-numbered gate lines 31B, 31D,
Video signals 100B, 100D, 100F to be written in the pixel electrodes 40B, 40D, 40F ...
... are written respectively.

That is, the first video signal writing period Ta
1, gate lines 31B, 31D, 31F in even rows
The video signals 100B, 100D, 100F corresponding to the original display to the pixel electrodes 40B, 40D, 40F ...
Are written respectively. In addition, this video signal 100
B, 100D, 100F ... Are pixel electrodes 40A, 4A related to the gate lines 31A, 31C, 31E ...
0C, 40E ... Are also written, but this is not a video signal corresponding to the video to be displayed on the pixel electrodes 40A, 40C, 40E. Therefore, in the second video signal period Ta2, these pixel electrodes 40A, 40C, 4
0E ... video signals 100A, 10A corresponding to the original display
0C, 100E ... Are written respectively.

FIG. 21 is a diagram showing a response state of the liquid crystal in the pixel corresponding to the gate line in the last row.
Represents the timing of outputting a scanning signal to the gate line, (b) represents the change in the transmittance of the pixel corresponding to the gate line, and (c) represents the light emission time of the LED included in the backlight. . Note that FIG. 21 exemplifies a case where the liquid crystal display panel has an even number of gate lines, and since the gate line of the last row is an even number of gate lines, the gate line of this last row is shown. In contrast, the scanning signal is output only in the first video signal writing period Ta1.

As shown in FIG. 21, in the present embodiment,
At the end of the first video signal writing period Ta1, the scanning signal is output to the gate line in the last row. On the other hand, in the past,
As shown in FIG. 42, a scanning signal is output to the gate line in the final row at the end of the video signal writing period Ta. Therefore, in the case of the present embodiment, the liquid crystal starts responding earlier in the pixel corresponding to the gate line in the last row, and the light emission time can be lengthened accordingly. Here, when considering the liquid crystal in the pixels corresponding to not only the gate line in the last row but all the gate lines, the start of the response of the liquid crystal can be accelerated on average by the length of the second video signal writing period Ta2. it can.

Note that, in most cases, the pixels corresponding to two consecutive gate lines usually display very similar images. Therefore, even if the image signals are written as described above, Deterioration is difficult to perceive.

By the way, generally, the liquid crystal display device is driven by an alternating current in order to prevent image sticking due to impurity ions in the liquid crystal layer. Flicker is often prevented by reversing the polarity for each row, each column, or each pixel. Therefore, although AC driving is adopted also in the present embodiment, 2-line inversion AC driving is performed so that voltages of the same polarity are applied to the pixel electrodes associated with two consecutive gate lines. Therefore, as shown in FIG. 20A, the video signals 100A and 100B, 100C and 100D, and 100E and 100F are signals corresponding to voltages of the same polarity.

As a result, when attention is paid to any one gate line, the same polarity is applied to the pixel electrode associated with that gate line in each of the first video signal writing period Ta1 and the second video signal writing period Ta2. The video signal corresponding to the voltage is written. Therefore, the charging time of the video signal can be shortened in the second video signal writing period Ta2.

FIG. 22 is an explanatory view for explaining that the charging time can be shortened in this way.
FIG. 3A is a diagram showing a change in voltage applied to an arbitrary pixel electrode when performing 1-line inversion AC driving;
FIG. 6B is a diagram showing a change in voltage when the two-line inversion type AC drive adopted in the present embodiment is performed.

As shown in FIG. 22A, the first video signal writing period Ta1 and the second video signal writing period Ta2
When 5V and 4V in absolute value are applied to the pixel electrodes respectively, in the 1-line inversion method, it is necessary to charge 9V which is the difference between plus 5V and minus 4V in the second video signal writing period Ta2. On the other hand, as shown in FIG. 22B, even in the same case, in the 2-line inversion method, charging for 1 V which is the difference between plus 5 V and plus 4 V in the second video signal writing period Ta2 is performed. Is enough. Similarly, the first video signal writing period Ta
2.5 in the 1st and 2nd video signal writing periods Ta2
When V is applied to the pixel electrode, plus 2.5 in the second video signal writing period Ta2 in the 1-line inversion method.
It is necessary to charge for 5V which is the difference between V and minus 2.5V. However, in the two-line inversion method, the difference between plus 2.5V and minus 2.5V is 0V, so charging is not necessary.

As described above, in the present embodiment, since the voltage difference is small, the writing time required for the second video signal writing period Ta2 is shorter than that for the first video signal writing period Ta1. Therefore, the second video signal writing period Ta2 itself can be shortened, and the light emission time can be lengthened accordingly.

In the present embodiment, as described above, the scanning signals are collectively output to the two gate lines in the first video signal writing period Ta1.
You may make it output a scanning signal collectively to the gate lines more than this.

FIG. 23 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to the seventh embodiment, and FIG. 23 (a) is a diagram showing the input timing of a video signal to an arbitrary source line 32. , (B) are diagrams showing the timing of outputting a scanning signal to each gate line.

As shown in FIG. 23A, in the first video signal writing period Ta1, the video signals 100C and 10C are generated.
0F ... Is input to the source line 32 in this order, and the second
During the video signal writing period Ta2, the video signal 100
A, 100B, 100D, 100E ... Are input to the source line 32 in this order. Therefore, in the first video signal writing period Ta1, the gate lines 31C and 31F
The video signals to be written in the pixel electrodes 40C, 40F, ... Related to ... Are written in the pixel electrodes 40A, 40B, 40D, 40E, ... Related to the gate lines 31A, 31B, 31D, 31E ... In the second video signal writing period Ta2. The video signals to be supplied are sequentially input to the source line 32.

Further, as shown in FIG. 23B, in the first video signal writing period Ta1, the gate line 31A,
31B and 31C, 31D, 31E, and 31F, and so on, output scanning signals collectively for every three lines, and in the second video signal writing period Ta2, gate lines 31A, 31B,
The scanning signals are sequentially output in the order of 31D, 31E ....

In this way, the first video signal writing period Ta
In the case where the scanning signals are collectively output to the three gate lines in 1 as well, similarly to the case where the scanning signals are collectively output to the two gate lines, in the pixel corresponding to the gate line in the last row. The liquid crystal starts to respond earlier, and the light emission time can be lengthened accordingly.

Needless to say, the scanning signals may be collectively output to four or more gate lines in the same manner in the first video signal writing period Ta1. However, if the number of gate lines that simultaneously output scanning signals is too large, insufficient signal writing may occur. Therefore, in order to avoid such insufficient writing of signals, as shown in FIG. 23, a period Ts1 during which a scanning signal is output in the first video signal writing period Ta1.
Is preferably longer than the period Ts2 during which the scanning signal is output in the second video signal writing period Ta2.

By the way, the video signal writing period Ta is set to 2
Instead of one period, as shown in FIG. 24, it is possible to divide into three periods and operate in the same manner.

As shown in FIG. 24A, in the first video signal writing period Ta1, the video signals 100C and 10C are generated.
0F ... Is input to the source line 32 in this order, and the second
During the video signal writing period Ta2, the video signal 100
B, 100E ... Are input to the source line 32 in this order. Also, in the third video signal writing period Ta3, the video signals 100A, 100D, ...
Input for 2. Therefore, the video signals to be written in the pixel electrodes 40C, 40F ... Related to the gate lines 31C, 31F ... In the first video signal writing period Ta1 are related to the gate lines 31B, 31E ... In the second video signal writing period Ta2. Pixel electrodes 40B, 40E
The video signals to be written in ... Are sequentially input to the source line 32 in the third video signal writing period Ta3. The video signals to be written in the pixel electrodes 40A, 40D ... Related to the gate lines 31A, 31D. It will be.

Further, as shown in FIG. 24B, in the first video signal writing period Ta1, the gate line 31A,
31B and 31C, 31D, 31E, and 31F ... In order, the scanning signals are collectively output for every three lines, and the gate lines 31A and 31 are output in the second video signal writing period Ta2.
The scanning signals are collectively output for every two lines in the order of B, 31D and 31E. Further, the third video signal writing period Ta3
In, the scanning signals are sequentially output in the order of the gate lines 31A, 31D.

Also in the case of operating in this way, the liquid crystal starts to respond earlier in the pixel corresponding to the gate line in the last row, as in the case where the above-mentioned video signal writing period Ta is divided into two periods. Therefore, the light emission time can be extended accordingly.

Although not shown, scanning signals are collectively output to the gate lines every four lines in the first video signal writing period Ta1, and the second video signal writing period Ta is output.
Similarly, in the case where the scanning signal is output for every two lines in 2 and the scanning signal is sequentially output for each gate line in the third video signal writing period Ta3, the scanning signal output process can be performed in a shorter time. . Therefore, 2
It is desirable to output scanning signals collectively for every ⁿ lines.

Similarly, the video signal writing period T
It goes without saying that a may be divided into four or more periods.

(Embodiment 8) In Embodiment 8, as in Embodiment 7, the video signal is written in each of the first video signal writing period and the second video signal writing period. Different from the case of the form 7, the liquid crystal display device which writes the video signal to the pixel electrode associated with each gate line in the second video signal writing period will be exemplified. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

FIG. 25 is a timing chart showing an example of the operation of the liquid crystal display device of the present invention according to the eighth embodiment. FIG. 25A is a diagram showing the input timing of a video signal to an arbitrary source line 32. FIG. 6B is a diagram showing the timing of outputting a scanning signal to each gate line.

As shown in FIG. 25A, in the first video signal writing period Ta1, the video signals 100AB, 1
00CD, 100EF ... Are input to the source 32 in this order. Here, 100AB, 100CD, 100
EF ... Gate lines 31A and 31B, 31C and 31
Pixel electrodes 40A and 40 related to D, 31E and 31F.
B, 40C and 40D, 40E and 40F ... Represent video signals respectively written. Meanwhile, the second
In the video signal writing period Ta2, the video signal 10
0A, 100B, 100C, 100D, 100E, 10
0F ... Are input to the source line 32 in this order.

The video signal written in the first video signal writing period Ta1 (hereinafter referred to as the first write signal) is written in the pixel electrodes associated with two consecutive gate lines to which the video signal is written. It is a signal of low definition compared to the video signal to be reproduced. And
The main purpose of the present embodiment is to preliminarily start the response of the liquid crystal by writing the low definition video signal in advance. Therefore, the first write signal becomes a video signal having a signal level between the maximum value and the minimum value of the signal level of the video signal to be written to the pixel electrodes of the two continuous gate lines. The first write signal may be determined according to the application of the liquid crystal display device, the purpose of use, and various other characteristics. Specifically, it will be determined according to the criteria described later.

Further, as shown in FIG. 25 (b), in the first video signal writing period Ta1, every two gate lines 31A and 31B, 31C and 31D, 31E and 31F ... Output, and in the second video signal writing period Ta2, the gate lines 31A, 3
.. are sequentially output to all gate lines in the order of 1B, 31C, 31D, 31E, 31F ..

Next, the criteria for setting the signal level of the above-mentioned first write signal will be described with reference to Tables 1 to 6. Although the first to fifth setting criteria will be described here, it goes without saying that the present embodiment is not limited to this.

In the following, the case where the original signal, that is, the signal corresponding to the video signal input from the outside has the signal level shown in Table 1 will be described as an example. The values shown in Table 1 and Tables 2 to 6 to be referred to later are written in the pixel electrodes 40A to 40D associated with the gate lines 31A to 31D in the first frame to the fourth frame. The signal level of the video signal is shown. Here, this signal level is a value that can be in the range of 0 to 100, and is specifically a value corresponding to the voltage value corresponding to the video signal. In Tables 1 to 6, since the present embodiment uses the normally white mode liquid crystal display panel, white display is performed when the signal level is 0, and black display is performed when the signal level is 100. I will do it.

[0177]

[Table 1]

According to the first setting criterion, the signal level of the video signal to be written in the pixel electrode associated with the gate line of either the odd-numbered row or the even-numbered row of the two consecutive gate lines is set to the level of the first write signal. Signal level. For example, in the case of the gate lines 31A and 31B, either the video signal to be written to the pixel electrode 40A associated with the odd-numbered gate line 31A or the video signal to be written to the pixel electrode 40B associated with the even-numbered gate line 31B. The signal level of that signal is the signal level of the first write signal. Table 2 shows the first
In the case where the video signal to be written in the pixel electrodes 40A and 40C associated with the gate lines 31A and 31C in the odd-numbered rows is used as the first write signal in the case where the first writing signal is used.

[0179]

[Table 2]

According to the first setting criterion, there is an advantage that the setting can be easily performed without complicated processing.

As shown in Table 2, when the video signal to be written in the pixel electrodes 40A and 40C associated with the odd-numbered gate lines 31A and 31C is the first write signal, the second video signal write period Ta2 In, it is not necessary to write a video signal in these pixel electrodes 40A and 40C. Therefore, in this case, the video signal may be written only to the pixel electrodes 40B and 40D associated with the even-numbered gate lines 31B and 31D in the second video signal writing period Ta2.

According to the second setting criterion, the signal level of the video signal to be written in the pixel electrode of the odd-numbered gate line of the two continuous gate lines and the pixel electrode of the even-numbered gate line. And the signal level of the video signal to be written to is alternately set to the signal level of the first write signal for each frame. Table 3 is based on the second setting criterion, and in the odd-numbered frames (first frame, third frame, ...), the gate lines 31A and 31C in the odd-numbered rows.
The signal level of the video signal to be written in the pixel electrodes 40A and 40C according to the above is set to the signal level of the first write signal, and the gate lines 31B and 31D in even rows are included in the even frames (second frame, fourth frame, ...). An example is shown in which the signal level of the video signal to be written in the pixel electrodes 40B and 40D is the signal level of the first write signal.

[0183]

[Table 3]

According to the second setting criterion, there is an advantage that even if the image is deteriorated, the deterioration is not biased to either the odd rows or the even rows.

In this case, in the second video signal writing Ta2 in the odd frame, the gate line 31 in the even row is used.
Video signals are written only to the pixel electrodes 40B and 40D associated with B and 31D, while gate lines 31A and 3 of odd rows are written in the second video signal writing Ta2 of even frames.
The video signal may be written only to the pixel electrodes 40A and 40C associated with 1C.

Further, in the third setting criterion, the signal levels of the video signals to be written in the pixel electrodes associated with two consecutive gate lines are compared, and the video signal of the slower response of the liquid crystal in each pixel is compared. The signal level is the signal level of the first write signal. Here, the video signal whose liquid crystal response is slower generally means the video signal whose absolute value of the voltage corresponding to the video signal is smaller. For example, when the normally white mode liquid crystal display panel is used, the response of the liquid crystal is slower in the white display than in the black display, as described in the first embodiment.
Therefore, the signal level of the video signal closer to white display is set as the signal level of the first write signal. Table 4 shows an example in the case where the signal level of the original signal is smaller than that of the first write signal, which is in accordance with the third setting criterion. For example, in the first frame, as shown in Table 1, the signal levels of the video signals to be written in the pixel electrodes 40A and 40B related to the gate lines 31A and 31B are 100 and 50, respectively, and the pixel electrodes 40B related to the gate line 31B are Since the signal level of the video signal to be written to is lower, the signal level of the first writing signal is set to 50.

[0187]

[Table 4]

According to the third setting criterion, since the video signal to be written in the pixel electrode of the liquid crystal having a slow response is written, the liquid crystal response time can be effectively shortened. There is an advantage that it can be achieved.

Further, according to the fourth setting criterion, the average value of the signal levels of the video signals to be written in the pixel electrodes of the two continuous gate lines is set as the signal level of the first write signal. Table 5 shows an example when the fourth setting criterion is followed. For example, in the first frame, as shown in Table 1, the pixel electrodes 40 associated with the gate lines 31A and 31B
Since the signal levels of the video signals to be written in A and 40B are 100 and 50, respectively, the average value of these 75 is used as the signal level of the first write signal.

[0190]

[Table 5]

According to the fourth setting criterion, the liquid crystal of each pixel can be made to respond uniformly during the first video signal writing period, so that a large amount of image deterioration is caused by only a simple calculation. The advantage is that the liquid crystal response time can be shortened without any need.

Further, according to the fifth setting criterion, the liquid crystal response time can be shortened based on the video signal written in the second video signal writing period, and the display is performed with the brightness determined by the video signal. The signal level obtained by the calculation so that
It is the signal level of the write signal. Table 6 shows an example when the fifth setting criterion is followed.

[0193]

[Table 6]

According to the fifth setting criterion, a special calculation must be performed, but there is an advantage that the image deterioration is small and the liquid crystal response time can be surely shortened.

In the case of the present embodiment, when displaying an image in which black and white lines appear alternately and repeatedly, for example, in the first video signal writing period Ta1 with respect to the line where black should be displayed. When the signal for displaying white is written, the black becomes brighter than the original black, which may cause a problem of lowering the contrast. Therefore, in order to solve such a problem, the video signal may be written after the first video signal writing period Ta1 is shorter than the second video signal writing period Ta2 as shown in FIG. .

(Ninth Embodiment) In the seventh embodiment, the scanning direction is fixed to a fixed direction. On the other hand, the ninth embodiment exemplifies a liquid crystal display device in which the order of outputting scanning signals to the gate lines is changed every subframe period. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

When the light emission of the LED is started before the liquid crystal response period elapses, there is a luminance gradient that the luminance becomes lower as it goes in the scanning direction.
As described above with reference to FIG. Therefore, in the present embodiment, the luminance inclination is made inconspicuous by changing the scanning direction for each sub-frame period and switching the inclination direction of the luminance inclination.

FIG. 27 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to the ninth embodiment, and (a) is the timing of outputting the scanning signal to the gate line of the liquid crystal display panel. (B) shows the waveform of the signal output to an arbitrary source line 32 of the liquid crystal display panel,
(C) shows the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) shows the light emission time of the LED of the backlight. Incidentally, in FIG. 27, 31A, 31
B indicates a gate line in FIG. 19, and N indicates the number of rows of pixels included in the liquid crystal display panel.

As shown in FIG. 27A, in the case where a scanning signal is sequentially output to the gate line 31A of the first row to the gate line of the Nth row in a certain sub-frame period, the next sub-frame period In, the scanning signal is sequentially output from the gate line of the Nth row to the gate line 31A of the first row. That is, the scanning signal is output such that the scanning direction is opposite every sub-frame period. As a result, signals are sequentially written from the pixel electrodes in the first row to the pixel electrodes in the Nth row in a certain subframe period, and the pixels in the first row to the pixel electrodes in the Nth row in the next subframe period. Signals are sequentially written to the electrodes.

Since the liquid crystal in the pixel corresponding to the gate line to be scanned later starts to respond more slowly than the liquid crystal in the pixel corresponding to the gate line to be scanned first,
It will also be late to complete the response. Therefore, as described above, when the scanning signals are output so that the scanning directions are opposite in each subframe period, the gate line to which the scanning signal is finally output is switched in each subframe period, so that the response Switch the position of the pixel that starts the latest.

In this operation, when the LED starts to emit light before the liquid crystal response period Tb is completed, as shown in FIG. 27D, the inclination direction of the luminance inclination is switched every sub-frame period. That is, a luminance gradient as shown in FIG. 28A occurs in a certain sub-frame period,
In the next sub-frame period, as shown in FIG. 28 (c), a luminance gradient inclined in the opposite direction to (a) occurs. As a result, the luminance gradient generated in each sub-frame period becomes inconspicuous, and image deterioration can be suppressed. As a result, even if the liquid crystal response period Tb and the light emission time Th overlap with each other, significant image deterioration does not occur.

In the present embodiment, as described above, since the scanning signal is output so that the scanning direction is opposite every sub-frame period, sub-frame periods having the same scanning direction do not continue. . However, it goes without saying that such a portion in which sub-frame periods having the same scanning direction are continuous may be included.

(Embodiment 10) In Embodiment 10,
An example of a liquid crystal display device in which a video signal is written to a pixel electrode in each of the first video signal writing period and the second video signal writing period after writing the non-video signal described in Embodiment 1 is described. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

FIG. 29 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to the tenth embodiment, and (a) is the timing of outputting a scanning signal to the gate line of the liquid crystal display panel. (B) shows the waveform of the signal output to an arbitrary source line 32 of the liquid crystal display panel,
(C) shows the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) shows the light emission time of the LED of the backlight. In FIG. 29, 31A, 31
B indicates a gate line in FIG. 19, and N indicates the number of rows of pixels included in the liquid crystal display panel.

As shown in FIG. 29, in the liquid crystal display device according to the present embodiment, a non-video signal writing period Tc is provided before the first video signal writing period Ta1, and the non-video signal writing period Tc is performed. The non-video signal is written as described in the form 1. Therefore, FIG.
As shown in (a), scanning signals are simultaneously output to all gate lines in the non-video signal writing period Tc.

As a result of writing the non-video signal in this way, as shown in FIG. 29C, the response of the liquid crystal in the pixels corresponding to all the gate lines at the start of the non-video signal writing period Tc. Therefore, the liquid crystal response period Tb can be further shortened. Therefore, it is possible to keep the light emission time of the LED of the backlight sufficiently long (see FIG. 29D).

(Eleventh Embodiment) In the eleventh embodiment,
An example of a liquid crystal display device that prevents color breakup by providing a plurality of subframe periods of the same color in one frame period will be described. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

The operation of the liquid crystal display device of this embodiment will be described below.

As will be described later, the liquid crystal display device of this embodiment performs signal writing twice, that is, first writing and second writing for each sub-frame period. Where the first
In writing, a video signal is written, and in the second writing, a black signal is written.

FIG. 30 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the eleventh embodiment.
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 30, in the case of this embodiment, one frame period is composed of six subframe periods, and two subframe periods of each color are provided. Further, the sub-frame periods of the same color are provided so as to be continuous. In addition, in FIG. 30, red, red, green,
Although an example in which subframe periods are provided in the order of green, blue, and blue is shown, the present embodiment is not limited to this order, and for example, blue, blue, green, green, red, and red. May be in order.

In this embodiment mode, in the first red sub-frame period, the first green sub-frame period, and the first blue sub-frame period, odd-numbered rows of gate lines 31A, 31C, 31.
A video signal is written to the pixel electrodes 40A, 40C, 40E, ...
31D, 31F ... Pixel electrodes 40B, 40D, 40
Write a black signal to F. As a result, FIG.
As shown in (a), odd-numbered gate lines 31A, 31
Pixels 50A, 50C, 50E ... Corresponding to C, 31E ...
Then, an image corresponding to the image signal is displayed, and the pixels 50B corresponding to the even-numbered gate lines 31B, 31D, 31F ,.
Black is displayed in 50D, 50F ...

On the other hand, in the second red sub-frame period, the second green sub-frame period, and the second blue sub-frame period, the pixel electrodes 40B, 40D, 40F ... Of the even-numbered row gate lines 31B, 31D, 31F. A video signal is written to the gate lines 31A, 31C, 3
Black signals are written in the pixel electrodes 40A, 40C, 40E, ... As a result, as shown in FIG. 30A, black is displayed in the pixels 50A, 50C, 50E ... Corresponding to the odd-numbered gate lines 31A, 31C, 31E ... And the even-row gate lines 31B, 31D, 31F. In the pixels 50B, 50D, 50F, ... Corresponding to ..., The video corresponding to the video signal is displayed.

In the case of a normally white mode liquid crystal display panel, the response of the liquid crystal is slower when displaying an image than when displaying a black image. Write first,
Next, it is desirable to write a black signal.

Next, the timing of outputting the scanning signal to each gate line will be described with reference to the timing chart shown in FIG. 31 shows the case of the first red sub-frame period, the first blue sub-frame period, and the first green sub-frame period, that is, the gate lines 31 in odd rows.
A, 31C, 31E ... Pixel electrodes 40A, 40C,
A video signal is written to the pixel electrodes 40E ... 40E, and the pixel electrodes 40 associated with the gate lines 31B, 31D, 31F ...
The output timing of the scanning signal in the case of writing a black signal to B, 40D, 40F ... Note that in FIG. 31, in the video signal writing period Ta in one subframe period, the period for performing the above-described first writing is shown as a first writing period Ta1, and the period for performing the second writing is shown as a second writing period Ta2. There is. Further, in the figure, 31Y indicates the last gate line of the odd-numbered gate lines, and 31X indicates the last gate line of the even-numbered gate lines.

As shown in FIG. 31, the first writing period T
In a1, odd-numbered gate lines 31A, 31C, 3
Sequential scanning signals are output for 1E ... This allows
As described above, these odd-numbered gate lines 31A, 31
C, 31E ... Pixel electrodes 40A, 40C, 40E ...
Then, the video signals are sequentially written. On the other hand, in the second writing period Ta2, scanning signals are output to the gate lines 31B, 31D, 31F, ... Of even rows, but in this case, scanning signals are output collectively for every four gate lines (( In FIG. 31, gate lines 31B, 3
The scanning signals are simultaneously output to 1D, 31F, and 31H). Therefore, the number of times the scan signal is output in the second writing period Ta2 is equal to the number of gate lines 31B and 31
It becomes 1/4 of the number of D, 31F .... For example, if the liquid crystal display panel 10 is provided with 480 gate lines, that is, if the gate lines are provided according to the NTSC standard, it corresponds to 240 gate lines in each sub-frame period. An image is displayed on the pixels that are displayed, and black is displayed on the pixels that correspond to the remaining 240 gate lines. In this case, in the case of a normal driving method in which the scanning signal is sequentially output for each gate line, it is necessary to output the scanning signal 240 + 240 = 480 times for each sub-frame period. However, as mentioned above, 4
If a scanning signal is output collectively for each gate line and a black signal is collectively written to the pixel electrodes associated with these four gate lines, it is 240 in order to realize black display.
Since it suffices to output the scanning signal / 4 = 60 times, it is necessary to output the scanning signal only 240 + 60 = 300 times for each sub-frame period. Therefore, 1
When the frame period is composed of six sub-frame periods, according to the above-mentioned normal driving method, it is necessary to output the scanning signal 480 × 6 = 2880 times for each frame period. In the mode, it is sufficient to output the scan signal 300 × 6 = 1800 times for each frame period.

As described above, since the number of times the scanning signal is output can be reduced, the video signal writing period Ta in each subframe period can be shortened.
Therefore, it is possible to increase the ratio of the light emission time of the LED in each sub-frame period, and it is possible to realize a sufficiently bright and good display. Further, since the number of subframe periods forming one subframe period is larger than in the conventional case, color breakup can be reduced.

In the present embodiment, the scanning signals are simultaneously output to the four gate lines, but if the number is two or more, the number of scanning signal outputs can be reduced. At the same time, the greater the number of gate lines that output the scanning signal, the less the number of times the scanning signal is output, and accordingly the longer the signal writing time can be. However,
At the same time, if the number of gate lines that output scanning signals is too large, insufficient writing of signals will occur and correct display cannot be performed. Therefore, the number of gate lines that simultaneously output the scanning signal depends on the performance of the source driver.

Further, in the present embodiment, the video signal and the black signal are written alternately for each pixel electrode associated with one gate line, but a plurality of lines may be written. In determining the number, peripheral circuits, driving method, visibility, etc. will be taken into consideration.

Further, in the present embodiment, one frame period is composed of six subframe periods, but the number is not limited to this. When the number of subframes is increased, the light emission time and the light emission interval are shortened, so that color breakup is less likely to be perceived, but the time required for one signal write is shortened accordingly, and the load on each circuit is increased. .

Furthermore, in this embodiment, the number of sub-frame periods for each color is the same as two, but a different number of sub-frame periods may be provided for each color.
For example, in consideration of the human visual characteristic of being sensitive to green, more green sub-frame periods may be provided than other color sub-frame periods as shown in FIG.

Further, in the normally white mode, by writing the black signal at a constant interval as described above, it is possible to prevent the alignment of the liquid crystal from shifting from the bend alignment to the splay alignment. As a result, it becomes possible to stably display a good image.

(Twelfth Embodiment) In the twelfth embodiment,
Unlike the case of the eleventh embodiment, a liquid crystal display device in which two consecutive subframe periods are used as subframe periods of different colors will be described. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

FIG. 33 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the twelfth embodiment.
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 33, one frame period is composed of six subframe periods as in the case of the eleventh embodiment, and two subframe periods for each color are provided. In the case of the embodiment, the sub-frame periods of different colors are provided so as to be continuous. Note that although FIG. 33 illustrates an example in which subframe periods are provided in the order of red, green, blue, red, green, and blue, this embodiment is not limited to this order. For example, the order may be green, blue, red, green, blue, red.

In this embodiment mode, in the first red sub-frame period, the first blue sub-frame period, and the second green sub-frame period, odd-numbered gate lines 31A, 31C, 31 are provided.
A video signal is written to the pixel electrodes 40A, 40C, 40E, ...
31D, 31F ... Pixel electrodes 40B, 40D, 40
A black signal is written to F. As a result, FIG.
As shown in (a), odd-numbered gate lines 31A, 31
Pixels 50A, 50C, 50E ... Corresponding to C, 31E ...
Then, an image corresponding to the image signal is displayed, and the pixels 50B corresponding to the even-numbered gate lines 31B, 31D, 31F ,.
Black is displayed in 50D, 50F ...

On the other hand, in the first green sub-frame period, the second red sub-frame period and the second blue sub-frame period, the pixel electrodes 40B, 40D, 40F ... Of the even-numbered row gate lines 31B, 31D, 31F. A video signal is written to the gate lines 31A, 31C, 3
Black signals are written in the pixel electrodes 40A, 40C, 40E, ... As a result, as shown in FIG. 33A, black is displayed in the pixels 50A, 50C, 50E ... Corresponding to the gate lines 31A, 31C, 31E ... In the odd rows, and the gate lines 31B, 31D, 31F in the even rows. In the pixels 50B, 50D, 50F, ... Corresponding to ..., The video corresponding to the video signal is displayed.

Similarly to the case of the eleventh embodiment, in the liquid crystal display device according to the present embodiment, when writing a black signal, a plurality of gate lines are put together and a scanning signal is simultaneously output. As a result, the number of times the scanning signal is output can be reduced, so that the video signal writing period can be shortened as in the eleventh embodiment.

Further, in the case of the present embodiment, since the operation is such that different colors emit in the continuous sub-frame period, the time for which one color continuously emits light becomes shorter than in the case of the eleventh embodiment. . Therefore, the color separation is less likely to be perceived.

(Embodiment 13) Embodiment 13 is an example of a liquid crystal display device which displays black in pixels corresponding to gate lines in the same row in successive sub-frame periods.
Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

FIG. 34 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the thirteenth embodiment.
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 34, as in the case of the eleventh embodiment, one frame period is composed of six subframe periods provided in the order of red, red, green, green, blue and blue. . Note that the order is not limited to this, as in the case of the eleventh embodiment.

In this embodiment, in the second red sub-frame period and the first green sub-frame period, which are consecutive sub-frame periods, the gate lines 31B, 31D in even-numbered rows,
Video signals are written to the pixel electrodes 40B, 40D, 40F, ... Of 31F.
A, 31C, 31E ... Pixel electrodes 40A, 40C,
A black signal is written to 40E. As a result, FIG.
As shown in (a), odd-numbered gate lines 31A, 31
Pixels 50A, 50C, 50E ... Corresponding to C, 31E ...
Displays black, and even-numbered gate lines 31B, 31D,
Images corresponding to the video signal are displayed in the pixels 50B, 50D, 50F, ... Corresponding to 31F.

Also, in the second green subframe period and the first blue subframe period which are also consecutive subframe periods, the gate lines 31A, 31C, 31E of odd rows are formed.
A video signal is written to the pixel electrodes 40A, 40C, 40E, ...
Pixel electrodes 40B, 40D, 40F relating to 1D, 31F ...
Write a black signal for ... As a result, FIG.
As shown in (a), odd-numbered gate lines 31A, 31
Pixels 50A, 50C, 50E ... Corresponding to C, 31E ...
Then, an image corresponding to the image signal is displayed, and the pixels 50B corresponding to the even-numbered gate lines 31B, 31D, 31F ,.
Black is displayed in 50D, 50F ...

Next, the timing of outputting the scanning signal to each gate line will be described with reference to the timing chart shown in FIG. FIG. 35 shows a case where the video signal is written in the pixel electrodes 40A, 40C, 40E, ... Of the gate lines 31A, 31C, 31E, ... Of the odd rows in the case of the second green subframe period and the first blue subframe period. Perform even-numbered gate lines 31B, 31D, 31F
The output timing of the scanning signal in the case of writing the black signal to the pixel electrodes 40B, 40D, 40F, ...

As shown in FIG. 35, in the second green sub-frame period, scanning signals are sequentially output to the gate lines 31A, 31C, 31E, ... Of odd rows in the first writing period Ta1. As a result, as described above, the video signals are sequentially written to the pixel electrodes 40A, 40C, 40E, ... Of the odd-numbered gate lines 31A, 31C, 31E. Similarly, the second writing period T
At a2, scanning signals are sequentially output to the gate lines 31B, 31D, 31F, ... Of even rows. As a result, as described above, the gate lines 31B, 31D, 31F of these even rows are formed.
The black signals are sequentially written to the pixel electrodes 40B, 40D, 40F.

On the other hand, in the first blue sub-frame period, the video signal writing period Ta includes only the first writing period and the second writing period Ta2 is not provided.
Therefore, as in the second green subframe period, in the first writing period Ta1, the gate lines 31A, 31C, 3 of the odd rows are
The scanning signals are sequentially output to 1E, but the scanning signals are not output to the gate lines 31B, 31D, 31F, ... As a result, the even-numbered gate lines 31B, 31
D, 31F ... Pixel electrodes 40B, 40D, 40F ...
However, the black signal is not written to the pixel electrodes 40B, 40D, 40F, ... In the second green subframe period which is the immediately preceding subframe period. , Gate lines 31B, 31D, 31F
Black display is held in the pixels 50B, 50D, 50F, ... Corresponding to.

By operating in this way, it is sufficient to output the scanning signal only in the first writing period Ta1 in the two subframe periods of the first green subframe period and the first blue subframe period. Therefore, for example, when the liquid crystal display panel 10 has 480 gate lines, it is sufficient to output the scanning signal 240 times in these two sub-frame periods.
480 × 4 + 240 × 2 = 24 in the entire one frame period
It suffices to output the scanning signal only 00 times.

Further, similarly to the case of the eleventh embodiment, the number of outputs can be further reduced by collectively outputting the scanning signals by grouping the four gate lines when writing the black signal. Specifically, 240 × 4 + (24
It is sufficient to output the scanning signal only 0/4) × 4 + 240 × 2 = 1920 times.

In the above, the black display is performed by the pixels corresponding to the gate lines in the same row in two consecutive sub-frame periods, but the same is true in three consecutive sub-frame periods as shown in FIG. Black display may be performed.
In FIG. 36, in the first red sub-frame period, the first green sub-frame period, and the first blue sub-frame period, the pixel electrodes 40B, 40D, 40F ... Of the even-numbered row gate lines 31B, 31D, 31F. A black signal is written to the pixel electrodes 40 of the gate lines 31A, 31C, 31E, ... Of odd rows in the second red subframe period, the second green subframe period, and the second blue subframe period.
A black signal is written to A, 40C, 40E ....

By operating in this way, in the first green sub-frame period, the first blue sub-frame period, the second green sub-frame period and the second blue sub-frame period, the scanning signal of the scanning signal is only generated in the first writing period Ta1. Output will be enough. Therefore, when 480 gate lines are provided in the liquid crystal display panel 10, it is sufficient to output the scanning signal 240 times in these four sub-frame periods, and therefore 480 × 2 + 240 × 4 = 1920 in one frame period as a whole. The scanning signal may be output only once. Further, as in the case of the eleventh embodiment, when the black signal is written, the scanning signals are simultaneously output to the four gate lines all at once.
It is sufficient to output the scanning signal only x2 + (240/4) x2 + 240x4 = 1560 times.

(Embodiment 14) In the fourteenth embodiment,
An example of a liquid crystal display device that displays an image of each color by combining three subframe periods as a set will be described. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

In the case of the eleventh embodiment, paying attention to one color sub-frame period in one sub-frame period, two sub-frame periods are set as a set, and video display and black display corresponding to a video signal are repeated. There is. That is, the video is displayed only for one subframe period in these one set of subframe periods. Therefore, 1
The brightness is about half that in the conventional case where the frame period is composed of three sub-frame periods for each color.

Therefore, in the present embodiment, three color sub-frame periods are grouped together to display images of each color. FIG. 37
FIG. 24 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the fourteenth embodiment during three sub-frame periods for any one color, and (a) is the gate lines 31A, 3
Pixels 50A, 50B, 50C, 50D, 50E, 50F ... Corresponding to 1B, 31C, 31D, 31E, 31F ...
The image displayed by is shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 37, in the first sub-frame period, video signals are written to the pixel electrodes 40A and 40B associated with the first-row gate line 31A and the second-row gate line 31B, respectively. After that, a black signal is written to the pixel electrode 40C associated with the gate line 31C in the third row. Video signals are written to the pixel electrodes 40D and 40E associated with the gate line 31D in the fourth row and the gate line 31E in the fifth row, and to the pixel electrodes 40F associated with the gate line 31F in the sixth row. Writes a black signal. After that, writing of the video signal and the black signal is repeated in the same manner. As a result, as shown in FIG. 37A, when attention is paid to three consecutive gate lines, an image corresponding to the image signal is displayed in the pixels corresponding to the two gate lines, and the next one gate is displayed. Black is displayed at the pixel corresponding to the line. For example, when attention is paid to the gate lines 31A, 31B, and 31C, the image corresponding to the video signal is displayed on the pixels 50A and 50B corresponding to the gate lines 31A and 31B, and the black is displayed on the pixel 50C corresponding to the next gate line 31C. Is displayed.

Also, in the second sub-frame period, 1
Video signals are written to the pixel electrodes 40A and 40C associated with the gate line 31A of the third row and the gate line 31C of the third row, and black signals are written to the pixel electrodes 40B associated with the gate line 31B of the second row. Also, the gate line 31 in the fourth row
Pixel electrodes 40D related to the D and sixth row gate lines 31F,
A video signal is written to 40F and a black signal is written to the pixel electrode 40E associated with the gate line 31E in the fifth row. After that, writing of the video signal and the black signal is repeated in the same manner. As a result, as shown in FIG. 37A, when attention is paid to three consecutive gate lines, black is displayed in a pixel corresponding to one gate line, and two gate lines sandwiching the gate line are displayed. An image corresponding to the image signal is displayed on the corresponding pixel. For example, the gate lines 31A, 31
Focusing on B and 31C, the gate lines 31A and 31
An image corresponding to the image signal is displayed in the pixels 50A and 50C corresponding to C, and the pixel 5 corresponding to the gate line 31B is displayed.
At 0B, black is displayed.

Furthermore, in the third sub-frame period,
A black signal is written to the pixel electrode 40A associated with the first-row gate line 31A, and the pixel electrode 40B associated with each of the second-row gate line 31B and the third-row gate line 31C,
A video signal is written to 40C. A black signal is written to the pixel electrodes 40D associated with the fourth row gate line 31D, and the pixel electrodes 40E and 40F associated with the fifth row gate line 31E and the sixth row gate line 31F, respectively. Writes the video signal. After that, writing of the black signal and the video signal is repeated in the same manner. As a result, as shown in FIG. 37A, when attention is paid to three consecutive gate lines, black is displayed in the pixel corresponding to the first gate line, and black is displayed in the pixel corresponding to the two subsequent gate lines. An image corresponding to the image signal is displayed. For example, when attention is paid to the gate lines 31A, 31B and 31C, the pixels 50B and 50C corresponding to the gate lines 31B and 31C.
Then, the video corresponding to the video signal is displayed, and the gate line 31
Black is displayed in the pixel 50A corresponding to A.

As in the case of the eleventh embodiment, it is desirable to write the video signal first and then write the black signal in each sub-frame period.

When performing such a display, paying attention to the pixel corresponding to any one gate line, black display is performed in one sub-frame period, and video display is performed in the other two sub-frame periods. Is done. Therefore, the brightness is about 1.5 as compared with the case of the eleventh embodiment.
Doubled.

Here, the case has been described in which three color sub-frame periods are combined into one set to display images of each color, but four or more sub-frame periods are grouped into one set to display images of each color. Good. In this case, a brighter display can be realized.

In FIG. 38, 3 is associated with green for one frame period.
The liquid crystal display device 1 of the present invention according to the fourteenth embodiment in the case where the liquid crystal display device comprises one sub-frame period, two sub-frame periods for red and one sub-frame period for blue.
6 is a conceptual diagram showing an example of the operation of FIG. In this case, the first, second, and third green subframe periods correspond to the first, second, and third subframe periods shown in FIG. 37, respectively. As a result, a brighter display can be realized in the green image than in the case of the eleventh embodiment. As described above, it is considered important to properly display the green image in consideration of human visual characteristics, and thus it is desirable to secure the brightness of the green image. However, it goes without saying that the brightness of images of other colors may be ensured.

As in the case of the eleventh embodiment, in the liquid crystal display device according to the present embodiment as well, when writing a black signal, a plurality of gate lines are grouped together and a scanning signal is simultaneously output. Good. As a result, the number of times the scanning signal is output can be reduced, so that the video signal writing period can be shortened as in the eleventh embodiment.

(Embodiment 15) In Embodiment 15,
A liquid crystal display device that displays an image with different resolutions for each color is illustrated. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

As described above, human vision is most sensitive to green, followed by red and blue. Therefore, in the present embodiment, the vertical resolution is made different for each color, and video is displayed so that the resolution becomes higher in the order of green, red, and blue. Specifically, for example, when the liquid crystal display panel 10 is provided with 480 gate lines, the vertical resolutions of green, red, and blue are 480, 320, and 24, respectively.
Make it 0.

FIG. 39 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the fifteenth embodiment,
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 39, in the first and second green sub-frame periods, all gate lines 31A, 3A
1B, 31C, 31D, 31E, 31F ... Pixel electrodes 40A, 40B, 40C, 40D, 40E, 40F ...
Write the video signal to. Therefore, in these sub-frame periods, the vertical resolution of the green image is the same as the number of gate lines included in the liquid crystal display panel 10.

On the other hand, in the first and second red sub-frame periods, when attention is paid to three consecutive gate lines,
A video signal is written to the pixel electrodes associated with the two gate lines, and a black signal is written to the pixel electrodes associated with the remaining one gate line. For example, in the first red sub-frame period, the gate lines 31A, 31B and 31C
When paying attention to, the video signal is written to the pixel electrodes 40A and 40B related to the gate lines 31A and 31B,
A black signal is written to the pixel electrode 40C associated with the gate line C. Therefore, in these sub-frame periods, the vertical resolution of the red image is ⅔ of the number of gate lines included in the liquid crystal display panel 10.

Further, in the first blue sub-frame period, video signals are written to the pixel electrodes 40A, 40C, 40E, ... Of the gate lines 31A, 31C, 31E. Black signals are written to the pixel electrodes 40B, 40D, 40F, ... Related to 31D, 31F. On the contrary, in the second blue sub-frame period, a black signal is written to the pixel electrodes 40A, 40C, 40E ... Associated with the odd-numbered gate lines 31A, 31C, 31E ... And the even-row gate lines 31B, 31D. Video signals are written to the pixel electrodes 40B, 40D, 40F, ... Therefore, in these sub-frame periods, the vertical resolution of the blue image is 1/2 of the number of gate lines included in the liquid crystal display panel 10.

Then, when the black signal is written in the red sub-frame period and the blue sub-frame period, the scanning signals are simultaneously output collectively to the plurality of gate lines in the same manner as in the eleventh embodiment. This gives 1
It is possible to reduce the number of times the scan signal is output during the frame period.

Further, as in the case of the thirteenth embodiment, if a black signal is written to the pixel electrodes associated with the same gate line over consecutive sub-frame periods, 1
It is possible to further reduce the number of times the scanning signal is output during the frame period.

During the sub-frame period in which both the video signal and the black signal are written, the video signal is written first as in the case of the eleventh embodiment.
It is desirable to write the black signal after that.

(Embodiment 16) In Embodiments 11 to 15, the resolutions in the sub-frame periods of the same color are the same. On the other hand, the sixteenth embodiment exemplifies a liquid crystal display device that displays an image at different resolutions even in the sub-frame period of the same color. Note that the configuration of the liquid crystal display device according to the present embodiment is the same as that in the case of the seventh embodiment, so description thereof will be omitted.

FIG. 40 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the sixteenth embodiment,
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 40, all the gate lines 31 in the first red sub-frame period, the first and second green sub-frame periods, and the first blue sub-frame period.
Pixel electrodes 40A, 40B, 40C, 40D, 40E, 4 related to A, 31B, 31C, 31D, 31E, 31F.
Video signals are written to 0F. Therefore, in these sub-frame periods, the vertical resolution of each color image is the same as the number of gate lines included in the liquid crystal display panel 10.

On the other hand, in the second red sub-frame period, when attention is paid to three consecutive gate lines, the video signal is written to the pixel electrodes associated with two of those gate lines, and the rest is left. A black signal is written to the pixel electrode associated with one of the gate lines. For example, the gate line 31
Focusing on A, 31B and 31C, the gate line 31A
And video signals are written to the pixel electrodes 40A and 40B related to 31B, and the pixel electrodes 4 related to the gate line 31C.
A black signal is written to 0C. Therefore, in the second red sub-frame period, the vertical resolution of the red image is ⅔ of the number of gate lines included in the liquid crystal display panel 10.

In the second blue sub-frame period, video signals are written to the pixel electrodes 40A, 40C, 40E ... Associated with the odd-numbered gate lines 31A, 31C, 31E ... And the even-numbered gate lines 31B. , 31D, 31F
Black signals are written to the pixel electrodes 40B, 40D, 40F, ... Therefore, in the second blue sub-frame period, the vertical resolution of the blue image is the liquid crystal display panel 1.
This is 1/2 of the number of gate lines that 0 has.

The second red subframe period and the second red subframe period
When a black signal is written in the blue sub-frame period, scanning signals are simultaneously output to a plurality of gate lines collectively as in the eleventh embodiment. As a result, the number of scanning signal outputs in one frame period can be reduced. Further, there is also an advantage that the resolution of the entire image is higher than that in the fifteenth embodiment.

Further, as in the case of the thirteenth embodiment, if a black signal is written to the pixel electrodes associated with the same gate line over consecutive sub-frame periods, it becomes 1
Similar to the case of the fifteenth embodiment, it is possible to further reduce the number of times of outputting the scanning signal in the frame period.

In the sub-frame period in which both the video signal and the black signal are written, the video signal is written first as in the case of the eleventh embodiment.
It is desirable to write the black signal after that.

(Embodiment 17) In the embodiment 17,
An example of a liquid crystal display device in which the same video signal is written to the pixel electrodes associated with a plurality of gate lines will be described. The configuration of the liquid crystal display device according to the present embodiment is the same as that of the eleventh embodiment, and therefore its explanation is omitted.

In the eleventh to sixteenth embodiments, the black signal is written in the pixel electrode associated with the predetermined gate line. In this case, the number of times the scan signal is output in one frame period can be reduced, but the luminance may be low. Therefore, in this embodiment, an object is to reduce the number of times a scan signal is output in one frame period while ensuring sufficient luminance.

FIG. 41 is a conceptual diagram showing an example of the operation of the liquid crystal display device 1 of the present invention according to the seventeenth embodiment.
(A) shows gate lines 31A, 31B, 31C, 31D, 3
Pixels 50A, 50B, 50 corresponding to 1E, 31F ...
The images displayed by C, 50D, 50E, 50F, ... Are shown, and (b) shows the light emission time of the LED of the backlight 20.

As shown in FIG. 41, in the first and second green sub-frame periods, the gate lines 31A, 31B,
Pixel electrodes 40 relating to 31C, 31D, 31E, 31F ...
Video signals are sequentially written to A, 40B, 40C, 40D, 40E, 40F .... As a result, as shown in FIG. 41A, all the gate lines 31A, 31B, 31
Pixels 50A corresponding to C, 31D, 31E, 31F ...
An image corresponding to the image signal is displayed at 50B, 50C, 50D, 50E, 50F ....

On the other hand, in the first and second red sub-frame periods and the first and second blue sub-frame periods, two consecutive gate lines 31A, 31B and 31C are used.
And 31D, 31E and 31F ... Pixel electrode 40A
And 40B, 40C and 40D, 40E and 40F ... Write the same video signal respectively. in this case,
Two gate lines 31A and 31B, 31C and 31D,
A transmission signal is output simultaneously for each of 31E and 31F. As a result, as shown in FIG. 41A, the two gate lines 31A and 31B, 31C and 31D, 31
Pixels 50A and 50B, 50 corresponding to E and 31F ...
Images corresponding to the same image signal are displayed at C and 50D, 50E and 50F. In this case, for example, in the first red subframe period and the first blue subframe period, the gate lines 31A, 31C, 31E in odd rows
A video signal to be originally written is written to the pixel electrodes 40A, 40C, 40E, ... Related to ... And to the even-numbered row gate lines 31B, 31D, 31F ... In the second red sub-frame period and the second blue sub-frame period. A video signal to be originally written is written to the pixel electrodes 40B, 40D, 40F, ... As a result, the video is normally displayed for the entire one frame period.

In the case of operating in this way, in the first and second red sub-frame periods, and in the first and second blue sub-frame periods, the number of times the number of gate lines provided in the liquid crystal display panel 10 is half the number of times. Only the scanning signal needs to be output. Moreover, since the black signal is not written, the display does not become dark.

The same video signal is not written in the green sub-frame period because the human visual characteristics are taken into consideration as described above. However, in which color sub-frame period the same video signal is written is not limited.

Further, in the present embodiment, the same video signal is written to the pixel electrodes related to the two gate lines, but the number of the gate lines is not limited to two and three lines are provided. It may be more than.

(Other Embodiments) In the above-described embodiments, the case where a normally white mode liquid crystal display panel is used has been described. However, the present invention is not limited to this, and is relatively limited. The same can be applied to a normally black mode liquid crystal display panel that performs black display when a low voltage is applied and white display when a relatively high voltage is applied.

Further, in the above-described embodiment, the backlight having the light sources of three primary colors is provided, but the present invention is not limited to this, and the backlight emits light of more colors. It may have a light source that emits light. For example, the backlight has a light source that emits colored light such as yellow, cyan, magenta, and white in addition to red, blue, and green, and color display is performed by time-divisionally emitting light of each of these colors. You may

In addition to the field sequential color system, for example, it is possible to apply to a blinking backlight system or the like. Here, the blinking backlight method is a method in which a color filter for three primary colors and a light source that emits white light are provided, and color display is performed by blinking the light source for each frame period. As described above, it is common with the field sequential color system in that the light source is blinked to perform color display. Therefore, the blinking backlight method can be considered as a field sequential color method in which one frame period is not divided into sub-frame periods of each color. Since it is necessary to blink the light source in this way, it is desirable to use an LED whose blinking operation is easy to control.
Other than this, for example, a cold cathode tube or the like can be used.

Further, although the above-mentioned embodiments exemplify the transmission type liquid crystal display device, the present invention is not limited to this, and for example, DMD (Digital Mirror Devic).
It can also be applied to a reflective liquid crystal display device such as e).

Further, from the viewpoint of increasing the response speed of the liquid crystal display panel, it is conceivable to use a liquid crystal molecule having spontaneous polarization such as a ferroelectric liquid crystal or an antiferroelectric liquid crystal. Response time of general nematic liquid crystal is 3
On the other hand, the response time of the liquid crystal molecule having spontaneous polarization is 1 ms or less, which is very fast, while it is about 0 ms. Therefore, when the liquid crystal molecule having such spontaneous polarization is used, the light emission time of the backlight can be sufficiently secured, and a better display can be obtained.

Various liquid crystal display devices can be realized by appropriately combining some of the above-described embodiments according to the application of the liquid crystal display device.

[0284]

As described in detail above, according to the liquid crystal display device of the present invention, it is necessary to realize a good display by making the ratio of the light emission time in each frame period longer than in the conventional case. Brightness can be secured.

Color breakup can be reduced by increasing the number of sub-frame periods in one frame period.

Furthermore, since the light utilization efficiency is good and sufficient brightness can be secured, the present invention exhibits excellent effects such as being friendly to the global environment and space environment.

[Brief description of drawings]

FIG. 1 is a sectional view schematically showing a configuration of a liquid crystal display device of the present invention according to a first embodiment.

FIG. 2 is a sectional view schematically showing an alignment state of liquid crystals.

FIG. 3 is a graph showing a relationship between a transmittance and an applied voltage of an OCB mode liquid crystal display panel which is a normally white mode.

FIG. 4 is a block diagram showing a configuration of a liquid crystal display device of the present invention according to the first embodiment.

FIG. 5 is a timing chart showing an example of a display operation of the liquid crystal display device of the present invention according to the first embodiment, (a)
Is the timing of outputting the scanning signal to the gate line of the liquid crystal display panel, (b) is the waveform of the signal output to any source line of the liquid crystal display panel, and (c) is the pixel of each row of the liquid crystal display panel. The change in transmittance is shown in (d), and the light emission time of the LED of the backlight is shown.

FIG. 6 is a graph showing a possible range of a non-video signal voltage.

FIG. 7 is a diagram for explaining a set value of a non-video signal voltage, in which (a) shows a voltage applied to the liquid crystal display panel 10 when shifting from a certain gray scale to a gray scale lower than the gray scale. Graph (b) is a graph showing the transmittance of the liquid crystal display panel in that case.

FIG. 8 is a diagram for explaining a set value of a non-video signal voltage, and FIG. 8A shows a voltage applied to a liquid crystal display panel when a certain gray scale is shifted to a higher gray scale. The graph and (b) are graphs showing the transmittance of the liquid crystal display panel in that case, respectively.

FIG. 9 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to the first embodiment.

FIG. 10 is a circuit diagram showing an equivalent circuit of another configuration example of the liquid crystal display panel in the first embodiment.

FIG. 11 is a timing chart showing an example of a display operation of the liquid crystal display device of the present invention according to the second embodiment,
(A) shows a timing of outputting a scanning signal to a gate line of the liquid crystal display panel, (b) shows a waveform of a signal outputted to an arbitrary source line of the liquid crystal display panel, (c) each row of the liquid crystal display panel. (D) shows the change in the transmittance of the pixel, and (d) shows the light emission time of the LED of the backlight.

FIG. 12 is a timing chart showing an example of a display operation of the liquid crystal display device of the present invention according to the third embodiment,
(A) shows a timing of outputting a scanning signal to a gate line of the liquid crystal display panel, (b) shows a waveform of a signal outputted to an arbitrary source line of the liquid crystal display panel, (c) each row of the liquid crystal display panel. (D) shows the change in the transmittance of the pixel, and (d) shows the light emission time of the LED of the backlight.

FIG. 13 is a timing chart showing an example of the operation of the liquid crystal display device of the present invention according to the fourth embodiment, wherein (a) shows the timing of outputting a scanning signal to the gate lines of the first block and their gates. Line shows the change in the pixel voltage of the pixel electrode, (b) shows the scan timing of the gate lines of the second block and the change in the pixel voltage of the pixel electrode associated with those gate lines, and (c) shows the LED of the backlight. The light emission time of each is shown.

FIG. 14 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to the fourth embodiment, (a)
Is the timing of outputting the scanning signal to the gate line of the (N-1) th row and the change of the pixel voltage of the pixel electrode (pixel electrode of the (N-1) th row) related to the gate line, and (b) is the Nth row. Shows the timing of outputting a scanning signal to the gate line and the change of the pixel voltage of the pixel electrode (pixel electrode of the Nth row) related to the gate line, and (c) shows the light emission time of the LED of the backlight. There is.

FIG. 15 is a circuit diagram showing an equivalent circuit of the liquid crystal display panel in the fifth embodiment.

16A and 16B are diagrams showing a configuration of a liquid crystal display device according to a sixth embodiment of the present invention, wherein FIG. 16A is a sectional view schematically showing the configuration of the liquid crystal display device, and FIG. It is a top view.

FIG. 17 is a conceptual diagram showing an in-plane luminance distribution of a light guide plate included in the liquid crystal display device of the present invention according to the sixth embodiment.

FIG. 18 is a diagram showing an operation when a light source included in the liquid crystal display device of the present invention according to the sixth embodiment is divided into a plurality of blocks, and (a) shows an in-plane luminance distribution of the light source,
(B) shows the timing of light emission in each block.

FIG. 19 is a block diagram showing a configuration of a liquid crystal display device of the present invention according to a seventh embodiment.

20A and 20B are timing charts showing an example of the operation of the liquid crystal display device of the present invention according to Embodiment 7, where FIG. 20A is a diagram showing the input timing of a video signal to an arbitrary source line, and FIG. It is a figure which shows the timing which outputs a scanning signal with respect to a gate line.

FIG. 21 is a diagram showing a response state of liquid crystal in a pixel corresponding to a gate line in a final row in the liquid crystal display device of the present invention according to the seventh embodiment, in which (a) scans the gate line. The signal output timing is shown in (b), and the transmittance change in the pixel corresponding to the gate line is
(C) has shown the light emission time of LED provided in the backlight, respectively.

22A and 22B are explanatory views for explaining that the charging time of the pixel electrode can be shortened in the liquid crystal display device of the present invention according to the seventh embodiment, and FIG. And FIG. 6B is a diagram showing a change in voltage applied to an arbitrary pixel electrode in the case of performing the same, and FIG. 6B is a diagram showing a change in voltage in the case of performing the two-line inversion type AC drive adopted in this embodiment. Is.

FIG. 23 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to the seventh embodiment, (a)
FIG. 4A is a diagram showing a video signal input timing to an arbitrary source line, and FIG. 7B is a diagram showing a scanning signal output timing to each gate line.

FIG. 24 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to Embodiment 7, (a)
FIG. 4A is a diagram showing a video signal input timing to an arbitrary source line, and FIG. 7B is a diagram showing a scanning signal output timing to each gate line.

FIG. 25 is a timing chart showing an example of the operation of the liquid crystal display device of the present invention according to the eighth embodiment, wherein (a) is a diagram showing the input timing of a video signal to an arbitrary source line, FIG. 6B is a diagram showing the timing of outputting a scanning signal to each gate line.

FIG. 26 is a timing chart showing another example of the operation of the liquid crystal display device of the present invention according to Embodiment 8, (a)
Is a diagram showing the input timing of a video signal to an arbitrary source line, and (b) is a diagram showing the scanning timing to each gate line.

FIG. 27 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to Embodiment 9.
(A) shows a timing of outputting a scanning signal to a gate line of the liquid crystal display panel, (b) shows a waveform of a signal outputted to an arbitrary source line of the liquid crystal display panel, (c) each row of the liquid crystal display panel. (D) shows the change in the transmittance of the pixel, and (d) shows the light emission time of the LED of the backlight.

FIG. 28 is a conceptual diagram showing an in-plane luminance distribution of a liquid crystal display panel included in the liquid crystal display device of the present invention according to Embodiment 9;

FIG. 29 is a timing chart showing an example of the display operation of the liquid crystal display device of the present invention according to Embodiment 10.
(A) shows a timing of outputting a scanning signal to a gate line of the liquid crystal display panel, (b) shows a waveform of a signal outputted to an arbitrary source line of the liquid crystal display panel, (c) each row of the liquid crystal display panel. (D) shows the change in the transmittance of the pixel, and (d) shows the light emission time of the LED of the backlight.

FIG. 30 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the eleventh embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 31 is a timing chart showing the timing of outputting a scanning signal to each gate line in the liquid crystal display device of the present invention according to the eleventh embodiment.

FIG. 32 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the twelfth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 33 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the twelfth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 34 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the thirteenth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 35 is a timing chart showing the timing of outputting a scanning signal to each gate line in the liquid crystal display device of the present invention according to the thirteenth embodiment.

FIG. 36 is a conceptual diagram showing another example of the operation of the liquid crystal display device of the present invention according to the thirteenth embodiment, and FIG. 36 (a) shows an image displayed by a pixel corresponding to a specific gate line. ,
(B) has shown the light emission time of LED of a backlight.

FIG. 37 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the fourteenth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 38 is a conceptual diagram showing another example of the operation of the liquid crystal display device of the present invention according to the fourteenth embodiment, and FIG. 38 (a) shows an image displayed by a pixel corresponding to a specific gate line. ,
(B) has shown the light emission time of LED of a backlight.

FIG. 39 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the fifteenth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 40 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the sixteenth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 41 is a conceptual diagram showing an example of the operation of the liquid crystal display device of the present invention according to the seventeenth embodiment, wherein (a) shows an image displayed by a pixel corresponding to a specific gate line,
(B) has shown the light emission time of LED of a backlight.

FIG. 42 is a timing chart showing an example of a display operation in a conventional field sequential color liquid crystal display device, (a) shows a timing of outputting a scanning signal to a gate line of a liquid crystal display panel, and (b) shows a timing chart. Is the waveform of the video signal output to any source line of the liquid crystal display panel, (c) is the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) is the light emission time of the backlight LED. Shows.

FIG. 43 is a timing chart showing an example of a display operation in a conventional field-sequential color liquid crystal display device when an LED is made to emit light before the liquid crystal response period Tb elapses, and (a) of the liquid crystal display panel. The timing for outputting the scanning signal to the gate line is (b)
Is the waveform of the video signal output to any source line of the liquid crystal display panel, (c) is the change in the transmittance of the pixels in each row of the liquid crystal display panel, and (d) is the light emission time of the backlight LED. Shows.

FIG. 44 is a conceptual diagram showing an in-plane luminance distribution of a liquid crystal display panel included in a conventional liquid crystal display device.

[Explanation of symbols]

1 Liquid crystal display 10 Liquid crystal display panel 11 Polarizer 12 Liquid crystal cell 20 backlight 21 light source 22 Light guide plate 23 Reflector 24 Diffusion sheet 26 LCD 27 Upper substrate 28 Lower substrate 29 Liquid crystal layer 31 gate line 32 source line 33 switching elements 34 Gate driver 35 Source Driver 36 Control circuit 37 Backlight control circuit 38 video signals 39 All ON signals 40 pixel electrodes 41 switching element 42 Source line 61 Common capacitance line 62 counter electrode Ta video signal writing period Ta1 first video signal writing period Ta2 Second video signal writing period Tb liquid crystal response period Tc Non-video signal writing period Th luminous time

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) G02F 1/141 G02F 1/141 5C080 G09G 3/20 621 G09G 3/20 621A 641 641C 641R 642 642L 660 660V 3 / 34 3/34 J 3/36 3/36 (72) Inventor Hirofumi Yamakita 1006 Kadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. (72) Kazunori Komori 1006 Kadoma, Kadoma, Osaka Matsushita Electric Sangyo Co., Ltd. F-term (reference) 2H088 HA28 JA09 JA11 JA17 JA20 MA03 MA06 2H091 FA45Z FD21 GA11 HA09 HA12 LA15 LA16 LA30 2H093 NA65 NC16 NC43 ND08 ND17 ND20 ND43 NE06 NF17 NF20 NG01 NG02 NH02 4H0A A22 A01A06B07B06A07B06B06B07BA06 AF44 AF51 AF53 AF61 AF71 BB16 BB29 BC03 BC11 EA01 FA29 FA56 5C080 AA10 BB05 CC03 DD05 EE30 FF11 GG07 GG08 JJ01 JJ02 JJ04

Claims (38)

[Claims] 1. A plurality of gate lines and a plurality of source lines arranged so as to intersect with each other, pixel electrodes arranged in a matrix, and pixel electrodes arranged corresponding to each of the pixel electrodes. A switching element capable of writing a video signal supplied through the source line to the pixel electrode by switching conduction / non-conduction between the pixel electrode and the source line according to a scanning signal supplied by the pixel electrode. An array substrate having: a counter substrate facing the array substrate; a liquid crystal layer formed between the array substrate and the counter substrate and filled with liquid crystal; and the counter substrate or the array substrate. An illuminating device that is provided with a counter electrode that drives the liquid crystal by generating a potential difference between the pixel electrode and the pixel electrode, and a light source that emits light of a plurality of colors. The one frame period of the video signal includes a plurality of sub-frame periods, and the lighting device is configured to emit colored light of one color of the plurality of colors to the liquid crystal layer for each sub-frame period. In addition to controlling, by writing a predetermined signal to the pixel electrode in the order of first writing and second writing in at least one sub-frame period, a video signal in the sub-frame period is supplied to the pixel electrode. A liquid crystal display device configured to drive the liquid crystal to display an image corresponding to the image signal. 2. The liquid crystal display according to claim 1, wherein a non-video signal different from a video signal is written in at least some of the pixel electrodes in the first writing, and a video signal is written in each of the pixel electrodes in the second writing. apparatus. 3. The liquid crystal display device according to claim 2, wherein the liquid crystal is an OCB mode liquid crystal. 4. The liquid crystal display device according to claim 2, wherein the liquid crystal is a liquid crystal having spontaneous polarization. 5. The voltage corresponding to the non-video signal is 0V
3. The liquid crystal display device according to claim 2, which is equal to or more than the intermediate voltage between the voltage for displaying white and the voltage for displaying black. 6. The first non-video signal close to the voltage for black display and the second non-video signal close to the voltage for white display in the first writing are written in the pixel electrode in this order. The liquid crystal display device according to item 1. 7. The liquid crystal display device according to claim 2, wherein in the first writing, the non-video signal is written in the pixel electrodes related to all the gate lines at substantially the same timing. 8. The pixel electrode associated with the gate line of each block by dividing the plurality of gate lines into a plurality of blocks and outputting a scanning signal to the gate line at substantially the same timing for each block in the first writing. 3. The liquid crystal display device according to claim 2, wherein the non-video signal is written into the memory at substantially the same timing. 9. The illuminating device emits light from one main surface, and has a brightness distribution in which the brightness decreases in the scanning direction in the main surface.
The liquid crystal display device according to item 1. 10. Displaying a part of an image to be displayed in the sub-frame period by the first writing,
The liquid crystal display device according to claim 1, wherein all of the images to be displayed are displayed by the first writing and the second writing. 11. The liquid crystal display device according to claim 10, wherein the liquid crystal is an OCB mode liquid crystal. 12. The liquid crystal display device according to claim 10, wherein the liquid crystal is a liquid crystal having spontaneous polarization. 13. A video signal to be written to one pixel electrode of a plurality of pixel electrodes adjacent to each other in the arrangement direction of gate lines in the first writing, is written to the plurality of pixel electrodes, and the video signal is written in the second writing. The liquid crystal display device according to claim 10, wherein a video signal is written in the remaining pixel electrodes of the plurality of pixel electrodes. 14. The method according to claim 10, wherein the same signal is written to a plurality of pixel electrodes adjacent to each other in the arrangement direction of the gate lines in the first writing, and the video signal is written to the plurality of pixel electrodes in the second writing. Liquid crystal display device. 15. The image signal according to claim 14, wherein the same signal is a video signal corresponding to the highest voltage or a lowest voltage of the video signals to be written in the plurality of pixel electrodes. Liquid crystal display device. 16. The liquid crystal display device according to claim 14, wherein the same signal is a signal of an average value of video signals to be written in each of the plurality of pixel electrodes. 17. The liquid crystal display device according to claim 14, wherein the same signal is one of the video signals to be written in each of the plurality of pixel electrodes. 18. The same signal is written to pixel electrodes associated with odd-numbered gate lines of the plurality of pixel electrodes in one subframe period of two consecutive subframe periods. 15. The liquid crystal display device according to claim 14, wherein the liquid crystal display device is a video signal that should be written to a pixel electrode associated with an even-numbered gate line of the plurality of pixel electrodes in the other sub-frame period. 19. The liquid crystal display device according to claim 10, wherein signals corresponding to voltages of the same polarity are written in the first writing and the second writing. 20. A signal is sequentially written in a predetermined order for each pixel electrode associated with a gate line in one subframe period of two predetermined consecutive subframe periods, and the signal is sequentially written in another subframe period. 11. The liquid crystal display device according to claim 10, wherein a signal is sequentially written for each pixel electrode associated with the gate line in the order opposite to the sub-frame period. 21. The period during which a scanning signal is output to each gate line in the first writing is longer than the period during which a scanning signal is output to each gate line in the second writing. 13. The liquid crystal display device according to item 13. 22. After writing a white display signal to at least some of the pixel electrodes in the first writing, one of the plurality of pixel electrodes adjacent in the arrangement direction of the gate lines in the first writing is applied to one pixel electrode. The liquid crystal display device according to claim 10, wherein a video signal to be written is written to the plurality of pixel electrodes, and a video signal is written to the remaining pixel electrodes of the plurality of pixel electrodes in the second writing. 23. The liquid crystal display device according to claim 22, wherein the liquid crystal is an OCB mode liquid crystal. 24. A black display signal is written to a part of the pixel electrodes and a video signal is written to the remaining pixel electrodes in the first writing, and a video signal is written to the remaining pixel electrodes and a remaining portion is written in the second writing. The liquid crystal display device according to claim 1, wherein a black display signal is written in the pixel electrode of. 25. The liquid crystal display device according to claim 24, wherein a black display signal is written after writing a video signal in the first writing and the second writing. 26. The liquid crystal display device according to claim 24, wherein a black display signal is written into pixel electrodes associated with a plurality of gate lines at substantially the same timing. 27. The liquid crystal display device according to claim 24, wherein the liquid crystal is an OCB mode liquid crystal. 28. The liquid crystal display device according to claim 24, wherein the liquid crystal is a liquid crystal having spontaneous polarization. 29. The liquid crystal display device according to claim 24, wherein black display is performed by pixels corresponding to the same gate line over a predetermined plurality of consecutive sub-frame periods. 30. The liquid crystal display device according to claim 24, wherein the one frame period includes a number of sub-frame periods that is greater than the number of colors emitted by the light source. 31. The liquid crystal display device according to claim 24, wherein the lighting device is controlled so as to emit light of different colors in two consecutive sub-frame periods. 32. The lighting device is controlled such that the number of subframe periods relating to a specific one of the plurality of colors is larger than the number of subframe periods relating to other colors in the one frame period. Item 24. The liquid crystal display device according to item 24. 33. The liquid crystal display device according to claim 24, wherein the number of gate lines supplying a scanning signal when writing the black display signal varies depending on a sub-frame period of each color. 34. The illumination device has light sources that emit red, green, and blue color lights, respectively, and the number of gate lines that supply the scanning signal is the largest in the sub-frame period related to green. 25. The liquid crystal display device according to claim 24, wherein the illuminating device is controlled so as to be the smallest in the case of the blue sub-frame period. 35. The illuminating device has light sources for emitting colored lights of red, green, and blue, respectively, and one of red, green, and blue or red, green, and blue is provided for each sub-frame period. The liquid crystal display device according to claim 1, wherein the illuminating device is controlled to emit color light of a color generated by a combination of at least two colors to the liquid crystal layer. 36. The illuminating device has a light source that emits colored light of at least red, blue, and green, respectively, and emits colored light of one of the colors to the liquid crystal layer for each sub-frame period. The liquid crystal display device according to claim 1, wherein the lighting device is controlled to emit light. 37. A plurality of gate lines and a plurality of source lines arranged so as to intersect with each other, pixel electrodes arranged in a matrix, and pixel electrodes arranged corresponding to each of the pixel electrodes, and via the gate lines. A switching element capable of writing a video signal supplied through the source line to the pixel electrode by switching conduction / non-conduction between the pixel electrode and the source line according to a scanning signal supplied by the pixel electrode. , And an array substrate having color filters of red, blue, and green, a counter substrate facing the array substrate, and arranged between the array substrate and the counter substrate and filled with liquid crystal. A liquid crystal layer and a counter electrode which is provided on the counter substrate or the array substrate and drives the liquid crystal by generating a potential difference between the liquid crystal layer and the pixel electrode; And a lighting device having a light source that emits light, controlling the lighting device to emit white light to the liquid crystal layer during a part of each frame period of the video signal, and for each frame period. Then, by writing a predetermined signal to the pixel electrode in the order of the first writing and the second writing, a video signal related to the frame period is supplied to the pixel electrode to drive the liquid crystal to generate the video signal. A liquid crystal display device configured to display corresponding video. 38. The liquid crystal display device according to claim 37, wherein the liquid crystal is an OCB mode liquid crystal.