JP2003204204A - Multiplexer and communication device - Google Patents
Multiplexer and communication deviceInfo
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- JP2003204204A JP2003204204A JP2002001789A JP2002001789A JP2003204204A JP 2003204204 A JP2003204204 A JP 2003204204A JP 2002001789 A JP2002001789 A JP 2002001789A JP 2002001789 A JP2002001789 A JP 2002001789A JP 2003204204 A JP2003204204 A JP 2003204204A
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- filter
- inner conductor
- electrode
- input
- dielectric
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Abstract
Description
【０００１】[0001]
【発明の属する技術分野】この発明は、携帯電話機等の
移動体通信機に使用するマルチプレクサおよびこれを備
えた通信装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multiplexer used in a mobile communication device such as a mobile phone and a communication device including the multiplexer.
【０００２】[0002]
【従来の技術】現在、携帯電話機等の移動体通信機等に
おいては、一種類の規格で通信するだけでなく、複数の
規格を有するものが次々に実用化されるようになってき
ている。例えば、Ｂｌｕｅｔｏｏｔｈ規格を用いて無線
ＬＡＮ端末の機能を持たせた携帯電話機が実用化されて
いる。2. Description of the Related Art At present, in mobile communication devices such as mobile phones, not only one type of communication but also a plurality of standards have been put into practical use one after another. For example, a mobile phone having the function of a wireless LAN terminal using the Bluetooth standard has been put into practical use.
【０００３】このような携帯電話機等の移動体通信機に
おいては、当然、二つの通信に使用する周波数は異な
る。すなわち、通常の携帯電話機としての信号を送受信
する場合に使用する通信フィルタおよびデュプレクサ
と、無線ＬＡＮに用いるフィルタとでは、通過帯域およ
び阻止帯域等の特性が異ならなければならず、必然的に
別個のフィルタでなければならない。しかし、携帯電話
等の移動体通信機では、小型化の要求が常にあり、ま
た、高周波を利用することから電気特性に関しても、そ
れぞれのフィルタを離れて搭載することは望ましくな
い。よって、これらを組み合わせたマルチプレクサを搭
載することとなる。In a mobile communication device such as a mobile phone, the frequencies used for the two communications are naturally different. That is, the characteristics such as the pass band and the stop band must be different between the communication filter and the duplexer used when transmitting and receiving a signal as an ordinary mobile phone and the filter used for the wireless LAN, and they are inevitably separated from each other. Must be a filter. However, in mobile communication devices such as mobile phones, there is always a demand for downsizing, and since high frequencies are used, it is not desirable to mount the filters separately with respect to electrical characteristics. Therefore, a multiplexer combining these is mounted.
【０００４】従来のマルチプレクサについて、図１３を
参照して説明する。図１３はマルチプレクサの外観斜視
図である。図１３において、８０１は第１・第２のフィ
ルタを備える誘電体デュプレクサ、８０２は第３のフィ
ルタ、１は誘電体ブロック、２ａ〜２ｆは内面に内導体
３ａ〜３ｆを形成し、一方の開口面付近に内導体非形成
部４ａ〜４ｆをそれぞれ設けた内導体形成孔、５は誘電
体ブロックの外面に形成された外導体、６ａ，６ｂは外
導体５から離間された、入力電極または出力電極となる
入出力電極、７は共用電極、９ａ，９ｂは第３のフィル
タ８０２の入出力電極、２１はベース基板、２２ａ，２
２ｂ，２３，２４ａ，２４ｂは誘電体デュプレクサ８０
１、フィルタ８０２の実装用ランド、２５ａ〜２５ｃは
ベース基板２１に設けられた入出力端子、２６はベース
基板２１に設けられた共用端子、２７は基板に設けら
れ、実装用ランド２４ａ，２３および共用端子２６を導
通する伝送線路である。A conventional multiplexer will be described with reference to FIG. FIG. 13 is an external perspective view of the multiplexer. In FIG. 13, 801 is a dielectric duplexer including first and second filters, 802 is a third filter, 1 is a dielectric block, 2a to 2f are inner conductors 3a to 3f formed on the inner surface, and one opening is provided. Inner conductor forming holes 5 in which inner conductor non-forming portions 4a to 4f are provided near the surface, 5 are outer conductors formed on the outer surface of the dielectric block, and 6a and 6b are separated from the outer conductor 5, input electrodes or outputs. Input / output electrodes to be electrodes, 7 are common electrodes, 9a and 9b are input / output electrodes of the third filter 802, 21 is a base substrate, and 22a and 2a.
2b, 23, 24a and 24b are dielectric duplexers 80
1, the mounting land of the filter 802, 25a to 25c are input / output terminals provided on the base substrate 21, 26 is a common terminal provided on the base substrate 21, 27 is provided on the substrate, and mounting lands 24a, 23 and It is a transmission line that conducts the common terminal 26.
【０００５】図１３に示すような構造とすることで、入
出力端子２５ａ〜２５ｃと共用端子２６とを備えるマル
チプレクサを構成している。The structure shown in FIG. 13 constitutes a multiplexer having the input / output terminals 25a to 25c and the common terminal 26.
【０００６】これにより、例えば、入出力端子２５ａ，
２５ｂをＷ−ＣＤＭＡなどの携帯電話機能を備える回路
に接続し、入出力端子２５ｃをＢｌｕｅｔｏｏｔｈなど
の無線ＬＡＮ用の回路に接続し、共用端子２６をアンテ
ナに接続することで、一つのアンテナを用いて、二つの
異なる通信機能を有する通信装置を構成している。Thus, for example, the input / output terminals 25a,
25b is connected to a circuit having a mobile phone function such as W-CDMA, the input / output terminal 25c is connected to a wireless LAN circuit such as Bluetooth, and the common terminal 26 is connected to an antenna, thereby using one antenna. As a result, a communication device having two different communication functions is configured.
【０００７】[0007]
【発明が解決しようとする課題】しかし、このような従
来のマルチプレクサにおいては、以下に示す解決すべき
課題が存在した。However, in such a conventional multiplexer, there are the following problems to be solved.
【０００８】すなわち、ベース基板を使用することか
ら、必然的にその分のスペースが必要となり、小型化に
反するとともに、コストも増加する。また、ベース基板
に形成された伝送回路を用いて、誘電体デュプレクサの
共用電極とフィルタの一方の入出力電極とを接続し、ま
た、誘電体デュプレクサおよびフィルタの各入出力電極
と外部回路とを接続しており、この伝送回路による電気
的な損失が発生する可能性がある。That is, since the base substrate is used, a space corresponding to the space is inevitably required, which is contrary to miniaturization and increases the cost. In addition, by using the transmission circuit formed on the base substrate, the common electrode of the dielectric duplexer and one input / output electrode of the filter are connected, and the input / output electrodes of the dielectric duplexer and the filter are connected to the external circuit. Since they are connected, there is a possibility that electrical loss will occur due to this transmission circuit.
【０００９】一方で、現状では、一つの誘電体ブロック
を用い、一つの共用電極で、三つの異なる種類のフィル
タを形成することはできず、二つの異なる種類のフィル
タを有する誘電体デュプレクサを形成することしかでき
なかった。On the other hand, at present, one dielectric block cannot be used to form three different types of filters with one shared electrode, but a dielectric duplexer having two different types of filters can be formed. I could only do it.
【００１０】この発明の目的は、基板等を用いずに、三
つの異なるフィルタを一体化した形状のマルチプレクサ
およびそれを備えた通信装置を構成することにある。It is an object of the present invention to configure a multiplexer having a shape in which three different filters are integrated and a communication device having the same, without using a substrate or the like.
【００１１】[0011]
【課題を解決するための手段】この発明は、第１のフィ
ルタと第２のフィルタとから構成された誘電体デュプレ
クサと、該誘電体デュプレクサとは別に形成された第３
のフィルタとを備え、誘電体デュプレクサの共用電極
と、第３のフィルタの一方の入出力電極とが導通し、誘
電体デュプレクサの実装面と、第３のフィルタの実装面
とが同一平面をなし、誘電体デュプレクサを構成する第
１・第２のフィルタのうち、一方のフィルタの内導体形
成孔の一方の開口面に接合するように、第３のフィルタ
とを配置させて、マルチプレクサを構成する。According to the present invention, there is provided a dielectric duplexer composed of a first filter and a second filter, and a third duplexer formed separately from the dielectric duplexer.
And a common electrode of the dielectric duplexer and one input / output electrode of the third filter are electrically connected, and the mounting surface of the dielectric duplexer and the mounting surface of the third filter are flush with each other. Of the first and second filters forming the dielectric duplexer, the third filter is arranged so as to be bonded to one opening surface of the inner conductor forming hole of one of the filters to form a multiplexer. .
【００１２】また、この発明は、開口面を内導体形成孔
の構成する共振器の短絡面として、マルチプレクサを構
成する。Further, according to the present invention, the multiplexer is constructed by using the opening surface as a short-circuit surface of the resonator formed by the inner conductor forming hole.
【００１３】また、この発明は、開口面を内導体形成孔
の構成する共振器の開放面として、マルチプレクサを構
成する。Further, according to the present invention, the multiplexer is constructed such that the opening surface is the opening surface of the resonator formed by the inner conductor forming hole.
【００１４】また、この発明は、誘電体デュプレクサを
構成する第１のフィルタの短絡面と第２のフィルタの開
放面とを、誘電体ブロックの同一面に形成して、マルチ
プレクサを構成する。Further, according to the present invention, the short circuit surface of the first filter and the open surface of the second filter forming the dielectric duplexer are formed on the same surface of the dielectric block to form a multiplexer.
【００１５】また、この発明は、誘電体ブロックに、入
力電極と共用電極とを備えた第１のフィルタと、出力電
極と共用電極とを備えた第２のフィルタとを構成する誘
電体デュプレクサと、誘電体デュプレクサとは、別に形
成した、二つの入出力電極を有する第３のフィルタとを
備え、誘電体ブロックの外面における内導体形成孔の配
列方向の端となる面に、第３のフィルタを、誘電体デュ
プレクサの実装面と、第３のフィルタの実装面とが同一
平面をなすように接合し、共用電極と第３のフィルタの
一方の入出力電極とを導通する伝送線路を、前記内導体
形成孔の一方の開口面から、第３のフィルタの或一面に
かけて設けて、マルチプレクサを構成する。Further, according to the present invention, a dielectric duplexer which constitutes a first filter having an input electrode and a common electrode and a second filter having an output electrode and a common electrode in a dielectric block is provided. , A dielectric duplexer and a third filter having two input / output electrodes, which are separately formed, and the third filter is provided on a surface of the outer surface of the dielectric block which is an end in the arrangement direction of the inner conductor forming holes. Is joined so that the mounting surface of the dielectric duplexer and the mounting surface of the third filter are flush with each other, and the transmission line that connects the common electrode and one input / output electrode of the third filter is The multiplexer is formed by providing the inner conductor forming hole from one opening surface to one surface of the third filter.
【００１６】また、この発明は、誘電体ブロックに、第
１・第２・第３の入出力電極と共用電極とを備え、これ
ら第１・第２・第３の入出力電極をそれぞれ信号の入出
力部とする第１・第２・第３のフィルタを構成し、第１
の入出力電極、第３の入出力電極、共用電極、第２の入
出力電極の順に誘電体ブロックの外面に配置し、第１の
フィルタと第３のフィルタとをそれぞれ構成する複数の
内導体形成孔を、誘電体ブロックの垂直な高さ方向に二
段に積み重なるように配置し、誘電体ブロック内に、こ
の二段に積み重なったフィルタを構成する内導体形成孔
の内導体同士の結合を防止する内部電極を設けることに
より、マルチプレクサを構成する。Further, according to the present invention, the dielectric block is provided with the first, second and third input / output electrodes and the common electrode, and these first, second and third input / output electrodes are respectively provided with signal lines. The first, second, and third filters serving as input / output units are configured to
Input / output electrodes, third input / output electrodes, shared electrodes, and second input / output electrodes are sequentially arranged on the outer surface of the dielectric block to form a first filter and a third filter, respectively. The formation holes are arranged so as to be stacked in two stages in the vertical height direction of the dielectric block, and the inner conductors of the inner conductor forming holes forming the filter stacked in two stages are connected to each other in the dielectric block. A multiplexer is constructed by providing internal electrodes for prevention.
【００１７】また、この発明は、内面に内導体を形成し
た複数の内導体形成孔と、該内導体形成孔に平行に設け
られた、内面に内面電極を形成した励振孔とを、誘電体
ブロックの内部に備え、励振孔に導通する接続電極を、
励振孔の一方の開口面と実装面と当該二面に垂直な誘電
体ブロックの外面とにかけて備え、複数の内導体形成孔
のうち、所定の内導体形成孔に形成された内導体に結合
する入出力電極と、外導体とを、誘電体ブロックの外面
に備えた第１のフィルタと、この第１のフィルタにおけ
る、内導体形成孔および励振孔の一方の開口面であっ
て、接続電極が形成された開口面を対称面として、第１
のフィルタと面対称の構成となる第２のフィルタと、第
１・第２のフィルタとは別に形成され、二つの入出力電
極を有する第３のフィルタとから構成され、第１のフィ
ルタと第２のフィルタとを、接続電極が重なり合うよう
に、開口面同士を接合して一体化し、第３のフィルタの
いずれか一方の入出力電極と、接続電極とを導通させ
て、マルチプレクサを構成する。Further, according to the present invention, a plurality of inner conductor forming holes having inner conductors formed on the inner surfaces thereof, and excitation holes having inner electrodes formed on the inner surfaces thereof, which are provided in parallel with the inner conductor forming holes, are provided in the dielectric body. Provided inside the block, a connection electrode that conducts to the excitation hole,
It is provided over one opening surface of the excitation hole, the mounting surface, and the outer surface of the dielectric block perpendicular to the two surfaces, and is coupled to an inner conductor formed in a predetermined inner conductor forming hole among a plurality of inner conductor forming holes. A first filter having an input / output electrode and an outer conductor on the outer surface of a dielectric block, and one opening surface of the inner conductor forming hole and the excitation hole in the first filter, wherein the connection electrode is With the formed opening plane as a symmetry plane, the first
Second filter having a plane symmetry configuration with the first filter and a third filter formed separately from the first and second filters and having two input / output electrodes. The second filter is integrated by joining the opening surfaces so that the connection electrodes overlap each other, and one of the input / output electrodes of the third filter is electrically connected to the connection electrode to form a multiplexer.
【００１８】また、この発明は、第１・第２・第３のフ
ィルタを組み合わせた形状を略直方体形状にして、マル
チプレクサを構成する。Further, according to the present invention, the multiplexer is constructed by making the combined shape of the first, second and third filters into a substantially rectangular parallelepiped shape.
【００１９】また、この発明は、第１・第２のフィルタ
を構成する複数の共振器の開放端を、複数の内導体形成
孔の内面における開放面付近に内部電極非形成部を設け
ることによって形成して、マルチプレクサを構成する。Further, according to the present invention, the open ends of the plurality of resonators forming the first and second filters are provided with the internal electrode non-forming portions near the open surfaces of the inner surfaces of the plurality of inner conductor forming holes. To form a multiplexer.
【００２０】また、この発明は、前記マルチプレクサを
備えて通信装置を構成する。Further, according to the present invention, a communication device is provided with the multiplexer.
【００２１】[0021]
【発明の実施の形態】第１の実施形態に係るマルチプレ
クサの構成について、図１〜図４を参照して説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a multiplexer according to the first embodiment will be described with reference to FIGS.
【００２２】図１の（ａ）はマルチプレクサの外観斜視
図であり、（ｂ）はそのブロック図である。図２はマル
チプレクサの三面図であり、（ａ）は正面図、（ｂ）は
下面図、（ｃ）は側面図である。図３はマルチプレクサ
の一部である誘電体デュプレクサの投影図であり、
（ａ）は短絡面側の正面図、（ｂ）は下面図、（ｃ）は
側面図、（ｄ）は背面図（開放面側の正面図）、（ｅ）
は内部構造を示した平面断面図である。図４はマルチプ
レクサの一部であるフィルタの三面図であり、（ａ）は
正面図、（ｂ）は下面図、（ｃ）は側面図である。FIG. 1A is an external perspective view of the multiplexer, and FIG. 1B is a block diagram thereof. FIG. 2 is a three-sided view of the multiplexer, where (a) is a front view, (b) is a bottom view, and (c) is a side view. FIG. 3 is a projection view of a dielectric duplexer that is part of a multiplexer,
(A) is a front view of the short-circuit surface side, (b) is a bottom view, (c) is a side view, (d) is a rear view (open surface side front view), (e)
FIG. 3 is a plan sectional view showing an internal structure. FIG. 4 is a three-sided view of a filter that is a part of a multiplexer, where (a) is a front view, (b) is a bottom view, and (c) is a side view.
【００２３】図１〜図４において、１０１は第１・第２
のフィルタを備えた誘電体デュプレクサ、１０２は第３
のフィルタ、１は誘電体ブロック、２ａ〜２ｆは内導体
形成孔、３ａ〜３ｆは内導体、４ａ〜４ｆは内導体非形
成部、５は外導体、６ａ，６ｂは誘電体デュプレクサ１
０１の入力電極または出力電極となる入出力電極、７は
誘電体デュプレクサ１０１の共用電極、８は励振孔であ
る内導体非形成部を設けていない内導体形成孔（以下、
単に「励振孔」という。）、９ａ，９ｂは第３のフィル
タ１０２の入出力電極である。In FIGS. 1 to 4, 101 is a first and a second.
Dielectric duplexer with a filter of 102, 102 is a third
Filter, 1 is a dielectric block, 2a to 2f are inner conductor forming holes, 3a to 3f are inner conductors, 4a to 4f are inner conductor non-forming portions, 5 is an outer conductor, and 6a and 6b are dielectric duplexers 1.
An input / output electrode serving as an input electrode or an output electrode of 01, a common electrode 7 of the dielectric duplexer 101, and an inner conductor forming hole (hereinafter, referred to as an exciting hole) in which an inner conductor non-forming portion is not provided
It is simply called "excitation hole". ), 9a, 9b are input / output electrodes of the third filter 102.
【００２４】図１、図２、図３に示すように、誘電体ブ
ロック１は、内導体形成孔２ｄ〜２ｆを設ける領域にお
いて、その一方の開口面から所定の深さで凹みを設けた
直方体に形成されている。As shown in FIGS. 1, 2 and 3, the dielectric block 1 is a rectangular parallelepiped in which a recess is provided at a predetermined depth from one of the opening faces in the region where the inner conductor forming holes 2d to 2f are provided. Is formed in.
【００２５】誘電体ブロック１の内部には、内面に内導
体３ａ〜３ｆを備えた内導体形成孔２ａ〜２ｆをステッ
プ構造で形成しており、内導体形成孔２ｄ〜２ｆは、誘
電体ブロック１の凹みを設けた部分に形成している。内
導体形成孔２ａ〜２ｆの凹みを有しない開口面（図２の
（ａ）における背面）付近には、それぞれ内導体非形成
部４ａ〜４ｆを設けており、誘電体ブロック１の外面に
は、略全面に外導体５を形成している。このような構造
とすることにより、内導体形成孔２ａ〜２ｆの内導体非
形成部４ａ〜４ｆを設けた側の開口面を開放面とし、こ
れに対向する開口面を短絡面として、それぞれ共振器を
構成している。Inside the dielectric block 1, inner conductor forming holes 2a to 2f having inner conductors 3a to 3f on the inner surface are formed in a step structure, and the inner conductor forming holes 2d to 2f are formed in the dielectric block. It is formed in the portion provided with the recess 1. Inner conductor non-forming portions 4a to 4f are provided in the vicinity of the opening surfaces (rear surface in FIG. 2A) of the inner conductor forming holes 2a to 2f, respectively, and the inner surface of the dielectric block 1 is not formed. The outer conductor 5 is formed on substantially the entire surface. With such a structure, the opening surface on the side of the inner conductor forming holes 2a to 2f on which the inner conductor non-forming portions 4a to 4f are provided is an open surface, and the opening surface facing the opening surface is a short-circuit surface. Make up the vessel.
【００２６】また、誘電体ブロック１の外面には、外導
体５から離間して、実装面となる下面から側面にかけ
て、伝送信号の入力電極または出力電極として機能する
入出力電極６ａ，６ｂを形成している。また、内導体形
成孔２ｃと２ｄとの間に、下面から短絡面およびこの両
面に接する側面にかけて共用電極７を形成している。ま
た、内導体形成孔２ｃと２ｄとの間には、これら内導体
形成孔２ａ〜２ｆと並列に内導体形成孔である励振孔８
を形成している。この励振孔８の一方の開口端は共用電
極７に導通している。On the outer surface of the dielectric block 1, there are formed input / output electrodes 6a and 6b which are separated from the outer conductor 5 and extend from the lower surface to the side surface, which is a mounting surface, to function as input electrodes or output electrodes of transmission signals. is doing. Further, the common electrode 7 is formed between the inner conductor forming holes 2c and 2d from the lower surface to the short-circuit surface and the side surfaces in contact with both surfaces. Further, between the inner conductor forming holes 2c and 2d, the excitation hole 8 which is an inner conductor forming hole is arranged in parallel with the inner conductor forming holes 2a to 2f.
Is formed. One opening end of the excitation hole 8 is electrically connected to the common electrode 7.
【００２７】このような構造とすることにより、内導体
形成孔２ａ〜２ｃ、入出力電極６ａ、および共用電極７
からなる第１の誘電体フィルタと、内導体形成孔２ｄ〜
２ｆ、入出力電極６ｂ、および共用電極７からなる第２
の誘電体フィルタを構成している。この第１・第２の誘
電体フィルタは、互いに内導体形成孔の内径および形状
が異なるとともにその長さが異なるため、共振周波数が
異なる。これにより、一方を送信フィルタ、他方を受信
フィルタとする、一体型の誘電体デュプレクサ１０１を
構成している。With this structure, the inner conductor forming holes 2a to 2c, the input / output electrode 6a, and the common electrode 7 are formed.
A first dielectric filter made of, and inner conductor forming holes 2d to
2f consisting of 2f, input / output electrode 6b, and shared electrode 7
Of the dielectric filter. The first and second dielectric filters have different inner diameters and shapes of the inner conductor forming holes and different lengths, and therefore have different resonance frequencies. As a result, an integrated dielectric duplexer 101, one of which is a transmission filter and the other of which is a reception filter, is configured.
【００２８】一方、第３のフィルタ１０２はＳＡＷフィ
ルタ等、図４に示すように外面に入出力電極９ａ，９ｂ
を備えて、構成されている。On the other hand, the third filter 102 is a SAW filter or the like, and as shown in FIG. 4, the input / output electrodes 9a and 9b are provided on the outer surface.
And is configured.
【００２９】前述の誘電体デュプレクサ１０１と第３の
フィルタ１０２とを組合せて、マルチプレクサを構成し
ている。The above-mentioned dielectric duplexer 101 and the third filter 102 are combined to form a multiplexer.
【００３０】すなわち、図１の（ａ）、図２に示すよう
に、部分的に凹みを有した第１・第２のフィルタを有す
る誘電体デュプレクサ１０１の、その凹みに第３のフィ
ルタ１０２をはめ込み、誘電体デュプレクサ１０１の第
２のフィルタを構成する内導体形成孔２ｄ〜２ｆの一方
の開口面に接合し、一体化する。そして、誘電体デュプ
レクサ１０１の共用電極７と第３のフィルタ１０２の一
方の入出力電極９ａとを接合する。このような構造とす
ることにより、図１の（ｂ）に示すようなブロック図で
表すことができる、三つの入出力電極６ａ，６ｂ，９ｂ
と一つの共用電極７（９ａ）とを備える一体型のマルチ
プレクサ（トリプレクサ）を構成する。That is, as shown in FIGS. 1A and 2, a dielectric duplexer 101 having first and second filters partially having a recess is provided with a third filter 102 in the recess. It is fitted and joined to one opening surface of the inner conductor forming holes 2d to 2f forming the second filter of the dielectric duplexer 101 to be integrated. Then, the common electrode 7 of the dielectric duplexer 101 and one input / output electrode 9a of the third filter 102 are joined. With such a structure, three input / output electrodes 6a, 6b, 9b which can be represented by a block diagram as shown in FIG.
And a single shared electrode 7 (9a) to form an integrated multiplexer (triplexer).
【００３１】このようなマルチプレクサの動作を以下に
説明する。本説明にあたり、第１のフィルタを送信フィ
ルタとし、第２のフィルタを受信フィルタとする。入出
力電極（入力電極）６ａに入力された信号は、送信フィ
ルタである第１のフィルタを通過して必要周波数成分の
みを共用電極７に伝送し、共用電極７に接続されたアン
テナから外部に発信する。外部からアンテナで受信し、
共用電極７に伝送された信号は、受信フィルタである第
２のフィルタを通過して必要周波数成分のみを入出力電
極（出力電極）６ｂに伝送し、これに後続する回路に出
力する。一方、第３のフィルタを含む回路は、無線ＬＡ
Ｎなどに利用することにより、双方向の通信を行う。す
なわち、入出力電極９ｂに入力された前記の信号と周波
数の異なる信号は、第３のフィルタを介して必要周波数
帯のみを取り出して共用電極７に伝送し、アンテナから
発信する。アンテナで受信した信号は、第３のフィルタ
を介して入出力端子９ｂに伝送され、後続の外部回路に
出力する。The operation of such a multiplexer will be described below. In this description, the first filter is a transmission filter and the second filter is a reception filter. The signal input to the input / output electrode (input electrode) 6a passes through the first filter, which is the transmission filter, and transmits only the necessary frequency component to the common electrode 7, and the antenna connected to the common electrode 7 outputs the signal to the outside. send. Received from the outside with an antenna,
The signal transmitted to the common electrode 7 passes through the second filter, which is a reception filter, and transmits only the necessary frequency component to the input / output electrode (output electrode) 6b and outputs it to the circuit subsequent thereto. On the other hand, the circuit including the third filter is
Bi-directional communication is performed by using it for N and the like. That is, a signal having a frequency different from that of the signal input to the input / output electrode 9b is taken out only through the third filter in a required frequency band, transmitted to the common electrode 7, and transmitted from the antenna. The signal received by the antenna is transmitted to the input / output terminal 9b via the third filter and output to the subsequent external circuit.
【００３２】例えば、Ｗ−ＣＤＭＡとＢｌｕｅｔｏｏｔ
ｈとを一体の通信機で通信する場合、Ｗ−ＣＤＭＡは、
送信周波数が１９５０ＭＨｚ、受信周波数が２１４０Ｍ
Ｈｚであり、Ｂｌｕｅｔｏｏｔｈは、２４００ＭＨｚで
あり、これらの周波数を中心にそれぞれ数十ＭＨｚの帯
域幅を確保する。その一方で、それぞれ相手の通過帯域
における減衰量は、３０ｄＢ〜５０ｄＢを確保する。For example, W-CDMA and Bluetooth
When communicating with h by an integrated communication device, W-CDMA is
Transmission frequency is 1950MHz, reception frequency is 2140M
Hz and Bluetooth is 2400 MHz, and a bandwidth of several tens of MHz is secured around these frequencies. On the other hand, the attenuation amount in the pass band of the other party is secured at 30 dB to 50 dB.
【００３３】ここで、第１の誘電体フィルタと第２の誘
電体フィルタとは、第１の誘電体フィルタのほうが第２
の誘電体フィルタよりもその軸長が長い。このため、第
１の誘電体フィルタを低周波数帯域側である送信フィル
タとし、第２の誘電体フィルタを高周波数帯域側である
受信フィルタとすることにより、誘電体デュプレクサを
Ｗ−ＣＤＭＡの通信に利用する。一方、第３のフィルタ
をＢｌｕｅｔｏｏｔｈ（無線ＬＡＮ）に利用する。これ
により、前記通信特性を得ることができる。また、第３
のフィルタをＳＡＷフィルタで構成することにより、第
３のフィルタを小型に形成できるため、誘電体デュプレ
クサの凹みに嵌め込んでも、実装面を同じ平面上に構成
することができる。これにより、容易に実装基板に実装
することができる。Here, regarding the first dielectric filter and the second dielectric filter, the first dielectric filter is the second dielectric filter.
Its axial length is longer than that of the dielectric filter. Therefore, by using the first dielectric filter as a transmission filter on the low frequency band side and the second dielectric filter as a reception filter on the high frequency band side, the dielectric duplexer can be used for W-CDMA communication. To use. On the other hand, the third filter is used for Bluetooth (wireless LAN). Thereby, the communication characteristics can be obtained. Also, the third
Since the third filter can be formed in a small size by configuring the filter of (1) as a SAW filter, the mounting surface can be configured on the same plane even when the third filter is fitted into the recess of the dielectric duplexer. Thereby, it can be easily mounted on the mounting board.
【００３４】例えば、前述のＷ−ＣＤＭＡ用の誘電体デ
ュプレクサの代表する外形寸法は、１２ｍｍ×５．５ｍ
ｍ×２ｍｍ程度のものであり、第２のフィルタを構成す
る部分の凹みによる寸法は、５ｍｍ×１ｍｍ×２ｍｍ程
度となる。この部分に同外形寸法の第３のフィルタを嵌
め込むことにより、面実装可能なマルチプレクサを構成
することができる。For example, the typical external dimensions of the above-mentioned dielectric duplexer for W-CDMA are 12 mm × 5.5 m.
It is about m × 2 mm, and the dimension of the concave portion of the second filter is about 5 mm × 1 mm × 2 mm. By inserting a third filter having the same outer dimensions into this portion, a surface mountable multiplexer can be constructed.
【００３５】なお、マルチプレクサの外形は、完全な直
方体形状である必要はなく、実装面が同一平面に構成さ
れているのであれば、図１１に示すように第３のフィル
タが凹みよりも小さくてもよい。The outer shape of the multiplexer does not have to be a perfect rectangular parallelepiped shape, and if the mounting surface is formed in the same plane, the third filter may be smaller than the recess as shown in FIG. Good.
【００３６】また、本実施形態では、第３のフィルタと
して、ＳＡＷフィルタを用いたが、外形寸法と必要な通
信特性を得られるのであれば、インダクタとキャパシタ
を積層形成した積層フィルタや誘電体フィルタで第３の
フィルタを構成してもよい。In this embodiment, the SAW filter is used as the third filter. However, if the external dimensions and the required communication characteristics can be obtained, a laminated filter or a dielectric filter in which an inductor and a capacitor are laminated is formed. You may comprise a 3rd filter with.
【００３７】次に、第２の実施形態に係るマルチプレク
サの構成について、図５を参照して説明する。図５はマ
ルチプレクサの外観斜視図である。図５において、２０
１は第１・第２のフィルタを備えた誘電体デュプレク
サ、２０２は第３のフィルタ、１は誘電体ブロック、２
ａ〜２ｆは内導体形成孔、３ａ〜３ｆは内導体、５は外
導体、６ａ，６ｂは誘電体デュプレクサ２０１の入力電
極および出力電極である入出力電極、７は共用電極、８
は励振孔である内導体非形成部を設けていない内導体形
成孔（以下、単に「励振孔」という。）、９ａ，９ｂは
第３のフィルタ２０２の入出力電極である。Next, the structure of the multiplexer according to the second embodiment will be described with reference to FIG. FIG. 5 is an external perspective view of the multiplexer. In FIG. 5, 20
1 is a dielectric duplexer including first and second filters, 202 is a third filter, 1 is a dielectric block, 2
a to 2f are inner conductor forming holes, 3a to 3f are inner conductors, 5 is an outer conductor, 6a and 6b are input / output electrodes which are input and output electrodes of the dielectric duplexer 201, 7 is a common electrode, 8
Are inner conductor forming holes (hereinafter simply referred to as “exciting holes”) which are not exciting conductor inner hole forming portions, and 9 a and 9 b are input / output electrodes of the third filter 202.
【００３８】誘電体ブロック１の内部に、内面に内導体
３ａ〜３ｆを備えた内導体形成孔２ａ〜２ｆをステップ
構造で形成しており、それぞれ一方の面（図における右
奥面）の開口面付近に内導体非形成部を設けて、この開
口面を開放面とし、これに対向する面（図における左手
前面）を短絡面とし、誘電体ブロック１の外面に、略全
面に外導体５を形成している。これにより、それぞれ共
振器を構成している。Inner conductor forming holes 2a to 2f having inner conductors 3a to 3f on the inner surface are formed in a step structure inside the dielectric block 1, and the openings on one surface (the right rear surface in the figure) are formed. An inner conductor non-forming portion is provided in the vicinity of the surface, the opening surface is an open surface, and the surface (the front surface on the left hand side in the figure) facing the opening surface is a short circuit surface. Is formed. This constitutes a resonator, respectively.
【００３９】また、外導体５から離間して、実装面とな
る下面から内導体形成孔２ａ〜２ｆの配列方向の端面
（図における右手前面）にかけて入出力電極６ａと、こ
れに対向する図における左奥面に入出力電極６ｂを形成
して、一方を入力電極、他方を出力電極としている。ま
た、内導体形成孔２ｃと２ｄとの間に、下面から短絡面
にかけて共用電極７を形成している。また、内導体形成
孔２ｃと２ｄとの間には、これら内導体形成孔２ａ〜２
ｆと平行に励振孔８を形成している。この励振孔８に形
成された内導体の一方の端部は共用電極７に導通してい
る。Further, apart from the outer conductor 5, the input / output electrode 6a is provided from the lower surface which is the mounting surface to the end surface in the arrangement direction of the inner conductor forming holes 2a to 2f (the front surface on the right hand side in the figure), and in the figure opposite thereto. An input / output electrode 6b is formed on the left back surface, and one is used as an input electrode and the other is used as an output electrode. Further, the common electrode 7 is formed between the inner conductor forming holes 2c and 2d from the lower surface to the short-circuit surface. Further, the inner conductor forming holes 2a to 2d are provided between the inner conductor forming holes 2c and 2d.
The excitation hole 8 is formed in parallel with f. One end of the inner conductor formed in the excitation hole 8 is electrically connected to the common electrode 7.
【００４０】このような構造とすることにより、内導体
形成孔２ａ〜２ｃ、入出力電極６ａ、および共用電極７
からなる第１の誘電体フィルタと、内導体形成孔２ｄ〜
２ｆ、入出力電極６ｂ、および共用電極７からなる第２
の誘電体フィルタを構成している。この第１・第２の誘
電体フィルタは、互いに内導体形成孔の内径および形状
が異ならせることにより、使用周波数帯域をずらし、そ
れぞれを送信フィルタ、受信フィルタとして、一体型の
誘電体デュプレクサ２０１を構成している。With this structure, the inner conductor forming holes 2a to 2c, the input / output electrode 6a, and the common electrode 7 are formed.
A first dielectric filter made of, and inner conductor forming holes 2d to
2f consisting of 2f, input / output electrode 6b, and shared electrode 7
Of the dielectric filter. In the first and second dielectric filters, the inner conductor forming holes have different inner diameters and shapes so that the frequency bands used are shifted, and the integrated dielectric duplexer 201 is used as a transmission filter and a reception filter, respectively. I am configuring.
【００４１】この誘電体デュプレクサ２０１の短絡面
に、フィルタ２０２を実装面が同一平面となるように接
合し、フィルタ２０２の外面に形成されている入出力電
極９ａを誘電体デュプレクサ２０１共用電極７に近接さ
せる。そして、これらを実装する際には、共用電極７と
入出力電極９ａとを同じランドに実装する等して、導通
させる。このような構造とすることにより、一体型のマ
ルチプレクサを構成する。The filter 202 is joined to the short-circuit surface of the dielectric duplexer 201 so that the mounting surface becomes the same plane, and the input / output electrode 9a formed on the outer surface of the filter 202 is used as the common electrode 7 of the dielectric duplexer 201. Bring them close together. Then, when these are mounted, the common electrode 7 and the input / output electrode 9a are mounted on the same land to make them conductive. With such a structure, an integrated multiplexer is configured.
【００４２】これにより、既存の誘電体デュプレクサに
新に設計したフィルタを接合するだけで一体型のマルチ
プレクサを構成できるため、新規設計、製造がフィルタ
のみで済み、現状設備を有効に利用することができる。As a result, since an integrated multiplexer can be constructed by simply joining a newly designed filter to an existing dielectric duplexer, the new design and manufacture only require the filter, and the existing equipment can be effectively used. it can.
【００４３】次に、第３の実施形態に係るマルチプレク
サの構成について、図６を参照して説明する。図６はマ
ルチプレクサの外観斜視図である。図６において、３０
１は第１・第２のフィルタを備えた誘電体デュプレク
サ、３０２は第３のフィルタ、１は誘電体ブロック、２
ａ〜２ｆは内導体形成孔、３ａ〜３ｆは内導体、４ａ〜
４ｆは内導体非形成部、５は外導体、６ａ，６ｂは誘電
体デュプレクサ３０１の入力電極および出力電極である
入出力電極、７は共用電極、８は励振孔である内導体非
形成部を持たない内導体形成孔（以下、単に「励振孔」
という。）、９ａ，９ｂはフィルタ２０２の入出力電
極、１０はカバーである。Next, the structure of the multiplexer according to the third embodiment will be described with reference to FIG. FIG. 6 is an external perspective view of the multiplexer. In FIG. 6, 30
1 is a dielectric duplexer including first and second filters, 302 is a third filter, 1 is a dielectric block, 2
a to 2f are inner conductor forming holes, 3a to 3f are inner conductors, 4a to
4f is an inner conductor non-formed portion, 5 is an outer conductor, 6a and 6b are input / output electrodes which are input and output electrodes of the dielectric duplexer 301, 7 is a common electrode, and 8 is an inner conductor non-formed portion. Inner conductor forming hole that does not have (hereinafter, simply “excitation hole”)
Say. ), 9a and 9b are input / output electrodes of the filter 202, and 10 is a cover.
【００４４】図６に示した誘電体デュプレクサ３０１
は、共用電極７が開放端面に形成されており、他の構成
は図５に示した誘電体デュプレクサ２０１と同じであ
り、第３のフィルタ３０２についても図５に示した第３
のフィルタ２０２と同じ構造である。The dielectric duplexer 301 shown in FIG.
, The shared electrode 7 is formed on the open end face, the other configuration is the same as that of the dielectric duplexer 201 shown in FIG. 5, and the third filter 302 also has the third electrode shown in FIG.
The filter 202 has the same structure as the filter 202.
【００４５】誘電体デュプレクサ３０１の開放端面（図
における左手前面）には、誘電体デュプレクサ３０１を
構成する各共振器に第３のフィルタ３０２からの電気磁
気的な影響を防止するカバー１０を介してフィルタ３０
２を接合している。ここで、入出力電極９ａを、共用電
極７に近接させる。そして、これらを実装する際には、
共用電極７と入出力電極９ａとを同じランドに実装する
等して、導通させる。このような構造とすることによ
り、一体型のマルチプレクサを構成する。At the open end face of the dielectric duplexer 301 (the front face on the left side in the figure), a cover 10 for preventing electromagnetic influence from the third filter 302 is applied to each resonator constituting the dielectric duplexer 301. Filter 30
Two are joined. Here, the input / output electrode 9a is brought close to the common electrode 7. And when implementing these,
The common electrode 7 and the input / output electrode 9a are mounted on the same land to make them conductive. With such a structure, an integrated multiplexer is configured.
【００４６】このように、誘電体デュプレクサの短絡面
に限ることなく、開放面にも、第３のフィルタを接合
し、一体化することができるため、設計および配置の自
由度が向上する。As described above, since the third filter can be joined and integrated not only to the short-circuited surface of the dielectric duplexer but also to the open surface, the degree of freedom in design and arrangement is improved.
【００４７】次に、第４の実施形態に係るマルチプレク
サの構成について、図７を参照して説明する。図７はマ
ルチプレクサの外観斜視図である。図７において、４０
１は第１・第２のフィルタを備えた誘電体デュプレク
サ、４０２は第３のフィルタ、１は誘電体ブロック、２
ａ〜２ｆは内導体形成孔、３ａ〜３ｆは内導体、４ａ〜
４ｆは内導体非形成部、５は外導体、６ａ，６ｂは誘電
体デュプレクサ４０１の入出力電極、７は共用電極、８
は励振孔である内導体非形成部を持たない内導体形成孔
（以下、単に「励振孔」という。）、９ａ，９ｂはフィ
ルタ４０２の入出力電極である。Next, the structure of the multiplexer according to the fourth embodiment will be described with reference to FIG. FIG. 7 is an external perspective view of the multiplexer. In FIG. 7, 40
1 is a dielectric duplexer having first and second filters, 402 is a third filter, 1 is a dielectric block, 2
a to 2f are inner conductor forming holes, 3a to 3f are inner conductors, 4a to
4f is an inner conductor non-formed portion, 5 is an outer conductor, 6a and 6b are input / output electrodes of the dielectric duplexer 401, 7 is a common electrode, 8
Are inner conductor forming holes (hereinafter simply referred to as “exciting holes”) that are not exciting conductor inner hole forming portions, and 9 a and 9 b are input / output electrodes of the filter 402.
【００４８】図７に示す誘電体デュプレクサ４０１は内
導体形成孔２ａ〜２ｃと内導体形成孔２ｄ〜２ｆとの開
放面と短絡面とを反対に形成しており、同一の開口面に
開放面と短絡面とを混在して形成している。他の構成は
図６に示した誘電体デュプレクサ３０１と同じである。
また、第３のフィルタ４０２は図５、図６に示したフィ
ルタと同じである。In the dielectric duplexer 401 shown in FIG. 7, the open surfaces and the short-circuit surfaces of the inner conductor forming holes 2a to 2c and the inner conductor forming holes 2d to 2f are formed opposite to each other, and the same opening surface is formed on the open surface. And the short-circuit surface are mixed. Other configurations are the same as those of the dielectric duplexer 301 shown in FIG.
The third filter 402 is the same as the filter shown in FIGS. 5 and 6.
【００４９】誘電体デュプレクサ４０１を構成する内導
体形成孔２ｄ〜２ｆよりなる第２のフィルタの短絡面に
は、第３のフィルタ４０２が接合されており、入出力電
極９ａが共用電極７に近接している。そして、これらを
実装する際には、共用電極７と入出力電極９ａとを同じ
ランドに実装する等して、導通させる。このような構造
とすることにより、一体型のマルチプレクサを構成す
る。The third filter 402 is joined to the short-circuit surface of the second filter having the inner conductor forming holes 2d to 2f constituting the dielectric duplexer 401, and the input / output electrode 9a is close to the common electrode 7. is doing. Then, when these are mounted, the common electrode 7 and the input / output electrode 9a are mounted on the same land to make them conductive. With such a structure, an integrated multiplexer is configured.
【００５０】なお、第２〜第４の実施形態に示したマル
チプレクサを構成する誘電体デュプレクサの共用電極と
フィルタの入出力電極は近接させるだけでなく、接合時
に直接接続する構造であってもよい。The common electrode of the dielectric duplexer and the input / output electrodes of the filter forming the multiplexers shown in the second to fourth embodiments may not only be placed close to each other, but may be directly connected at the time of joining. .
【００５１】次に、第５の実施形態に係るマルチプレク
サの構成について、図８を参照して説明する。図８はマ
ルチプレクサの外観斜視図である。図８において、５０
１は第１・第２のフィルタを備えた誘電体デュプレク
サ、５０２は第３のフィルタ、１は誘電体ブロック、２
ａ〜２ｆは内導体形成孔、３ａ〜３ｆは内導体、４ａ〜
４ｆは内導体非形成部、５は外導体、６ａ，６ｂは誘電
体デュプレクサ５０１の入力電極または出力電極となる
入出力電極、７は共用電極、９ａ，９ｂはフィルタ５０
２の入出力電極、１１は伝送線路である。Next, the structure of the multiplexer according to the fifth embodiment will be described with reference to FIG. FIG. 8 is an external perspective view of the multiplexer. In FIG. 8, 50
1 is a dielectric duplexer having first and second filters, 502 is a third filter, 1 is a dielectric block, 2
a to 2f are inner conductor forming holes, 3a to 3f are inner conductors, 4a to
Reference numeral 4f is an inner conductor non-formation portion, 5 is an outer conductor, 6a and 6b are input / output electrodes serving as input or output electrodes of the dielectric duplexer 501, 7 is a common electrode, and 9a and 9b are filters 50.
The input / output electrodes 2 and 11 are transmission lines.
【００５２】誘電体ブロック１の内部に、内面に内導体
３ａ〜３ｆを備えた内導体形成孔２ａ〜２ｆをステップ
構造に形成しており、内導体形成孔２ｄ〜２ｆは誘電体
ブロック１の天面側に近づけて形成している。内導体形
成孔２ａ〜２ｆの一方の開口面（図における左手前面）
付近には、それぞれ内導体非形成部４ａ〜４ｆを設け
て、この開口面を開放面とし、これに対向する面を短絡
面とし、誘電体ブロック１の外面に、略全面に外導体５
を形成して、それぞれ共振器を構成している。Inside the dielectric block 1, inner conductor forming holes 2a to 2f having inner conductors 3a to 3f on the inner surface thereof are formed in a step structure, and the inner conductor forming holes 2d to 2f are formed in the dielectric block 1. It is formed close to the top side. One opening surface of the inner conductor forming holes 2a to 2f (left-hand front surface in the figure)
Inner conductor non-formation portions 4a to 4f are provided in the vicinity, respectively, and the opening face is made an open face, and the face opposite to this is made a short circuit face.
To form resonators.
【００５３】また、外導体５から離間して、実装面とな
る下面から開放面にかけて、一方が入力電極、他方が出
力電極となる入出力電極６ａ，６ｂを形成しており、内
導体形成孔２ｃと２ｄとの間に、同様に下面から開放面
にかけて共用電極７を形成している。Further, the input / output electrodes 6a and 6b, one of which is an input electrode and the other of which is an output electrode, are formed from the lower surface, which is a mounting surface, to the open surface, apart from the outer conductor 5, and the inner conductor forming hole is formed. Similarly, the shared electrode 7 is formed between 2c and 2d from the lower surface to the open surface.
【００５４】このような構造とすることにより、内導体
形成孔２ａ〜２ｃ、入出力電極６ａ、および共用電極７
からなる第１の誘電体フィルタと、内導体形成孔２ｄ〜
２ｆ、入出力電極６ｂ、および共用電極７からなる第２
の誘電体フィルタを構成している。この第１・第２の誘
電体フィルタは、互いに内導体形成孔の内径および形状
が異なることにより使用周波数帯域が異なり、それぞれ
を送信フィルタ、受信フィルタとすることにより、一体
型の誘電体デュプレクサ５０１を構成している。With such a structure, the inner conductor forming holes 2a to 2c, the input / output electrode 6a, and the common electrode 7 are formed.
A first dielectric filter made of, and inner conductor forming holes 2d to
2f consisting of 2f, input / output electrode 6b, and shared electrode 7
Of the dielectric filter. The first and second dielectric filters have different frequency bands used because the inner conductor forming holes have different inner diameters and shapes, and by using them as a transmission filter and a reception filter, respectively, an integrated dielectric duplexer 501 is formed. Are configured.
【００５５】一方、第３のフィルタ５０２は実装面から
ある一側面（図における左手前面）にかけて入出力電極
９ａ，９ｂを形成しており、誘電体デュプレクサ５０１
の内導体形成孔２ａ〜２ｆの配列端となる面に接合して
いる。ここで、それぞれの実装面、および誘電体デュプ
レクサ５０１の開放面と第３のフィルタ５０２の入出力
電極９ａ，９ｂを形成した側面とが一致するように接合
する。また、ここで、この誘電体デュプレクサ５０１の
開放面からそれに続く第３のフィルタ５０２の側面にか
けて、共用電極７と入出力電極９ａとを導通する伝送線
路１１を形成して、一体型のマルチプレクサを構成す
る。On the other hand, the third filter 502 has input / output electrodes 9a and 9b formed on one side surface (left front surface in the drawing) from the mounting surface, and the dielectric duplexer 501 is formed.
Of the inner conductor forming holes 2a to 2f. Here, the respective mounting surfaces, and the open surface of the dielectric duplexer 501 and the side surface of the third filter 502 on which the input / output electrodes 9a and 9b are formed are joined together. In addition, here, the transmission line 11 that connects the common electrode 7 and the input / output electrode 9a is formed from the open surface of the dielectric duplexer 501 to the side surface of the third filter 502 that follows the dielectric duplexer 501 to form an integrated multiplexer. Constitute.
【００５６】このような構成とすることにより、第３の
フィルタ５０２を内導体形成孔を用いた共振器からなる
誘電体フィルタで形成しても、容易にマルチプレクサを
構成することができる。With such a structure, even if the third filter 502 is formed of a dielectric filter including a resonator using an inner conductor forming hole, a multiplexer can be easily formed.
【００５７】次に、第６の実施形態に係るマルチプレク
サの構成について、図９を参照して説明する。図９の
（ａ）はマルチプレクサの外観斜視図であり、（ｂ）は
内導体形成孔の一方の開口面（開放面）を示す正面図で
ある。図９において、６０１は第１・第２・第３のフィ
ルタからなるマルチプレクサ、１は誘電体ブロック、２
ａ〜２ｆは内面に内導体および内導体非形成部を設けた
内導体形成孔、５は外導体、６ａ，６ｂ，６ｃは、それ
ぞれが入力電極または出力電極となる入出力電極、７は
共用電極、８は励振孔である内導体非形成部を持たない
内導体形成孔（以下、単に「励振孔」という。）、１２
は内部電極である。Next, the structure of the multiplexer according to the sixth embodiment will be described with reference to FIG. 9A is an external perspective view of the multiplexer, and FIG. 9B is a front view showing one opening surface (open surface) of the inner conductor forming hole. In FIG. 9, 601 is a multiplexer including first, second, and third filters, 1 is a dielectric block, and 2 is a dielectric block.
a to 2f are inner conductor forming holes in which an inner conductor and an inner conductor non-forming portion are provided on the inner surface, 5 are outer conductors, 6a, 6b and 6c are input / output electrodes each serving as an input electrode or an output electrode, and 7 is shared Electrodes, 8 are inner conductor forming holes (hereinafter, simply referred to as “exciting holes”) that do not have inner conductor non-forming portions that are excitation holes, 12
Is an internal electrode.
【００５８】誘電体ブロック１の内部には、内面に内導
体を備えた内導体形成孔２ａ〜２ｆをステップ構造に形
成しており、内導体形成孔２ａ〜２ｃと内導体形成孔２
ｆは誘電体ブロック１の下面から上面への方向である高
さ方向にかけて二段に形成している。内導体形成孔２ａ
〜２ｆの一方の開口面（図における左手前面）付近に
は、それぞれ内導体非形成部を設けて、この開口面を開
放面とし、これに対向する面（図における右奥面）を短
絡面とし、誘電体ブロック１の外面には、略全面に外導
体５を形成して、それぞれ共振器を構成している。Inside the dielectric block 1, inner conductor forming holes 2a to 2f having inner conductors on the inner surface are formed in a step structure, and the inner conductor forming holes 2a to 2c and the inner conductor forming hole 2 are formed.
f is formed in two steps in the height direction which is the direction from the lower surface to the upper surface of the dielectric block 1. Inner conductor forming hole 2a
An inner conductor non-forming portion is provided near one of the opening surfaces (left front surface in the figure) of ~ 2f, and the opening surface is made an open surface, and the surface (right rear surface in the drawing) facing this is a short-circuit surface. On the outer surface of the dielectric block 1, the outer conductor 5 is formed on substantially the entire surface to form a resonator.
【００５９】また、外導体５から離間して、実装面とな
る下面から開放面にかけて、それぞれが入力電極または
出力電極となる入出力電極６ａ，６ｂ，６ｃを形成して
いる。また、内導体形成孔２ｃ，２ｄ，および２ｆとの
間に、実装面となる下面から開放面にかけて、共用電極
７を形成している。これらの入出力電極６ａ〜６ｃと共
用電極７とは、誘電体ブロック１内部に内導体形成孔２
ａ〜２ｆに平行に形成された複数の励振孔８にそれぞれ
導通している。Further, the input / output electrodes 6a, 6b, 6c, which are the input electrodes or the output electrodes, are formed from the lower surface, which is the mounting surface, to the open surface, apart from the outer conductor 5. Further, the shared electrode 7 is formed between the inner conductor forming holes 2c, 2d, and 2f from the lower surface which is the mounting surface to the open surface. These input / output electrodes 6a to 6c and the common electrode 7 are formed by forming the inner conductor forming hole 2 inside the dielectric block 1.
Each of the plurality of excitation holes 8 formed in parallel with a to 2f is electrically connected.
【００６０】ここで、内導体形成孔２ｆおよび入出力電
極６ｃに導通する励振孔８と、内導体形成孔２ａ〜２ｃ
および入出力電極６ａに導通する励振孔８との間には、
内部電極１２を開放面から短絡面にかけて形成してい
る。これにより、内導体形成孔２ａ〜２ｃよりなる誘電
体フィルタと、内導体形成孔２ｆからなる誘電体フィル
タとを電気磁気的に分離している。Here, the excitation hole 8 that is electrically connected to the inner conductor forming hole 2f and the input / output electrode 6c, and the inner conductor forming holes 2a to 2c.
And between the excitation hole 8 that is electrically connected to the input / output electrode 6a,
The internal electrode 12 is formed from the open surface to the short-circuit surface. As a result, the dielectric filter including the inner conductor forming holes 2a to 2c and the dielectric filter including the inner conductor forming holes 2f are electromagnetically separated from each other.
【００６１】このようにして、内導体形成孔２ａ〜２
ｃ、入出力電極６ａ、および共用電極７を備える第１の
フィルタと、内導体形成孔２ｄ，２ｅ、入出力電極６
ｂ、および共用電極７を備える第２のフィルタと、内導
体形成孔２ｆ、入出力電極６ｃ、および共用電極７を備
える第３のフィルタとから、一体型のマルチプレクサを
構成する。In this way, the inner conductor forming holes 2a-2
c, the first filter including the input / output electrode 6a, and the common electrode 7, inner conductor forming holes 2d and 2e, and the input / output electrode 6
The second filter including b and the common electrode 7 and the third filter including the inner conductor forming hole 2f, the input / output electrode 6c, and the common electrode 7 form an integrated multiplexer.
【００６２】次に、第７の実施形態に係るマルチプレク
サの構成について、図１０を参照して説明する。図１０
はマルチプレクサの外観斜視図である。図１０におい
て、７０１は第１のフィルタである誘電体フィルタ、７
０２は第２のフィルタである誘電体フィルタ、７０３は
第３のフィルタ、１ａ，１ｂは誘電体ブロック、２ａ〜
２ｃは内導体形成孔、３ａ〜３ｃは内導体、４ａ〜４ｃ
は内導体非形成部、５は外導体、６ａは誘電体フィルタ
７０１の入出力電極、６ｂは誘電体フィルタ７０２の入
出力電極、８は励振孔である内導体非形成部を持たない
内導体形成孔（以下、単に「励振孔」という。）、９
ａ，９ｂは第３のフィルタ７０３の入出力電極、１３は
励振孔８に導通する接続電極である。Next, the configuration of the multiplexer according to the seventh embodiment will be described with reference to FIG. Figure 10
FIG. 3 is an external perspective view of a multiplexer. In FIG. 10, reference numeral 701 is a first dielectric filter, 7
02 is a second dielectric filter, 703 is a third filter, 1a and 1b are dielectric blocks, 2a-
2c is an inner conductor forming hole, 3a to 3c are inner conductors, and 4a to 4c.
Is an inner conductor non-formation portion, 5 is an outer conductor, 6a is an input / output electrode of the dielectric filter 701, 6b is an input / output electrode of the dielectric filter 702, and 8 is an inner conductor having no inner conductor non-formation portion which is an excitation hole. Forming holes (hereinafter, simply referred to as "excitation holes"), 9
Reference numerals a and 9b denote input / output electrodes of the third filter 703, and reference numeral 13 denotes a connection electrode that is electrically connected to the excitation hole 8.
【００６３】誘電体ブロック１ａの内部に、内面に内導
体３ａ〜３ｃを備えたステップ構造の内導体形成孔２ａ
〜２ｃを形成しており、内導体形成孔２ａ〜２ｃの一方
の開口面（図における左手前面）付近には、それぞれ内
導体非形成部４ａ〜４ｃを設けて、この開口面を開放面
とし、これに対向する面（図における左手前面）を短絡
面とし、誘電体ブロック１ａの外面に、略全面に外導体
５を形成している。これにより、それぞれ共振器を構成
している。また、内面に内導体を設けたストレート構造
の励振孔８を、内導体形成孔２ａ〜２ｃに配列して設け
ている。Inside the dielectric block 1a, an inner conductor forming hole 2a having a step structure having inner conductors 3a to 3c on its inner surface is formed.
To 2c are formed, and inner conductor non-forming portions 4a to 4c are provided near one opening surface (left front surface in the drawing) of the inner conductor forming holes 2a to 2c, respectively, and the opening surfaces are made open surfaces. An outer conductor 5 is formed on substantially the entire outer surface of the dielectric block 1a, with the surface (the front surface on the left side in the figure) facing this as a short-circuit surface. This constitutes a resonator, respectively. In addition, the excitation holes 8 having a straight structure in which the inner conductor is provided on the inner surface are arranged in the inner conductor forming holes 2a to 2c.
【００６４】また、外導体５から離間して、実装面、励
振孔８の短絡面、および内導体形成孔２ａ〜２ｃと励振
孔８との励振孔８側の配列端となる側面にかけて接続電
極１３を形成している。この接続電極１３は励振孔８の
短絡面側の開口部に導通している。また、この接続電極
１３に対し、誘電体ブロック１ａの中心対称の位置付近
に、内導体形成孔２ｃからなる共振器に結合する、実装
面である下面から配列端となるもう一方の側面にかけて
入出力電極６ａを形成している。このような構造で、誘
電体フィルタ７０１を構成する。Further, the connection electrode is separated from the outer conductor 5 and extends from the mounting surface, the short-circuit surface of the excitation hole 8 and the side surface of the inner conductor forming holes 2a to 2c and the excitation hole 8 on the side of the excitation hole 8 side. 13 is formed. The connection electrode 13 is electrically connected to the opening on the short-circuit surface side of the excitation hole 8. Further, with respect to this connection electrode 13, the dielectric block 1a is inserted in the vicinity of the center symmetrical position from the lower surface which is the mounting surface and the other side surface which is the array end, which is coupled to the resonator formed of the inner conductor forming hole 2c. The output electrode 6a is formed. With such a structure, the dielectric filter 701 is configured.
【００６５】一方、誘電体フィルタ７０２は、誘電体フ
ィルタ７０１の短絡面を対称面とした鏡像の関係にあ
り、内導体形成孔、貫通孔、接続電極、共用電極、およ
び入出力電極の構造は、誘電体フィルタ７０１と略同じ
である。但し、誘電体フィルタ７０１と誘電体フィルタ
７０２とのそれぞれの通過帯域は、異なるように、内導
体形成孔の形状等は設計されている。On the other hand, the dielectric filter 702 has a mirror image relationship with the short-circuit surface of the dielectric filter 701 as a symmetrical surface, and the structures of the inner conductor forming hole, the through hole, the connecting electrode, the common electrode, and the input / output electrode are , And is substantially the same as the dielectric filter 701. However, the shapes and the like of the inner conductor forming holes are designed so that the pass bands of the dielectric filter 701 and the dielectric filter 702 are different.
【００６６】これらの誘電体フィルタ７０１，７０２は
互いに短絡面同士を接合しており、接続電極１３同士が
導通している。このようにして、二つの入出力電極と、
二つの接続電極１３からなる電極とを備える誘電体デュ
プレクサを構成している。These dielectric filters 701 and 702 have their short-circuited surfaces joined to each other, and the connection electrodes 13 are electrically connected to each other. In this way, two input / output electrodes,
A dielectric duplexer including an electrode composed of two connection electrodes 13 is configured.
【００６７】この誘電体フィルタ７０２の内導体形成孔
と励振孔の配列端となる面に第３のフィルタ７０３を接
合し、入出力電極９ａを共用電極７に導通させる。これ
により、マルチプレクサを構成する。A third filter 703 is joined to the surface of the dielectric filter 702 which is an array end of the inner conductor forming hole and the excitation hole, and the input / output electrode 9a is electrically connected to the common electrode 7. This constitutes a multiplexer.
【００６８】なお、前述の各実施形態に示した誘電体デ
ュプレクサおよび誘電体フィルタは、共振器の開放端を
内導体形成孔の内部に内導体非形成部を設けることによ
り構成されている。しかし、内導体形成孔の一方の開口
端を有する面に外導体を形成せずに、内導体形成孔の開
口端に結合用電極を設けて開放面とし、共振器の開放端
とする構造としてもよい。また、内導体形成孔の一方の
開口端を有する面に外導体を形成せずに、内導体形成孔
の開口端間で共振器間を結合する構造としてもよい。The dielectric duplexer and the dielectric filter shown in each of the above-described embodiments are constructed by providing the open end of the resonator with the inner conductor non-forming portion inside the inner conductor forming hole. However, as a structure in which the outer conductor is not formed on the surface having one opening end of the inner conductor forming hole, a coupling electrode is provided at the opening end of the inner conductor forming hole to form an open surface, and the resonator is the open end. Good. Further, the resonator may be coupled between the open ends of the inner conductor forming hole without forming the outer conductor on the surface having the one open end of the inner conductor forming hole.
【００６９】また、内導体形成孔はステップ構造に限ら
ず、開放面に結合用電極を設ける構造であればストレー
ト孔であってもよい。The inner conductor forming hole is not limited to the step structure, and may be a straight hole as long as the connecting electrode is provided on the open surface.
【００７０】次に、第８の実施形態に係る通信装置の構
成について、図１２を参照して説明する。図１２は通信
装置のブロック図である。図１２において、ＡＮＴは送
受信アンテナ、ＭＰＸはマルチプレクサ、ＢＰＦａ，Ｂ
ＰＦｂ，ＢＰＦｃはそれぞれ帯域通過フィルタ、ＡＭＰ
ａ，ＡＭＰｂ，ＡＭＰｃ，ＡＭＰｄはそれぞれ増幅回
路、ＭＩＸａ，ＭＩＸｂ，ＭＩＸｃ，ＭＩＸｄはそれぞ
れミキサ、ＯＳＣ１，ＯＳＣ２は発振器、ＤＩＶは分周
器（シンセサイザー）、ＰＬＬは位相同期回路、ＳＷは
スイッチ回路である。ＭＩＸａはＤＩＶから出力される
周波数信号をＩＦ信号で変調し、ＢＰＦａは送信周波数
帯域（例えば、Ｗ−ＣＤＭＡでは１．９５ＧＨｚ帯域）
のみを通過させ、ＡＭＰａはこれを電力増幅してＭＰＸ
（ＴＸ端子）を介しＡＮＴより送信する。ＡＭＰｂはＭ
ＰＸ（ＲＸ端子）から出力される信号を増幅し、ＢＰＦ
ｂはＡＭＰｂから出力される信号のうち受信周波数帯域
（例えば、Ｗ−ＣＤＭＡでは２．１４ＧＨｚ帯域）のみ
を通過させる。ＭＩＸｂは、ＢＰＦｃより出力される周
波数信号と受信信号とをミキシングして中間周波信号Ｉ
Ｆを出力する。この回路を用いることにより、例えば、
Ｗ−ＣＤＭＡの通信回路を構成する。Next, the configuration of the communication apparatus according to the eighth embodiment will be described with reference to FIG. FIG. 12 is a block diagram of the communication device. In FIG. 12, ANT is a transmission / reception antenna, MPX is a multiplexer, BPFa, B.
PFb and BPFc are a bandpass filter and an AMP, respectively.
a, AMPb, AMPc, and AMPd are amplifier circuits, MIXa, MIXb, MIXc, and MIXd are mixers, OSC1 and OSC2 are oscillators, DIV is a frequency divider (synthesizer), PLL is a phase synchronization circuit, and SW is a switch circuit. . MIXa modulates a frequency signal output from DIV with an IF signal, and BPFa transmits a transmission frequency band (for example, 1.95 GHz band in W-CDMA).
Only passes through, and AMPa power-amplifies this to MPX.
Send from ANT via (TX terminal). AMPb is M
The signal output from PX (RX terminal) is amplified and
b passes only the reception frequency band (for example, 2.14 GHz band in W-CDMA) of the signal output from AMPb. MIXb mixes the frequency signal output from BPFc and the received signal to generate an intermediate frequency signal I.
Output F. By using this circuit, for example,
A W-CDMA communication circuit is configured.
【００７１】一方、ＭＩＸｃは、ＩＦ信号を、ＰＬＬに
より同期がとられ、ＯＳＣ２から出力される同期周波数
信号によりミキシングする。この信号は、ＡＭＰｃによ
り電力増幅されて、ＳＷを介し、ＭＰＸ（ＢＴ端子）に
伝送される。ＭＰＸでは、Ｂｌｕｅｔｏｏｔｈ通信帯域
である２．４ＧＨｚ帯域の信号のみを通過し、ＡＮＴよ
り外部に送信する。ＡＭＰｄは、ＭＰＸ（ＢＴ端子）か
ら出力される信号を増幅し、ＭＩＸｄへ伝送する。ＭＩ
Ｘｄは、受信信号を、ＰＬＬにより同期され、ＯＳＣ２
から出力される同期周波数信号によりミキシングし、Ｉ
Ｆ信号を出力する。この回路を用いることにより、Ｂｌ
ｕｅｔｏｏｔｈ通信回路を構成する。このようにして、
Ｗ−ＣＤＭＡ等の通信回路とＢｌｕｅｔｏｏｔｈ通信回
路とを共に備える通信装置を構成することができる。On the other hand, the MIXc synchronizes the IF signal with the synchronization frequency signal output from the OSC2, which is synchronized by the PLL. This signal is power-amplified by AMPc and transmitted to MPX (BT terminal) via SW. In MPX, only signals in the 2.4 GHz band, which is the Bluetooth communication band, pass and is transmitted from the ANT to the outside. AMPd amplifies the signal output from MPX (BT terminal) and transmits it to MIXd. MI
Xd synchronizes the received signal by the PLL, and OSC2
Mixing by the sync frequency signal output from
Output F signal. By using this circuit, Bl
Configure a Bluetooth communication circuit. In this way
A communication device including both a communication circuit such as W-CDMA and a Bluetooth communication circuit can be configured.
【００７２】図１２に示したマルチプレクサＭＰＸに
は、図１、図５〜図１１のいずれかに示した構造の誘電
体マルチプレクサを用いることができる。このようにし
て二種類の異なる周波数帯域からなる伝送信号をそれぞ
れ選別して送受信することができ、優れた通信特性を有
する小型の通信装置を構成することができる。As the multiplexer MPX shown in FIG. 12, the dielectric multiplexer having the structure shown in FIG. 1 or any of FIGS. 5 to 11 can be used. In this way, transmission signals composed of two different frequency bands can be respectively selected and transmitted / received, and a small communication device having excellent communication characteristics can be configured.
【００７３】[0073]
【発明の効果】この発明によれば、第１のフィルタと第
２のフィルタとから構成された誘電体デュプレクサと、
該誘電体デュプレクサとは別に形成された第３のフィル
タとを備え、誘電体デュプレクサの共用電極と、第３の
フィルタの一方の入出力電極とが導通し、誘電体デュプ
レクサの実装面と、第３のフィルタの実装面とが同一平
面をなし、誘電体デュプレクサを構成する第１・第２の
フィルタのうち、一方のフィルタの内導体形成孔の一方
の開口面に接合するように、第３のフィルタとを配置さ
せることにより、小型で面実装可能なマルチプレクサを
構成することができる。According to the present invention, a dielectric duplexer composed of a first filter and a second filter,
A third filter formed separately from the dielectric duplexer, the common electrode of the dielectric duplexer and one input / output electrode of the third filter are electrically connected, and the mounting surface of the dielectric duplexer and the The third mounting surface of the third filter is flush with the third mounting surface of the inner conductor forming hole of one of the first and second filters constituting the dielectric duplexer. By arranging the filter of (1) and (2), a compact and surface-mountable multiplexer can be configured.
【００７４】また、一つのブロック形状に一体化される
ことにより、不必要な配線を要せず、伝送特性に優れ、
高信頼性を有するマルチプレクサを構成することができ
る。Further, by being integrated into one block shape, unnecessary wiring is not required and the transmission characteristics are excellent,
It is possible to configure a multiplexer having high reliability.
【００７５】また、誘電体デュプレクサの短絡面、開放
面、および側面に、第３のフィルタを接合することによ
り構成することもできるため、既存の誘電体フィルタお
よび誘電体デュプレクサに新たに設計したフィルタ接合
してマルチプレクサを構成することができ、既存設備を
用いて容易にマルチプレクサを形成することができる。Further, since the third filter can be joined to the short-circuit surface, the open surface, and the side surface of the dielectric duplexer, the filter newly designed for the existing dielectric filter and dielectric duplexer can be used. The multiplexer can be bonded to form a multiplexer, and the multiplexer can be easily formed using existing equipment.
【００７６】また、この発明によれば、誘電体ブロック
に、入力電極と共用電極とを備えた第１のフィルタと、
出力電極と共用電極とを備えた第２のフィルタとを構成
する誘電体デュプレクサと、誘電体デュプレクサとは、
別に形成した、二つの入出力電極を有する第３のフィル
タとを備え、誘電体ブロックの外面における内導体形成
孔の配列方向の端となる面に、第３のフィルタを、誘電
体デュプレクサの実装面と、第３のフィルタの実装面と
が同一平面をなすように接合し、共用電極と第３のフィ
ルタの一方の入出力電極とを導通する伝送線路を、前記
内導体形成孔の一方の開口面から、第３のフィルタの或
一面にかけて設けることにより、内導体形成孔を用いて
共振器を構成した構造の誘電体デュプレクサと誘電体フ
ィルタとで、マルチプレクサを構成することができる。Further, according to the present invention, the dielectric block includes a first filter having an input electrode and a common electrode,
The dielectric duplexer and the dielectric duplexer that form the second filter including the output electrode and the common electrode are
A third filter having two input / output electrodes, which is separately formed, and the third filter is mounted on the surface of the outer surface of the dielectric block that is the end in the arrangement direction of the inner conductor forming holes. The surface and the mounting surface of the third filter are joined so as to be flush with each other, and a transmission line that connects the common electrode and one input / output electrode of the third filter is connected to one of the inner conductor forming holes. By arranging from the opening surface to one surface of the third filter, the multiplexer can be composed of the dielectric duplexer and the dielectric filter having the structure in which the resonator is formed by using the inner conductor forming hole.
【００７７】また、この発明によれば、誘電体ブロック
に、第１・第２・第３の入出力電極と共用電極とを備
え、これら第１・第２・第３の入出力電極をそれぞれ信
号の入出力部とする第１・第２・第３のフィルタを構成
し、第１の入出力電極、第３の入出力電極、共用電極、
第２の入出力電極の順に、誘電体ブロックの外面に配置
し、第１のフィルタと第３のフィルタとをそれぞれ構成
する複数の内導体形成孔を、誘電体ブロックの垂直な高
さ方向に二段に積み重なるように配置し、誘電体ブロッ
ク内に、この二段に積み重なったフィルタを構成する内
導体形成孔の内導体同士の結合を防止する内部電極を設
けることにより、略直方体形状で小型のマルチプレクサ
を構成することができる。Further, according to the present invention, the dielectric block is provided with the first, second and third input / output electrodes and the common electrode, and these first, second and third input / output electrodes are respectively provided. The first, second, and third filters, which serve as signal input / output units, are configured, and the first input / output electrode, the third input / output electrode, the common electrode,
A plurality of inner conductor forming holes, which are arranged on the outer surface of the dielectric block in the order of the second input / output electrodes and respectively form the first filter and the third filter, are formed in the vertical height direction of the dielectric block. By arranging them so that they are stacked in two stages, and by providing internal electrodes inside the dielectric block that prevent the inner conductors of the inner conductor forming holes that compose the two-tiered filter from being combined with each other, the size of the rectangular parallelepiped is reduced. Can be configured.
【００７８】また、この発明によれば、内面に内導体を
形成した複数の内導体形成孔と、該内導体形成孔に平行
に設けられた、内面に内面電極を形成した励振孔とを、
誘電体ブロックの内部に備え、励振孔に導通する接続電
極を、励振孔の一方の開口面と実装面と当該二面に垂直
な誘電体ブロックの外面とにかけて備え、複数の内導体
形成孔のうち、所定の内導体形成孔に形成された内導体
に結合する入出力電極と、外導体とを、誘電体ブロック
の外面に備えた第１のフィルタと、この第１のフィルタ
における、内導体形成孔および励振孔の一方の開口面で
あって、接続電極が形成された開口面を対称面として、
第１のフィルタと面対称の構成となる第２のフィルタ
と、第１・第２のフィルタとは別に形成され、二つの入
出力電極を有する第３のフィルタとから構成され、第１
のフィルタと第２のフィルタとを、接続電極が重なり合
うように、開口面同士を接合して一体化し、第３のフィ
ルタのいずれか一方の入出力電極と、接続電極とを導通
させることにより、誘電体デュプレクサを用いることな
く、複数の誘電体フィルタを用いて、マルチプレクサを
構成することができる。Further, according to the present invention, a plurality of inner conductor forming holes each having an inner conductor formed on the inner surface thereof, and an excitation hole having an inner surface electrode formed on the inner surface thereof are provided in parallel with the inner conductor forming holes.
A connection electrode provided inside the dielectric block and electrically connected to the excitation hole is provided over one opening surface of the excitation hole, the mounting surface, and the outer surface of the dielectric block perpendicular to the two surfaces, and a plurality of inner conductor formation holes are formed. Of these, a first filter provided with an input / output electrode coupled to an inner conductor formed in a predetermined inner conductor forming hole and an outer conductor on an outer surface of a dielectric block, and an inner conductor in the first filter One opening surface of the formation hole and the excitation hole, where the opening surface on which the connection electrode is formed is a symmetry plane,
The first filter includes a second filter which is plane-symmetrical to the first filter, and a third filter which is formed separately from the first and second filters and has two input / output electrodes.
The filter and the second filter are integrated by joining the opening surfaces so that the connection electrodes overlap each other, and by connecting one of the input / output electrodes of the third filter to the connection electrode, A multiplexer can be configured using a plurality of dielectric filters without using a dielectric duplexer.
【００７９】また、前記マルチプレクサを備えることに
より、通信特性に優れた通信装置を構成することができ
る。By including the multiplexer, a communication device having excellent communication characteristics can be constructed.
【図１】第１の実施形態に係るマルチプレクサの外観斜
視図およびブロック図FIG. 1 is an external perspective view and block diagram of a multiplexer according to a first embodiment.
【図２】第１の実施形態に係るマルチプレクサの三面図FIG. 2 is a trihedral view of the multiplexer according to the first embodiment.
【図３】第１の実施形態に係る誘電体デュプレクサの構
造を示す図FIG. 3 is a diagram showing a structure of a dielectric duplexer according to the first embodiment.
【図４】第１の実施形態に係るフィルタの三面図FIG. 4 is a trihedral view of the filter according to the first embodiment.
【図５】第２の実施形態に係るマルチプレクサの外観斜
視図FIG. 5 is an external perspective view of a multiplexer according to a second embodiment.
【図６】第３の実施形態に係るマルチプレクサの外観斜
視図FIG. 6 is an external perspective view of a multiplexer according to a third embodiment.
【図７】第４の実施形態に係るマルチプレクサの外観斜
視図FIG. 7 is an external perspective view of a multiplexer according to a fourth embodiment.
【図８】第５の実施形態に係るマルチプレクサの外観斜
視図FIG. 8 is an external perspective view of a multiplexer according to a fifth embodiment.
【図９】第６の実施形態に係るマルチプレクサの外観斜
視図および正面図FIG. 9 is an external perspective view and a front view of a multiplexer according to a sixth embodiment.
【図１０】第７の実施形態に係るマルチプレクサの外観
斜視図FIG. 10 is an external perspective view of a multiplexer according to a seventh embodiment.
【図１１】第１の実施形態に係るマルチプレクサの外観
斜視図FIG. 11 is an external perspective view of the multiplexer according to the first embodiment.
【図１２】第８の実施形態に係る通信装置のブロック図FIG. 12 is a block diagram of a communication device according to an eighth embodiment.
【図１３】従来のマルチプレクサの外観斜視図FIG. 13 is an external perspective view of a conventional multiplexer.
１，１ａ，１ｂ−誘電体ブロック
２ａ〜２ｆ−内導体形成孔
３ａ〜３ｆ−内導体
４ａ〜４ｆ−内導体非形成部
５−外導体
６ａ，６ｂ，６ｃ−第１・第２の誘電体フィルタを備え
る誘電体デュプレクサの入出力電極
７−共用電極
８−励振孔
９ａ，９ｂ−第３のフィルタの入出力電極
１０−カバー
１１−伝送線路
１２−内部電極
１３−接続電極
２１−ベース基板
２２ａ，２２ｂ，２３，２４ａ，２４ｂ−誘電体デュプ
レクサ８０１、フィルタ８０２の実装用ランド
２５ａ〜２５ｃ−ベース基板２１に設けられた入出力端
子
２６−ベース基板２１に設けられた共用端子
２７−実装用ランド２４ａ，２３および共用電極２６を
導通する伝送線路
１０１，２０１，３０１，４０１，５０１，８０１−誘
電体デュプレクサ
１０２，２０２，３０２，４０２，５０２，７０３，８
０２−フィルタ
６０１−マルチプレクサ
７０１，７０２−誘電体フィルタ1, 1a, 1b-dielectric blocks 2a-2f-inner conductor forming holes 3a-3f-inner conductors 4a-4f-inner conductor non-forming portion 5-outer conductors 6a, 6b, 6c-first and second dielectrics Input / output electrode 7 of the dielectric duplexer provided with a filter-shared electrode 8-excitation holes 9a, 9b-input / output electrode 10 of the third filter-cover 11-transmission line 12-internal electrode 13-connection electrode 21-base substrate 22a , 22b, 23, 24a, 24b-Lands 25a to 25c for mounting the dielectric duplexer 801 and the filter 802-Input / output terminals 26 provided on the base board 21-Common terminals 27 provided on the base board 21-Mounting lands 24a, 23 and transmission lines 101, 201, 301, 401, 501, 801 that conduct the common electrode 26-dielectric duplexers 102, 202, 302, 402 502,703,8
02-filter 601-multiplexer 701,702-dielectric filter
───────────────────────────────────────────────────── フロントページの続き Ｆターム(参考） 5J006 HA04 HA12 HA15 HA27 JA01 KA06 KA11 LA21 NA04 NC03 PB03 ─────────────────────────────────────────────────── ─── Continued front page F-term (reference) 5J006 HA04 HA12 HA15 HA27 JA01 KA06 KA11 LA21 NA04 NC03 PB03
Claims (10)
成孔を、外面が互いに直交する３つの面のそれぞれに略
平行な面で構成される誘電体ブロックに備え、前記複数
の内導体のうち所定の内導体にそれぞれ結合する、入力
電極と、出力電極と、共用電極とを、外導体と共に、前
記外面に備えることにより、前記入力電極を信号の入力
部、前記共用電極を信号の出力部とする第１のフィルタ
と、前記出力電極を信号の出力部、前記共用電極を信号
の入力部とする第２のフィルタとを構成した誘電体デュ
プレクサと、 該誘電体デュプレクサとは別に形成された、二つの入出
力電極を有する第３のフィルタとを備え、 前記共用電極と前記第３のフィルタの一方の前記入出力
電極とが導通し、前記誘電体デュプレクサの実装面と、
前記第３のフィルタの実装面とが同一平面をなし、前記
第１・第２のフィルタのうち、一方のフィルタの前記内
導体形成孔の一方の開口面に接合するように、前記第３
のフィルタとを配置してなるマルチプレクサ。1. A plurality of inner conductor forming holes, each having an inner conductor formed on an inner surface thereof, are provided in a dielectric block composed of surfaces whose outer surfaces are substantially parallel to each of three surfaces orthogonal to each other, and the plurality of inner conductors are provided. By providing an input electrode, an output electrode, and a common electrode, which are respectively coupled to predetermined inner conductors, on the outer surface together with the outer conductor, the input electrode is a signal input unit, and the common electrode is a signal electrode. A dielectric duplexer comprising a first filter as an output part, a second filter having the output electrode as a signal output part and the shared electrode as a signal input part, and the dielectric duplexer is formed separately. And a third filter having two input / output electrodes, wherein the shared electrode and one of the input / output electrodes of the third filter are electrically connected, and a mounting surface of the dielectric duplexer,
The mounting surface of the third filter is flush with the mounting surface of the third filter, and the third filter is formed so as to be joined to one opening surface of the inner conductor forming hole of one of the first and second filters.
Multiplexer with the filter of.
る共振器の短絡面である請求項１に記載のマルチプレク
サ。2. The multiplexer according to claim 1, wherein the opening surface is a short-circuit surface of a resonator formed by the inner conductor forming hole.
る共振器の開放面である請求項１に記載のマルチプレク
サ。3. The multiplexer according to claim 1, wherein the opening surface is an opening surface of a resonator formed by the inner conductor forming hole.
ィルタの開放面とが、前記誘電体ブロックの同一面に形
成されている請求項１〜３のいずれかに記載のマルチプ
レクサ。4. The multiplexer according to claim 1, wherein the short-circuit surface of the first filter and the open surface of the second filter are formed on the same surface of the dielectric block.
成孔を、略直方体形状の誘電体ブロックに備え、前記複
数の内導体のうち所定の内導体にそれぞれ結合する、入
力電極と、出力電極と、共用電極とを、外導体と共に、
前記誘電体ブロックの外面に備えることにより、前記入
力電極を信号の入力部、前記共用電極を信号の出力部と
する第１のフィルタと、前記出力電極を信号の出力部、
前記共用電極を信号の入力部とする第２のフィルタとを
構成した誘電体デュプレクサと、 該誘電体デュプレクサとは、別に形成された、二つの入
出力電極を有する第３のフィルタとを備え、 前記誘電体ブロックの外面のうち、前記内導体形成孔の
配列方向の端となる面に、前記第３のフィルタを、該第
３のフィルタの実装面と前記誘電体デュプレクサの実装
面とが同一平面をなすように接合し、 前記共用電極と前記第３のフィルタの一方の入出力電極
とを導通させる伝送線路を、前記内導体形成孔の一方の
開口面から前記第３のフィルタの或一面にかけて設けて
なるマルチプレクサ。5. An input electrode, comprising: a plurality of inner conductor forming holes having inner conductors formed on an inner surface thereof, which are provided in a substantially rectangular parallelepiped dielectric block, and which are respectively coupled to predetermined inner conductors of the plurality of inner conductors; The output electrode and the common electrode together with the outer conductor,
A first filter having the input electrode as a signal input portion and the shared electrode as a signal output portion by being provided on the outer surface of the dielectric block; and the output electrode as a signal output portion,
A dielectric duplexer that forms a second filter using the shared electrode as a signal input section; and a third filter having two input / output electrodes, which is formed separately from the dielectric duplexer, Of the outer surface of the dielectric block, the third filter is mounted on the end surface in the arrangement direction of the inner conductor forming holes, and the mounting surface of the third filter and the mounting surface of the dielectric duplexer are the same. A transmission line, which is joined so as to form a plane and electrically connects the common electrode and one input / output electrode of the third filter, is formed from one opening surface of the inner conductor forming hole to one surface of the third filter. A multiplexer that is installed over.
成孔を、略直方体形状の誘電体ブロックに備え、前記複
数の内導体のうち所定の内導体にそれぞれ結合する第１
・第２・第３の３つの入出力電極と１つの共用電極と
を、外導体と共に、前記誘電体ブロックの外面に備え
て、前記第１・第２・第３の入出力電極と前記共用電極
とをそれぞれ信号の入出力部とする、第１・第２・第３
のフィルタを構成したマルチプレクサであって、 第１の入出力電極、第３の入出力電極、共用電極、第２
の入出力電極の順に、これらの電極を前記誘電体ブロッ
クに配置し、 前記第１のフィルタを構成する前記内導体形成孔と、前
記第３のフィルタを構成する前記内導体形成孔とを、前
記誘電体ブロックの実装面に垂直な高さ方向に二段に積
み重なるように配置するとともに、その二段の積み重な
った内導体形成孔の間に、当該二段の積み重なった内導
体形成孔の内導体同士の結合を防止する内部電極を設け
てなるマルチプレクサ。6. A first rectangular parallelepiped-shaped dielectric block having a plurality of inner conductor forming holes each having an inner conductor formed on an inner surface thereof, each of which is coupled to a predetermined inner conductor of the plurality of inner conductors.
Providing the second and third three input / output electrodes and one common electrode together with the outer conductor on the outer surface of the dielectric block so as to be shared with the first, second and third input / output electrodes. First, second, and third electrodes, respectively, which serve as signal input / output units
Of the first filter, the first input / output electrode, the third input / output electrode, the shared electrode, and the second filter.
These input and output electrodes are arranged in this order in the dielectric block, and the inner conductor forming hole forming the first filter and the inner conductor forming hole forming the third filter are The dielectric blocks are arranged so as to be stacked in two stages in the height direction perpendicular to the mounting surface, and the inner conductor forming holes in the two stacked stages are arranged between the two stacked inner conductor forming holes. A multiplexer provided with an internal electrode for preventing coupling between conductors.
成孔と、該内導体形成孔に平行に設けられた、内面に内
面電極を形成した励振孔とを、略直方体形状の誘電体ブ
ロックに備え、 前記励振孔の内面電極に導通する接続電極を、前記励振
孔の一方の開口面と、実装面と、当該２面に垂直な前記
誘電体ブロックの外面とにかけて備え、前記複数の内導
体形成孔のうち、所定の内導体形成孔に形成された内導
体に結合する入出力電極と、外導体とを、前記誘電体ブ
ロックの外面に備えた第１のフィルタと、 前記第１のフィルタにおける、前記内導体形成孔および
励振孔の一方の開口面であって、前記接続電極が形成さ
れた開口面を、対称面として、前記第１のフィルタと面
対称の関係に構成した第２のフィルタと、 前記第１・第２のフィルタとは別に形成された、二つの
入出力電極を有する第３のフィルタとを備え、 前記第１のフィルタと前記第２のフィルタとを、前記接
続電極が重なり合うように、前記開口面同士を接合して
一体化し、 前記第３のフィルタのいずれか一方の入出力電極が前記
接続電極に導通するように、該第３のフィルタを前記第
１または第２のフィルタに接合してなるマルチプレク
サ。7. A dielectric having a substantially rectangular parallelepiped shape, wherein a plurality of inner conductor forming holes having inner conductors formed on the inner surfaces thereof and excitation holes having inner electrodes formed on the inner surfaces thereof and provided in parallel with the inner conductor forming holes are provided. The block is provided with a connection electrode that is electrically connected to an inner surface electrode of the excitation hole, the connection electrode being provided between one opening surface of the excitation hole, a mounting surface, and an outer surface of the dielectric block perpendicular to the two surfaces. A first filter having an outer conductor and an input / output electrode that is coupled to an inner conductor formed in a predetermined inner conductor forming hole among the inner conductor forming holes; and a first filter, In the filter of (1), one of the opening surfaces of the inner conductor forming hole and the excitation hole, in which the connection electrode is formed, is used as a plane of symmetry, and the opening surface is formed in a plane-symmetrical relationship with the first filter. A second filter, and the first and second filters A third filter having two input / output electrodes, which are separately formed, and the opening surfaces are joined to each other so that the connection electrode overlaps the first filter and the second filter. A multiplexer formed by joining the third filter to the first or second filter so that one of the input / output electrodes of the third filter is electrically connected to the connection electrode.
ともに、該凹部に前記第３のフィルタを嵌め合わせた状
態で、全体が略直方体形状をなすようにした請求項１〜
４のいずれかに記載のマルチプレクサ。8. The whole of the dielectric block is formed into a substantially rectangular parallelepiped shape while forming a recess in the dielectric block and fitting the third filter into the recess.
4. The multiplexer according to any one of 4 above.
記複数の共振器の開放端が、前記複数の内導体形成孔の
内面における前記開放面付近に内導体非形成部を設けた
ものである請求項１〜８のいずれかに記載のマルチプレ
クサ。9. The inner conductor non-formation portion is provided in the inner surface of the plurality of inner conductor formation holes near the open surface at the open ends of the plurality of resonators constituting the first and second filters. The multiplexer according to any one of claims 1 to 8.
チプレクサを備えた通信装置。10. A communication device comprising the multiplexer according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002001789A JP3765405B2 (en) | 2002-01-08 | 2002-01-08 | Multiplexer and communication device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002001789A JP3765405B2 (en) | 2002-01-08 | 2002-01-08 | Multiplexer and communication device |
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| Publication Number | Publication Date |
|---|---|
| JP2003204204A true JP2003204204A (en) | 2003-07-18 |
| JP3765405B2 JP3765405B2 (en) | 2006-04-12 |
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ID=27641830
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002001789A Expired - Fee Related JP3765405B2 (en) | 2002-01-08 | 2002-01-08 | Multiplexer and communication device |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006067603A (en) * | 2004-08-28 | 2006-03-09 | Samsung Electronics Co Ltd | Optical subscriber network according to wavelength division multiplexing method, and passive-type optical subscriber network using network |
| WO2011086717A1 (en) * | 2010-01-13 | 2011-07-21 | 株式会社村田製作所 | Multiplexer |
| CN109066026A (en) * | 2018-07-05 | 2018-12-21 | 南京信息工程大学 | A kind of Ka band dual channel duplexer suitable for multi-antenna array |
-
2002
- 2002-01-08 JP JP2002001789A patent/JP3765405B2/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006067603A (en) * | 2004-08-28 | 2006-03-09 | Samsung Electronics Co Ltd | Optical subscriber network according to wavelength division multiplexing method, and passive-type optical subscriber network using network |
| WO2011086717A1 (en) * | 2010-01-13 | 2011-07-21 | 株式会社村田製作所 | Multiplexer |
| CN109066026A (en) * | 2018-07-05 | 2018-12-21 | 南京信息工程大学 | A kind of Ka band dual channel duplexer suitable for multi-antenna array |
| CN109066026B (en) * | 2018-07-05 | 2023-08-15 | 南京信息工程大学 | Ka-band double-channel duplexer applicable to multi-antenna array |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3765405B2 (en) | 2006-04-12 |
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