JP2003186938A - スコアボードを用いた検証方法 - Google Patents

スコアボードを用いた検証方法

Info

Publication number
JP2003186938A
JP2003186938A JP2001386132A JP2001386132A JP2003186938A JP 2003186938 A JP2003186938 A JP 2003186938A JP 2001386132 A JP2001386132 A JP 2001386132A JP 2001386132 A JP2001386132 A JP 2001386132A JP 2003186938 A JP2003186938 A JP 2003186938A
Authority
JP
Japan
Prior art keywords
scoreboard
data
read
address
storage element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001386132A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003186938A5 (enExample
Inventor
Daisuke Kuroki
大輔 黒木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2001386132A priority Critical patent/JP2003186938A/ja
Priority to US10/309,091 priority patent/US7028146B2/en
Publication of JP2003186938A publication Critical patent/JP2003186938A/ja
Publication of JP2003186938A5 publication Critical patent/JP2003186938A5/ja
Priority to US11/331,145 priority patent/US7210007B2/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
JP2001386132A 2001-12-19 2001-12-19 スコアボードを用いた検証方法 Pending JP2003186938A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2001386132A JP2003186938A (ja) 2001-12-19 2001-12-19 スコアボードを用いた検証方法
US10/309,091 US7028146B2 (en) 2001-12-19 2002-12-04 Method of verifying a system in which a plurality of master devices share a storage region
US11/331,145 US7210007B2 (en) 2001-12-19 2006-01-13 Method of verifying a system in which a plurality of master devices share a storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001386132A JP2003186938A (ja) 2001-12-19 2001-12-19 スコアボードを用いた検証方法

Publications (2)

Publication Number Publication Date
JP2003186938A true JP2003186938A (ja) 2003-07-04
JP2003186938A5 JP2003186938A5 (enExample) 2005-07-28

Family

ID=19187906

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001386132A Pending JP2003186938A (ja) 2001-12-19 2001-12-19 スコアボードを用いた検証方法

Country Status (2)

Country Link
US (2) US7028146B2 (enExample)
JP (1) JP2003186938A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006227668A (ja) * 2005-02-15 2006-08-31 Ricoh Co Ltd メモリモデルとプログラムと論理回路検証方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8077905B2 (en) * 2006-01-23 2011-12-13 Digimarc Corporation Capturing physical feature data

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2875909B2 (ja) * 1991-07-12 1999-03-31 三菱電機株式会社 並列演算処理装置
JPH10143365A (ja) * 1996-11-15 1998-05-29 Toshiba Corp 並列処理装置及びその命令発行方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006227668A (ja) * 2005-02-15 2006-08-31 Ricoh Co Ltd メモリモデルとプログラムと論理回路検証方法

Also Published As

Publication number Publication date
US20030115425A1 (en) 2003-06-19
US20060117151A1 (en) 2006-06-01
US7210007B2 (en) 2007-04-24
US7028146B2 (en) 2006-04-11

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