JP2003179013A - Polishing platen of chemical-mechanical polishing apparatus, and planarizing method using the same - Google Patents
Polishing platen of chemical-mechanical polishing apparatus, and planarizing method using the sameInfo
- Publication number
- JP2003179013A JP2003179013A JP2002295765A JP2002295765A JP2003179013A JP 2003179013 A JP2003179013 A JP 2003179013A JP 2002295765 A JP2002295765 A JP 2002295765A JP 2002295765 A JP2002295765 A JP 2002295765A JP 2003179013 A JP2003179013 A JP 2003179013A
- Authority
- JP
- Japan
- Prior art keywords
- metal plate
- polishing platen
- semiconductor wafer
- wafer
- cmp apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005498 polishing Methods 0.000 title claims abstract description 70
- 238000000034 method Methods 0.000 title claims abstract description 47
- 229910052751 metal Inorganic materials 0.000 claims description 85
- 239000002184 metal Substances 0.000 claims description 85
- 239000004065 semiconductor Substances 0.000 claims description 50
- 239000002002 slurry Substances 0.000 claims description 12
- 238000004140 cleaning Methods 0.000 claims description 7
- 238000001816 cooling Methods 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 6
- 239000012528 membrane Substances 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 239000007788 liquid Substances 0.000 claims description 5
- 229910001220 stainless steel Inorganic materials 0.000 claims description 5
- 239000010935 stainless steel Substances 0.000 claims description 5
- 229910001018 Cast iron Inorganic materials 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 239000000463 material Substances 0.000 abstract 1
- 239000007769 metal material Substances 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 5
- 239000010410 layer Substances 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 239000002245 particle Substances 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- 239000005380 borophosphosilicate glass Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 239000003929 acidic solution Substances 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 239000003637 basic solution Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 239000008367 deionised water Substances 0.000 description 1
- 229910021641 deionized water Inorganic materials 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/11—Lapping tools
- B24B37/12—Lapping plates for working plane surfaces
- B24B37/16—Lapping plates for working plane surfaces characterised by the shape of the lapping plate surface, e.g. grooved
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B49/00—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation
- B24B49/14—Measuring or gauging equipment for controlling the feed movement of the grinding tool or work; Arrangements of indicating or measuring equipment, e.g. for indicating the start of the grinding operation taking regard of the temperature during grinding
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は半導体装置製造用の
化学機械的研磨（ＣＭＰ）装置に関し、特に研磨プラテ
ンの熱膨張係数を用いてウエハの均一性を向上させるこ
とができるＣＭＰ装置の研磨プラテン及びこれを用いた
平坦化方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chemical mechanical polishing (CMP) apparatus for manufacturing a semiconductor device, and more particularly to a polishing platen for a CMP apparatus capable of improving wafer uniformity by using a thermal expansion coefficient of the polishing platen. And a planarization method using the same.
【０００２】[0002]
【従来の技術】一般的にウエハはフォトリソグラフィ、
イオン拡散、エッチング、ＣＶＤ及び金属堆積などの工
程を繰り返して行って半導体装置のチップとされる。上
記工程を経たウエハ上には金属配線が微細なパターンで
形成されている。半導体装置が次第に高集積化、高機能
化されることに伴い、ウエハ上には金属配線と絶縁膜及
び層間配線などが多数の層を成している多層配線構造が
形成されるようになった。このような多層配線構造の形
成に従ってウエハの工程面を平坦化する技術が必要とな
った。これは、微細なパターンの凹凸部が存在するウエ
ハ上に続けて他の微細なパターン層を形成する場合、凹
凸部が存在するウエハとパターンを形成するためにウエ
ハ上に置くマスクとの間の間隔が不均一となり、投影レ
ンズのフォーカスがウエハ表面に正確に一致しなくな
り、要求される微細なパターンを精密に形成できないか
らである。2. Description of the Related Art Generally, a wafer is photolithographically
A semiconductor device chip is obtained by repeating steps such as ion diffusion, etching, CVD, and metal deposition. Metal wiring is formed in a fine pattern on the wafer that has undergone the above steps. As semiconductor devices have become highly integrated and highly functionalized, a multi-layer wiring structure has been formed on a wafer, in which metal wiring, an insulating film, interlayer wiring, and the like form many layers. . With the formation of such a multilayer wiring structure, a technique for flattening the process surface of the wafer has been required. This is because when another fine pattern layer is continuously formed on a wafer on which uneven portions of a fine pattern are present, a gap between the wafer on which uneven portions are present and a mask placed on the wafer to form the pattern is formed. This is because the intervals become non-uniform, the focus of the projection lens does not exactly match the wafer surface, and the required fine pattern cannot be precisely formed.
【０００３】ウエハ上に存在する微細なパターンの凹凸
部を平坦化することにより、微細なパターンの精密度を
向上させることができる。そのため、従来から一般的に
ウエハの工程面を研磨して工程面を平坦化させている。
平坦化の方法としては硼素と燐がドープされたＢＰＳＧ
リフロー方法、ＳＯＧエッチバック方法、ＣＭＰ方法な
どがある。By flattening the uneven portion of the fine pattern existing on the wafer, the precision of the fine pattern can be improved. Therefore, conventionally, the process surface of the wafer is generally polished to flatten the process surface.
As a planarization method, BPSG doped with boron and phosphorus
There are a reflow method, an SOG etch back method, a CMP method and the like.
【０００４】ここで、ＢＰＳＧリフロー方法は、半導体
基板の表面にＢＰＳＧ膜を積層した後熱処理を行って平
坦化する方法であり、ＳＯＧエッチバック方法は、回路
パターン層が形成された絶縁層上にＳＯＧ膜を更に塗布
した後、エッチバックして平坦度を改善する方法であ
る。また、ＣＭＰ方法は段差が形成されたウエハをパッ
ド上に密着させた後、スラリを用いてウエハを研磨する
ことで平坦化する方法であって、低い温度で全体的な平
坦化が行えるという長所を有しており、最近の２５６メ
ガ及び１ギガメモリ素子の平坦化方法として注目を浴び
ている。即ち、ＣＭＰ工程でウエハはパッドとスラリに
よって研磨され、パッドが取り付けられた研磨プラテン
は単純な回転運動を行い、ヘッド部は回転運動と揺動運
動とを同時に行って一定の圧力で付勢される。Here, the BPSG reflow method is a method in which a BPSG film is laminated on the surface of a semiconductor substrate and then heat-treated to be planarized, and the SOG etchback method is performed on an insulating layer on which a circuit pattern layer is formed. This is a method of improving flatness by further applying an SOG film and then etching back. In addition, the CMP method is a method of flattening a wafer having a step formed thereon by closely adhering it to a pad and then polishing the wafer with a slurry, which has an advantage that the entire flattening can be performed at a low temperature. And has recently attracted attention as a flattening method for 256-mega and 1-giga memory devices. That is, in the CMP process, the wafer is polished by the pad and the slurry, the polishing platen to which the pad is attached makes a simple rotary motion, and the head part simultaneously performs the rotary motion and the swing motion and is biased by a constant pressure. It
【０００５】ウエハは表面張力又は真空によってヘッド
部に装着される。ヘッド部の自体荷重と印加される加圧
力によってウエハの表面とパッドが接触し、この接触面
の間の微細な隙間（パッドの気孔部分）の間に加工液の
スラリが流動し、スラリの内の研磨粒子とパッドの表面
突起によって機械的な除去作用が行われる。スラリ内の
化学成分によっては化学的な除去作用も行われる。The wafer is mounted on the head portion by surface tension or vacuum. The surface of the wafer and the pad come into contact with each other due to the self-load of the head and the applied pressure, and the slurry of the working fluid flows between the contact surfaces in the minute gaps (pores of the pad). The abrasive particles and the surface protrusions of the pad provide a mechanical removal action. Depending on the chemical components in the slurry, it also has a chemical removal action.
【０００６】ＣＭＰ工程でパッドとウエハ間の加圧力に
よってデバイスの突出部へ上から接触が行われ、この部
分に圧力が集中される。したがって、突出部を有する箇
所では相対的に表面除去速度が速い。加工の進行に伴っ
てかかる凹凸部の数が減り、全面積に亘って均一な研磨
作業が行われ除去される。ＣＭＰ工程における研磨対象
としては酸化膜(ＳｉＯ２）、ポリシリコン、金属など
多種類があり、研磨剤としては化学的なエッチング成分
の塩基性又は酸性溶液とエッチング成分のアルミナ又は
シリカを混合した物質を使用する。In the CMP process, the pressing force between the pad and the wafer makes contact with the protruding portion of the device from above, and the pressure is concentrated on this portion. Therefore, the surface removal rate is relatively high at the portion having the protrusion. As the processing progresses, the number of such uneven portions is reduced, and uniform polishing work is performed over the entire area and removed. There are many kinds such as oxide film (SiO 2 ), polysilicon, metal, etc. to be polished in the CMP process, and as the polishing agent, a substance obtained by mixing a basic or acidic solution of a chemical etching component and alumina or silica of an etching component. To use.
【０００７】基本的に、酸化膜系列と金属膜系列とは同
じシーケンス及び同じ装備でＣＭＰ工程が行われるが、
その使用されるスラリはそれぞれ異なっている。すなわ
ち、酸化膜ＣＭＰ工程における研磨剤としてはＫＯＨの
ようなアルカリ性溶液にコロイダルシリカ（colloidal
silica）などを分散させたスラリを使用し、金属ＣＭＰ
工程における研磨剤としてはＫｌＯ３、ＡｌＯ３などの
スラリを使用する。[0007] Basically, the oxide film series and the metal film series perform the CMP process with the same sequence and the same equipment.
The slurries used are different. That is, as an abrasive in the oxide film CMP process, an alkaline solution such as KOH is used to colloidal silica.
CMP using a slurry in which silica) is dispersed.
As a polishing agent in step using a slurry such as KlO 3, AlO 3.
【０００８】通常、ＣＭＰ工程を行った後、ＣＭＰ工程
時に発生したパーティクル及びスラリによる残留物をＤ
ＤＳ（Double Sidebrush Scrubber)で除去するが、この
際、酸化膜に対してはＤＤＳでパーティクルと残留物を
除去できが、金属膜は十分には除去されない。そのた
め、半導体基板上に残存するスラリ及び金属汚染物、パ
ーティクルなどを除去できる後洗浄が必要であった。洗
浄液としては脱イオン水、ＮＨ４ＯＨ：Ｈ２Ｏ２：Ｈ２
Ｏの組成物（以下、ＳＣ−１）、ＨＦ溶液などを使用し
ていた。Usually, after the CMP process is performed, the residue generated by particles and slurry generated during the CMP process is removed by D
It is removed by DS (Double Sidebrush Scrubber). At this time, particles and residues can be removed from the oxide film by DDS, but the metal film is not sufficiently removed. Therefore, post-cleaning that can remove the slurry, metal contaminants, particles, and the like remaining on the semiconductor substrate has been required. As the cleaning liquid, deionized water, NH 4 OH: H 2 O 2 : H 2
A composition of O (hereinafter, SC-1), an HF solution and the like were used.
【０００９】以下、添付の図面に沿って従来の半導体装
置製造用ＣＭＰ装置を説明する。A conventional CMP apparatus for manufacturing a semiconductor device will be described below with reference to the accompanying drawings.
【００１０】図１及び図２は従来の半導体装置製造用の
ＣＭＰ装備を示す構成図である。即ち、図１はエアホー
ルを用いたエア圧力印加方式を有するＣＭＰ装置を示す
図面であり、図２はエアメンブレイン(air membrane)を
用いたエア圧力印加方式を有するＣＭＰ装置を示す図面
である。1 and 2 are block diagrams showing conventional CMP equipment for manufacturing semiconductor devices. That is, FIG. 1 is a view showing a CMP apparatus having an air pressure applying method using an air hole, and FIG. 2 is a drawing showing a CMP apparatus having an air pressure applying method using an air membrane. .
【００１１】図１及び図２に示すように、研磨プラテン
１１上にパッド１２を取り付け、ウエハキャリア１３に
半導体ウエハ１４を取り付けてパッド１２の上方にお
く。ここで、半導体ウエハ１４は表面張力又は真空吸着
によってウエハキャリア１３に取り付けられる。ウエハ
キャリア１３を回転させ、そのキャリア１３に取り付け
た半導体ウエハをパット１２と摩擦させることによっ
て、半導体ウエハ１４の工程面を研磨する。ここで、ウ
エハキャリア１３の下部には半導体ウエハ１４を固定さ
せるためのウエハ支持膜（図示せず）及び支持リング
（図示せず）が構成されている。研磨プラテンは回転さ
せても良く、また回転させなくても良い。As shown in FIGS. 1 and 2, the pad 12 is mounted on the polishing platen 11, the semiconductor wafer 14 is mounted on the wafer carrier 13, and the pad 12 is placed above the pad 12. Here, the semiconductor wafer 14 is attached to the wafer carrier 13 by surface tension or vacuum suction. The process surface of the semiconductor wafer 14 is polished by rotating the wafer carrier 13 and rubbing the semiconductor wafer attached to the carrier 13 against the pad 12. Here, a wafer support film (not shown) and a support ring (not shown) for fixing the semiconductor wafer 14 are formed under the wafer carrier 13. The polishing platen may or may not be rotated.
【００１２】パッド１２の上に研磨剤のスラリ１５を供
給してウエハ１４を精密に研磨し、半導体ウエハ１４の
研磨が終わった後、パッド１２上に洗浄液を供給するこ
とにより、パッド１３及び半導体ウエハ１４を洗浄して
次の工程を行う。従来のＣＭＰ装置はウエハの均一度を
向上させるために、ＣＭＰ工程進行時に半導体ウエハ１
４が取り付けられるウエハキャリア１３の部分にエアホ
ール（図示せず）を介した空気圧力１６（図１）やメン
ブレイン１７（図２）を設置して、エア圧力をウエハ裏
面側に伝達して半導体ウエハ１４を研磨する。A slurry 15 of an abrasive is supplied onto the pad 12 to precisely polish the wafer 14, and after the semiconductor wafer 14 has been polished, a cleaning liquid is supplied onto the pad 12 so that the pad 13 and the semiconductor are removed. The wafer 14 is washed and the following steps are performed. In order to improve the uniformity of the wafer, the conventional CMP apparatus uses the semiconductor wafer 1 during the CMP process.
An air pressure 16 (FIG. 1) and a membrane 17 (FIG. 2) via air holes (not shown) are installed in the portion of the wafer carrier 13 to which 4 is attached, and the air pressure is transmitted to the back side of the wafer. The semiconductor wafer 14 is polished.
【００１３】一方、研磨プラテン１１は、耐腐食性の強
いステンレス鋼やアルミニウムのような金属から作られ
る。即ち、従来のＣＭＰ装置はエアホールを介したエア
圧力１６やメンブレイン１７を介してエア圧力をウエハ
裏側に印加して、半導体ウエハを研磨することにより平
坦化させている。On the other hand, the polishing platen 11 is made of a metal such as stainless steel or aluminum having strong corrosion resistance. That is, the conventional CMP apparatus flattens the semiconductor wafer by polishing it by applying an air pressure 16 through the air hole or an air pressure through the membrane 17 to the back side of the wafer.
【００１４】[0014]
【発明が解決しようとする課題】しかしながら、上記の
ような従来のＣＭＰ装置においては次のような問題点が
あった。第一に、エア圧力を一定の範囲以上上げると、
ウエハがウエハキャリアの外部にはみ出し、ウエハの破
壊が発生する。第二に、エア圧力を用いる限界のため、
特定の部分にのみ研磨圧力を増加させることが不可能で
ある。すなわち、ウエハの全面にほぼ同一の研磨圧力が
適用され、効果的なウエハ均一度の制御が不可能であ
る。However, the above-mentioned conventional CMP apparatus has the following problems. First, if the air pressure is raised above a certain range,
The wafer protrudes outside the wafer carrier, and the wafer is broken. Secondly, because of the limitations of using air pressure,
It is impossible to increase the polishing pressure only in a specific portion. That is, almost the same polishing pressure is applied to the entire surface of the wafer, and effective wafer uniformity control is impossible.
【００１５】本発明は上記のような従来の問題点を解決
するために成されたもので、ウエハのＣＭＰ工程時にウ
エハ均一度を向上させるようにしたＣＭＰ装置の研磨プ
ラテン及びそれを用いた平坦化方法を提供することに目
的がある。The present invention has been made to solve the above-mentioned conventional problems, and a polishing platen of a CMP apparatus for improving wafer uniformity during a CMP process of a wafer and a flat plate using the same. The purpose is to provide a method of computerization.
【００１６】[0016]
【課題を解決するための手段】このような目的を達成す
るための本発明によるＣＭＰ装置の研磨プラテンは、熱
膨張係数が異なる上部金属板と下部金属板とを付着させ
て構成することを特徴とする。The polishing platen of the CMP apparatus according to the present invention for achieving the above object is constituted by adhering an upper metal plate and a lower metal plate having different thermal expansion coefficients. And
【００１７】また、上記目的を達成するための本発明に
よるＣＭＰ装置の平坦化方法は、半導体ウエハをウエハ
キャリアに取り付け、ウエハキャリアを回転させると共
に、空気の圧力又はメンブレインを用いてパッドと半導
体ウエハを摩擦させ、半導体ウエハの工程面を研磨する
ＣＭＰ装置の平坦化方法において、パッドの下部に熱膨
張係数の異なる上部金属板と下部金属板とからなる研磨
プラテンを取り付けておき、研磨プラテンを構成する上
部金属板と下部金属板にそれぞれ温度差を加えながらパ
ッドの上にスラリを供給して半導体ウエハを研磨する段
階と、半導体ウエハの研磨が終わった後にはパッド上に
洗浄液を供給して、パッド及び半導体ウエハを洗浄する
段階とを備えていることを特徴とする。Further, in order to achieve the above object, the flattening method of the CMP apparatus according to the present invention is such that a semiconductor wafer is attached to a wafer carrier, the wafer carrier is rotated, and the pressure of air or a membrane is used to form a pad and a semiconductor. In a planarizing method of a CMP apparatus for rubbing a wafer and polishing a process surface of a semiconductor wafer, a polishing platen including an upper metal plate and a lower metal plate having different thermal expansion coefficients is attached to a lower part of a pad, and the polishing platen is attached. A step of supplying a slurry onto the pad while applying a temperature difference to the upper metal plate and the lower metal plate, respectively, to polish the semiconductor wafer, and a cleaning liquid is supplied onto the pad after polishing the semiconductor wafer. Cleaning the pad and the semiconductor wafer.
【００１８】[0018]
【発明の実施の形態】以下、本発明によるＣＭＰ装置の
研磨プラテン及びそれを用いた平坦化方法を図面に沿っ
て詳細に説明する。BEST MODE FOR CARRYING OUT THE INVENTION A polishing platen for a CMP apparatus according to the present invention and a planarizing method using the same will be described below in detail with reference to the drawings.
【００１９】本発明は基本的には従来と同様な構成を有
する。本実施形態では研磨プラテンの形状を変形させる
ために熱膨張係数の異なる２枚の金属を付けて研磨プラ
テンを形成させている。半導体ウエハのＣＭＰ工程中に
研磨プラテンの上・下部金属板の温度を互いに違うよう
に制御することにより、研磨プラテンの形状を変形させ
て、半導体ウエハのエッジ部分又は中心部分を選択的に
研磨できるようにした技術である。The present invention basically has the same structure as the conventional one. In this embodiment, in order to deform the shape of the polishing platen, two metals having different thermal expansion coefficients are attached to form the polishing platen. By controlling the temperatures of the upper and lower metal plates of the polishing platen so as to be different from each other during the CMP process of the semiconductor wafer, the shape of the polishing platen can be deformed and the edge portion or the center portion of the semiconductor wafer can be selectively polished. It is a technology that has been done.
【００２０】すなわち、本発明は従来の図１及び図２に
示すように、半導体ウエハ１４をウエハキャリア１３に
取り付け、ウエハキャリア１３を回転させると同時に、
空気圧力１６又はメンブレイン１７を用いてパッド１２
と半導体ウエハ１４を摩擦させて半導体ウエハ１４の工
程面を研磨するようになっているＣＭＰ装置である。本
実施形態では、パッド１２が取り付けられる研磨プラテ
ン１１を熱膨張係数の異なる上部金属板と下部金属板と
の２枚の金属板で構成させ、両金属に温度差を与え、そ
の温度差によって金属板を変形させて半導体ウエハの中
心部又はエッジ部を重点的に研磨できるようにすること
にある。That is, according to the present invention, as shown in FIG. 1 and FIG. 2 of the related art, the semiconductor wafer 14 is attached to the wafer carrier 13, and the wafer carrier 13 is rotated,
Pad 12 using pneumatic pressure 16 or membrane 17
And the semiconductor wafer 14 is rubbed to polish the process surface of the semiconductor wafer 14. In the present embodiment, the polishing platen 11 to which the pad 12 is attached is composed of two metal plates, an upper metal plate and a lower metal plate having different thermal expansion coefficients, and a temperature difference is given to both metals, and the metal difference is caused by the temperature difference. The purpose is to deform the plate so that the central portion or the edge portion of the semiconductor wafer can be intensively polished.
【００２１】図３は本実施形態によるＣＭＰ装置の研磨
プラテンの、工程進行前の状態を示す側面図である。図
３に示すように、本研磨プラテンは熱膨張係数の異なる
上部金属板２０と下部金属板３０を取り付けて構成され
ている。FIG. 3 is a side view showing the state of the polishing platen of the CMP apparatus according to the present embodiment before the process progresses. As shown in FIG. 3, the present polishing platen is configured by attaching an upper metal plate 20 and a lower metal plate 30 having different thermal expansion coefficients.
【００２２】これらの上部金属板２０と下部金属板３０
は接着剤又はネジなどを用いて取り付けられている。本
実施形態では、上部金属板２０は下部金属板３０より熱
膨張係数が大きい金属で形成されているが、逆に下部金
属板３０より熱膨張係数が小さい金属で形成することも
できる。尚、上部金属板２０はステンレス鋼又はアルミ
ニウムで形成し、下部金属板３０は鋳鉄で形成する。逆
に、下部金属板３０をステンレス鋼又はアルミニウムで
形成し、上部金属板２０を鋳鉄で形成することもでき
る。These upper metal plate 20 and lower metal plate 30
Are attached using adhesive or screws. In the present embodiment, the upper metal plate 20 is made of a metal having a larger thermal expansion coefficient than the lower metal plate 30, but it may be made of a metal having a smaller thermal expansion coefficient than the lower metal plate 30. The upper metal plate 20 is made of stainless steel or aluminum, and the lower metal plate 30 is made of cast iron. Conversely, the lower metal plate 30 may be made of stainless steel or aluminum and the upper metal plate 20 may be made of cast iron.
【００２３】図４ａと図４ｂ及び図５ａと図５ｂは本実
施形態によるＣＭＰ装置の研磨プラテンの変形及びウエ
ハ均一度の制御原理を示す図である。上記のように構成
された本実施形態によるＣＭＰ装置の研磨プラテンは、
図４ａに示すように、上部金属板２０を下部金属板３０
より熱膨張係数の高い金属から構成する。したがって、
図４ｂに示すように、上部金属板２０の温度を高くし、
下部金属板３０の温度を低くすると、研磨プラテンの形
状は凸状に変化する。温度を逆にすれば、逆に凹状に変
形するのは理解できるであろう。FIGS. 4a and 4b and FIGS. 5a and 5b are views showing the principle of controlling the deformation of the polishing platen and the wafer uniformity of the CMP apparatus according to the present embodiment. The polishing platen of the CMP apparatus according to the present embodiment configured as described above is
As shown in FIG. 4a, the upper metal plate 20 is connected to the lower metal plate 30.
It is composed of a metal having a higher coefficient of thermal expansion. Therefore,
As shown in FIG. 4b, by increasing the temperature of the upper metal plate 20,
When the temperature of the lower metal plate 30 is lowered, the shape of the polishing platen changes to a convex shape. It will be understood that when the temperature is reversed, the shape is transformed into a concave shape.
【００２４】また、図５ａに示すように、下部金属板３
０を上部金属板２０より熱膨張係数の高い金属で構成し
た場合には、下部金属板３０の温度を高くし、上部金属
板２０の温度を低く維持すると、研磨プラテンは凹状を
有する。同様に温度の関係を逆にすることでそのプラテ
ンを凸状に変形させることができる。As shown in FIG. 5a, the lower metal plate 3
When 0 is made of a metal having a coefficient of thermal expansion higher than that of the upper metal plate 20, if the temperature of the lower metal plate 30 is raised and the temperature of the upper metal plate 20 is kept low, the polishing platen has a concave shape. Similarly, the platen can be deformed into a convex shape by reversing the temperature relationship.
【００２５】ＣＭＰ装置の研磨プラテンが図４ｂに示す
ように凸状を有すると、半導体ウエハ４０の中央部位の
研磨圧力が増加して、半導体ウエハ４０の中心部分の除
去比が増加する。逆に、ＣＭＰ装置の研磨プラテンが図
５ｂに示すように凹状を有すると、ウエハエッジ部位の
研磨圧力が増加して、半導体ウエハ４０のエッジ部位の
除去比が増加する。If the polishing platen of the CMP apparatus has a convex shape as shown in FIG. 4B, the polishing pressure at the central portion of the semiconductor wafer 40 increases and the removal ratio at the central portion of the semiconductor wafer 40 increases. Conversely, if the polishing platen of the CMP apparatus has a concave shape as shown in FIG. 5B, the polishing pressure at the wafer edge portion increases, and the removal ratio at the edge portion of the semiconductor wafer 40 increases.
【００２６】上記したようなプラテンのそれぞれの板の
温度は、上部金属板２０と下部金属板３０の内部にそれ
ぞれ熱線と冷却線を入れることで制御可能である。した
がって、半導体ウエハのＣＭＰ工程進行時に研磨プラテ
ンを構成する上部金属板２０と下部金属板３０とに温度
差を発生させて、研磨プラテン形状を変形させることに
より、ウエハ中心部とエッジ部の研磨圧力を調節して均
一度を調節することができる。The temperature of each plate of the platen as described above can be controlled by putting a heating wire and a cooling wire inside the upper metal plate 20 and the lower metal plate 30, respectively. Therefore, when the CMP process of the semiconductor wafer proceeds, a temperature difference is generated between the upper metal plate 20 and the lower metal plate 30 forming the polishing platen, and the polishing platen shape is deformed. Can be adjusted to adjust the uniformity.
【００２７】すなわち、上部金属板２０の温度を高く
し、且つ下部金属板３０の温度を低くすると、研磨プラ
テンが凸状を成すことにより、研磨中のウエハ中心部の
研磨圧力が増加してウエハ中心部の除去比が増加する。
逆に、上部金属板２０の温度を低くし、且つ下部金属板
３０の温度を高くすると、研磨プラテンが凹状に変形
し、ウエハエッジ部の研磨圧力が増加して、ウエハエッ
ジ部の除去比が増加する。半導体ウエハ４０の研磨が終
わった後は、洗浄液を供給することにより、半導体ウエ
ハ４０を洗浄して次の工程を進行させる。That is, when the temperature of the upper metal plate 20 is increased and the temperature of the lower metal plate 30 is decreased, the polishing platen has a convex shape and the polishing pressure at the center of the wafer during polishing increases. The removal ratio of the central part increases.
Conversely, when the temperature of the upper metal plate 20 is lowered and the temperature of the lower metal plate 30 is raised, the polishing platen is deformed into a concave shape, the polishing pressure at the wafer edge portion increases, and the removal ratio at the wafer edge portion increases. . After the polishing of the semiconductor wafer 40 is completed, the cleaning liquid is supplied to clean the semiconductor wafer 40 and proceed to the next step.
【００２８】図６は本発明によるＣＭＰ装置の研磨プラ
テンを示す図である。図６に示すように、上部金属板２
０と下部金属板３０の内部に熱線及び冷却線５０を設け
ることにより、温度を自由に調節できるようになる。一
方の金属板に加熱部材を挿入するだけでも良い。また、
１枚の金属板に熱線と冷却線の双方を設けても良い。FIG. 6 is a view showing the polishing platen of the CMP apparatus according to the present invention. As shown in FIG. 6, the upper metal plate 2
By providing the heating wire 50 and the cooling wire 50 inside the lower metal plate 30 and 0, the temperature can be freely adjusted. The heating member may be simply inserted into one of the metal plates. Also,
Both the heating wire and the cooling wire may be provided on one metal plate.
【００２９】[0029]
【発明の効果】以上説明したように、本発明によるＣＭ
Ｐ装置の研磨プラテンは、プラテンを構成している金属
板の温度を調整することで、研磨が行われるウエハの表
面と接触する面の研磨圧力を制御できるので、より効果
的な均一度が得られる。また、金属の熱膨張係数を用い
るので、エア圧力を用いる装備よりその構成が簡単であ
り、より正確な研磨圧力を調節することができる。さら
に、従来のように、ウエハにエア圧力を印加して、ウエ
ハ均一度を調節する装備の場合、エア圧力を過剰に上げ
ると、ウエハがウエハキャリアの外部に抜け出ることが
あるが、本発明ではこのようなエア圧力を用いないの
で、そのような危険は一切生じない。As described above, the CM according to the present invention
The polishing platen of the P apparatus can control the polishing pressure of the surface in contact with the surface of the wafer to be polished by adjusting the temperature of the metal plate forming the platen, so that more effective uniformity can be obtained. To be Further, since the coefficient of thermal expansion of metal is used, the structure is simpler than that of equipment using air pressure, and more accurate polishing pressure can be adjusted. Further, in the case of the equipment that adjusts the wafer uniformity by applying the air pressure to the wafer as in the conventional case, if the air pressure is excessively increased, the wafer may come out of the wafer carrier. Since no such air pressure is used, there is no such danger.
【図１】従来の半導体装置製造用のＣＭＰ装備を示す構
成図である。FIG. 1 is a configuration diagram showing a conventional CMP equipment for manufacturing a semiconductor device.
【図２】従来の半導体装置製造用の他のＣＭＰ装備を示
す構成図である。FIG. 2 is a configuration diagram showing another conventional CMP equipment for manufacturing a semiconductor device.
【図３】本発明実施形態によるＣＭＰ装置の研磨プラテ
ンを示す図である。FIG. 3 is a diagram showing a polishing platen of a CMP apparatus according to an embodiment of the present invention.
【図４】本発明実施形態によるＣＭＰ装置の研磨プラテ
ンの模様変形及びウエハ均一度の制御原理を示す図であ
る。FIG. 4 is a diagram showing a principle of controlling pattern deformation and wafer uniformity of a polishing platen of a CMP apparatus according to an embodiment of the present invention.
【図５】本発明実施形態によるＣＭＰ装置の研磨プラテ
ンの形状変化及びウエハ均一度の制御原理を示す図であ
る。FIG. 5 is a diagram showing the principle of controlling the shape change of the polishing platen and the wafer uniformity of the CMP apparatus according to the embodiment of the present invention.
【図６】本発明実施形態によるＣＭＰ装置の研磨プラテ
ンを示す図である。FIG. 6 is a diagram showing a polishing platen of a CMP apparatus according to an embodiment of the present invention.
２０：上部金属板 ３０：下部金属板 ４０：半導体ウエハ ５０：熱線及び冷却線 20: Upper metal plate 30: Lower metal plate 40: Semiconductor wafer 50: Hot wire and cooling wire
───────────────────────────────────────────────────── フロントページの続き (72)発明者 リー，ドック・ウォン 大韓民国・チュンチョンブク−ド・チョン ジュ−シ・フンドック・ヒャンジェオン− ドン・50 Ｆターム(参考） 3C058 AA07 AA09 CA01 CB01 CB02 DA12 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Lee, Dock Wong Republic of Korea Jusi Hundock Hyangjeon- Don 50 F term (reference) 3C058 AA07 AA09 CA01 CB01 CB02 DA12
Claims (13)
を回転させながら半導体ウエハをパッドに押しつけるＣ
ＭＰ装置の研磨プラテンであって、その研磨プラテン
が、熱膨張係数が異なる上部金属板と下部金属板とを付
着して構成されていることを特徴とするＣＭＰ装置の研
磨プラテン。1. When the CMP process is performed, the semiconductor wafer is pressed against the pad while rotating the semiconductor wafer.
A polishing platen for an MP apparatus, wherein the polishing platen is configured by adhering an upper metal plate and a lower metal plate having different thermal expansion coefficients to each other.
線又は冷却線を設けることを特徴とする請求項１記載の
ＣＭＰ装置の研磨プラテン。2. The polishing platen for a CMP apparatus according to claim 1, wherein a heating wire or a cooling wire is provided inside the upper metal plate and the lower metal plate.
係数の大きい金属からなることを特徴とする請求項１記
載のＣＭＰ装置の研磨プラテン。3. The polishing platen for a CMP apparatus according to claim 1, wherein the upper metal plate is made of a metal having a larger thermal expansion coefficient than the lower metal plate.
係数の大きい金属からなることを特徴とする請求項１記
載のＣＭＰ装置の研磨プラテン。4. The polishing platen for a CMP apparatus according to claim 1, wherein the lower metal plate is made of a metal having a larger thermal expansion coefficient than the upper metal plate.
ミニウムからなることを特徴とする請求項１記載のＣＭ
Ｐ装置の研磨プラテン。5. The CM according to claim 1, wherein the upper metal plate is made of stainless steel or aluminum.
Polishing platen for P equipment.
徴とする請求項１記載のＣＭＰ装置の研磨プラテン。6. The polishing platen for a CMP apparatus according to claim 1, wherein the lower metal plate is made of cast iron.
ミニウムからなることを特徴とする請求項１記載のＣＭ
Ｐ装置の研磨プラテン。7. The CM according to claim 1, wherein the lower metal plate is made of stainless steel or aluminum.
Polishing platen for P equipment.
徴とする請求項１記載のＣＭＰ装置の研磨プラテン。8. The polishing platen for a CMP apparatus according to claim 1, wherein the upper metal plate is made of cast iron.
はネジで取り付けられることを特徴とする請求項１記載
のＣＭＰ装置の研磨プラテン。9. The polishing platen for a CMP apparatus according to claim 1, wherein the upper metal plate and the lower metal plate are attached with an adhesive or screws.
てパッド上に真空吸着し、前記ウエハキャリアを回転さ
せると共に、空気の圧力又はメンブレインを用いてパッ
ドと半導体ウエハを摩擦させ、半導体ウエハの工程面を
研磨するＣＭＰ装置の平坦化方法において、 前記パッドを載せる研磨プラテンを熱膨張係数の異なる
上部金属板と下部金属板とで構成させ、 前記研磨プラテンを構成する上部金属板と下部金属板に
それぞれ温度差を加えながら前記パッド上にスラリを供
給して前記半導体ウエハを研磨し、 前記半導体ウエハの研磨が終わった後には前記パッド上
に洗浄液を供給して、前記パッド及び前記半導体ウエハ
を洗浄することを特徴とするＣＭＰ装置の平坦化方法。10. A semiconductor wafer process surface is obtained by vacuum-sucking a semiconductor wafer onto a pad via a wafer carrier, rotating the wafer carrier, and rubbing the pad and the semiconductor wafer using air pressure or a membrane. In a method of flattening a CMP apparatus for polishing, a polishing platen on which the pad is placed is composed of an upper metal plate and a lower metal plate having different thermal expansion coefficients, and the upper metal plate and the lower metal plate forming the polishing platen are respectively formed. A slurry is supplied onto the pad while applying a temperature difference to polish the semiconductor wafer, and after the semiconductor wafer is polished, a cleaning liquid is supplied onto the pad to clean the pad and the semiconductor wafer. A flattening method for a CMP apparatus, comprising:
それぞれ熱線及び冷却線を形成することを特徴とする請
求項１０記載のＣＭＰ装置の平坦化方法。11. The flattening method of the CMP apparatus according to claim 10, wherein a heating wire and a cooling wire are formed inside the upper metal plate and the lower metal plate, respectively.
る時に上部金属板の温度を高くし前記下部金属板の温度
を低くして半導体ウエハの工程面を研磨することを特徴
とする請求項１０記載のＣＭＰ装置の平坦化方法。12. The process surface of the semiconductor wafer is polished by increasing the temperature of the upper metal plate and lowering the temperature of the lower metal plate when flattening the central portion of the semiconductor wafer. A method for planarizing a CMP apparatus as described above.
する時、下部金属板の温度を高くし上部金属板の温度を
低くして半導体ウエハの工程面を研磨することを特徴と
する請求項１０記載のＣＭＰ装置の平坦化方法。13. The surface of the semiconductor wafer is polished by increasing the temperature of the lower metal plate and decreasing the temperature of the upper metal plate when the edge portion of the semiconductor wafer is flattened. A method for planarizing a CMP apparatus as described above.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2001-64016 | 2001-10-17 | ||
| KR10-2001-0064016A KR100413493B1 (en) | 2001-10-17 | 2001-10-17 | Polishing Platen of Chemical Mechanical Polishing Equipment and method for plating |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2003179013A true JP2003179013A (en) | 2003-06-27 |
Family
ID=19715199
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002295765A Pending JP2003179013A (en) | 2001-10-17 | 2002-10-09 | Polishing platen of chemical-mechanical polishing apparatus, and planarizing method using the same |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US20030073383A1 (en) |
| JP (1) | JP2003179013A (en) |
| KR (1) | KR100413493B1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018051679A (en) * | 2016-09-28 | 2018-04-05 | 株式会社ディスコ | Polishing unit |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6942544B2 (en) * | 2003-09-30 | 2005-09-13 | Hitachi Global Storage Technologies Netherlands B.V. | Method of achieving very high crown-to-camber ratios on magnetic sliders |
| US6913515B2 (en) * | 2003-09-30 | 2005-07-05 | Hitachi Global Storage Technologies Netherlands B.V. | System and apparatus for achieving very high crown-to-camber ratios on magnetic sliders |
| KR100755011B1 (en) * | 2005-12-14 | 2007-09-06 | 주식회사 실트론 | Polishing plate, and polishing apparatus, polishing method using thereof |
| US9012337B2 (en) * | 2010-10-12 | 2015-04-21 | Varian Semiconductor Equipment Associates, Inc. | Platen control |
| CN102303285B (en) * | 2011-09-08 | 2013-07-03 | 江苏大学 | Part temperature control device for grinding processing |
| KR101320461B1 (en) * | 2011-11-30 | 2013-10-22 | 편도선 | Polishing head of chemical mechanical polishing apparatus |
| KR101597870B1 (en) * | 2012-04-02 | 2016-02-25 | 강준모 | Carrier head for chemical mechanical polishing system |
| SG10202002145TA (en) * | 2020-03-09 | 2021-10-28 | Rayong Engineering And Plant Service Co Ltd | An apparatus and method for detecting deterioration of a rotating part |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4450652A (en) * | 1981-09-04 | 1984-05-29 | Monsanto Company | Temperature control for wafer polishing |
| AU637087B2 (en) * | 1989-03-24 | 1993-05-20 | Sumitomo Electric Industries, Ltd. | Apparatus for grinding semiconductor wafer |
| US5127196A (en) * | 1990-03-01 | 1992-07-07 | Intel Corporation | Apparatus for planarizing a dielectric formed over a semiconductor substrate |
| US5036630A (en) * | 1990-04-13 | 1991-08-06 | International Business Machines Corporation | Radial uniformity control of semiconductor wafer polishing |
| JP2985490B2 (en) * | 1992-02-28 | 1999-11-29 | 信越半導体株式会社 | Heat removal method of polishing machine |
| JPH06198560A (en) * | 1992-12-28 | 1994-07-19 | Speedfam Co Ltd | Heat resisting glass level block |
| JPH07297153A (en) * | 1994-04-25 | 1995-11-10 | Nippon Steel Corp | Polishing apparatus |
| KR100258802B1 (en) * | 1995-02-15 | 2000-06-15 | 전주범 | Planarization apparatus and method using the same |
| JPH10235552A (en) * | 1997-02-24 | 1998-09-08 | Ebara Corp | Polishing device |
| DE19748020A1 (en) * | 1997-10-30 | 1999-05-06 | Wacker Siltronic Halbleitermat | Method and device for polishing semiconductor wafers |
| US5957750A (en) * | 1997-12-18 | 1999-09-28 | Micron Technology, Inc. | Method and apparatus for controlling a temperature of a polishing pad used in planarizing substrates |
| US6121144A (en) * | 1997-12-29 | 2000-09-19 | Intel Corporation | Low temperature chemical mechanical polishing of dielectric materials |
| US6176764B1 (en) * | 1999-03-10 | 2001-01-23 | Micron Technology, Inc. | Polishing chucks, semiconductor wafer polishing chucks, abrading methods, polishing methods, simiconductor wafer polishing methods, and methods of forming polishing chucks |
| KR100598090B1 (en) * | 1999-08-25 | 2006-07-07 | 삼성전자주식회사 | Chemical mechanical polishing system for procuring uniformity of polishing surface |
| US6488571B2 (en) * | 2000-12-22 | 2002-12-03 | Intel Corporation | Apparatus for enhanced rate chemical mechanical polishing with adjustable selectivity |
-
2001
- 2001-10-17 KR KR10-2001-0064016A patent/KR100413493B1/en active IP Right Grant
-
2002
- 2002-10-09 JP JP2002295765A patent/JP2003179013A/en active Pending
- 2002-10-17 US US10/271,793 patent/US20030073383A1/en not_active Abandoned
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018051679A (en) * | 2016-09-28 | 2018-04-05 | 株式会社ディスコ | Polishing unit |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20030032305A (en) | 2003-04-26 |
| US20030073383A1 (en) | 2003-04-17 |
| KR100413493B1 (en) | 2004-01-03 |
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