JP2003178999A - Electroless plating method, embedded wiring, and method of forming the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plating method to form wiring by embedding a copper plated layer to a highly integrated and ultraminiaturized hole and trench. <P>SOLUTION: This electroless plating method for copper comprises a process to prepare for a substrate, a nitride film forming process to form, on the substrate, a nitride film of high melting point metal in which the ratio of the number of nitrogen atoms to the oxygen atoms included in the area near the surface thereof is about 0.4 or higher, and a process to form a nitride film on a copper plated layer by soaking the substrate into the plating solution including copper and then replacing the high melting point metal included in the nitrogen film with copper. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a copper buried wiring, and more particularly to a method for forming a buried wiring using an electroless plating method.

[0002]

2. Description of the Related Art With the high integration of semiconductor devices, a damascene process for embedding copper wiring in an insulating layer is used as a smoothing circuit forming technique. In such a damascene process, first, holes and trenches are formed in the insulating layer. Next, using a sputtering method or a CVD method, Ta is formed on the inner wall of the hole or the like.
A barrier metal layer such as N or WN is formed. Furthermore, since the barrier metal layer has a high resistance, a film thickness of several 10
A copper seed layer of about nm is formed by the sputtering method. Then, copper is deposited on the seed layer by electrolytic plating,
A hole or the like is buried to form a buried wiring of copper.

[0003]

However, when the aspect ratio of holes, trenches, etc. becomes higher due to higher integration and miniaturization of semiconductor devices, a uniform seed layer is formed on the inner wall of holes, etc. by the sputtering method. Became difficult, and in particular, the coverage (coverability) of the side wall portion decreased. Therefore, in the electrolytic plating method in which the plating layer is formed on the seed layer, it is difficult to fill the fine holes and the like with the uniform copper plating layer. By using a special sputtering device such as a high ionization rate sputtering device or a long-distance sputtering device,
It is possible to improve the coverage (coverability) of the seed layer, but such a method only prolongs the life of the above technology by about one generation, and there is a clear limit.

Therefore, an object of the present invention is to provide a wiring manufacturing method for forming wiring by embedding a copper plating layer in highly integrated and miniaturized holes and trenches.

[0005]

As a result of intensive studies, the inventors of the present invention have found that by using a refractory metal, particularly a refractory metal nitride having a nitrogen stabilizing layer in the vicinity of the surface, as a barrier metal layer, The present invention has been completed by finding a method of forming an electroless plating layer on a barrier metal layer without using a layer.

That is, the present invention is a method for electroless plating copper, in which a step of preparing a substrate and a nitride film of a refractory metal, which is included in the vicinity of the surface thereof, includes atoms of nitrogen atoms with respect to oxygen atoms. A step of forming a nitride film having a number ratio (number of nitrogen atoms / number of oxygen atoms) of about 0.4 or more on the substrate, and immersing the substrate in a plating solution containing copper. And replacing the refractory metal contained in the nitride film with the copper to form a copper plating layer on the nitride film. According to such an electroless plating method, it is possible to uniformly fill the fine pores without using a catalyst layer. For this reason,
Highly dense and highly integrated multilayer wiring can be formed with a high yield. In addition, it is possible to provide a high density and highly integrated multilayer wiring at low cost.

The present invention is also the electroless plating method characterized in that the ratio of the number of atoms is a ratio included in the range of approximately 5 nm from the surface of the nitride film in the depth direction.
By controlling the ratio of the number of atoms in such a region, a good electroless plating reaction can be obtained.

The nitride film forming step may include a step of forming a nitride film of the refractory metal on the substrate and then irradiating the surface of the nitride film with nitrogen plasma. As described above, by irradiating the surface of the nitride film with nitrogen plasma, a stoichiometrically stable nitrogen stabilizing layer having a ratio of the number of nitrogen atoms to oxygen atoms of about 0.4 or more is formed on the nitride film. Can be formed on the surface of.

The nitride film forming step may include a step of removing the surface layer of the nitride film after forming the nitride film of the refractory metal on the substrate. Thus, by removing the surface layer, a surface layer having a predetermined atomic number ratio can be obtained. In addition, it is preferable that the electroless plating step of copper is promptly performed after the removing step.

The nitride film forming step may include a step of depositing the nitride film having a substantially stoichiometric composition on the substrate. The nitride film may be deposited by adjusting the deposition conditions of the nitride film.

The present invention is also a method for electroless plating of copper, which comprises a step of preparing a substrate, a step of forming a refractory metal film containing titanium or cobalt as a main component on the substrate, and copper. Immersing the substrate in a plating solution containing the same to replace the refractory metal contained in the refractory metal film with the copper to form a copper plating layer on the refractory metal film. It is also a characteristic electroless plating method. Electroless plating of copper is also possible by using these metals for the refractory metal film.

Further, the present invention is a method for forming a copper-embedded wiring, comprising the steps of preparing a substrate, forming a hole in the substrate, and forming a high melting point metal on the inner wall of the hole. A barrier metal layer forming step of forming a barrier metal layer made of a nitride film and having a ratio of the number of nitrogen atoms to oxygen atoms in the vicinity of the surface is approximately 0.4 or more, and the substrate is immersed in a plating solution containing copper. A step of immersing, substituting the refractory metal contained in the barrier metal layer with the copper, forming a copper plating layer on the barrier metal layer, and forming an embedded wiring. It is also a wiring forming method. By using such a method of forming a buried wiring, it is possible to form a miniaturized multilayer wiring structure. As the substrate, for example, a silicon substrate having a silicon oxide layer formed on its surface is used. It can also be applied to other substrates such as GaAs and ceramic substrates.

The barrier metal layer forming step may include a step of irradiating the surface of the barrier metal layer with nitrogen plasma after forming the barrier metal layer.

Further, it may include a step of forming an electrolytic copper plating layer on the copper plating layer by using the copper plating layer as a seed layer. By using the electroless plating method and the electrolytic plating method together, higher quality embedded wiring can be obtained.

The present invention is also a copper-embedded wiring, comprising a substrate, a hole provided in the substrate, and a barrier made of a refractory metal nitride provided on an inner wall of the hole. The barrier metal layer includes a metal layer and a copper plating layer provided on the barrier metal layer to fill the hole, and the barrier metal layer has a number of nitrogen atoms with respect to oxygen atoms in the vicinity of an interface with the copper plating layer. The embedded wiring is characterized by including a nitrogen stabilizing layer having a ratio of about 0.4 or more.

The thickness of the nitrogen stabilizing layer is preferably about 5 nm. The ratio of the number of nitrogen atoms to the number of oxygen atoms may be about 1.5 or more as long as it is about 0.4 or more.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1. FIG. 1 is a process diagram of a method of manufacturing embedded wiring according to the first embodiment of the present invention. This manufacturing method includes the following steps 1 to 4.

Step 1: As shown in FIG. 1A, a silicon substrate 1 having an insulating layer 2 made of a dielectric intermediate layer formed on its surface is prepared. Next, general lithography technology,
Holes 3 such as holes and trenches are formed in the insulating layer 2 by using an etching technique.

Step 2: As shown in FIG. 1B, a barrier metal layer 4 of a nitride film of a refractory metal such as TaN is deposited on the surface of the insulating layer 2 by using a sputtering method or a CVD method. The barrier metal layer 4 is deposited on the surface of the insulating layer 2 and the inner wall of the hole 3 with a substantially uniform film thickness. The refractory metal includes Ta, Mo, Zr, Hf, W and the like.

Next, the surface of the barrier metal layer 4 is subjected to nitrogen plasma treatment so that the surface of the barrier metal layer 4 is
A nitrogen stabilizing layer having a stoichiometrically stable composition is formed. Specifically, the silicon substrate 1 having the barrier metal layer 4 formed thereon is placed in N ₂ plasma or NH ₃ plasma to form a nitrogen stabilizing layer on the surface. The nitrogen stabilizing layer contains refractory metal and nitrogen in a composition close to the stoichiometric composition, and has a film thickness of, for example, 5 nm. The step of forming the barrier metal layer 4 and the nitrogen plasma treatment step are preferably performed as a consistent vacuum process.

As will be described later, the ratio of the number of nitrogen atoms to the number of oxygen atoms contained in the nitrogen stabilizing layer (the number of nitrogen atoms / the number of oxygen atoms) is about 0.4 or more.

Step 3: The silicon substrate 1 having the barrier metal layer 4 formed thereon is dipped in a copper plating solution (not shown),
Perform an electroless plating process. In the experiment, 7.6 g /
An electroless conductor composed of 1 liter of CuSO ₄ .5H ₂ O, 70.0 g / liter of ethylenediaminetetraacetic acid (EDTA), 14.0 g / liter of glyoxylic acid as a reducing agent, and an additional reagent. A plating solution was used. The pH of the plating solution is adjusted to about 12.3 using tetramethylammonium hydroxide, and the temperature of the plating solution is 70%.
Hold at ° C. The plating process proceeds by ionizing the refractory metal in the barrier metal layer 4 and reducing the copper in the plating solution to replace it (displacement plating process). As a result, as shown in FIG. 1C, a copper plating layer (electroless plating layer) 5 is formed on the barrier metal layer 4 so as to fill the hole 3.

Step 4: As shown in FIG. 1D, the copper plating layer 5 and the barrier metal layer 4 on the insulating layer 2 are removed from the surface of the copper plating layer 5 by the CMP method to remove the insulating layer 2 The copper plating layer 5 and the barrier metal layer 4 are left only in the hole portion 3 of FIG. As a result, the embedded wiring 1 using copper as the wiring material
0 is completed. The embedded wiring 10 is preferably heat-treated at 300 ° C. for 30 minutes in a reducing atmosphere, for example. This improves the adhesion between the barrier metal layer 4 and the copper plating layer 5.

Next, another manufacturing process of the buried wiring according to the present embodiment will be described with reference to FIG. The manufacturing process includes the following processes 1 to 5.

Steps 1 and 2: The same steps as Steps 1 and 2 described above shown in FIGS. 1A and 1B are performed, and holes 3 are formed in the insulating layer 2 made of silicon oxide provided on the silicon substrate 1. And a barrier metal layer 4 made of a nitride film of a refractory metal is formed on the surface of the insulating layer 2 and the inner wall of the hole 3.

Step 3: As shown in FIG. 2C, the copper plating layer 5 is deposited on the barrier metal layer 4 by the electroless plating (substitution plating) method as in Step 3 described above. . In this process, the hole 3 is not filled with only the copper plating layer 5.

Step 4: As shown in FIG. 2D, an electrolytic plating step is performed using the copper plating layer 5 as a seed layer. As a result, the electrolytic plating layer 6 is formed on the surface of the copper plating layer 5 so as to fill the holes 3.

Step 5: As shown in FIG. 2 (e), CMP
Method is used to remove the barrier metal layer 4 and the copper plating layers 5 and 6 on the insulating layer 2 to complete the copper-embedded wiring 20.

As described above, by using the method according to the present embodiment, without using a catalyst layer such as Pd,
Copper embedded wiring can be formed by an electroless plating process. As a result, it becomes possible to completely bury copper even in fine holes and the like, and it is possible to form a highly integrated and miniaturized multilayer wiring structure with a high yield.

Further, it is not necessary to use an expensive sputtering device or the like, and the manufacturing cost can be reduced.

The method of forming such embedded wiring is as follows.
The present invention can be applied to both single damascene process and dual damascene process. The same applies to the second and subsequent embodiments.

Embodiment 2. In the method of manufacturing the embedded wiring according to the second embodiment of the present invention, the hole 3 is formed in the insulating layer 2 provided on the silicon substrate 1 as in the case of FIG.

Next, in a step similar to that shown in FIG.
The barrier metal layer 4 made of a refractory metal nitride film is formed by using the method. In the present embodiment, the barrier metal layer 4
Instead of performing the nitrogen stabilization treatment, the surface of the barrier metal layer 4 is removed by etching. The etching of the barrier metal layer 4 is performed, for example, by immersing it in dilute hydrofluoric acid of about 1% for about 30 seconds.

Next, a copper plating layer 5 is formed by an electroless plating process using the same process as shown in FIG. It is preferable to perform the electroless plating step immediately after the above etching step. Then, in a process similar to that shown in FIG.
By using the P method, the barrier metal layer 4 and the copper plating layer 5 are left only in the holes 3, and the copper-embedded wiring 10 is completed.

FIG. 3 shows an XPS analysis method (X-ray photoelectron analysis method) of the surface of the barrier metal layer 4 before and after the etching treatment of the barrier metal layer 4 (treatment with about 1% dilute hydrofluoric acid for about 10 minutes). It is the analysis result used. Here, a TaN layer was used as the barrier metal layer 4. Figure 3 (a) shows
FIG. 3B is a result of XPS analysis before etching.
Is the XPS analysis result after the etching process. Oxygen exists in the barrier metal layer 4 both before and after the etching process. The ratio of nitrogen atoms to oxygen atoms (the number of nitrogen atoms / the number of oxygen atoms) was about 0.
Although it is 24, it is about 0.76 after the etching process.

As a result of performing the electroless plating process on both the sample before the etching treatment and the sample after the etching treatment, the copper plating layer 5 could not be formed on the sample before the etching treatment. On the other hand, a good copper plating layer 5 was formed on the sample after the etching treatment.

As described above, it is preferable that the composition near the surface of the barrier metal layer 4 made of the high melting point metal nitride film is close to the stoichiometric composition containing no oxygen. This is because when the amount of oxygen contained near the surface of the barrier metal layer 4 increases,
It is considered that the redox potential of the barrier metal layer 4 becomes higher than the redox potential of the copper plating layer 5. In the result of FIG. 3, the ratio of the number of nitrogen atoms to the number of oxygen atoms is about 0.
In the case of No. 76 (FIG. 3 (b)), a good copper plating layer 5 was obtained, but in the vicinity of the surface of the barrier metal layer 4, the ratio of the number of nitrogen atoms to oxygen atoms was about 0.4 or more. If so, it has been confirmed that a good copper plating layer 5 can be obtained.

Embodiment 3. In the embedded wiring manufacturing method according to the third embodiment of the present invention, the hole 3 is formed in the insulating layer 2 provided on the silicon substrate 1 in the same process as that of FIG.
To form. Subsequently, a barrier metal layer 4 made of a refractory metal nitride having a substantially stoichiometric composition is formed on the insulating layer 2 and on the inner wall of the hole 3 by, for example, the CVD method. The formation of the refractory metal nitride having a substantially stoichiometric composition is performed by optimizing the CVD conditions such as the flow rate ratio of Ar gas and N ₂ gas introduced into the CVD apparatus.

The barrier metal layer 4 made of a refractory metal nitride having a substantially stoichiometric composition is stable in the vicinity of the surface, and even if it is handled in the air, it is difficult for oxygen to be mixed into the barrier metal layer 4 and nitrogen is contained. The ratio of the number of atoms to the number of oxygen atoms is about 0.4 or more.

Then, steps similar to those shown in FIGS. 1C and 1D are performed to form copper-embedded wiring. It is preferable that the electroless plating step be performed immediately after the barrier metal 4 is formed.

Fourth Embodiment FIG. 4 is a process diagram of a method of manufacturing embedded wiring according to a fourth embodiment of the present invention,
4, the same reference numerals as those in FIG. 1 indicate the same or corresponding portions.
This manufacturing method includes the following steps 1 to 4.

Step 1: As shown in FIG. 4A, the insulating layer 2 provided on the silicon substrate 1 as in the first embodiment.
Then, the hole 3 is formed.

Step 2: As shown in FIG. 4B, a refractory metal containing titanium or cobalt as a main component (titanium, cobalt, or titanium) is formed on the surface of the insulating layer 2 and the inner wall of the hole 3. Barrier metal layer 14 made of cobalt alloy, etc.)
Are formed by the CVD method. These refractory metals are stable and are not particularly treated with nitrogen plasma.

Step 3: The silicon substrate 1 on which the barrier metal layer 4 is formed is dipped in a copper plating solution (not shown),
An electroless plating process (displacement plating process) is performed. As a result, as shown in FIG. 4C, the copper plating layer 5 is formed on the barrier metal layer 14 so as to fill the hole 3.

Step 4: As shown in FIG. 4D, the copper plating layer 5 and the barrier metal layer 14 are removed from the surface of the copper plating layer 5 by the CMP method, and the inside of the hole 3 of the insulating layer 2 is removed. Only, the copper plating layer 5 and the barrier metal layer 4 are left. As a result, the embedded wiring 30 using copper as the wiring material is completed.

As described above, the electroless plating process and the electrolytic plating process may be used together.

[0047]

As is apparent from the above description, in the electroless plating method according to the present invention, it is possible to fill in finer pores without using a catalyst layer, and to achieve high density and high integration. It becomes possible to form a multilayer wiring.

Further, it is possible to provide a high density and highly integrated multilayer wiring at a low cost.

[Brief description of drawings]

FIG. 1 is a manufacturing process diagram of a buried wiring according to a first embodiment of the present invention.

FIG. 2 is a manufacturing process diagram of another embedded wiring according to the first embodiment of the present invention.

FIG. 3 is a result of XPS analysis of a barrier metal layer.

FIG. 4 is a manufacturing process diagram of the embedded wiring according to the fourth embodiment of the present invention.

[Explanation of symbols]

1 silicon substrate, 2 insulating layer, 3 holes, 4, 14
Barrier metal layer, 5, 6 Copper plating layer, 10, 20, 3
0 Embedded wiring.

Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 21/88 B (72) Inventor Hiroyuki Sakagami 802 Doyomaru, Saijo-cho, Higashihiroshima-shi, Hiroshima 3-305 F-term ( (Reference) 4K022 AA01 AA37 AA41 BA08 BA35 CA08 CA28 DA03 4K044 AA11 AB10 BA06 BA18 BB03 BB04 BB10 BC14 CA13 CA14 CA15 CA18 4M104 AA01 BB04 BB13 BB14 BB16 BB17 DD37 DD52 DD43 DD22 DD43 DD32 DD18 DD43 DD16 DD BB32 DD39 DD16 CC36 DD78 FF17 FF18 FF22 HH08 HH12 HH14 5F033 HH11 HH15 HH17 HH18 HH19 HH20 HH21 HH32. QQ98 RR04 WW02 WW04 XX01 XX03 XX13 XX34

Claims (11)

[Claims] 1. A method for electroless plating copper, comprising the steps of preparing a substrate and forming a nitride film of a refractory metal, wherein the ratio of the number of nitrogen atoms to the number of oxygen atoms contained in the vicinity of the surface of the nitride film is high. Approximately 0.4
A nitride film forming step of forming the nitride film on the substrate, and immersing the substrate in a plating solution containing copper to replace the refractory metal contained in the nitride film with the copper. And a step of forming a copper plating layer on the nitride film. 2. The electroless plating method according to claim 1, wherein the atomic number ratio is within a range of approximately 5 nm in the depth direction from the surface of the nitride film. 3. The step of forming a nitride film after the nitride film of the refractory metal is formed on the substrate,
The electroless plating method according to claim 1, further comprising the step of irradiating the surface of the nitride film with nitrogen plasma. 4. The nitride film forming step, after forming the nitride film of the refractory metal on the substrate,
The electroless plating method according to claim 1, comprising a step of removing a surface layer of the nitride film. 5. The electroless plating method according to claim 1, wherein the nitride film forming step includes a step of depositing the nitride film having a substantially stoichiometric composition on the substrate. 6. A copper electroless plating method, which comprises: a step of preparing a substrate; a step of forming a refractory metal film containing titanium or cobalt as a main component on the substrate; and a plating solution containing copper. A step of immersing the substrate to replace the refractory metal contained in the refractory metal film with the copper to form a copper plating layer on the refractory metal film. Electrolytic plating method. 7. A method for forming a copper-embedded wiring, comprising: preparing a substrate; forming a hole in the substrate; and forming a nitride film of a refractory metal on an inner wall of the hole. A barrier metal layer forming step of forming a barrier metal layer which is included in the vicinity of the surface and has a ratio of the number of nitrogen atoms to oxygen atoms of about 0.4 or more; and immersing the substrate in a plating solution containing copper. And replacing the refractory metal contained in the barrier metal layer with the copper to form a copper plating layer on the barrier metal layer to form an embedded wiring. Forming method. 8. The embedded wiring according to claim 7, wherein the barrier metal layer forming step includes a step of irradiating the surface of the barrier metal layer with nitrogen plasma after forming the barrier metal layer. Forming method. 9. The embedding according to claim 7, further comprising the step of forming an electrolytic copper plating layer on the copper plating layer by using the copper plating layer as a seed layer. Wiring formation method. 10. A copper-embedded wiring, a substrate, a hole provided in the substrate, and a barrier metal layer made of a refractory metal nitride provided on an inner wall of the hole, A copper plating layer provided on the barrier metal layer to fill the hole, wherein the barrier metal layer has a ratio of the number of nitrogen atoms to oxygen atoms in the vicinity of the interface with the copper plating layer is approximately A buried wiring comprising a nitrogen stabilizing layer of 0.4 or more. 11. The film thickness of the nitrogen stabilizing layer is about 5 nm.
The embedded wiring according to claim 10, wherein: