JP2003142577A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method capable of preventing the increase of junction leakage and the increase of contact resistance. SOLUTION: The semiconductor device manufacturing method is provided with a process for forming a 1st inter-layer insulating film on a 1st conductive layer and forming a 1st aperture on the 1st inter-layer insulating film, a process for forming a 1st contact adhesion layer on the bottom of the 1st aperture, a process for forming a 2nd barrier metal layer by atomic layer deposition after forming a 1st barrier metal layer in the 1st aperture by sputtering, a process for forming a 1st plug in the 1st aperture, and a process for performing 1st heat processing. The method is provided also with a process for forming a 2nd inter-layer insulating film, a process for forming a 2nd aperture in the 2nd inter-layer insulating film, a process for forming a 2nd plug in the 2nd aperture, a process for performing 2nd heat processing, and a process for forming a 2nd conductive layer on the 2nd plug to form a semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device capable of reducing a junction leak in a contact portion between a substrate of a semiconductor device and a wiring, or a contact portion between wirings, and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, with the miniaturization of patterns of semiconductor integrated circuits, the increase in contact resistance in contact holes having a high aspect ratio has become serious. Generally, when the aspect ratio of the contact hole is high, it becomes difficult to embed the conductive layer in the contact hole with good coverage. As a result, a method of stacking two stages of contact holes has been proposed in order to prevent the contact resistance from increasing.

By forming the contact hole by dividing it into two, the aspect ratio of the contact hole in each stage becomes relatively low. Therefore, the coverage of the conductive layer in the contact hole can be improved. Hereinafter, this method will be described with reference to FIGS.

First, as shown in FIG. 8A, a first-level interlayer insulating film 202 made of, for example, silicon oxide is formed on a semiconductor substrate 201 made of, for example, silicon. A wiring layer made of metal may be used instead of the semiconductor substrate 201. Next, as shown in FIG. 8B, the first-stage interlayer insulating film 202 is etched to form a first-stage contact hole 203.

Next, as shown in FIG. 9C, a titanium nitride (TiN) layer 204, for example, is formed as a barrier metal layer on the interlayer insulating film 202 and in the contact hole 203. The TiN layer 204 can be formed by, for example, CVD. Specifically, titanium chloride (I
V) (TiCl ₄ ), using, for example, hydrogen (H ₂ ), argon (Ar) or a mixed gas thereof as a carrier gas, and nitrogen compounds such as nitrogen (N ₂ ) or ammonia (NH ₃ ). Perform CVD. According to CVD,
The TiN layer 204 can be formed with good coverage.

The TiN layer 204 has contact holes 20.
3 bottom semiconductor substrate 201 and contact hole 203
Adhesion with a plug metal embedded therein is enhanced, reaction between silicon in the semiconductor substrate 201 and the plug metal, or reaction between silicon contained in the interlayer insulating film 202 and the plug metal, and diffusion of the plug metal are prevented. It is provided for the purpose. Here, the TiN layer may be formed by sputtering instead of CVD.

Next, as shown in FIG. 9D, for example, C
A tungsten layer 205 is formed on the entire surface including the inside of the contact hole 203 by VD. Next, as shown in FIG. 9E, the entire surface is etched back, and the first-stage plug 206 made of tungsten is formed in the contact hole 203.
To form. Thereafter, for example, heat treatment at 600 ° C. or higher is performed to recover etching damage of the semiconductor substrate 201 or the plug 206, or to densify the interlayer insulating film 202. Through the above steps, the first-stage contact is formed.

Next, as shown in FIG. 10 (f), the second stage interlayer insulating film 2 made of, for example, silicon oxide is formed on the entire surface.
07 is formed. Next, as shown in FIG.
The interlayer insulating film 207 of the second step is etched to form a contact hole 208 of the second step. Next, FIG.
As shown in (h), on the interlayer insulating film 207 and in the contact hole 208, similar to the first step, for example, CVD.
Thus, the TiN layer 209 is formed as a barrier metal layer.

The TiN layer 209 has contact holes 20.
(8) To increase the adhesion between the bottom plug 206 and the plug metal embedded in the contact hole 208, and to prevent the reaction between silicon contained in the interlayer insulating film 207 and the plug metal and the diffusion of the plug metal. It is provided in. Here, as in the first step, the TiN layer can be formed by sputtering instead of CVD.

Next, as shown in FIG. 11 (i), the contact hole 208 is formed by CVD, for example, as in the first step.
A tungsten layer 210 is formed on the entire surface including the inside. Next, as shown in FIG. 12J, the second surface plug 211 is formed in the contact hole 208 by etching back the entire surface.

Next, for example, heat treatment at 600 ° C. or higher is performed to recover, for example, the etching damage of the plug 211, or the first-stage plug 206 and the second-stage plug 21.
1 is homogenized, or the interlayer insulating film 20
7 is densified. Through the above steps, the second-stage contact connected to the first-stage contact is formed.

Thereafter, as shown in FIG. 12K, a metal layer such as aluminum is formed on the entire surface, and then the metal layer is etched to form a wiring 212 connected to the plug 211. As described above, a contact hole having a high aspect ratio can be formed between the semiconductor substrate 201 (or lower layer wiring) and the upper layer wiring 212 without increasing the aspect ratio remarkably in the process.

[0013]

However, according to the above-described conventional method for manufacturing a semiconductor device, the TiN layer 204 is formed in the contact hole 203 by CVD and the plug 206 is formed, and then heat treatment is performed at, for example, 600 ° C. or higher. It has been found that when done, junction leakage increases.

On the other hand, TiN is formed in the contact hole 203.
When the layer is formed by sputtering, good coverage as in CVD cannot be obtained. Therefore, for example, as shown in FIG. 13A, the TiN layer 213 is formed with an overhanging cross-sectional shape.

When the TiN layer 13 is overhanged, as shown in FIG. 13B, the tungsten layer 214 is not sufficiently filled in the next step, and a void 215 is generated in the contact hole 203. It will be easier. Such a void 215 becomes a factor that aggravates the problem of electro-migration (EM).

The present invention has been made in view of the above problems, and therefore, the present invention is a method of manufacturing a semiconductor device capable of preventing an increase in junction leak and an increase in contact resistance even if a heat treatment is performed after forming a contact. The purpose is to provide. In addition, the present invention has less junction leakage,
An object is to provide a semiconductor device having low contact resistance.

[0017]

In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention comprises a step of forming a first interlayer insulating film on a first conductive layer, and a step of forming the first interlayer insulating film. Forming a first opening in the interlayer insulating film; forming a first adhesion layer at least on the bottom of the first opening; and forming the first adhesion layer in the first opening. Through,
Forming a first barrier metal layer by sputtering; forming a second barrier metal layer on the surface of the first barrier metal layer by ALD;
Forming a first plug made of a conductor in the opening of the first adhesion layer, the first barrier metal layer and the second barrier metal layer, and performing a first heat treatment. A step of forming a second interlayer insulating film on the first interlayer insulating film, and a step of forming the second interlayer insulating film on the first opening.
Forming a second opening in the interlayer insulating film, a step of forming a second plug made of a conductor in the second opening, a step of performing a second heat treatment, Forming a second conductive layer electrically connected to the first conductive layer via the first plug and the second plug on the second plug.

In the method for manufacturing a semiconductor device according to the present invention, preferably, after forming the second opening, before forming the second plug, at least a second portion is formed at the bottom of the second opening.
The step of forming a third barrier metal layer by sputtering through the second adhesion layer in the second opening, and a step of forming a third adhesion layer on the surface of the third barrier metal layer. And ALD to form a fourth barrier metal layer, wherein in the step of forming the second plug, the second adhesion layer and the third barrier metal are formed in the second opening. The second plug is formed through the layer and the fourth barrier metal layer.

Preferably, the step of forming the first adhesion layer includes the step of forming a titanium layer by CVD or sputtering. Preferably, the step of forming the second adhesion layer includes the step of forming a titanium layer by CVD or sputtering.

Preferably, both the step of forming the first barrier metal layer and the step of forming the second barrier metal layer include the step of forming a (111) oriented titanium nitride layer. Preferably, both the step of forming the third barrier metal layer and the step of forming the fourth barrier metal layer include the step of forming a (111) -oriented titanium nitride layer.

Preferably, the step of forming the first plug includes the step of forming a tungsten layer by CVD,
Etching the tungsten layer.
Preferably, the step of forming the second plug is CVD
And a step of etching the tungsten layer.

Preferably, the first adhesion layer is the first adhesion layer.
The barrier metal layer is formed to have a film thickness such that titanium nitride is (111) oriented. More preferably, the film thickness of the first adhesion layer is approximately 0.5 nm or more. Preferably, the second adhesion layer is formed to have a film thickness such that titanium nitride of the third barrier metal layer has (111) orientation. More preferably, the film thickness of the second adhesive layer is approximately 0.5 n.
It is m or more.

Preferably, the step of forming the first adhesion layer is parallel plate plasma CVD, ECR plasma CV.
D, ICP CVD or HDP CVD. Preferably, the step of forming the second adhesion layer is performed by parallel plate plasma CVD, ECR plasma CVD, ICP CV.
Includes D or HDP CVD.

Preferably, the step of forming the first barrier metal layer includes bias sputtering, long distance sputtering or self-ionized sputtering. Preferably, the step of forming the third barrier metal layer includes bias sputtering, long distance sputtering, or self-ionized sputtering.

In order to achieve the above object, the semiconductor device of the present invention reaches a conductive layer, an interlayer insulating film formed on the conductive layer, and the conductive layer formed on the interlayer insulating film. An opening, an adhesion layer formed at least at the bottom of the opening, a first barrier metal layer formed by sputtering in the opening via the adhesion layer, and a surface of the first barrier metal layer A second barrier metal layer formed by ALD, wherein the laminated film with the first barrier metal layer has a chlorine content of about 1% or less. Characterize. Preferably, the adhesion layer includes a titanium layer formed by CVD or sputtering, and the first and second barrier metal layers include a titanium nitride layer.

This makes it possible to form a barrier metal layer having a high barrier property against the diffusion of fluorine and a small diffusion of chlorine. Therefore, even if the heat treatment is performed after the formation of the first or second plug, an increase in junction leak at the contact portion can be prevented. Further, according to the semiconductor device and the method of manufacturing the same of the present invention described above, since the first barrier metal layer or the third barrier metal layer is formed via the adhesion layer, the barrier metal layer formed by sputtering is Coverage is improved. As a result, overhang of the barrier metal layer is prevented and voids are less likely to occur in the first or second plug, and electromigration is suppressed.

[0027]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a semiconductor device and a manufacturing method thereof according to the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1A is a sectional view showing a contact portion of a semiconductor device of this embodiment.

As shown in FIG. 1A, the semiconductor substrate 10
A first-stage interlayer insulating film 102 is formed on the first layer, and a first-stage contact hole 103 is formed in the interlayer insulating film 102. At the bottom of the contact hole 103, a Ti layer 104 is formed as an adhesion layer by, for example, CVD.

Contact hole 103 on Ti layer 104
As a barrier layer, for example, T is formed by sputtering.
The iN layer 105 is formed. A TiN layer 106 is further formed on the surface of the TiN layer 105 by ALD. In the contact hole 103, the TiN layer 105,
A first-stage plug 107 made of, for example, tungsten is embedded through 106.

A second-stage interlayer insulating film 108 is formed on the first-stage interlayer insulating film 102, and a second-stage contact hole 109 is formed in the interlayer insulating film 108. At the bottom of the contact hole 109, for example, CVD is used as an adhesion layer.
Thereby forming a Ti layer 110. In the contact hole 109 on the Ti layer 110, a TiN layer 111 is formed as a barrier layer by sputtering, for example. On the surface of the TiN layer 111, A
The iN layer 112 is formed.

The TiN layer 1 is formed in the contact hole 109.
2 made of, for example, tungsten through 11, 112
The plug 113 of the step is embedded. A wiring 114 connected to the plug 113 is formed on the second-layer interlayer insulating film 108.
Are formed. As described above, the semiconductor substrate 101
A contact hole having a high aspect ratio is formed between (or the lower layer wiring) and the upper layer wiring 114.

Next, a method of forming the above contact portion will be described. First, as shown in FIG. 1B, a first-level interlayer insulating film 102 made of, for example, silicon oxide is formed on a semiconductor substrate 101 made of, for example, silicon.
A wiring layer made of metal may be used instead of the semiconductor substrate 101.

Next, as shown in FIG. 2C, the first-stage interlayer insulating film 102 is etched using a resist (not shown) as a mask to form a first-stage contact hole 103. After that, for example, a natural oxide film or the like is removed, and dry etching or the like is appropriately performed in order to clean the inside of the contact hole 103. This dry etching is performed as a pretreatment for forming the Ti layer 104.

Next, as shown in FIG. 2D, for example, a Ti layer 104 is formed as an adhesion layer on the interlayer insulating film 102 and on the bottom of the contact hole 103. Ti layer 10
4 can be formed by CVD, for example. Specifically, CVD is performed using TiCl ₄ as a source gas and H ₂ , Ar, N ₂ or a mixed gas thereof as a carrier gas. By CVD, the Ti layer 104 can be formed with good coverage.

The Ti layer 104 has contact holes 103.
It is provided for the purpose of improving the adhesion between the bottom semiconductor substrate 101 and the plug metal embedded in the contact hole 103. Here, the Ti layer may be formed by sputtering instead of CVD. When the Ti layer is formed by sputtering, the Ti layer is formed not only on the interlayer insulating film 102 and the bottom of the contact hole 103 but also on the side surface of the contact hole 103.

Next, as shown in FIG. 2E, a TiN layer 105 is formed as a barrier metal layer by sputtering on the entire surface including the inside of the contact hole 103. Ti
The film thickness of the N layer 105 is, eg, 5 nm. TiN layer 10
By forming 5, the reaction between silicon in the semiconductor substrate 101 and the plug metal, or reaction between silicon contained in the interlayer insulating film 102 and the plug metal, and diffusion of the plug metal are prevented.

This sputtering can be bias sputtering, long distance sputtering or self-ionized sputtering. Bias sputtering is A excited by a bias.
Sputtering is performed by applying r or the like to a target.

The long distance sputtering is a kind of bias sputtering, in which the distance between the target and the wafer is set to be several times that of normal bias sputtering, and the component vertically incident on the wafer is increased. In self-ionized sputtering, Ar or the like excited by a bias or the like hits the target and the target itself is ionized, whereby sputtering is performed.

Next, as shown in FIG. 3F, a TiN layer 106 is further formed on the TiN layer 105 by ALD. The film forming conditions for this ALD will be described later. Next, FIG.
As shown in (g), the tungsten layer 115 is formed on the entire surface including the inside of the contact hole 103 by CVD, for example.

Next, as shown in FIG. 3H, the entire surface is etched back to form a first-stage plug 107 made of tungsten in the contact hole 103. Thereafter, for example, heat treatment at 600 ° C. or higher is performed to recover etching damage of the semiconductor substrate 101 or the plug 107, or to densify the interlayer insulating film 102.
Through the above steps, the first-stage contact is formed.

According to the method of manufacturing the semiconductor device of this embodiment, the TiN layer 105 is formed by sputtering, and then the TiN layer 106 is laminated by ALD. This prevents an increase in junction leak and an increase in contact resistance even when heat treatment is performed at 600 ° C. or higher after the formation of the first-stage plug 107.

When heat treatment is performed at 600 ° C. or higher after forming the plug 107, fluorine is generated from the plug metal tungsten. This is because tungsten fluoride (WF ₆ ) is used as a source gas in the CVD for forming the tungsten layer 115.

When the TiN layer 105 is formed by sputtering, the TiN layer is formed in the (111) orientation.
On the other hand, when the TiN layer is formed by CVD,
A TiN layer is formed with a (200) orientation. When the orientation state of TiN is different, the barrier property against fluorine generated by heat treatment is different. When the TiN layer 105 is formed by sputtering, it is possible to effectively prevent an increase in junction leak due to the diffusion of fluorine.

When the TiN layer 106 is formed by ALD, the orientation state is (11) of the underlying sputtering film.
1) The orientation is succeeded. Therefore, TiN
The laminated film of the layers 105 and 106 can effectively prevent an increase in junction leak due to fluorine diffusion, as compared with the TiN CVD film.

The TiN sputtering film and the CVD film are
Not only the barrier property against fluorine but also the chlorine content is different. The TiN CVD film contains about 3% chlorine. on the other hand,
Chlorine content of sputtered TiN film is 0%, TiN
The chlorine content of the ALD film is 1% or less. Therefore, in the laminated film of the TiN sputtering film and the ALD film, the chlorine content can be suppressed to 1% or less as a whole.

Chlorine contained in the TiN layer diffuses by heat treatment and attacks, for example, a defective portion of the semiconductor substrate 101. This also increases the junction leak. Therefore, in order to reduce the influence of chlorine diffusion, Ti
It is more preferable to use a sputtering film than to use a N CVD film.

As described above, the TiN layers 105 and 106 laminated by sputtering and ALD have a high barrier property against fluorine and are less likely to serve as a chlorine diffusion source, and therefore prevent an increase in junction leak due to heat treatment. It is valid. The TiN sputtering film and ALD film are
For example, EDX which is a kind of X-ray micro analyzer
It can be identified by measuring the chlorine content using (Energy dispersive X-ray spectrometer). Also, A
The LD film is amorphous, whereas the sputtering film is crystalline, which can also be identified by EDX.

Next, as shown in FIG. 4 (i),
For example, the second interlayer insulating film 108 made of silicon oxide
To form. Next, as shown in FIG. 4J, the second-level interlayer insulating film 108 is etched to form a second-level contact hole 109. Next, as shown in FIG. 5K, on the interlayer insulating film 108 and the contact hole 1
A Ti layer 110 is formed as an adhesion layer on the bottom of the substrate 09 by CVD, for example, as in the first step.

The Ti layer 110 has contact holes 109.
It is provided for the purpose of enhancing the adhesiveness between the bottom plug 107 and the plug metal embedded in the contact hole 109. Here, similarly to the first step, the Ti layer can be formed by sputtering instead of CVD. When the Ti layer is formed by sputtering, the interlayer insulating film 1
A Ti layer is formed on the side surface of the contact hole 109 as well as on the 08 and the bottom of the contact hole 109.

Next, as shown in FIG. 5L, a TiN layer 111 is formed on the entire surface including the inside of the contact hole 109 by sputtering. This sputtering is T
As in the case of forming the iN layer 105 (see FIG. 2E), bias sputtering, long distance sputtering, or self-ionized sputtering can be performed.

By forming the TiN layer 111, reaction between silicon contained in the interlayer insulating film 108 and the plug metal, diffusion of the plug metal, etc. are prevented. Further, similarly to the first step, the TiN layer 112 is formed on the TiN layer 111 by ALD. The film forming conditions for this ALD may be the same as the film forming conditions for the TiN layer 106.

Next, as shown in FIG. 6M, similarly to the first step, a tungsten layer 116 is formed on the entire surface including the inside of the contact hole 109 by CVD, for example. next,
As shown in FIG. 6N, the entire surface is etched back to form the second plug 113 in the contact hole 109.

Next, for example, heat treatment at 600 ° C. or higher is performed to recover, for example, the etching damage of the plug 113, the first-stage plug 107 and the second-stage plug 11
3 is homogenized, or the interlayer insulating film 10
8 is densified. Through the above steps, the second-stage contact connected to the first-stage contact is formed.

In the second stage, as in the first stage, Ti
By stacking the N sputtering film (TiN layer 111) and the ALD film (TiN layer 112), the influence of fluorine diffusion can be reduced and the diffusion of chlorine from TiN can be reduced. Therefore, even if a heat treatment at 600 ° C. or higher is performed after the formation of the second-stage plug 113, an increase in junction leak and an increase in contact resistance are prevented.

After that, as shown in FIG. 1A, a metal layer such as aluminum is formed on the entire surface, and then the metal layer is etched to form the wiring 114 connected to the plug 113. As described above, the semiconductor substrate 1 can be processed without raising the aspect ratio remarkably.
A contact hole with a high aspect ratio can be formed between 01 (or lower layer wiring) and the upper layer wiring 114.

When the TiN layers 106 and 112 are formed by ALD, the raw material may be supplied continuously or intermittently. The film forming conditions for continuously supplying the raw materials are, for example, TiCl ₄ liquid flow rate of 1
5 mgm, NH ₃ gas flow rate is 500 sccm, and substrate temperature is 680 ° C.

On the other hand, the film forming conditions for intermittently supplying the raw materials are, for example, the following two steps being repeated. In step 1, TiCl ₄ is supplied at a liquid flow rate of 20 mgm for 1 second. After that, the flow rate of nitrogen gas is 500 scc.
m for 10 seconds and purge. Step 2 is N
H ₃ is supplied at a gas flow rate of 500 sccm for 1 second. Then, nitrogen gas was supplied at a flow rate of 500 sccm for 10 seconds,
Purge.

FIG. 7 is a raw material supply timing chart under the film forming conditions. (1) shows step 1 and (2) shows step 2. When the raw materials are supplied intermittently, TiN
The film thickness of the layers 106 and 112 is a desired film thickness (for example, 5 nm)
Until, the steps 1 and 2 shown in FIG. 7 are repeated.

According to the method for manufacturing a semiconductor device of the present embodiment described above, the TiN layer 105 (or 11) is formed in the contact hole 103 (or 109) by sputtering.
After forming 1), the TiN layer 106 is further formed by ALD.
Since (or 112) is formed, the barrier property against the diffusion of fluorine is enhanced, and the diffusion of chlorine from the TiN layer can be reduced. Therefore, even if the heat treatment is performed after forming the plug, an increase in junction leak can be prevented.

According to the method for manufacturing a semiconductor device of the present embodiment, the TiN layer 105 is formed by sputtering.
Before forming (or 111), a Ti layer 104 (or 110) is formed as an adhesion layer by CVD. This improves the coverage of the TiN layer 105 (or 111) and prevents overhang of the barrier metal layer. Therefore, voids are less likely to occur in the tungsten layer that will be the plug, and electromigration is suppressed.

(Embodiment 2) In the method of manufacturing a semiconductor device of Embodiment 1, pretreatment etching before forming the Ti layer 104 of the first stage, formation of the Ti layer 104 by CVD, formation of the TiN layer 105 by sputtering. , And the formation of the TiN layer 106 by ALD can be continuously performed in the same apparatus.

Similarly, the second Ti layer 11 formed by CVD is used.
The formation of 0, the formation of the TiN layer 111 by sputtering, and the formation of the TiN layer 112 by ALD can be continuously performed in the same apparatus. TiN layer 1
After forming the 06 or TiN layer 112 by ALD,
The inside of the chamber was opened to the atmosphere, and then a tungsten layer to be a plug was formed.

In this case, as the CVD for forming the Ti layers 104 and 110, parallel plate type, ECR type, IC
P-type and HDP-type plasma CVD may be used. The Ti layer 104 (or 11) is formed by parallel plate plasma CVD.
0) is formed by, for example, a TiCl ₄ liquid flow rate of 50 mgm and an H ₂ gas flow rate of 3000 scc.
m, RF power is 300 W, pressure is 5 Torr, and substrate temperature is 650 ° C.

As described above, pretreatment etching before forming the Ti layer 104, formation of the Ti layer 104 by CVD, formation of the TiN layer 105 by sputtering, and formation of the TiN layer 106 by ALD are performed in the same apparatus. Also in the case of being continuously performed with, the increase in junction leak due to the heat treatment after the plug formation is suppressed. Similarly, the Ti layer 110 is formed by CVD, and the TiN layer 1 is formed by sputtering.
Even when the formation of 11 and the TiN layer 112 by ALD are continuously performed in the same apparatus, an increase in junction leak due to the heat treatment after the plug formation is suppressed.

According to the method of manufacturing a semiconductor device of the above-described embodiment of the present invention, after forming the plug in the contact portion,
For example, even when heat treatment is performed at 600 ° C. or higher, an increase in junction leak and an increase in contact resistance are prevented. Further, according to the method of manufacturing a semiconductor device of the present embodiment, a high aspect ratio is not provided between the semiconductor substrate 101 (or lower layer wiring) and the upper layer wiring 114 without increasing the aspect ratio remarkably in process. A contact hole can be formed.

The embodiments of the semiconductor device and the manufacturing method thereof according to the present invention are not limited to the above description. For example, Ti
The conditions for forming the layers and the TiN layer can be changed as appropriate. Also, 1
It is also possible to form the TiN layer only by the sputtering and ALD only on the contact of the second step and form the TiN layer on the contact of the second step only by the sputtering.
Besides, various modifications can be made without departing from the scope of the present invention.

[0067]

According to the method of manufacturing a semiconductor device of the present invention, even if heat treatment is performed after the formation of the plug, an increase in junction leak and an increase in contact resistance at the contact portion can be prevented. According to the semiconductor device of the present invention, the junction leak at the contact portion is suppressed and the contact resistance is reduced.

[Brief description of drawings]

FIG. 1A is a cross-sectional view of a contact portion formed by a method for manufacturing a semiconductor device according to the present invention.
(B) is sectional drawing which shows the manufacturing process of the manufacturing method of the semiconductor device of this invention.

2 (c) to 2 (e) are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device of the present invention, showing a process following FIG. 1 (b).

3 (f) to 3 (h) are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device of the present invention, showing a process following FIG. 2 (e).

4 (i) and 4 (j) are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device of the present invention, and FIG.
The process following is shown.

5 (k) and 5 (l) are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device of the present invention, and FIG.
The process following is shown.

6 (m) and 6 (n) are cross-sectional views showing a manufacturing process of a method for manufacturing a semiconductor device of the present invention, and FIG.
The process following is shown.

FIG. 7 is an example of a raw material supply timing chart when a TiN layer is formed by ALD in the method for manufacturing a semiconductor device of the present invention.

8A and 8B are cross-sectional views showing manufacturing steps of a conventional method for manufacturing a semiconductor device.

9 (c) to 9 (e) are cross-sectional views showing manufacturing steps of a conventional method for manufacturing a semiconductor device, showing steps following FIG. 8 (b).

10 (f) and 10 (g) are cross-sectional views showing manufacturing steps of a conventional method for manufacturing a semiconductor device.
The process following (e) is shown.

11 (h) and 11 (i) are cross-sectional views showing manufacturing steps of a conventional method for manufacturing a semiconductor device.
The process following (g) is shown.

12 (j) and 12 (k) are cross-sectional views showing manufacturing steps of a conventional method for manufacturing a semiconductor device.
The process following (i) is shown.

13A is a cross-sectional view showing a TiN layer formed in a contact hole in an overhang state, and FIG. 13B shows a state in which a void is generated in tungsten in the contact hole. FIG.

[Explanation of symbols]

101, 201 ... Semiconductor substrate, 102, 108, 20
2, 207 ... Interlayer insulating film, 103, 109, 203, 2
08 ... contact hole, 104, 110 ... Ti layer, 1
05, 106, 111, 112, 204, 209, 21
3 ... TiN layer, 107, 113, 206, 211 ... Plug, 114, 212 ... Wiring, 115, 116, 205,
210, 214 ... Tungsten layer, 215 ... Void.

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 4M104 BB02 BB14 BB37 CC01 DD08                       DD16 DD23 DD31 DD37 DD38                       DD43 DD65 DD78 DD83 FF18                       FF22 HH01 HH08 HH12 HH14                       HH15 HH20                 5F033 HH08 JJ18 JJ19 JJ33 KK01                       KK07 LL07 NN06 NN07 NN37                       PP06 PP12 PP15 PP17 PP33                       QQ08 QQ09 QQ11 QQ31 QQ37                       QQ73 QQ74 QQ92 QQ94 QQ98                       RR04 XX00 XX01 XX02 XX03                       XX04 XX05 XX09 XX13 XX28

Claims (20)

[Claims] 1. A step of forming a first interlayer insulating film on a first conductive layer, a step of forming a first opening in the first interlayer insulating film, and at least the first opening. A first adhesion layer on the bottom of the first barrier layer; a step of forming a first barrier metal layer by sputtering in the first opening through the first adhesion layer; On the surface of the metal layer, ALD (atomic l
a second deposition process) to form a second barrier metal layer, and a conductive layer is formed in the first opening through the first adhesion layer, the first barrier metal layer and the second barrier metal layer. A step of forming a first plug made of a body, a step of performing a first heat treatment, a step of forming a second interlayer insulating film on the first interlayer insulating film, and a step of forming the first opening on the first opening. Forming a second opening in the second interlayer insulating film, forming a second plug made of a conductor in the second opening, and performing a second heat treatment. A step of forming a second conductive layer electrically connected to the first conductive layer via the first plug and the second plug on at least the second plug. Manufacturing method. 2. A step of forming a second adhesion layer on at least a bottom portion of the second opening after forming the second opening and before forming the second plug; Forming a third barrier metal layer by sputtering through the second adhesive layer in the opening of the third barrier metal layer, and forming a fourth barrier metal layer on the surface of the third barrier metal layer by ALD.
And a step of forming the barrier metal layer, the step of forming the second plug, wherein the second adhesion layer, the third barrier metal layer, and the fourth barrier metal layer are formed in the second opening. Through the barrier metal layer of
The method for manufacturing a semiconductor device according to claim 1, wherein the plug is formed. 3. The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the first adhesion layer includes the step of forming a titanium layer by chemical vapor deposition (CVD). 4. The method for manufacturing a semiconductor device according to claim 1, wherein the step of forming the first adhesion layer includes the step of forming a titanium layer by sputtering. 5. The step of forming the second adhesion layer comprises CV
The method for manufacturing a semiconductor device according to claim 2, further comprising the step of forming a titanium layer by D. 6. The method of manufacturing a semiconductor device according to claim 2, wherein the step of forming the second adhesion layer includes the step of forming a titanium layer by sputtering. 7. The step of forming the first barrier metal layer and the step of forming the second barrier metal layer both include the step of forming a (111) -oriented titanium nitride layer. Of manufacturing a semiconductor device of. 8. The step of forming the third barrier metal layer and the step of forming the fourth barrier metal layer both include the step of forming a (111) -oriented titanium nitride layer. Of manufacturing a semiconductor device of. 9. The step of forming the first plug comprises CV
The method of manufacturing a semiconductor device according to claim 1, further comprising: a step of forming a tungsten layer by D; and a step of etching the tungsten layer. 10. The step of forming the second plug comprises C
The method of manufacturing a semiconductor device according to claim 2, further comprising: a step of forming a tungsten layer by VD; and a step of etching the tungsten layer. 11. The method of manufacturing a semiconductor device according to claim 7, wherein the first adhesion layer is formed with a film thickness such that titanium nitride of the first barrier metal layer is (111) oriented. 12. The film thickness of the first adhesion layer is approximately 0.5.
The method for manufacturing a semiconductor device according to claim 11, wherein the thickness is not less than nm. 13. The method of manufacturing a semiconductor device according to claim 8, wherein the second adhesion layer is formed with a film thickness such that titanium nitride of the third barrier metal layer is (111) oriented. 14. The film thickness of the second adhesion layer is about 0.5.
14. The method for manufacturing a semiconductor device according to claim 13, wherein the thickness is not less than nm. 15. The step of forming the first adhesion layer comprises parallel plate plasma CVD, ECR (electron cyclotron).
resonance) plasma CVD, ICP (inductively co
upled plasma (CVD) or HDP (high density plas)
The method for manufacturing a semiconductor device according to claim 3, which includes ma) CVD. 16. The step of forming the second adhesion layer comprises parallel plate plasma CVD, ECR plasma CVD, IC
The method for manufacturing a semiconductor device according to claim 5, which includes P CVD or HDP CVD. 17. The method of manufacturing a semiconductor device according to claim 1, wherein the step of forming the first barrier metal layer includes bias sputtering, long distance sputtering, or self-ionized sputtering. 18. The method of manufacturing a semiconductor device according to claim 2, wherein the step of forming the third barrier metal layer includes bias sputtering, long distance sputtering, or self-ionized sputtering. 19. A conductive layer, an interlayer insulating film formed on the conductive layer, an opening formed in the interlayer insulating film, the opening reaching the conductive layer, and formed at least at the bottom of the opening. An adhesion layer, a first barrier metal layer formed by sputtering in the opening via the adhesion layer, and a second barrier metal layer formed by ALD on the surface of the first barrier metal layer. And a second barrier metal layer in which the chlorine content of the laminated film with the first barrier metal layer is approximately 1% or less. 20. The semiconductor device according to claim 19, wherein the adhesion layer includes a titanium layer formed by CVD or sputtering, and the first and second barrier metal layers include a titanium nitride layer.