JP2003134303A - Image reading signal processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem wherein a circuit scale and power consumption are increased when constitution that two buffers are disposed on the output side of a low-pass filter is adopted. SOLUTION: When a DC voltage for canceling is applied, a capacitor 19 for DC regeneration in a double correlation sampling circuit 8 is served as a capacitor constituting the low-pass filter together with a resistor 16, thereby making a buffer unnecessary which is usually connected with a part between the low-pass filter 15 and the capacitor 19 for DC regeneration.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading signal processing apparatus which amplifies an image signal read by an image sensor and then samples and holds the amplified output.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing an entire image reading signal processing apparatus for time-sequentially extracting a plurality of image reading signals from an image sensor. In FIG. 4, 30 is an image sensor, 31A to 31M are dual correlation sampling circuits, 32A to 32M are sample and hold circuits, and 33A to 33A.
33M is a switch, 34 is a buffer, 35 is an output terminal,
A, B, and M are processing channels for one image reading signal.

Double correlation sampling circuits 31A-31M
Input the input bias voltage existing in a parasitic capacitance (not shown) on the input side before the image read signal is input from the image sensor 30, and then the image read signal is superimposed on the input bias voltage. It is a circuit for obtaining an output, when only an object is inputted, by amplifying only an amount (that is, an image reading signal) obtained by subtracting the previously inputted input bias voltage. The sample hold circuits 32A to 32M are
This is a circuit for holding the outputs of the double correlation sampling circuits 31A to 31M.

Taking the processing channel A as an example, first, an input signal (image reading signal) from a certain image reading element of the image sensor 30 is supplied to the double correlation sampling circuit 3.
It is amplified by 1 A and held by the sample hold circuit 32 A. In this way, the image sensor 3 is connected to the sample hold circuits 32A to 32M of the respective processing channels A to M.
The amplified output of the image reading signal from each image reading element of 0 is held, but when the switches 33A to 33M are sequentially turned on and taken out to the output terminal 35 via the buffer 34, the time-series signals in one column are obtained. Become.

The time-sequential signal is required to be continuously output as much as possible without a rest period. This is because if there is a rest period, it is necessary to control so that the next circuit will not take in data during the rest period, which makes the control troublesome. Also, if the pause period is provided, the clock frequency during the output period must be increased, and then it becomes necessary to widen the frequency band of the buffer at the final stage.

However, when trying to output continuously,
Problems occur in the sample hold circuit. This is because the sample-hold circuit cannot hold the next sampled data while outputting the held data. Therefore, if the same control signal is used to control sampling and sample hold in each processing channel, the output must be stopped during sampling. In order to avoid such a situation, it is considered that the sample hold circuit of each processing channel is duplicated. Hereinafter, the double correlation sampling circuit and the sample hold circuit will be described in order.

(Double Correlation Sampling Circuit) FIG. 2 is a diagram showing an example of a conventional double correlation sampling circuit.
In FIG. 2, 1 is an image sensor, 2 is a photodiode, 3 is a bias power source, 4 is a capacitor, 5 is a TFT (thin film transistor), 6 is a capacitor, 7 is an input signal line, 8 is a double correlation sampling circuit, and 9 is Reset switch, 10 is an input bias power supply, 11 is an operational amplifier, 12 is a switch, 13 and 14 are capacitors, 15 is a low-pass filter, 16 is a resistor, 17 is a capacitor, 18 is a buffer,
Reference numeral 19 is a DC regeneration capacitor, 20 is a switch, 21 is an output reference power source, 22 is a buffer, 23 is an output terminal, 24
Is a drive pulse generator.

The image sensor 1 is provided with a photodiode 2 having a cathode connected to the positive electrode of the bias power source 3 and an anode connected to the drain of the TFT 5, which detects light. Although only one photodiode 2 is drawn, many photodiodes 2 are actually provided. The capacitance 4 drawn on the anode of the photodiode 2 represents the total capacitance of the self capacitance of the photodiode 2 and the drain side parasitic capacitance of the TFT 5. Further, in the TFT 5, as indicated by the dotted line, there is a small amount of capacitance generated due to overlap with the gate between the gate and the drain D and between the gate and the source S. .
The capacitance 6 represents the total capacitance of the source-side parasitic capacitance of the TFT 5 and the input capacitance of the double correlation sampling circuit 8 composed of an IC.

The double correlation sampling circuit 8 is constructed as an IC, and each switch therein is an analog switch. The drive pulse generator 24 generates a pulse for controlling ON / OFF of the TFT 5 and each switch. An input bias power supply 10 is connected to the input signal line 7 via a reset switch 9. The operational amplifier 11 includes a switch 12 and a capacitor 13 as a negative feedback circuit,
When the switch 12 is turned on, the buffer (gain 1
When the switch 12 is turned off,
It operates as a gain amplifier determined by the capacitance ratio of the capacitors 14 and 13. The negative feedback circuit is duplicated
This is because the operational amplifier 11 performs double correlation sampling.

That is, first, the input bias voltage is input (first sampling), then the input bias voltage superposed with the image reading signal is input (second sampling), and the difference is amplified. To do.

(1) When the reset switch 9 is turned on for a certain period while the input TFT 5 for input bias voltage is turned off, the capacitor 6 is charged by the input bias power source ₁₀ and becomes the input bias voltage V ₁₀ . When the reset switch 9 is turned off and then the switch 12 is turned on, the operational amplifier 11 operates as a buffer, and its output voltage becomes a voltage obtained by adding the offset of the operational amplifier 11 itself to the input bias voltage V ₁₀ . The capacitor 14 at the inverting input terminal is charged to the same voltage by negative feedback. If the offset of the operational amplifier 11 itself is sufficiently small as compared with V ₁₀ , it can be ignored, so that the charging voltage of the capacitor 14 is equal to the input bias voltage V ₁₀ .

The output V _{10 of the} operational amplifier 11 is applied to the DC reproducing capacitor 19 via the low pass filter 15 and the buffer 18. At this time, the switch 20 is also turned on, and the output reference power source 21 is applied from the direction opposite to the DC reproducing capacitor 19. When the voltage of the output reference power source 21 is V ₂₁ , the voltage V ₁₀ -V ₂₁ is charged between the plates of the DC regeneration capacitor 19. After this, the switch 20 is turned off.

The low-pass filter 15 is provided to reduce noise. The cut-off frequency of the amplifier fluctuates somewhat due to manufacturing variations, parasitic capacitance, etc., so it is generally designed to have a larger margin than the specification. The operational amplifier 11 is also usually designed in that way. Therefore, noise outside the required band is also amplified, and it is necessary to reduce them.

The buffer 18 is provided to increase the impedance on the input side as viewed from the low pass filter 15 and to reduce the impedance on the output side as viewed from the DC reproducing capacitor 19. If buffer 18
Without it, the DC regeneration capacitor 19 is connected as the load of the low-pass filter 15, which may lower the cutoff frequency of the low-pass filter 15 and narrow the frequency band.

(2) A current flows according to the amount of light incident on the input photodiode 2 of the input bias voltage + the input signal, the capacitor 4 is charged, and this becomes the image reading signal ΔV. When the TFT 5 is turned on, the voltage V _{10 of the} capacitor 6 on which the image reading signal ΔV is superimposed is input to the operational amplifier 11. The amplification factor A ₁₁ of operational amplifier 11 if 100
If doubled, the output voltage becomes V ₁₀ + 100 × ΔV.

This is applied to the DC reproducing capacitor 19 via the low pass filter 15 and the buffer 18. The DC regeneration capacitor 19 has a voltage (V ₁₀ −
Since the voltage of V ₂₁ ) is charged, the voltage obtained by subtracting the voltage, that is, (V ₁₀ + 100 × ΔV) − (V ₁₀ −V ₂₁ ) = 100 × Δ
A voltage of V + V ₂₁ will be applied to the input of the buffer 22. Therefore, the output obtained at the output terminal 23 is 100 ×
It is ΔV + V ₂₁ .

FIG. 3 is a time chart in the image reading signal processing apparatus. The waveform of the solid line is the waveform when dark (when no light is incident), and the waveform of the one-dot chain line is the waveform when light is incident. The operation will be described below in time.

(1) From time t _{1 to} t ₂ time t ₁ , as shown in FIG. 3B, when the TFT gate drive signal is turned on, the gate signal leaks from the gate to the drain or the source. The feedthrough phenomenon occurs. The leaked signal (charge) causes the capacitance 6
The charging voltage of will rise accordingly. The fact that the waveform in FIG. 3C rises at time t ₁ like the waveform c-1 indicates the voltage (feedthrough voltage). When dark, the input is only the feedthrough voltage, but when light is incident, the input signal ΔV is superposed on the input signal ΔV to form a waveform indicated by a chain line.

The operational amplifier 11, including the feedthrough voltage, amplifies as shown in FIG. 3 (d). The output of the low-pass filter 15 to which the amplified output is input is shown in FIG.
As shown in (e), the output value of the operational amplifier 11 rises with a time constant.

(2) During the time t _{2 to} t ₄ time t ₂ , when the TFT gate drive signal is turned off as shown in FIG.
Since the same amount of electric charge as that leaking into the capacitor 6 leaks when turned on, the potential of the input signal line 7 is a voltage (feedthrough voltage) corresponding to the leaked electric charge, as shown in FIG. 3C. Only drops. The output waveform of the operational amplifier 11 also drops correspondingly. The output of the low pass filter 15 is
From the high value including the amplified value of the feedthrough voltage, the value decreases in accordance with the time constant toward the output value of the operational amplifier 11 that has disappeared.

The output from the output terminal 23 of FIG. 2 is sent to and held by a sample hold circuit (not shown). When sampled at the time t ₃ between time t ₂ ~t _4, obtained a value corresponding to the output E ₁ in the dark, when the light incidence has a value corresponding to the output E ₂ is obtained.

(3) Time t _{4 When the} reset switch 9 is turned on at time t ₄ , the input on the input signal line 7 is reset.

(Sample and Hold Circuit) FIG. 5 shows a conventional example in which the sample and hold circuit is doubled. In FIG. 5, 40 is a first sample and hold circuit, 41 is a second sample and hold circuit, 42 is an operational amplifier, 43 is a switch, 44 and 44B are capacitors, 45 and 46 are switches, 47 is a switch, 48 is a capacitor, 49 and 50 are switches, 51 is an operational amplifier, and 52 is an output terminal.
Each switch is composed of an analog switch such as a MOSFET.

The inverting input terminal (-) of the operational amplifier 42 is
It is connected to the output terminal of the operational amplifier 42 via the switch 43, and is also connected to a fixed potential (earth) via a circuit in which a capacitor 44 and a switch 45 are connected in this order.
The connection point between the capacitor 44 and the switch 45 is connected to the output terminal of the operational amplifier 42 via the switch 46. The output of the operational amplifier 42 is connected to the sample-hold capacitor 48 via the switch 47, and the connection point between them is connected to the input of the operational amplifier 51 via the switch 49. The operational amplifier 51 has an output terminal and an inverting input terminal (−) connected to each other and is operated as a buffer. The second sample and hold circuit 41 has the same configuration as the first sample and hold circuit 40.

The operation of the first sample and hold circuit 40 is as follows. The output from the double correlation sampling circuit is input to the input terminal 39. When only the input bias voltage is input to the double correlation sampling circuit, the switches 43 and 45 are turned on and the switches 46 and 47,
Turn off 49. Then, the operational amplifier 42 has 1
Since the negative feedback of 00% is applied, it operates as a buffer, and when the input bias voltage is V _i and the offset voltage of the operational amplifier 42 itself is V _io , the non-inverting input terminal (+).
A voltage having the same magnitude as V _i + V _io input to the above appears at the output of the operational amplifier 42. The capacitor 44 is charged to its voltage (V _i + V _io ).

Next, with the switches 43 and 45 turned off, the switches 46 and 47 turned on, and the switch 49 turned off, the output V _S from the double correlation sampling circuit when the image reading signal is input is input. Input to the terminal 39. Then, the input becomes V _S + V _i + V _io . When the output voltage of the operational amplifier 42 at this time is V _42, the charging voltage of the capacitor 44 to _{V 42 (V i + V io} ) the voltage obtained by adding (V ₄₂ + V
_i + _Vio ) is input to the inverting input terminal (-). The operational amplifier 42 operates so that the following equation is established. V _S + V _i + V _io = V ₄₂ + V _i + V _io Therefore, V ₄₂ = V _S , and when the switch 47 is turned on, the input signal V _S is charged in the capacitor 48 and sample-held.

The held voltage is taken out to the output terminal 52 via the operational amplifier 51 when the switch 49 is subsequently turned on. While the first sample hold circuit 40 is outputting, the second sample hold circuit 41 can be operated to hold the next data.

Note that, as conventional documents relating to the image reading signal processing device, there are, for example, JP-A-62-185458 and JP-A-62-135775.

[0029]

However, the above-mentioned conventional technique has the following problems. That is, in the double correlation sampling circuit of FIG. 2, since two buffers are provided on the output side of the low pass filter, the circuit scale becomes large and the power consumption increases. Specifically, as can be seen from FIG. 2, two buffers 1 are provided in the subsequent stage of the low-pass filter 15.
Although 8, 8 and 22 are provided, a large number of circuit elements are required to configure them, and power for operating them is required, resulting in high power consumption. Further, the buffer itself deteriorates linearity and generates noise in the first place, so it is better to reduce this.

An object of the present invention is to solve the above problems.

[0031]

In order to solve the above-mentioned problems, an image reading signal processing device according to the present invention has an input side
A low-pass filter including an amplification stage having a reset switch connected to an input bias power supply and resetting the input, and a first capacitor to which an output of the amplification stage is input and which is connected through a resistor and a first switch. A DC regeneration capacitor serially connected to the low-pass filter; a buffer-connected operational amplifier connected to the latter stage of the DC regeneration capacitor and having an output reference power source connected to the input side via a second switch; A switch that turns on the second switch when turning on the output reference power supply, turns off the first switch, and turns off the second switch otherwise and turns on the first switch. And a double correlation sampling circuit having a driving means.

In the image reading signal processing device having the above-mentioned configuration, the second switch is turned on when the output reference power source is turned on, the first switch is turned off, and the second switch is turned off otherwise. When the canceling DC voltage is applied by turning on the first switch, the DC reproducing capacitor is also used as a capacitor forming a low-pass filter. As a result, the buffer connected between the low-pass filter and the DC reproducing capacitor can be dispensed with, and the circuit scale and power consumption can be reduced.

[0033]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing a configuration example of a double correlation sampling circuit used in an image reading signal processing apparatus according to an embodiment of the present invention. The reference numerals correspond to those in FIG.
6 is a switch and 27 is a capacitor. The dual-correlation sampling circuit according to this configuration example has the above-mentioned problem, that is, it has a configuration in which two buffers are provided on the output side of the low-pass filter, so that the circuit scale becomes large and the power consumption increases. It was done to solve the problem.

In the conventional example (FIG. 2), the low-pass filter 1
As the capacitor constituting the capacitor 5, the capacitor 17 is always used regardless of whether only the input bias voltage is input or the input signal is superimposed. Therefore,
When the input bias voltage is input when the switch 20 is turned on, if the buffer 18 is not present, the DC regenerating capacitor 19 also acts as a capacitor that constitutes the low-pass filter 15 together with the capacitor 17, thus disturbing the cutoff frequency. I was sick.

The buffer 18 is inserted in order to prevent the capacity of the DC regenerating capacitor 19 from affecting the low-pass filter 15 side. However, in this embodiment, the switch 18 is inserted when the input bias voltage is input. 26
Is turned off to disconnect the capacitor 27, so that the DC regeneration capacitor 19 is also used as a capacitor for forming the low-pass filter 15. Therefore, buffer 1
It is no longer necessary to provide 8. The operation will be described below.

(1) Since the operation until the output V ₁₀ of the input operational amplifier 11 of the input bias voltage comes out is the same as that of the conventional example of FIG. 2, its explanation is omitted. When the input bias voltage is input, the switch 26 is turned off,
The switch 20 is turned on. A low-pass filter is constituted by the resistor 16 and the DC regeneration capacitor 19,
Noise is reduced. The electrode plates of the DC restorer capacitor 19, similar to the conventional, a voltage of V ₁₀ -V ₂₁ is charged. After this, the switch 20 is turned off.

(2) Input bias voltage + input of input signal At this time, the switch 26 is turned on and the switch 20 is already turned off. Therefore, the resistor 16 and the capacitor 27 form the low-pass filter 15. When the TFT 5 is turned on, the voltage V _{10 of the} capacitor 6 on which the image reading signal ΔV is superimposed is input to the operational amplifier 11. When the amplification degree A ₁₁ of operational amplifier 11 assumed as 100 times, the output voltage becomes V ₁₀ + 100 × ΔV. This is noise-reduced by the low-pass filter 15 having the above-mentioned configuration and is applied to the DC reproducing capacitor 19. The subsequent operation is similar to that of the conventional example.

As can be seen from the operation described above, in the image reading signal processing apparatus according to this embodiment, the capacitors forming the low-pass filter are different when the input bias voltage is input and when the input bias voltage + input signal is input. Therefore, the cutoff frequency can be different in each case. Incidentally, the input bias voltage is the voltage (V ₁₀ ) after the reset switch 9 is turned on, and since this is substantially constant, the voltage charged in the DC regeneration capacitor 19 is also substantially constant. Therefore, it is not necessary to make the time constant small. Based on this, the capacity of the DC regeneration capacitor 19 is made larger than that of the capacitor 27,
Since it does not matter if the time constant at this time is increased, random noise can be reduced in this way.

The switch 26 is turned on by the switch 2
The reason why it is explained after turning off 0 is to prevent the charging voltage (V ₁₀ −V ₂₁ ) of the DC regeneration capacitor 19 from changing. If the switch 20 is turned off after the switch 26 is turned on, there is a period in which both are turned on, and in that period, a closed circuit composed of the output reference power source 21, the DC regeneration capacitor 19 and the capacitor 27 is formed. I will end up. Then, the DC regeneration capacitor 19
Is discharged in this closed circuit and its charging voltage changes.

The reset switch 9 is composed of an analog switch using a MOSFET, and when turned on, the channel portion of the MOSFET functions as a resistor. Since thermionic noise (kTC noise) is generated from there, if the reset switch 9 is turned on between the input of the input bias voltage and the input of the input signal, the S / N ratio is greatly increased by this thermionic noise. Get worse. Therefore, it is necessary to turn on the reset switch 9 before inputting the input bias voltage.

When the switch 26 or the switch 20 is turned on while the TFT 5 is turned on, the output voltage of the operational amplifier 11 saturated by amplifying the voltage due to the feed-through causes the capacitor 27 or the DC regenerating capacitor. Since it takes a while for the battery 19 to be charged and returned to the original voltage, high speed operation cannot be performed. Therefore, T
It is desirable that both the switches 20 and 26 be turned off while the FT 5 is on. Input bias power supply 1
Although 0 and the output reference power supply 21 are provided separately, they may be shared depending on the operating conditions.

[0043]

As described above, the image reading signal processing device according to the present invention has the following effects. That is, the DC recovery capacitor in the double correlation sampling circuit is also used as a capacitor that constitutes a low pass filter when a DC voltage for cancellation is applied, so that it is connected between the low pass filter and the DC recovery capacitor. Since the existing buffer can be dispensed with, it is possible to reduce the circuit scale and power consumption.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration example of a double correlation sampling circuit used in an image reading signal processing device according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of a conventional double correlation sampling circuit.

FIG. 3 is a time chart of a conventional double correlation sampling circuit.

FIG. 4 is a diagram illustrating an entire image reading signal processing device that time-sequentially extracts a plurality of image reading signals from an image sensor.

FIG. 5 is a diagram showing a conventional example in which a sampling and holding circuit is doubled.

[Explanation of symbols]

1 ... Image sensor, 2 ... Photo diode, 3 ... Bias power supply, 4 ... Capacitance, 5 ... TFT, 6 ... Capacitance, 7 ... Input signal line, 8 ... Dual correlation sampling circuit, 9 ... Reset switch, 10 ... Input bias Power supply, 11 ... operational amplifier, 12 ... switch, 13, 14 ... capacitor, 15 ...
Low-pass filter, 16 ... Resistor, 17 ... Capacitor, 1
8 ... Buffer, 19 ... DC regeneration capacitor, 20 ... Switch, 21 ... Output reference power source, 22 ... Buffer, 23 ...
Output terminal, 24 ... Drive pulse generator, 26 ... Switch,
27 ... Capacitor, 30 ... Image sensor, 31A to 3
1M ... dual correlation sampling circuit, 32A-32M ... sample hold circuit, 33A-33M ... switch 33,
34 ... Buffer, 35 ... Output terminal, 39 ... Input terminal, 4
0A, 40B ... Dual correlation sampling circuit, 41A, 4
1B ... Sample and hold circuit, 42 ... Operational amplifier, 43
... switch, 44 ... capacitor, 45, 46 ... switch, 47 ... switch, 48 ... capacitor, 49, 50 ...
Switch, 51 ... Operational amplifier, 52 ... Output terminal

Claims (4)

[Claims] 1. An amplification stage having a reset switch connected to an input bias power supply and resetting the input on the input side, and an output of the amplification stage is input, and a first stage is connected to a resistor via a first switch. A low-pass filter composed of a capacitor, a direct-current regeneration capacitor connected in series with the low-pass filter, a direct-current regeneration capacitor connected downstream, and an output reference power source on the input side via a second switch. The connected buffer-connected operational amplifier and the second switch are turned on when the output reference power source is turned on, the first switch is turned off, and the second switch is turned off otherwise. An image reading signal processing apparatus comprising a double correlation sampling circuit having a switch driving means for turning on a switch. 2. The image reading signal processing apparatus according to claim 1, wherein the switch driving means turns on the first switch after turning off the second switch. 3. The image reading signal processing apparatus according to claim 1, wherein the reset switch resets before inputting an input bias voltage. 4. The image reading apparatus according to claim 1, wherein the switch driving means keeps both the first and second switches off during a period of inputting to the amplification stage. Signal processing device.