JP2003115769A - Error correcting device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize error correction in a simple configuration and with small decoding delay while sufficiently maintaining the error correcting capability. SOLUTION: A value to be calculated by multiplying the true value of prescribed Eb/N0 within a waterfall region in the characteristics of a turbo decoder 1 by a coefficient '4' is decided as a constant, and the constant is outputted from a constant outputting part 14. Then, demodulated data to be obtained by a demodulating part 13 are multiplied by the constant to be outputted by the constant outputting part 14 by a multiplier 15, and inputted to the turbo decoder 1. In this turbo decoder 1, the error correction decoding of the demodulated data multiplied by the constant in this way is operated by using a log map algorithm.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an error correction device used in a mobile phone or the like to correct an error in received data.

[0002]

2. Description of the Related Art FIG. 6 is a block diagram showing the structure of a conventional error correction device.

This error correction device has a turbo decoder 1 as a main element. The turbo decoder 1 is, as shown in FIG. 6, a log-map decoder 1
1, an interleaver 1b, a log map decoder 1c, and a deinterleaver 1d. Then, the turbo decoder 1 decodes the turbo code using the log map algorithm.

When performing error correction decoding using the log map algorithm, Eb / N _{0 in the} data to be processed affects the error correction ability. Eb represents the energy per bit, and N ₀ represents the noise level.

Therefore, as shown in FIG. 6, the conventional error correction device is provided with a dispersion calculator 2, an Eb / N ₀ converter 3, multipliers 4 and 5, and a delay buffer 6, where Eb /
Pre-processing is performed to enable proper decoding according to N ₀ .

The demodulated data received and demodulated is input to the dispersion calculator 2 and the delay buffer 6.
The variance calculator 2 obtains the variance of the demodulated data. Furthermore, the Eb / N ₀ conversion unit 3 obtains the true value of Eb / N ₀ based on the variance obtained by the variance calculation unit 2. Then, the Eb / N ₀ thus obtained is 4 in the multiplier 4.
Doubled.

On the other hand, the demodulated data input to the delay buffer 6, after being delayed in order to adjust the delay due to Eb / N ₀ conversion in distributed computing and Eb / N ₀ converter 3 at variance calculator 2 Is given to the multiplier 5. 4 × Eb / N ₀ obtained by the multiplier 4 is also given to the multiplier 5, and the multiplier 5 multiplies the demodulated data by 4 × Eb / N ₀ . In this way, the demodulated data is corrected based on its actual Eb / N ₀ value. The demodulated data after being multiplied by 4 × Eb / N ₀ is given to the turbo decoder 1.

Thus, the actual Eb / N ₀ is obtained,
The demodulated data is pre-processed by multiplying the demodulated data by a value that is four times that value. For this reason, a complicated pre-processing circuit as shown in FIG. 6 is required, resulting in an increase in circuit scale. Further, since the demodulated data is multiplied by 4 × Eb / N ₀ , the dynamic range of the input to the turbo decoder 1 becomes extremely wide, and the circuit scale of the turbo decoder 1 also increases to cope with this. Furthermore, the variance calculation in the variance calculator 2 and the Eb in the Eb / N ₀ converter 3
The decoding delay increases due to the delay caused by the / N ₀ conversion.

[0009]

As described above, the prior art is as follows.
Since the actual Eb / N ₀ is taken into consideration in the pre-processing performed prior to executing the decoding processing, there is a problem that the circuit scale and decoding delay increase.

The present invention has been made in consideration of such circumstances, and an object thereof is to perform error correction with a simple configuration and a small decoding delay while sufficiently maintaining the error correction capability. An object of the present invention is to provide an error correction device capable of performing the operation.

[0011]

To achieve the above object, a first aspect of the present invention relates to an error correction decoder using a log map algorithm, and an error correction decoder for data decoded by the error correction decoder. Energy per bit at the error correction decoder prior to input to the correction decoder /
And a multiplication means for multiplying a true value related to the energy / noise ratio in the waterfall region in a characteristic showing a relation between the noise ratio and the bit error rate by a predetermined constant determined by multiplying a predetermined coefficient.

By taking such means, the true value relating to the energy / noise ratio in the waterfall region in the characteristic showing the relationship between the energy / noise ratio per bit and the bit error rate in the error correction decoder. Is multiplied by a predetermined constant which is determined by multiplying by a predetermined coefficient, and then the data is input to the error correction decoder and is subjected to error correction decoding using a log map algorithm. Therefore, pre-processing is performed assuming that it is the energy / noise ratio in the waterfall region used for obtaining the constant without considering the actual energy / noise ratio in the data.

In order to achieve the above object, the second invention is such that an error correction decoder using a log map algorithm and data to be decoded by the error correction decoder are input to the error correction decoder. Prior to, by multiplying a true value regarding a predetermined energy / noise ratio in a waterfall region in a characteristic indicating a relationship between an energy / noise ratio per bit and a bit error rate in the error correction decoder by a predetermined coefficient. And a bit shift means for performing a bit shift by the number of bits corresponding to the exponent of a power of 2 closest to the determined value.

By taking such a measure, it is possible to obtain a true value regarding the predetermined energy / noise ratio in the waterfall region in the characteristic showing the relationship between the energy / noise ratio per bit and the bit error rate in the error correction decoder. The data after being bit-shifted by the number of bits corresponding to the exponent of a power of 2 that is the closest to the value determined by multiplying the value by a predetermined coefficient is input to the error correction decoder, and error correction is performed using the log map algorithm. Decryption is performed. Therefore, pre-processing is performed assuming that it is the energy / noise ratio in the waterfall region used to determine the constant without considering the actual energy / noise ratio in the data, and the pre-processing is It is performed by multiplication of a constant by bit shift.

In order to achieve the above object, a third aspect of the present invention is directed to an error correction decoder using a log map algorithm, and data to be decoded by the error correction decoder is input to the error correction decoder. Prior to this, a true coefficient relating to a predetermined energy / noise ratio in the waterfall region in the characteristic showing the relationship between the energy / noise ratio per bit and the bit error rate in the error correction decoder is given a predetermined coefficient. The automatic gain control means adjusts the level based on a predetermined reference value according to a predetermined number determined by multiplication.

By taking such means, the true value relating to the energy / noise ratio in the waterfall region in the characteristic showing the relationship between the energy / noise ratio per bit and the bit error rate in the error correction decoder. The data whose level has been adjusted based on a predetermined constant determined by multiplying by a predetermined coefficient is input to the error correction decoder, and error correction decoding is performed using a log map algorithm.
Therefore, the pre-processing is performed assuming that it is the energy / noise ratio in the waterfall region used to determine the constant without considering the actual energy / noise ratio in the data. Will be performed by level adjustment.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram of a receiver including an error correction device according to a first embodiment of the present invention. In FIG. 1, the same parts as those in FIG. 6 are designated by the same reference numerals.

As shown in FIG. 1, the receiver of this embodiment is
Turbo decoder 1, antenna 11, down converter 1
2, a demodulation unit 13, a constant output unit 14, and a multiplier 15.

A radio signal transmitted from a transmitter (not shown) is received by an antenna 11 and then the down converter 1
Entered in 2. In the down converter 12, the frequency of the signal received from the antenna 11 is down converted. Then, the signal thus down-converted is demodulated by the demodulation unit 13. The demodulated data obtained by this is input to the multiplier 15. In the multiplier 15,
The constant generated by the constant output unit 14 is separately input.
The constant output unit 14 is, for example, a register, and always outputs a single predetermined constant. The multiplier 15 multiplies the demodulated data by the constant output from the constant output unit 14. Then, the demodulated data after being multiplied by the constant is input to the turbo decoder 1.

The turbo decoder 1 comprises a log map decoder 1a, an interleaver 1b, a log map decoder 1c and a deinterleaver 1d. Then, the turbo decoder 1 sets the demodulated data provided from the multiplier 15 as a decoding target and performs the decoding using a log map algorithm.

Next, the constant output by the constant output unit 14 will be described.

FIG. 2 shows the error rate characteristic of the turbo decoder 1. In FIG. 2, the horizontal axis represents Eb / N ₀ and the vertical axis represents the bit error rate.

As shown in FIG. 2, the characteristics of the turbo decoder 1 include a waterfall region.
And the error floor area (error floor re
The area called gion) appears. In the waterfall region, the bit error rate greatly differs depending on the value of Eb / N ₀ . In the error floor area, the bit error rate does not change significantly even if the value of Eb / N ₀ is different.

The constant depends on the characteristics of the turbo decoder 1.
Eb / N in the waterfall region ₀Is arbitrarily selected,
That Eb / N₀The value obtained by multiplying the true value of by the coefficient "4"
To do. Note that Eb used for determining the constant in this way
/ N₀In the following, select Eb / N₀Called.

Specifically, the coding gain is set to "3" and 0.5 dB is selected as the selection Eb / N ₀ in the waterfall region of FIG. At this time, the constant to be output by the constant output unit 14 can be obtained as follows.

Constant = 4 × 10 ^{{[10 × log (1/3) +0.5] / 10}} = 1.496 When the quantization of the turbo decoder is considered, the value obtained by the above equation is multiplied by an integer. The value is a constant.

Thus, in the receiver of this embodiment, the demodulated data obtained by the demodulation unit 13 is subjected to preprocessing by the constant output from the constant output unit 14 being multiplied by the multiplier 15, and then the preprocessed data is obtained. Decoding is performed by the turbo decoder 1.

According to the present embodiment, Eb / N ₀ is considered to be constant at the selected Eb / N ₀ regardless of the actual value at that time, so the constant is the actual value at each time. It may be different from the value obtained by multiplying Eb / N ₀ (hereinafter, referred to as actual Eb / N ₀ ) by four. However, in the present embodiment, since the selected Eb / N ₀ is selected from within the waterfall region and the constant is determined, when the actual Eb / N ₀ is within the waterfall region, the selected Eb / N ₀ is selected.
And the actual Eb / N ₀ is small. Therefore, proper preprocessing is performed only by multiplying the constant, and sufficient error correction capability can be exhibited. When the actual Eb / N ₀ is in the error floor area, the difference between the selected Eb / N ₀ and the actual Eb / N ₀ is large, but when the actual Eb / N ₀ is within the error floor area, the original Eb / N ₀ is originally received. Since the state is good, sufficient error correction capability can be exhibited even if the preprocessing is somewhat unsuitable.

In this embodiment, since the preprocessing only multiplies the demodulated data by a constant, it is not necessary to obtain the actual Eb / N _0, and the circuit for it is not necessary. Further, since the processing delay for obtaining the actual Eb / N ₀ does not occur, it is not necessary to delay the demodulated data, the delay circuit can be eliminated, and the decoding delay can be minimized. . Moreover, the dynamic range of the signal input to the turbo decoder 1 does not increase.

That is, according to this embodiment, the actual Eb / N ₀
It is possible to exhibit sufficient error correction ability regardless of whether the data is in the waterfall area or the error floor area, and it is possible to realize it with a small decoding delay by a simple configuration. .

(Second Embodiment) FIG. 3 is a block diagram of a receiver including an error correction device according to a second embodiment of the present invention. In FIG. 3, the same parts as those in FIGS. 1 and 6 are designated by the same reference numerals.

As shown in FIG. 3, the receiver of this embodiment is
Turbo decoder 1, antenna 11, down converter 1
2, a demodulator 13 and a bit position converter 21.

The demodulated data obtained by the demodulator 13 is input to the bit position converter 21. The demodulated data supplied from the demodulation unit 13 to the bit position conversion unit 21 is 12
It consists of bit data. The bit position conversion unit 21
The number of bits of the demodulated data is converted by extracting 6 bits from 12 bits of the input demodulated data. In addition, the bit position conversion unit 21 sets the position in 12 bits of 6 bits to be extracted as the position according to a predetermined constant. Then, the demodulated data whose number of bits has been converted is input to the turbo decoder 1.

In the receiver of this embodiment having such a configuration, the bit position conversion unit 21 performs bit number conversion as preprocessing prior to decoding by the turbo decoder 1. This bit number conversion reduces the number of bits because the 12-bit data used for the processing in the demodulation unit 13 is redundant for the processing in the turbo decoder 1. Therefore, originally, the 6 bits at the position containing the most effective information for processing in the turbo decoder 1 are extracted, but in the present embodiment, the extraction position is shifted according to a constant.

Here, the constant is set to the power of 2 that is the closest to the value obtained as in the first embodiment. Then, if the constant is represented by 2 ⁿ , the bit position conversion unit 21 extracts the position shifted by n bits from the original extraction position. As a result, the multiplication of a constant is performed at the same time as the bit number conversion processing, and the same preprocessing as in the above-described first embodiment is performed.

Thus, according to this embodiment, the above-mentioned first
Similar to the embodiment, the actual Eb / N ₀Is waterpho
Error area or error floor area
It is possible to exert sufficient error correction capability
Moreover, with a simple configuration, it can be performed with a small decoding delay.
Can be realized.

Further, according to this embodiment, the constant output unit 1
4 and the multiplier 15 can be omitted, and the configuration can be further simplified. Moreover, in the present embodiment, since the bit shift for multiplying the constant is performed together with the bit number conversion, that is, the bit position conversion unit 21 is diverted, a circuit for performing the bit shift is newly added. It is not necessary and can be realized with a very simple configuration.

(Third Embodiment) FIG. 4 is a block diagram of a CDMA receiver including an error correction device according to a third embodiment of the present invention. In FIG. 4, the same parts as those in FIGS. 1 and 6 are designated by the same reference numerals.

As shown in FIG. 4, the receiver of this embodiment is
Turbo decoder 1, antenna 11, down converter 1
2, RF AGC 31, A / D converter 32, root roll-off filter 33, despreader 34, rake combiner 35, data extractor 36, AGC 37, first deinterleaver 38 and second deinterleaver 39.

The received signal after being down-converted by the down converter 12 is subjected to AGC by the RF AGC 31 so as to be adjusted to the optimum dynamic range as the input data of the A / D converter 32, and then to the A / D converter 32. Is entered. The received signal is digitized by the A / D converter 32, and converted into received data. Received data is route roll-off filter 3
The waveform is shaped in 3. The waveform-shaped received data is despread by the despreading unit 34 and converted from chip-based data to symbol-based data. The multi-path components are combined by the rake combining unit 35 in the received data converted into the symbol unit. Only the information bit sequence is extracted from the rake-combined received data by the data extraction unit 36. The amplitude of the information bit sequence extracted by the data extraction unit 36 is adjusted by the AGC 37 so that the dynamic range of the input bits of the turbo decoder 1 is optimized. The information bit sequence after being subjected to AGC is sequentially deinterleaved by the first deinterleaver 38 and the second deinterleaver 39. And the second
The information bit sequence deinterleaved by the deinterleaver 39 is input to the turbo decoder 1 as demodulated data.

By the way, in this embodiment, the reference value of the AGC 37 is determined based on the constants shown in the first embodiment. That is, when the signal point distance between the mark and the space in the data is “1”, the signal point distance between the mark and the space after the amplitude adjustment is “1.496 × 2”.
Determine the reference value so that.

Now, in the CDMA receiver of the present embodiment having such a configuration, the down converter 12, RF A
GC 31, A / D converter 32, root roll-off filter 33, despreader 34, rake combiner 35, data extractor 36, AGC 37, first deinterleaver 38.
Then, demodulation processing is performed by the second deinterleaver 39. At this time, in the AGC 37, the turbo decoder 1
The pre-processing for the decoding processing in (1) is also performed as follows.

FIG. 5 shows the probability of possible values on the vertical axis.
The horizontal axis shows the signal amplitude. That is, FIG. 5 shows a probability density distribution.

The received data is dispersed from the mark and space values due to fading and thermal noise. Therefore, as shown in FIG. 5, it has a distribution centering on the marks and spaces.

In the AGC 37, when the signal point distance between the mark and the space as shown in FIG. 5A is "1", the position of the mark and the space is ± as shown in FIG. 5B. Adjust to 1.496.

By doing so, according to the present embodiment, as in the first embodiment described above, it is sufficient even if the actual Eb / N ₀ is in either the waterfall area or the error floor area. The error correction capability can be exerted, and the simple configuration can realize it with a small decoding delay.

Further, according to this embodiment, the constant output unit 1
4 and the multiplier 15 can be omitted, and the configuration can be further simplified. Moreover, in the present embodiment, since the AGC 37 for performing the level adjustment as a part of the demodulation process is diverted to perform the preprocessing, it is not necessary to add a circuit for the preprocessing, which is very simple. This can be realized by the configuration.

The present invention is not limited to the above embodiments. For example, in each of the above-described embodiments, an error correction device that uses the turbo decoder 1 as an error correction decoder is illustrated, but if the error correction decoder is used for decoding using a log map algorithm, another type of error is used. The present invention can be applied to a correction device.

In the second embodiment, the bit position conversion unit 21 for converting the number of bits is diverted to perform the bit shift for multiplying the constant. However, a bit shift circuit is additionally provided. Good.

In the third embodiment, the AGC 37 for adjusting the level as a part of the demodulation process is diverted to perform the level adjustment as the pre-process for the error correction decoding. However, the pre-process for the error correction decoding is performed. You may make it separately provide AGC for.

In addition, various modifications can be made without departing from the scope of the present invention.

[0053]

According to the present invention, the true value relating to the energy / noise ratio in the waterfall region in the characteristic indicating the relationship between the energy / noise ratio per bit and the bit error rate in the error correction decoder is set to a predetermined value. Since the data after preprocessing based on a predetermined constant determined by multiplying the coefficient of is input to the error correction decoder to perform error correction decoding using the log map algorithm, the actual data The pre-processing is performed without considering the energy / noise ratio, assuming that the energy / noise ratio is within the waterfall region used for obtaining the constant, and as a result, the error correction capability is sufficiently improved. While maintaining the above, the error correction device has a simple configuration and is capable of performing error correction with a small decoding delay.

[Brief description of drawings]

FIG. 1 is a block diagram of a receiver including an error correction device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing an error rate characteristic of a turbo decoder 1.

FIG. 3 is a block diagram of a receiver including an error correction device according to a second embodiment of the present invention.

FIG. 4 is a block diagram of a CDMA receiver including an error correction device according to a third embodiment of the present invention.

FIG. 5 is a diagram showing a probability density distribution.

FIG. 6 is a block diagram of a conventional error correction device.

[Explanation of symbols]

1 ... Turbo decoder 1a ... Log map decoder 1b ... Interleaver 1c ... Log map decoder 1d ... Deinterleaver 11 ... Antenna 12 ... Down converter 13 ... Demodulation unit 14 ... Constant output section 15 ... Multiplier 21 ... Bit position conversion unit 31 ... RF AGC 32 ... A / D converter 33 ... Root roll-off filter 34 ... despreader 35 ... Lake synthesis section 36 ... Data sampling section 37 ... AGC 38 ... 1st deinterleaver 39 ... Second deinterleaver

Claims (4)

[Claims] 1. An error correction decoder using a log map algorithm, and data to be decoded by this error correction decoder, prior to being input to said error correction decoder, Multiplier means for multiplying a true value related to a predetermined energy / noise ratio in the waterfall region in a characteristic indicating a relationship between an energy / noise ratio per bit and a bit error rate by a predetermined constant determined by multiplying a predetermined coefficient. An error correction device provided with. 2. An error correction decoder using a log map algorithm, and a bit per bit of the error correction decoder before data to be decoded by the error correction decoder is input to the error correction decoder. Corresponding to the exponent of a power of 2 that is the closest to the value determined by multiplying the true value related to the predetermined energy / noise ratio in the waterfall region by the predetermined coefficient in the characteristic indicating the relationship between the energy / noise ratio and the bit error rate. An error correction device, comprising: a bit shift means for performing a bit shift by the number of bits to be set. 3. The bit shift means changes the bit position for performing the extraction in the bit number conversion means for converting the number of bits by extracting some bits of the data input to the error correction decoder. The error correction device according to claim 2, wherein the error correction device is realized by 4. An error correction decoder using a log map algorithm, and data to be decoded by this error correction decoder, prior to being input to said error correction decoder, A predetermined reference value according to a predetermined number determined by multiplying a true value related to a predetermined energy / noise ratio in the waterfall region by a predetermined coefficient in a characteristic indicating the relationship between the energy / noise ratio per bit and the bit error rate And an automatic gain control means for performing level adjustment based on the above.