JP2003115710A - Electronic component manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the unloaded Q-value and increase the capacitance so that neither crack nor gap, etc., occurs in a dielectric board, even if the number of electrodes laminated to be formed in a dielectric board increases, and characteristics can be stabilized to improve the production yield of electronic components such as laminated dielectric filters. SOLUTION: A ceramic paste 50 is formed on a fourth-eighth dielectric layers S4-S8 having electrode patterns Pt3-Pt12 on their respective first main planes, such that the paste 50 is formed on the entire first main plane of each of the fourth-eighth dielectric layers S4-S8 having the electrode patterns Pt3-Pt12 on their respective first main planes, except a part of the electrode patterns Pt3-Pt12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an electronic component, and is suitable for application to, for example, a method for manufacturing an electronic component configured by laminating a plurality of dielectric layers.

[0002]

2. Description of the Related Art Recently, with the diversification of wireless communication systems such as mobile phones, there has been an increasing demand for miniaturization and low loss of electronic components such as laminated dielectric filters.
Since miniaturization of the laminated dielectric filter shortens the resonator length, it is necessary to lower the frequency as in the case of lowering the frequency. Therefore, a structure is adopted in which the impedance of the resonator is changed halfway by changing the width of the resonance electrode halfway or by using the inner layer ground electrode.

Multilayer dielectric filter 1 having this structure
00 indicates the resonance electrode 10 whose one end is short-circuited to the ground electrode 104 in the dielectric substrate 102 as shown in FIG.
6 and inner layer ground electrodes 108 and 11 formed by sandwiching a dielectric layer so as to face the open end of the resonance electrode 106.
And 0 are formed.

When the size of the dielectric substrate 102 is reduced in response to the demand for miniaturization of the laminated dielectric filter 100,
: Decrease in unloaded Q value ,: Insufficient capacitance occurs,
There is a problem.

In order to improve this, for example, a coupling adjustment electrode for adjusting the degree of coupling between two resonators is arranged between the resonance electrodes arranged in the stacking direction (for example, Japanese Patent Laid-Open No. 11-2.
No. 66103), an input electrode connected to an input terminal via an input side resonator and a capacitance is arranged between two input side resonance electrodes arranged in the stacking direction, and an output side resonator and a capacitance are used. The output electrode connected to the output terminal is arranged between two output side resonance electrodes arranged in the stacking direction (see, for example, Japanese Patent Laid-Open No. 11-284406) to increase the capacitance. .

In order to reduce the loss, as shown in FIG. 7, a structure has been proposed in which a plurality of resonance electrodes 106a to 106c are arranged in the stacking direction to form one resonator. (See, for example, Japanese Patent Laid-Open No. 11-274807).

In the case of manufacturing such a laminated dielectric filter 100, as shown in FIG. 8, one or more dielectric layers (S1, S4) having an electrode pattern 112 formed on one main surface.
~ S8 and S10) and one or more dielectric layers (S2, S3 and S) having no electrode pattern 112 formed on one main surface.
9) is laminated to produce a ceramic laminate, and then the ceramic laminate is fired to produce the above-mentioned laminated dielectric filter 100.

[0008]

However, when a large number of electrodes to be formed in the dielectric substrate 102 are laminated for the purpose of improving the no-load Q value and increasing the electrostatic capacitance, a ceramic laminated body as a work becomes Distortion may occur during stacking due to the difference in thickness between a portion where a plurality of electrodes overlap and a portion where only the dielectric layer is present.

Further, in the dielectric substrate 102 formed by stacking and firing the dielectric layers, there is a problem that a gap is formed around the electrodes.

For example, when strain occurs during lamination, stress may occur due to the difference in the coefficient of thermal expansion between the electrode and the dielectric during subsequent firing, and cracks may occur inside the dielectric.

Further, when a gap is formed around the electrodes on the dielectric substrate 102, the permittivity decreases due to the gap, so that a required capacitance value cannot be obtained, which causes a characteristic variation.

The present invention has been made in consideration of the above problems, and a large number of electrodes to be formed are stacked in a dielectric substrate for the purpose of improving the no-load Q value and increasing the electrostatic capacitance. Also, the present invention provides a method for manufacturing an electronic component, which does not cause cracks or gaps inside the dielectric substrate, can stabilize the characteristics, and can improve the yield of electronic components such as a laminated dielectric filter. The purpose is to do.

[0013]

According to the present invention, among one or more dielectric layers, at least one dielectric layer is laminated with one or more dielectric layers having an electrode pattern formed on one main surface thereof. In a method for manufacturing an electronic component, which includes a step of producing a ceramic laminate and a step of firing the ceramic laminate, at least one of the one or more dielectric layers having an electrode pattern formed on the one main surface. The method is characterized by including a step of forming a ceramic paste so as to cover at least a peripheral portion of the electrode pattern formed on the dielectric layer. It is preferable that the ceramic paste is formed by printing. Each dielectric layer is formed by laminating one or more ceramic sheets.

That is, according to the present invention, a ceramic paste is formed on one or more dielectric layers having an electrode pattern formed on one main surface so as to cover the peripheral edge of the electrode pattern. Therefore, when a ceramic laminate is produced by laminating one or more dielectric layers having an electrode pattern formed on one main surface and one or more dielectric layers having no electrode pattern formed on one main surface, The paste relieves strain when the dielectric layers are laminated.

Further, when the ceramic laminate is manufactured, the paste is filled around the electrodes, and when the ceramic laminate is thereafter fired to form a dielectric substrate, a gap is formed around the electrodes. Will not occur.

As described above, in the present invention, the unloaded Q
Even if many electrodes to be formed in the dielectric substrate are stacked for the purpose of improving the value and increasing the capacitance, cracks and gaps do not occur inside the dielectric substrate and the characteristics are stabilized. Therefore, the yield of electronic components such as a laminated dielectric filter can be improved.

In the above manufacturing method, ceramic paste may be formed on all the dielectric layers having the electrode patterns. In this case, the strain at the time of stacking can be further alleviated, and no gap can be formed around all the electrodes.

The ceramic paste may be formed on the entire main surface of the dielectric layer, on which the ceramic paste is to be formed, except for a part of the electrode pattern. Although the paste is formed so as to cover at least the peripheral portion of the electrode pattern, in this manufacturing method, the portion of the electrode pattern excluding the peripheral portion is exposed. Due to the fluidity of the paste, the paste is thinly formed on the electrode pattern and thickly formed on the dielectric layer. That is, by forming the paste, there is almost no difference in thickness between a portion where a plurality of electrodes overlap and a portion where only the dielectric layer is present,
The strain that has occurred during lamination is greatly suppressed. Further, it is possible to surely eliminate the gap generated around the electrodes.

Further, the ceramic paste may be formed on the entire surface including the electrode pattern with respect to one main surface of the dielectric layer on which the ceramic paste is to be formed.

In this case, since the ceramic paste is interposed between the electrode pattern and the dielectric layer, it is possible to suppress the generation of gaps and distortions, and firmly bond the electrode and the dielectric layer through the paste. can do. Therefore, even if an electrode material having a low adhesion to the dielectric layer is used, the bonding between the electrode and the dielectric layer can be made sufficient.

Further, in the manufacturing method, the thickness of the paste formed on the electrode pattern among the ceramic paste formed on the one main surface of the dielectric layer is formed on other portions. It may be thinner than the thickness of the paste. Further, the ceramic paste may be formed by printing.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, an example of an embodiment in which a method of manufacturing an electronic component according to the present invention is applied to, for example, a laminated dielectric filter (hereinafter, simply referred to as a manufacturing method according to an embodiment)
Will be described with reference to FIGS.

First, a laminated dielectric filter 10 manufactured by the manufacturing method according to this embodiment will be described with reference to FIGS. 1 and 2.

As shown in FIG. 1, this laminated type dielectric filter 10 has a plurality of dielectric layers (S1 to S10: see FIG. 2) laminated and fired and integrated, and a ground electrode 12 is formed on the surface. The dielectric substrate 1 having the dielectric substrate 14
Two sets of resonators 16A and 16B are formed in the circuit 4. As shown in FIG. 2, the ground electrode 1 on the lower surface side
2b is formed not on the lower surface of the dielectric substrate 14 but on one main surface (upper surface) of the tenth dielectric layer S10.

Further, as shown in FIG. 1, the dielectric substrate 14
The input terminal 18 is formed on one side surface and the output terminal 20 is formed on the other side surface of the. Areas 22 and 24 for insulation (the exposed portion of the dielectric substrate 14) are provided between the input terminal 18 and the ground electrode 12 and between the output terminal 20 and the ground electrode 12, respectively.

Each of the resonators 16A and 16B has, for example, three resonance electrodes (26A, 28A, 30A) and (26B,
28B and 30B) are stacked in the stacking direction, and each resonance electrode (26A, 28A) and (2) in the stacking direction is formed.
8A, 30A), and (26B, 28B) and (2
A dielectric layer is interposed between each of 8B and 30B).

When the resonant electrodes (26A, 28A, 30A) and (26B, 28B, 30B) are resonant electrodes of ¼ wavelength, for example, as shown in FIG.
Of the resonance electrodes (26A, 28A, 30A) and (26B, 28B, 30B), the ground electrode 12 is formed on the surface where the resonance electrodes (26A, 28A, 30A) are exposed.
A structure in which one end of (A) and (26B, 28B, 30B) is short-circuited to the ground electrode 12 is adopted.

In this case, as shown in FIG. 2, the resonance electrodes (26A, 28A, 30A) and (26B, 28B,
30B) is capacitively coupled to the ground electrode 12 via the inner-layer ground electrodes 32A and 34A and 32B and 34B, so that the resonance electrodes (26A, 28A, 30A)
The electrical length of A) and (26B, 28B, 30B) can be shortened.

Specifically, the structure of the laminated dielectric filter 10 will be described with reference to FIG. 2. First, the dielectric substrate 14 is formed by sequentially laminating first to tenth dielectric layers S1 to S10. These first to tenth dielectric layers S1 to S10 are formed.
Each S10 is composed of one or a plurality of ceramic sheets.

The fifth to seventh dielectric layers S5 to S7
2 sets of resonance electrodes (26A, 28A)
A, 30A) and (26B, 28B, 30B) are formed.

On one main surface of the fourth dielectric layer S4, the input electrode 36 for connecting to the input terminal 18 via the input resonance electrode 26A and the capacitance, the output resonance electrode 26B and the capacitance. An output electrode 38 for connection to the output terminal 20 is formed through the, and inner layer ground electrodes 32A and 32B are further formed in positions including the open ends of the resonance electrodes 26A and 26B in a plan view. .

Inner layer ground electrodes 34A and 34B are respectively formed on one main surface of the eighth dielectric layer S8 at positions including the open ends of the resonance electrodes 30A and 30B in plan view.
Furthermore, a coupling adjustment electrode 40 for adjusting the degree of coupling between the resonators 16A and 16B is formed.

Here, a method of manufacturing the laminated dielectric filter 10, in particular, a method of manufacturing the first embodiment will be described with reference to FIGS. 3 and 4.

First, in step S101 of FIG.
Make a ceramic sheet. Here, in the laminated dielectric filter 10, since various electrodes are incorporated (built in) in the dielectric substrate 14, it is preferable to use those electrodes with low loss and low specific resistance.

As the dielectric used as the ceramic sheet, one having high reliability and a wide range of selection of dielectric constant, that is, a ceramic dielectric is preferable. in this case,
It is possible to effectively reduce the size of the laminated dielectric filter 10.

As a manufacturing method, after a paste of an electrode material is applied to a ceramic powder compact to form an electrode pattern, the compacts are laminated and fired to densify the inside of the conductor. It is desirable to integrate it with the ceramic dielectric in a laminated state.

When Ag-based or Cu-based conductors are used, the melting points of these conductors are low and it is difficult to co-fire with ordinary dielectric materials. Therefore, their melting points (1100 ° C. or less) are used. It is necessary to use a dielectric material that can be fired at lower temperatures.

Further, in view of the characteristics of the device as the microwave filter, a dielectric material is preferable so that the temperature characteristic (temperature coefficient) of the resonance frequency of the formed resonance circuit is ± 50 ppm / ° C. or less.

As such a dielectric material, for example,
-Jerlite glass powder and TiO ₂Powder and Nd₂Ti
₂O₇Glass-based materials such as mixtures with powder, BaO-T
iO ₂-Re₂O₃-Bi₂O₃System composition (Re: rare earth
Ingredients) with some glass-forming ingredients and glass powder added
Barium oxide-titanium oxide-neodymium oxide type
Electromagnetic composition powder with some glass powder added
There is.

As an example, the first to tenth dielectric layers S1 to S10 of the laminated dielectric filter 10 (for example, the dielectric constant ε) are used.
For r = 80), MgO (18 wt%)-Al _{2
O 3 (37wt%) - SiO} 2 (37wt%) - B 2 O
73 wt% of glass powder having a composition of ₃ (5 wt%)-TiO ₂ (3 wt%) and 17 wt% of commercially available TiO ₂ powder
And Nd ₂ Ti ₂ O ₇ powder 10 wt% are thoroughly mixed,
A mixed powder was obtained.

The Nd ₂ Ti ₂ O ₇ powder used was obtained by calcination of Nd ₂ O ₃ powder and TiO ₂ powder at 1200 ° C. and then pulverization.

Next, an acrylic organic binder, a plasticizer, toluene and an alcohol solvent were added to the mixed powder, and the mixture was sufficiently mixed with alumina cobblestone to form a slurry.
Then, using this slurry, a ceramic sheet having a thickness of 0.2 mm to 0.5 mm was produced by the doctor blade method.

Thereafter, in step S102 of FIG. 3, the first to tenth dielectric layers S1 to S are made of a single ceramic sheet or a plurality of ceramic sheets, respectively.
Make 10.

Next, in step S103, an electrode pattern is formed on one main surface of the required dielectric layer. The silver paste was used as an electrode-forming paste, and the electrode patterns of the silver paste were printed on one main surface of the required dielectric layer. Specifically, as shown in FIG. 4, the electrode pattern Pt1 of the ground electrode 12a on the upper surface side is formed on one main surface of the first dielectric layer S1, and the one main surface of the fourth dielectric layer S4 is formed. Electrode patterns Pt3 and Pt4 of the input electrode 36, the output electrode 38, and the inner layer ground electrodes 32A and 32B
Are formed respectively. In FIG. 4, the electrode patterns of the inner layer ground electrodes 32A and 32B and the coupling adjustment electrode 40 are not shown.

Further, the electrode patterns Pt5 and Pt6 of the resonance electrodes 26A and 26B are formed on one main surface of the fifth dielectric layer S5.
Are formed, and the electrode patterns Pt7 and Pt8 of the resonance electrodes 28A and 28B are also formed on one main surface of the sixth dielectric layer S6.
Are formed, and the electrode patterns Pt9 and Pt1 of the resonance electrodes 30A and 30B are also formed on one main surface of the seventh dielectric layer S7.
0 is formed.

Further, the electrode patterns Pt11 and Pt12 of the inner-layer ground electrodes 34A and 34B are formed on one main surface of the eighth dielectric layer S8, and the electrode patterns (not shown) of the coupling adjustment electrode 40 are formed, respectively. Then, the electrode pattern Pt13 of the ground electrode 12b on the lower surface side is formed on one main surface of the tenth dielectric layer S10.

Then, in step S104 of FIG. 3, the electrode patterns Pt3 to Pt except the ground electrode 12 are removed.
A ceramic paste 50 (hereinafter referred to as a ceramic paste) is formed by printing so as to cover at least the peripheral portion of t12 (see FIG. 4). In the first embodiment, the electrode pattern P is formed on each main surface of the dielectric layers S4 to S8 on which the electrode patterns Pt3 to Pt12 are formed.
The ceramic paste 50 is formed on the entire surface except each part of t3 to Pt12.

As a result, the electrode patterns Pt3 to Pt1 are formed.
The part of 2 excluding its peripheral portion is exposed to the outside. As the ceramic paste 50, it is preferable to use a paste made of the same material as the ceramic sheet. The electrode pattern P of the ground electrode 12a on the upper surface side
The ceramic paste 50 was not formed on t1, but the ceramic paste 50 was formed on the entire surface of the tenth dielectric layer S10 on which the electrode pattern Pt13 of the ground electrode 12b on the lower surface side was formed.

Then, in step S105, the first
~ The tenth dielectric layers S1 to S10 are laminated to produce a ceramic laminated body.

Then, in step S106, the ceramic laminate is fired at, for example, 900 ° C. to produce the dielectric substrate 14.

As described above, in the manufacturing method according to the first embodiment, the electrode patterns Pt3 to Pt1 are formed on one main surface.
Since the ceramic paste 50 is formed so as to cover the peripheral portions of the electrode patterns Pt3 to Pt12 on the fourth to eighth dielectric layers S4 to S8 on which No. 2 is formed, a ceramic laminated body is produced. In doing so, the ceramic paste 50 relaxes the strain when the dielectric layers are laminated.

Further, when the ceramic laminated body is manufactured,
When the ceramic paste 50 is filled around the electrode patterns Pt3 to Pt12, and thereafter, when the ceramic laminate is fired to form the dielectric substrate 14, no gap is formed around the electrodes.

As described above, in the first embodiment, even if many electrodes to be formed are stacked in the dielectric substrate 14 for the purpose of improving the no-load Q value and increasing the capacitance, No cracks or gaps are generated inside the dielectric substrate 14, the characteristics can be stabilized, and the yield of electronic components such as the laminated dielectric filter 10 can be improved.

In particular, all the dielectric layers (fourth to eighth dielectric layers S4 to Pt4) having the electrode patterns Pt3 to Pt12 formed thereon.
Since the ceramic paste 50 is formed in S8), it is possible to further alleviate the strain during lamination and to prevent the formation of gaps around all the electrodes.

Further, with respect to each one main surface of the fourth to eighth dielectric layers S4 to S8 on which the electrode patterns Pt3 to Pt12 are formed, the ceramic paste 50 is formed on the entire surface except a part of the electrode patterns Pt3 to Pt12. Therefore, the ceramic paste 50 is formed thin on the electrode patterns Pt3 to Pt12 and thick on the dielectric layer due to its fluidity. That is,
By forming the ceramic paste 50, there is almost no difference in thickness between a portion where a plurality of electrodes are overlapped and a portion where there is only a dielectric layer, and the strain that has occurred during stacking is significantly suppressed. Further, it is possible to surely eliminate the gap generated around the electrodes.

Next, a manufacturing method according to the second embodiment will be described with reference to FIG.

The manufacturing method according to the second embodiment is
The steps similar to those of the manufacturing method according to the first embodiment described above are performed, but as shown in FIG. 5, each electrode pattern P except the electrode pattern Pt1 of the ground electrode 12a on the upper surface side is used.
Dielectric layers S4 to S8 and S formed with t3 to Pt13
The electrode patterns Pt3 to Pt13 on one main surface
The difference is that the ceramic paste 50 is formed on the entire surface including.

In this case, since the ceramic paste 50 is interposed between the electrode pattern and the dielectric layer, it is possible not only to suppress the generation of gaps and distortions but also to firmly fix the electrode and the dielectric layer through the ceramic paste 50. Can be combined with. Therefore, even if an electrode material having a low adhesion to the dielectric layer is used, the bonding between the electrode and the dielectric layer can be made sufficient.

The method of manufacturing an electronic component according to the present invention is not limited to the above-described embodiment, and it goes without saying that various configurations can be adopted without departing from the gist of the present invention.

[0060]

As described above, according to the method of manufacturing an electronic component of the present invention, an electrode to be formed in the dielectric substrate is formed for the purpose of improving the no-load Q value and increasing the capacitance. Even if a large number of layers are laminated, cracks or gaps do not occur inside the dielectric substrate, the characteristics can be stabilized, and the yield of electronic components such as a laminated dielectric filter can be improved.

[Brief description of drawings]

FIG. 1 is a perspective view showing a laminated dielectric filter manufactured by a manufacturing method according to an embodiment.

FIG. 2 is an exploded perspective view showing a laminated dielectric filter.

FIG. 3 is a process block diagram showing the manufacturing method according to the first embodiment.

FIG. 4 is a diagram showing a stacked state in the manufacturing method according to the first embodiment.

FIG. 5 is a diagram showing a stacked state in the manufacturing method according to the second embodiment.

FIG. 6 is a vertical cross-sectional view showing a multilayer dielectric filter according to a proposed example.

FIG. 7 is a vertical cross-sectional view showing an improved structure of a multilayer dielectric filter according to a proposed example.

FIG. 8 is an explanatory diagram showing a laminated state in a method for manufacturing a laminated dielectric filter according to a proposed example.

[Explanation of symbols]

10 ... Multilayer Dielectric Filter 12, 12a-12
c ... Ground electrode 14 ... Dielectric substrate 16A, 16B ... Resonator 26A, 26B, 28A, 28B, 30A, 30B ... Resonance electrode 32A, 32B, 34A, 34B ... Inner layer ground electrode 36 ... Input electrode 38 ... Output electrode 40 ... Coupling adjustment electrode 50 ... Ceramic paste Pt1, Pt3 to Pt13 ... Electrode patterns S1 to S10 ... First to tenth dielectric layers

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yasuhiko Mizutani             2-56, Sudacho, Mizuho-ku, Nagoya-shi, Aichi             Inside Hon insulator Co., Ltd. (72) Inventor Takami Hirai             2-56, Sudacho, Mizuho-ku, Nagoya-shi, Aichi             Inside Hon insulator Co., Ltd. (72) Inventor Tainobu Saka             2-56, Sudacho, Mizuho-ku, Nagoya-shi, Aichi             Inside Hon insulator Co., Ltd. (72) Inventor Kazuyuki Mizuno             2-56, Sudacho, Mizuho-ku, Nagoya-shi, Aichi             Inside Hon insulator Co., Ltd. F-term (reference) 5J006 HB05 HB21 JA01 LA02 LA12                       LA28 NA04 NB07 NC03 NF03

Claims (6)

[Claims] 1. An electrode pattern formed on at least one main surface of at least one of the one or more dielectric layers.
In the method of manufacturing an electronic component, which includes the steps of laminating the above dielectric layers to produce a ceramic laminate and firing the ceramic laminate, one or more electrode patterns are formed on the one main surface. A method of manufacturing an electronic component, comprising: forming a ceramic paste so as to cover at least a peripheral portion of the electrode pattern formed on at least one of the dielectric layers. 2. The method of manufacturing an electronic component according to claim 1, wherein a ceramic paste is formed on all of the dielectric layers on which the electrode patterns are formed. 3. The method for manufacturing an electronic component according to claim 1, wherein the whole surface except a part of the electrode pattern is formed on one main surface of the dielectric layer on which the ceramic paste is to be formed. A method of manufacturing an electronic component, comprising forming the ceramic paste. 4. The method for manufacturing an electronic component according to claim 1, wherein the ceramic paste is formed on the entire main surface including the electrode pattern with respect to one main surface of the dielectric layer on which the ceramic paste is to be formed. A method for manufacturing an electronic component, which comprises forming a paste. 5. The method of manufacturing an electronic component according to claim 1, wherein the ceramic paste formed on one main surface of the dielectric layer is formed on the electrode pattern. The method for manufacturing an electronic component is characterized in that the thickness of the formed paste is thinner than the thickness of the paste formed in other portions. 6. The method of manufacturing an electronic component according to claim 1, wherein the ceramic paste is formed by printing.