JP2003110374A - Fet amplifier circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a stable FET amplifier circuit which has superior temperature characteristics. SOLUTION: The circuit is constituted, in such a way that the drain terminal D of a second FET 6 is connected to the source terminal S of a first FET 2, and a parallel circuit of a resistor 7 and a capacitor 8 is connected between the terminal D and the ground E. Since the resistor 7 functions as a DC feedback element, when an amplifying operation of the FET 2 is controlled by controlling the gate voltage of the FET 6, changes in the temperature in the amplifying operation is compensated, and a stable amplifier can be realized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of an FET amplifier circuit which can stably amplify a microwave band signal.

[0002]

2. Description of the Related Art Microwave band amplifier circuits that employ FETs (field effect transistors) as amplifier elements are widely used.

FIG. 3 is a circuit diagram showing a conventional FET amplifier circuit. An input terminal IN for high frequency signals is connected to a gate terminal G of an FET 2 via an input impedance matching circuit 1, and the gate terminal G is gate controlled. It is connected to the gate voltage bias supply terminal Vg via the circuit 3.

The source terminal S of the FET 2 is grounded, and the drain terminal D is connected to the output terminal OUT via the output impedance matching circuit 4 and the drain bias supply terminal Vd.

In the circuit configuration shown in FIG. 3, the microwave high frequency signal supplied to the input terminal IN is amplified according to the gate control voltage supplied from the gate bias supply terminal Vg through the gate control circuit 3. The amplified high frequency signal is taken out from the output terminal OUT.

Since the circuit configuration shown in FIG. 3 has a temperature characteristic peculiar to the FET 2, the output level changes according to changes in the ambient temperature and the like. Therefore, the output level can be made constant by monitoring the FET 2 or its ambient temperature and performing bias control in the gate control circuit 3 so that the FET 2 or its ambient temperature changes in an inverse function of the temperature change.

FIG. 4 is a circuit diagram showing another conventional FET amplifier circuit. The input terminal IN of a high frequency signal is connected to the gate terminal G of the FET 2 via the input impedance matching circuit 1, and the gate terminal G thereof is connected. Is connected to the gate bias supply terminal Vg.

The source terminal S of the FET 2 is grounded, and the drain terminal D thereof is the output impedance matching circuit 4.
And a drain bias supply terminal Vd via a drain control circuit 5.

In the circuit configuration shown in FIG. 4, the input terminal I
The microwave high-frequency signal supplied to N is amplified according to the drain bias voltage whose voltage is controlled by the drain control circuit 5 or the drain bias current whose current is controlled, and is extracted from the output terminal OUT.

Even in the circuit configuration shown in FIG. 4, although the output changes depending on the temperature, the amount of change in the drain current is relatively small with respect to the temperature change, so that it is said that relatively stable temperature characteristics can be obtained.

[0011]

As described above, in the conventional FET amplifying circuit shown in FIG. 3, when temperature compensation is performed to obtain a stable amplifying action, a temperature change is detected,
It is necessary to incorporate the temperature compensation control function of the inverse function, but when actually incorporating the temperature compensation function of the inverse function,
Since the configuration becomes complicated, improvement has been demanded.

In particular, by modularization, a multistage FET amplification circuit is formed in one module, and many such modules are often mounted and used in one device. It is not technically easy to incorporate the temperature compensation function into the bias control circuit in consideration of the temperature characteristics peculiar to each FET in the built-in use state, and improvement has been demanded.

The amplifier circuit of the FET shown in FIG.
Although it exhibits a relatively stable temperature characteristic, in the amplification control based on the drain current control, the input / output impedance of the FET 2 greatly changes with the change of the drain current, so that the impedance characteristics of the matching circuits 1 and 4 change. However, there is a problem that the frequency characteristic is deteriorated.

Further, in the FET amplifier circuit shown in FIG. 4, when the amplification control is performed by the drain voltage control,
Since a variable voltage source having a drain current driving function is separately required, the circuit configuration becomes large and it is not a practical solution.

Therefore, an object of the present invention is to provide an FET amplifier circuit having a stable temperature characteristic with a relatively simple structure.

[0016]

The present invention has been made to solve the above-mentioned conventional problems, and in an FET amplifier circuit, an input signal supplied to a gate terminal is amplified and output from a drain terminal. 1 FET and this 1st F
A drain terminal is connected to a source terminal of ET, the source is grounded to a second FET, and a parallel circuit of a resistor and a capacitor connected between the drain terminal of the second FET and ground is provided. The amplification of the input signal of the first FET is controlled by the signal supplied to the gate terminal of the second FET.

As described above, the FET amplifier circuit of the present invention is
The drain terminal D of the second FET is connected to the source terminal S of the first FET responsible for amplification, and the second terminal
Since the parallel circuit of the resistor and the capacitor is connected between the drain terminal of the second FET and the ground, the resistor connected between the drain terminal of the second FET and the ground is the first FET.
Since it functions as a bias voltage compensating circuit for compensating for temperature changes, stable high frequency amplification characteristics can be obtained.

[0018]

BEST MODE FOR CARRYING OUT THE INVENTION An embodiment of an FET amplifier circuit according to the present invention will be described in detail below with reference to FIGS. The same components as those shown in FIGS. 3 and 4 are designated by the same reference numerals, and detailed description thereof will be omitted.

Prior to the description of one embodiment of the present invention, in the above-mentioned conventional FET amplifier circuit, for example, in the circuit configuration shown in FIG. By connecting a parallel circuit between the source terminal S and the ground (earth), it is possible to obtain a current feedback action by the connected resistance and stabilize the circuit.

However, if a parallel circuit of a resistor and a capacitor is connected between the source terminal S of the FET 2 and the ground, the response sensitivity to temperature change becomes too high. In the state of being incorporated in the above, it is technically not easy to align the respective operating characteristics in order to ensure the matching between the respective circuits.

Also in the circuit configuration shown in FIG. 4, similarly, a parallel circuit of a resistor and a capacitor is connected between the source terminal S and the ground to obtain a current feedback action by the connected resistor. Although it may be possible to stabilize by using this method, a large variable voltage source of the drain current drive type is still required, which is not always an effective solution.

FIG. 1 shows a first FET amplifier circuit according to the present invention.
3 is a circuit diagram showing an embodiment of FIG.

That is, the input terminal IN for the high frequency signal is connected to the gate terminal G of the FET 2 which is the first FET via the input impedance matching circuit 1, and the gate terminal G is connected to the gate bias supply terminal Vg. There is.

The drain terminal D of the FET 2 is connected to the output terminal OUT via the output impedance matching circuit 4 and also connected to the drain bias supply terminal Vd.

The source terminal S of the FET2 which is the first FET is connected to the drain terminal D of the FET6 which is the second FET, and the FET6 is of the source S ground type, and between the drain terminal D and the ground. A parallel circuit including a resistor 7 and a capacitor 8 is connected.

In the circuit shown in FIG. 1, since the gate bias supply terminal Vg is connected to the gate terminal G of the FET 6 which is the second FET via the control circuit 3, the microwave supplied to the input terminal IN is supplied. The high frequency signal of the band is F
It is amplified by being controlled by the gate bias control voltage supplied to the gate terminal G via the control circuit 3 of the ET 6, and taken out from the output terminal OUT via the matching circuit 4.

At that time, the resistor 7 is F which is the first FET.
Since it acts as a negative feedback to the amplification of ET2, FE
When a temperature change occurs in the amplifying action of T2, it can be compensated in a direction of canceling it, and a stable amplified output can be taken out.

Since the capacitor 8 is connected between the source terminal S of the FET 2 and the ground E, the source terminal S is grounded for high frequencies such as microwave band.

As described above, the FE of the first embodiment
According to the T amplifier circuit, stable temperature compensation can be realized with a simple configuration in which one FET 6, a resistor 7 and a capacitor 8 are added.

Although the source terminal S of the FET 2 and the drain terminal D of the FET 6 are directly connected in the first embodiment, the source terminal S of the FET 2 and the FE are connected.
Similar effects can be obtained by connecting the drain terminal D of T6 through another resistor.

FIG. 2 shows the source terminal S of the FET 2 and the FET.
6 is a circuit diagram showing a second embodiment of the FET amplifier circuit of the present invention configured by connecting another resistor between the drain terminal D of FIG.

That is, as shown in FIG.
Since the other resistor 9 is connected between the source terminal S of the FET 6 and the drain terminal D of the FET 6, the other resistor 9 is
Since it acts as a buffer resistance against the amplifying operation of the FET2 which is the FET of the above, it is possible to obtain a more stable amplifying operation.

As described above, according to the FET amplifier circuit of the present invention, it is possible to obtain a stable amplification characteristic by compensating for a temperature change in a high frequency region with a simple structure. It is possible to exert a practically excellent effect that it is possible to obtain a stable output by suppressing variations in the output individually by adopting it in the modularization in which temperature compensation is difficult.

[0034]

As described above, according to the present invention, it is possible to provide an FET amplifier circuit which is excellent in practical use in which temperature change can be corrected and stable output characteristics can be obtained with a simple structure. it can.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of an FET amplifier circuit according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment of an FET amplifier circuit according to the present invention.

FIG. 3 is a circuit diagram showing a conventional FET amplifier circuit.

FIG. 4 is a circuit diagram showing another conventional FET amplifier circuit.

[Explanation of symbols]

1 Input impedance matching circuit 2 FET (first FET) 3 Gate voltage control circuit 4 Output impedance matching circuit 6 FET (second FET) 7 resistance 8 capacitors 9 Other resistance

   ─────────────────────────────────────────────────── ─── Continued front page    F term (reference) 5J090 AA01 CA02 FA10 FN06 FN10                       HA09 HA25 HA29 KA29 MA11                       MA21                 5J092 AA01 CA02 FA10 GR09 HA09                       HA25 HA29 KA29 MA11 MA21                 5J500 AA01 AC02 AF10 AH09 AH25                       AH29 AK29 AM11 AM21 NF06                       NF10 RG09

Claims (2)

[Claims] 1. A first FET which amplifies an input signal supplied to a gate terminal and outputs the amplified signal from a drain terminal, and a second FET whose source terminal is connected to the drain terminal and whose source is grounded. An FET and a parallel circuit of a resistor and a capacitor connected between the drain terminal of the second FET and the ground are provided, and amplification of an input signal of the first FET is applied to a gate terminal of the second FET. An FET amplifier circuit characterized by being controlled by a supplied signal. 2. The FET amplifier circuit according to claim 1, wherein a source terminal of the first FET is connected to a drain terminal of the second FET via a resistor.