JP2003101535A - Decoder - Google Patents

Abstract

PROBLEM TO BE SOLVED: To execute the settings by each frame by detecting the settings timing in the device which perform the decoding processing of the ciphered music data, because a microcomputer makes it possible to change the settings by each frame as the minimum unit of the music data. SOLUTION: This device is provided with a stream control circuit 108 which holds and controls the cipher frame input, an auxiliary data control circuit 109 which holds and controls the auxiliary data input, a header separation circuit 104 which inputs the cipher frame from the stream control circuit 108 and separates the cipher data and the header, a decoding circuit 105 which decodes the cipher data and generates the decoding data based on the auxiliary data from the auxiliary data control circuit 109, and a header combination circuit 106 which combines the decoding data and the header and generates the decoding frame. The stream control circuit 108 verifies that the decoding circuit 105 inputs the auxiliary data and is ready to decode them, and then outputs the cipher frame.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decryption apparatus for inputting encrypted data encrypted with a predetermined key together with management data for encryption and performing decryption processing.

[0002]

2. Description of the Related Art Recently, it is possible to prevent deterioration of image quality and sound quality due to aging of a recording medium by storing video data and music data as digital signals by a digital technology which has been rapidly progressing in recent years. Since digital signals can be easily edited and created using a personal computer or the like, digital devices and digital recording media have rapidly spread.

[0003] Further, due to the development and spread of Internet technology, a completely different business from the conventional business such as selling and selling products at stores has been launched. For example, selling and selling products on homepages on the Internet and distributing music. There is also a business of doing.

Further, voice compression / decompression technology is also in progress, which can compress the data amount to about 1/10 while maintaining the same tone quality as the original tone quality of digitized music data. If you use
The storage capacity for storing compressed music data is small, and in recent years, portable music reproducing devices using semiconductor memory have begun to become popular in the youth generation.

On the other hand, contrary to such convenience of digital technology, a copyright issue is taken up as a major issue.

When the music data is created by a digital signal, it is extremely easy to create exactly the same music data by copying the data. In other words, there is a possibility that a large amount of music data that is exactly the same as the original will be forged at low cost, which will inundate the market. If that becomes a reality, there will be a big problem that the copyright fees paid to artists and record companies will not be paid and the business of the music industry will not be established.

To cope with such a copyright problem, music data distributed on the Internet or music data ripped from a compact disc to a personal computer or the like can be reproduced only by a specific music reproducing device. There are those that have been subjected to encryption processing, and some that implement measures by recording information other than music data together with music data in order to limit the number of copies.

[0008] Here, a description will be given of a decryption device that encrypts music data using a predetermined key and decrypts and reproduces the music data from a recording medium that stores the encrypted music data and the predetermined key.

A conventional decoding device for a music reproducing device will be described with reference to FIGS.

FIG. 9 shows a process in which music data is compressed by a predetermined compression / expansion format and further encrypted by using a predetermined key. In the figure, music data 1001 is input to a compression circuit 1002, and a compressed frame sequence 1003 is input according to a predetermined compression / expansion format.
Is compressed. The compressed frame sequence 1003 includes compressed frames 0 to N, and each compressed frame is input to the encryption circuit 1004.

The encryption circuit 1004 uses the encryption key 1005 to perform encryption processing on the input compressed frame, and an encryption frame sequence 1006 composed of encryption frames 0 to N is generated. At the same time, information such as settings when the compressed frame is encrypted is generated as auxiliary data for each frame and output as an auxiliary data string 1007.

To return the generated cipher frame sequence 1006 to music data, the procedure described above may be reversed.

That is, the encrypted frame is decrypted using the auxiliary data to generate the compressed frame sequence 1003. The original music data 1001 is obtained by inputting this compressed frame sequence 1003 to the compression / expansion circuit 1002 and performing expansion processing.

FIG. 10 shows the structure of a compressed frame and a cipher frame, which is composed of a header part containing a special data pattern for detecting the beginning of each frame and a data part. The part includes an encrypted data part which is data obtained by performing an encryption process on the compressed data part, and the data part in the decryption frame has a decrypted data part which is data obtained by performing the decryption process on the encrypted data part.

The length of the compressed frame (data capacity) and the number of compressed frames depend on the format when the music data is compressed and the size of the music data.

FIG. 11 shows a block diagram of a decoding device according to the prior art, which is a recording medium 1201 and a microcomputer 120.
2, memory 1203, header separation circuit 1204, decoding circuit 1205, header combination circuit 1206, expansion circuit 120
It is composed of 7.

FIG. 12 is a timing chart showing a series of operations of the microcomputer and the conventional decoding apparatus. The operation of the decoding apparatus will be described with reference to this timing chart.

The microcomputer 1202 reads the cipher frame recorded in the recording medium 1201 and the data required for decrypting the cipher frame, and writes the data in the memory 1203. The microcomputer 1202 writes the data of the number of frames corresponding to the capacity of the memory 1203 into the memory 1203. Next, the microcomputer 1202 decodes the auxiliary data 0 into the decoding circuit 1
The information is input to 205, and the decryption circuit 1205 extracts the key information and the like necessary for the decryption processing and sets it, and prepares for performing the decryption processing.

The decoding circuit 1205 outputs a decoding preparation completion signal to the microcomputer 1202 when the preparation for the decoding processing is completed,
When detecting the input decryption preparation signal, the microcomputer 1202 outputs the cipher frame 0 corresponding to the auxiliary data 0 to the header separation circuit 1204. The header separation circuit 1204 separates the header portion of the input cipher frame 0, outputs the separated header portion to the header combining circuit 1206, and outputs the encrypted data portion following the header portion to the decryption circuit 1205. The decryption circuit 1205 decrypts the encrypted data portion input from the header separation circuit 1204 based on the auxiliary data 0 input from the microcomputer 1202. The decoded data part obtained by the decoding process is output to the header combining circuit 1206.

The header combining circuit 1206 combines the header portion input from the header separation circuit 1204 and the decoded data portion input from the decoding circuit 1205 again to obtain a decoded frame 0.
Is generated and output to the expansion circuit 1207. Expansion circuit 120
Reference numeral 7 decompresses the input decoded frame 0 according to the format when the music data is compressed, and outputs the music data obtained by the decompression process.

The header separation circuit 1204 outputs a header separation output completion signal to the microcomputer 1202 when the header part of the input cipher frame is output to the header combining circuit 1206 and the cipher data part is output to the decryption circuit 1205. When the microcomputer 1202 detects the header separation output completion signal, it reads the auxiliary data 1 stored in the memory 1203 and outputs it to the decoding circuit 1205.

The microcomputer 1202 uses the decoding circuit 12
When the decryption preparation completion signal input from 05 is detected, the cipher frame 1 held in the memory 1203 is read and output to the header separation circuit 1204.

The microcomputer 1202 repeats the above operation, and when the remaining amount of the cipher frame and the auxiliary data held in the memory 1203 is less than a predetermined value, the cipher frame is again stored in the storage medium 1201. Read auxiliary data.

[0024]

In the decoding device according to the above-mentioned prior art, the microcomputer 1202 writes the auxiliary data in the decoding circuit 1205 and the header separation circuit 120 is detected until the decoding ready signal input from the decoding circuit 1205 is detected.
It is not possible to output the cipher frame to No. 4.

After outputting the cipher frame to the header separation circuit 1204, the microcomputer 1202 decrypts the auxiliary data of the next cipher frame to be input until the header separation output completion signal input from the header separation circuit 1204 is detected. It cannot be output to the circuit 1205.

Therefore, the microcomputer 1202 has a decryption circuit 1205 and a header separation circuit 1204 for each encrypted frame.
It is necessary to wait for the signal indicating the completion of processing from the device, and after confirming the signal indicating the completion of processing, it is necessary to read the next cipher frame and auxiliary data from the memory 1203 and prepare for output.

The microcomputer 1202 has a memory 1203.
When the remaining amounts of the cipher frame and the auxiliary data in (1) are below a predetermined value, it is necessary to newly read the respective data from the recording medium 1201.

Moreover, since the microcomputer 1202 cannot grasp at which timing the input decoding preparation completion signal and the header separation output completion signal can be detected, no matter what timing each processing completion signal is detected, In order to prevent the music data from being interrupted, these processes must be given the highest priority.

As described above, since the microcomputer 1202 has a large amount of processing to be executed, the microcomputer 1202
A relatively high frequency clock is used as the operation clock input to 2 and always executes some processing.

In recent years, with the rapid spread of portable music reproducing devices, the condition required for such a reproducing device is long-time reproduction with a limited battery capacity. A music reproducing device using a compact disc or a mini disc as a recording medium required a driving device, but with the development of a music reproducing device using a semiconductor as a storage medium which does not require such a driving device, the size of the reproducing device is increased. Further downsizing is required.

[0031]

In order to solve the above-mentioned problems, according to the invention described in claims 1 and 2, the stream control means for holding and managing the input cipher frame and the input auxiliary data are provided. Auxiliary data control means for holding and managing, a cipher frame is input from the stream control means, a header separating means for separating the cipher data part and the header part, and auxiliary data is input from the auxiliary data control means. Decoding means for decoding the encrypted data part input from the header separating means to generate a decoded data part, and a header for combining the decoded data part input from the decoding means and the header part input from the header separating means to generate a decoded frame The stream control means includes a combining means and a decompression means for decompressing the input decoded frame according to the format when the decoded frame is compressed. After confirming that the stage is ready to input the auxiliary data and decrypt it, the microcomputer separates the encrypted frame and the auxiliary data into streams by using the decryption device that outputs the encrypted frame to the header separating means. Means and auxiliary data control means need only be written in each internal memory, and there is no need to detect each processing completion signal output for each cipher frame, and the load on the microcomputer is greatly reduced.

According to the third aspect of the present invention, the header separating means confirms that the decrypting means is ready to input and decrypt the auxiliary data, and then sends the encrypted data to the decrypting means. By using the decryption device that outputs the decryption unit, the encrypted data portion is input immediately after the preparation of the decryption means is completed, the time required for the decryption process can be shortened, and the time required for the decryption process can be reduced. You will be able to

According to the invention described in claim 4, the header combining means counts the number of generated decoded frames, and outputs a count end signal when the count value reaches a predetermined count value. In addition, by using a decryption device that stops the output of decrypted frames, it is possible to perform special processing that wants to decrypt and output only a predetermined number of encrypted frames without increasing the load on the microcomputer. It suffices to perform almost the same processing as the reproduction processing on the decoding device.

According to the invention described in claim 5, the header combining means counts the number of generated decoded frames, and outputs a count end signal when the count value reaches a predetermined count value. In addition, by using a decoding device that outputs a predetermined decoded frame and stops the output of the decoded frame immediately after that, when the header combining unit stops the output of the decoded frame, the input buffer of the decompression unit generates an underflow. However, by outputting a predetermined decoded frame in which the input buffer does not cause underflow, the problem can be avoided.

Further, according to the invention described in claim 6, the decryption means outputs the encrypted data portion inputted to the header combining means as it is without decrypting it, based on the auxiliary data inputted from the auxiliary data control means. By using the device, if you want to output the encrypted frame to the decompression means without performing the decryption process, simply add the data indicating that the decryption process will not be performed to the auxiliary data, and the decryption means will input from the auxiliary data. This can be realized by detecting that the encrypted data portion that has been input is not decrypted and outputting the input encrypted data portion to the header combining means without performing the decryption processing.

According to the seventh aspect of the invention, the header separating means outputs the encrypted data part to the header combining means instead of the decoding means based on the auxiliary data input from the auxiliary data control means. By using, if you want to output the encrypted frame without decryption processing, just write the data indicating that the decryption processing will not be performed in the auxiliary data, and the header separation means will make the encrypted data of the encrypted frame input from the auxiliary data. By determining not to decrypt the encrypted data portion and outputting the decrypted data portion to the header combining means instead of the decrypting means, the encrypted frame can be output without performing the decrypting processing, and the decrypting means can be provided. Since it is not used, power consumption can be reduced by stopping the operation of the decoding means.

According to the invention described in claim 8, the header combining means uses the decoding device which inputs the auxiliary data from the decoding means and outputs the auxiliary data to the expansion means in synchronization with the generated decoded frame, By including the information about the cipher frame in the auxiliary data, the microcomputer
The information is input / output in synchronization with the encryption frame and the decryption frame. In other words, when processing such as decoding processing and decompression processing is added, the means for carrying out the processing by writing the information necessary for the processing in auxiliary data need only carry out the processing based on that information. The microcomputer does not need to detect the processing timing and set the information, and the load on the microcomputer is greatly reduced.

Further, according to the invention described in claim 9, the header combining means counts the number of the generated decoded frames, and when the count value reaches a predetermined count value, a part of the auxiliary data is generated. By using the decoding device that rewrites and outputs, it is possible to detect that a predetermined number of decoded frames have been input from the input auxiliary data without inputting a new count end signal to the decompression means.

According to the invention described in claim 10,
When the microcomputer wants to change the predetermined count value by using the decoding device that obtains the count value from the auxiliary data input from the auxiliary data control means, the header combining means must detect and set the timing by some method. However, by including a predetermined count value in the auxiliary data, the microcomputer does not need to detect the timing to set, and the load can be reduced.

According to the invention described in claim 11,
The header separating unit outputs the encrypted frame to the decrypting unit without outputting the header portion to the header combining unit based on the content of the auxiliary data input from the auxiliary data control unit, and the header combining unit outputs the auxiliary data. By using a decryption device decryption device that outputs the decrypted data portion input from the decryption means to the decompression means as it is based on the content of the auxiliary data input from the data control means, there is no header portion and only the encrypted data portion is provided. When decrypting an encrypted frame,
By adding the fact that the header part does not exist in the encrypted frame to the auxiliary data, the microcomputer outputs the encrypted frame as it is to the decrypting device, the decrypting device decrypts the encrypted frame, and the header combining device decrypts it. The data input from the means can be directly output to the decompression means.

According to the invention described in claim 12,
The header combining means uses a decoding device that outputs a predetermined frame to the expansion means immediately after outputting the decoded frame based on the auxiliary data input from the auxiliary data control means, so that the final frame of the music data to be reproduced is expanded. Although the decompressor may decompress the data of the final frame and generate an underflow that cannot be played back without filling the input buffer of the means, a predetermined decoded frame that causes the input buffer to fill the underflow may be generated. By outputting, the underflow of the expansion means can be avoided.

[0042]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is a block diagram showing a configuration of a decoding apparatus according to Embodiment 1 of the present invention.

As shown in the figure, the recording medium 101, the microcomputer 102, the stream control circuit 108, the auxiliary data control circuit 109, the header separation circuit 104, the decoding circuit 105,
The header combining circuit 106 and the expansion circuit 107 are included.

That is, in the first embodiment, the stream control circuit 108 and the auxiliary data control circuit 109 realize the function of the memory 1203 of the conventional decoding device (FIG. 11) and the microcomputer processing for detecting each processing completion signal. Characterize.

FIG. 2 is a timing chart showing a series of operations of the microcomputer 102 and the present decoding device.

The header separation circuit 104 performs the same operation as the decoding device described in FIG. 11 according to the prior art, but since there are some differences, it will be briefly described.

Further, the decoding circuit 105 and the header combining circuit 1
The operation of 06, the decompression circuit 107, the stream control circuit 108, and the auxiliary data control circuit 109 will be described in detail.

The stream control circuit 108 has a built-in memory therein, holds the cipher frames input from the microcomputer 102 in the memory, and manages the number of cipher frames held in the internal memory. The internal memory has a capacity enough to hold a plurality of cipher frames.

The stream control circuit 108 includes the decoding circuit 1
When the decoding ready signal input from 05 is detected,
The cipher frame stored in the internal memory is stored in the FIFO (F
Output to the header separation circuit 104 according to the (first-In-First-Out) control. When the cryptographic frame is output, the decryption preparation completion signal input from the decryption circuit 105 is waited for again, and when the signal is detected, the next cryptographic frame is output. The stream control circuit 108 repeats such an operation.

The stream control circuit 108 outputs a cipher frame request signal to the microcomputer 102 when the number of cipher frames held in the internal memory is less than the value set by the microcomputer 102.

However, when the cipher frame is not written from the microcomputer 102 to the internal memory of the stream control circuit 108 and there is no cipher frame held, even if a decryption preparation completion signal input from the decryption circuit 105 is detected, the stream is not streamed. The control circuit 108 outputs nothing to the header separation circuit 104 and waits for the cipher frame writing from the microcomputer 102.

The auxiliary data control circuit 109 has a built-in memory, holds auxiliary data input from the microcomputer 102 in the internal memory, and manages the number of auxiliary data held in the internal memory. Header separation circuit 104
When the header separation output completion signal input from is detected, the auxiliary data held in the internal memory is stored in the FIFO (Firm).
Output to the decoding circuit 105 according to st-In-First-Out) control.

When the auxiliary data is output, the header separation output completion signal input from the header separation circuit 104 is waited again, and when the signal is detected, the next auxiliary data is output.
The auxiliary data control circuit 109 repeats such an operation.

When the number of auxiliary data stored in the internal memory of the auxiliary data control circuit 109 is lower than the value set by the microcomputer 102, the auxiliary data control circuit 10
Reference numeral 9 outputs an auxiliary data request signal to the microcomputer 102. However, if the auxiliary data is not written from the microcomputer 102 to the internal memory of the auxiliary data control circuit 109 and there is no auxiliary data held, even if the header separation output completion signal input from the stream control circuit 108 is detected, the auxiliary data is detected. The data control circuit 109 outputs nothing to the decoding circuit 105, and waits for writing auxiliary data from the microcomputer 102.

The decryption circuit 105 performs the same operation as that of the decryption device according to the prior art, and in addition to the decrypted data portion obtained by decrypting the encrypted data portion, the auxiliary data input from the auxiliary data control circuit 109, together with the header combining circuit 106.
Output to.

The header combining circuit 106 performs the same operation as that of the conventional decoding device, and in addition to the decoded frame generated from the header part and the decoded data part, the auxiliary data input from the decoding circuit 105 to the expansion circuit 107. Output.

The expansion circuit 107 is a header combination circuit 106.
The decoded frame is decompressed based on the setting related to the decompression process described in the auxiliary data input from the device to reproduce the music data.

Next, the operation of the series of decoding devices including the operation of the microcomputer 102 will be described with reference to FIG.

First, the microcomputer 102 reads the cipher frame and auxiliary data necessary for decryption from the recording medium 101 and writes them in the internal memories of the stream control circuit 108 and the auxiliary data control circuit 109, respectively. At this time, since the microcomputer writes the number of cipher frames and the number of auxiliary data according to the capacity of each internal memory, the remaining amount of data becomes approximately equal to the capacity of the internal memory.

The auxiliary data control circuit 109 is the decoding circuit 1
Auxiliary data to 05, and decoding circuit 10
5 outputs a decoding preparation completion signal to the stream control circuit 108 after setting for decoding processing based on the input auxiliary data. The stream control circuit 108 that has detected the decryption preparation completion signal outputs the cipher frame to the header separation circuit 104, and the header separation circuit 104 separates the cipher frame into a header part and an encrypted data part.

The decoding circuit 105 is a header separation circuit 104.
The encrypted data portion input from the device is decrypted to obtain the decrypted data portion, and the header combining circuit 106 and the auxiliary data
Is output to.

The header combining circuit 106 has a header separation circuit 1
The header section input from 04 and the decoded data section input from the decoding circuit 105 are combined to generate a decoded frame. Then, the input auxiliary data and the decoded frame are decompressed by the decompression circuit 10
Output to 7.

The header separation circuit 104 outputs a header separation output completion signal to the auxiliary data control circuit 109 immediately after the cipher frame is separated and output to the decryption circuit 105 and the header combination circuit 106.

Then, again, the auxiliary data control circuit 104 outputs the auxiliary data to the decryption circuit 105 to start the preparation for the decryption process of the next cipher frame.

As described above, the decryption process of the cipher frame is repeatedly performed without intervening the process by the microcomputer 102.

However, when the remaining amount of data held in the internal memory of the stream control circuit 108 or the auxiliary data control circuit 109 is lower than a predetermined value (threshold value), the cipher frame is sent to the microcomputer 102. Outputs a request signal and an auxiliary data request signal.

Then, the microcomputer 102, to which these request signals are input, reads the data corresponding to the request signal from the recording medium 101, writes the data in the respective internal memories, until the remaining amount of data becomes equal to the capacity of the internal memory. Continue the write operation.

As described above, the stream control circuit 108
By providing the auxiliary data control circuit 109 and the auxiliary data control circuit 109, the microcomputer 102 writes an encryption frame corresponding to the capacity of each internal memory and auxiliary data, and the auxiliary data control circuit 109 sets the key necessary for the decryption processing. The stream control circuit 108 outputs the encrypted frame to the header separation circuit 104.

Therefore, the microcomputer 102 does not have to load the auxiliary data for each cipher frame while detecting the timing, and the stream control circuit 108 is eliminated.
Processing for reading an encrypted frame from the recording medium 101 and writing it in the internal memory when an auxiliary data request signal input when the data held in the internal memory of the device is lower than a set value is detected, and an auxiliary data control circuit. 1
When the sector information request signal input when the data held in the internal memory 09 is below the set value, auxiliary data is read from the recording medium 101 and written in the internal memory. It will be.

Since the auxiliary data is output to the decompression circuit 107 in synchronization with the decoded frame, even if the microcomputer 102 wants the decompression circuit 107 to perform a specific decompression process on a specific decoded frame, the specification Even if it is not necessary to grasp the timing at which the decoded frame of # 1 is expanded, it can be easily realized by including the setting data for the expansion circuit 107 in the corresponding auxiliary data in advance.

In the decryption device according to the first embodiment of the present invention, only the case where the decryption process is performed has been described. However, the setting that the microcomputer 102 does not decrypt the corresponding encrypted frame is additionally added to the auxiliary data. When the auxiliary data is input, the decryption circuit 105 outputs the corresponding encrypted data portion input from the header separation circuit 104 to the header combination circuit 106 as it is without performing the decryption processing, and is recorded on the recording medium 101. It is possible to normally reproduce the music data even if the music data is the music data compressed in a certain format but not encrypted.

In the decryption device according to the first embodiment of the present invention, only the case where the decryption process is performed has been described. However, the setting that the microcomputer 102 performs the encryption process on the corresponding encryption frame for the auxiliary data is added. If the auxiliary data is input, the decryption circuit 105 can perform the encryption process on the corresponding encrypted data portion input from the header separation circuit 104 and output it to the header combination circuit 106.

(Second Embodiment) FIG. 3 is a block diagram showing a configuration of a decoding apparatus according to the second embodiment of the present invention.

As shown in the figure, the recording medium 301, the microcomputer 302, the stream control circuit 308, the auxiliary data control circuit 309, the header separation circuit 304, the decoding circuit 305,
The header combining circuit 306, the expansion circuit 307, and the input selector 310 are included.

That is, in the second embodiment of the present invention, the decrypted data section output from the decryption circuit 305 and the encrypted data section output from the header separation circuit 304 are selected by the input select signal output from the header separation circuit 304. , Header output circuit 306.

Decoding circuit 305, header combining circuit 306,
The decompression circuit 307, the stream control circuit 108, and the auxiliary data control circuit 109 perform the same operations as those of the decoding device according to the first embodiment of the present invention, and therefore their explanations are omitted.

Therefore, the operation of the header separation circuit 304 and the input selector 310 will be described here.

The header separation circuit 304 separates the encrypted frame input from the stream control circuit 308 into a header part and an encrypted data part. Further, it detects whether or not the setting data that does not perform the decryption processing of the encrypted frame corresponding to the auxiliary data input from the auxiliary data control circuit 309 is included, and generates and outputs the input data switching signal according to the result. To do.

The input selector 310 is a 2-input / 1-output selector, and uses the input data switching signal output from the header separation circuit 304 as a control signal. When the auxiliary data is set to perform the decoding process, the decoded data section input from the decoding circuit 305 is output to the header combining circuit 306,
If the auxiliary data has a setting that does not perform decryption processing,
The encrypted data portion input from the header separation circuit 304 is output to the header combination circuit 306.

The header combining circuit 306 is the input selector 31.
The data input from 0 and the header portion input from the header separation circuit 304 are combined and output to the expansion circuit 307.

As described above, the auxiliary data is input to the header separation circuit 304, the input data switching signal is output, and the input signal of the header combination circuit 306 is used for the decoding data part of the decoding circuit 305 or the header separation circuit using the signal. By selecting the encrypted data portion of the circuit 304, even if the data recorded on the recording medium 101 is data that is compressed in a certain format but not encrypted, the music data Can be reproduced normally.

Further, in this case, the decoding circuit 305 does not need to be operating, and the operation can be stopped completely. As a result, the power consumption of the entire decoding device can be reduced.

(Third Embodiment) FIG. 4 is a block diagram showing the configuration of a decoding apparatus according to the third embodiment of the present invention.

As shown in the figure, the recording medium 401, the microcomputer 402, the stream control circuit 408, the auxiliary data control circuit 409, the header separation circuit 404, the decoding circuit 405,
The header combining circuit 406 and the expansion circuit 407 are included.

The header separation circuit 404, the decoding circuit 405,
Stream control circuit 408 and auxiliary data control circuit 40
Since 9 performs the same operation as that of the decoding device in the first embodiment of the present invention, description thereof will be omitted.

Therefore, here, the header combining circuit 406,
The operation of the expansion circuit 407 will be described.

The header combination circuit 406 combines the decoded data section input from the decoding circuit 405 and the header section input from the header separation circuit 404 to generate a decoded frame. Then, the auxiliary data input from the decoding circuit 405 together with the decoded frame is output to the expansion circuit 407 during the period in which the decoded frame request signal input from the expansion circuit 407 is detected.

When the decoded frame request signal is not detected, the header combination circuit 406 stops the output even if the decoded frame output immediately before can be output only halfway. Then, when the decoded frame request signal is detected again, the output is started from the middle of the decoded frame whose output is stopped.

When the auxiliary data input from the decoding circuit 405 has a specific setting, the decompression circuit 407 immediately after the decoding frame corresponding to the auxiliary data has been output until the decoding frame request signal is no longer detected. For both the decoded frame and the auxiliary data, 0 is continuously output.

The decompression circuit 407 has an input buffer built therein. When the input buffer has a vacancy, it outputs a decoded frame request signal and sequentially stores the decoded data input from the header combining circuit 406 in the input buffer. When the input buffer is filled with the data of the decoded frame, the output of the decoded frame request signal is stopped, the data in the input buffer is read, and the decompression process is executed. At this time, since the input buffer becomes empty, the decoded frame request signal is output again.

As described above, when the auxiliary data has a specific setting, the header combining circuit 406 expands immediately after outputting the decoded frame corresponding to the auxiliary data until the decoded frame request signal is no longer detected. Circuit 40
Even if the final frame of the music data is decoded and output to the decompression circuit 407 by using a decoding device that continues to output zero for both the decoded frame and the auxiliary data for No. 7, the input buffer of the decompression circuit 407 decodes the decoded frame. It is possible to avoid the phenomenon that the decompression process cannot be executed because the above condition is not satisfied.

(Embodiment 4) FIG. 5 is a block diagram showing a configuration of a decoding apparatus according to Embodiment 4 of the present invention.

As shown in the figure, the recording medium 501, the microcomputer 502, the stream control circuit 508, the auxiliary data control circuit 509, the header separation circuit 504, the decoding circuit 505,
It is composed of a header combination circuit 506 and a decompression circuit 507.

The header separation circuit 504, the decoding circuit 505,
The decompression circuit 507, the stream control circuit 508, and the auxiliary data control circuit 509 perform the same operations as the decoding device according to the first embodiment of the present invention, and therefore their explanations are omitted.

Therefore, the operation of the header combining circuit 506 will be described here.

The header combining circuit 506 combines the decoded data portion input from the decoding circuit 505 and the header portion input from the header separation circuit 504 to create a decoded frame. Then, the data is output to the decompression circuit 507 together with the auxiliary data input from the decoding circuit 505.

When the auxiliary data input from the decoding circuit 505 has a specific setting, the header combining circuit 50 is operated during the period in which the specific setting is continuously set.
When the count number of the decoded frame 6 output to the decompression circuit 507 reaches a predetermined count number set by the microcomputer 502, the count completion signal is output immediately after the corresponding decoded frame is output, and the decompression circuit 507 is output. Stop outputting the decoded frame. This stop state continues unless the microcomputer 502 detects the count completion signal and then releases the stop state.

Next, fast-forward reproduction of music data will be described with reference to FIG.

FIG. 6 is a diagram showing how fast-forward reproduction is realized from consecutive cipher frames.

For example, in fast-forward reproduction, continuous music data is finely divided at a fixed time (= T), and only music data corresponding to a time T / 10 from the beginning of each divided music data is continuously reproduced. . In such a case, the reproduced music data sounds like it is reproduced at 10 times the speed of the original music data.

That is, when one encrypted frame is reproduced here, if it is assumed that music data of a certain time can be reproduced without fail, the encrypted frame is divided into groups of 100, and the first 10 of each group are divided. Fast-forward playback can be realized by decrypting the encrypted frame.

Next, the operation of fast-forward reproduction will be described with reference to FIG.

The microcomputer 502 sets a predetermined count number to 10 for the header combining circuit 506. Then, the encrypted frame corresponding to the first group of the music data desired to be fast forwarded is read from the recording medium 501 and written in the internal memory of the stream control circuit 508. at the same time,
The corresponding auxiliary data is also read from the recording medium 501,
A setting for counting the number of decoded frames output by the header combining circuit 506 is added to each auxiliary data and written in the internal memory of the auxiliary data control circuit 509.

Stream control circuit 508, auxiliary data control circuit 509, header separation circuit 504 and decoding circuit 5
05 operates in the same manner as normal reproduction, but the header combining circuit 506 extracts the auxiliary data from the input auxiliary data 507.
It is detected that the setting is made to count the number of decoded frames to be output to.

Then, the header combining circuit 506 outputs the count completion signal immediately after outputting the tenth decoded frame to the expansion circuit 507, and stops the output of the decoded frame to the expansion circuit 507.

When the microcomputer 502 detects the count completion signal input from the header combination circuit 506, the stream control circuit 508, the auxiliary data control circuit 509, the decoding circuit 505, the header separation circuit 504, and the header combination circuit 506.
To reset to the initial state. Then, next, the cipher frame corresponding to the second group is read from the recording medium 501 and written in the internal memory of the stream control circuit 508. At the same time, the corresponding auxiliary data is also recorded on the recording medium 501.
Read from the auxiliary data control circuit 509, and additionally writes a setting for counting the number of decoded frames output by the header combining circuit 506 for each auxiliary data, and writes the auxiliary data in the internal memory of the auxiliary data control circuit 509.

After that, the above operation is repeated, and the music data output from the decompression circuit 507 by such a series of operations sounds like fast-forward reproduction at 10 times the normal speed.

As described above, the header combining circuit 506 counts the number of decoded frames to be output, outputs the count completion signal when the number reaches the predetermined number, and stops the output of the decoded frames, whereby the microcomputer 502 It can easily support fast-forward playback without increasing the burden of. The microcomputer 502 needs to recognize the cipher frames recorded in the recording medium 501 in advance by dividing the cipher frames into a group of a certain number of cipher frames, but the microcomputer does not count the number of cipher frames, but the decoding device counts them. By performing the processing, the processing load on the microcomputer 502, which is increased to realize the fast-forward reproduction, can be significantly reduced.

In the decoding device according to the fourth embodiment of the present invention, the microcomputer 502 sets a predetermined count number in the header combining circuit 506, but by writing information of the predetermined count number in the auxiliary data, If the header combining circuit 506 extracts and sets the information, the microcomputer 502
Eliminates the burden of setting in the header combining circuit 506.

In the decoding device according to the fourth embodiment of the present invention, the header combining circuit 506 outputs the count end signal to notify that the decoded frame output to the decompression circuit 507 has reached the predetermined count number. , When the data is transmitted to the decompression circuit 507, by adding the information that the count of the decoded frame is completed to the auxiliary data,
The input signal to the expansion circuit 507 can be transmitted without increasing it.

(Fifth Embodiment) FIG. 8 is a block diagram showing a configuration of a decoding device according to a fifth embodiment of the present invention.

As shown in the figure, a recording medium 801, a microcomputer 802, a stream control circuit 808, an auxiliary data control circuit 809, a header separation circuit 804, a decoding circuit 805,
It is composed of a header combination circuit 806 and a decompression circuit 807.

The decoding circuit 805, the decompression circuit 807, the stream control circuit 808 and the auxiliary data control circuit 809 are
Since the same operation as the decoding device according to the first embodiment of the present invention is performed, description thereof will be omitted.

Therefore, the operations of the header separation circuit 804 and the header combination circuit 806 will be described here.

The header separation circuit 804 separates the cipher frame input from the cipher frame control circuit 808 into a header section and a cipher data section, and the header section is combined with the header combining circuit 806.
Then, the encrypted data portion is output to the decryption circuit 805.

However, when it is detected that the auxiliary data input from the auxiliary data control circuit 809 includes information that the encrypted frame has no header portion, the input encrypted frame is output to the decryption circuit as it is, and the header detection circuit No header part is output to 806.

The header combination circuit 806 combines the header section input from the header separation circuit 804 and the decoded data section input from the decoding circuit 805 to create a decoded frame, and the decompression circuit 807 together with the auxiliary data input from the decoding circuit 805. However, when it is detected that the auxiliary data input from the decryption circuit 805 includes information that the encrypted frame does not have a header portion, the decryption circuit 807 outputs the decrypted data portion input from the decryption circuit 805 as a decrypted frame without change. Output to.

As described above, when the header portion does not exist in the encrypted frame, the microcomputer 802 adds the information to the auxiliary data, and the header separation circuit 804 and the header combination circuit 806 decrypt the entire encrypted frame. Circuit 80
Even if the data can be decoded in step 5 and output to the decompression circuit 807, and the data is compressed in a format that does not have a header, the decoding device according to the fifth embodiment of the present invention The decoding process can be easily performed without significantly changing the configuration of the decoding device according to the first embodiment of the invention.

[0120]

As described above, according to the first and second aspects of the invention, the stream control means and the auxiliary data means each have an internal memory, and the decoding means inputs the auxiliary data. After detecting that the preparation for decryption is completed and then outputting the cipher frame to the header separating means, the microcomputer writes the cipher data and the auxiliary data in the internal memories of the stream control means and the auxiliary data control means, respectively. Since it is not necessary to detect each processing completion signal for each encryption frame, the load on the microcomputer can be greatly reduced.

According to the third aspect of the invention, the header separating means confirms the preparation for inputting and decoding the auxiliary data to the decoding means, and then the header separating means sends the encrypted data section to the decoding means. By outputting, the encrypted data section will be input immediately after the preparation of the decryption means is completed,
It is possible to reduce the time required for the decoding process.

According to the invention described in claim 4, the number of decoded frames generated by the header combining means is counted, and when the count value reaches a predetermined count value, a count end signal is output. At the same time, by stopping the output of the decrypted frames, special processing of decrypting and outputting a predetermined number of encrypted frames can be realized by performing almost the same processing as the normal playback processing without increasing the load on the microcomputer. It is possible.

According to the invention described in claim 5, the header combining means counts the number of generated decoded frames, and outputs a count end signal when the count value reaches a predetermined count value. In addition, by using a decoding device that outputs a predetermined decoded frame and stops the output of the decoded frame immediately after that, when the header combining unit stops the output of the decoded frame, the input buffer of the decompression unit generates an underflow. However, by outputting a predetermined decoded frame in which the input buffer does not cause underflow, the problem can be avoided.

According to the invention described in claim 6, the decryption means uses the decryption device which directly outputs the input encrypted data portion without decrypting the encrypted frame based on the input auxiliary data. If you want to output without decryption processing, just write the data indicating that the decryption processing is not performed in the auxiliary data, and the decryption means does not perform the decryption processing on the encrypted data part input from the auxiliary data. Can be realized by outputting the input encrypted data portion without performing the decryption processing.

According to the invention described in claim 7, the header separating means uses a decryption device for outputting the encrypted data portion to the header combining means instead of the decrypting means based on the auxiliary data separated from the encryption frame. Therefore, if you want to output the encrypted frame without decryption processing, just write the data indicating that the decryption processing is not performed to the auxiliary data, and the header separation means will cause the encrypted data of the encrypted frame input from the auxiliary data. It is possible to output the encrypted frame without performing the decryption processing by determining that the decryption processing is not performed on the copy portion and outputting the decrypted data portion to the header combining means instead of the decryption means, and the decryption means is not used. Therefore, power consumption can be reduced by stopping the operation of the decoding means.

According to the invention described in claim 8, the header combining means uses the decoding device which inputs the auxiliary data from the header separating means and outputs the auxiliary data to the expansion means in synchronization with the generated decoded frame. By including the information regarding the cipher frame in the auxiliary data, the microcomputer can input and output the information in synchronization with the cipher frame and the decryption frame. In other words, when adding some processing such as decoding processing and decompression processing, the means for performing the processing by writing the information necessary for the processing in the auxiliary data need only perform the processing based on that information,
The microcomputer does not need to detect the timing each time and set the information, and the load on the microcomputer is greatly reduced.

According to the ninth aspect of the invention, the header combining means counts the number of generated decoded frames, and when the count value reaches a predetermined count value, a part of the auxiliary data is included. By using the decoding device that rewrites and outputs, it is possible to detect that a predetermined number of decoded frames have been input from the input auxiliary data without inputting a new count end signal to the decompression means.

According to the invention described in claim 10,
When the microcomputer wants to change the predetermined count value by using the decoding device that obtains the count value from the input auxiliary data, the header combining means must detect the timing by some method and set it. By including the count value in the auxiliary data, the microcomputer does not need to detect the timing to set, and the load can be reduced.

Further, according to the invention of claim 11,
The header separating unit outputs the encrypted frame to the decrypting unit without outputting the header portion to the header combining unit based on the content of the auxiliary data input from the auxiliary data control unit, and the header combining unit outputs the auxiliary data. By using a decryption device decryption device that outputs the decrypted data portion input from the decryption means to the decompression means as it is based on the content of the auxiliary data input from the data control means, there is no header portion and only the encrypted data portion is provided. When decrypting an encrypted frame,
By adding the fact that the header part does not exist in the encrypted frame to the auxiliary data, the microcomputer outputs the encrypted frame as it is to the decrypting device, the decrypting device decrypts the encrypted frame, and the header combining device decrypts it. The data input from the means can be directly output to the decompression means.

According to the invention described in claim 12,
The header combining means uses a decoding device that outputs a predetermined frame to the expansion means immediately after outputting the decoded frame based on the auxiliary data input from the auxiliary data control means, so that the final frame of the music data to be reproduced is expanded. Although the decompressor may decompress the data of the final frame and generate an underflow that cannot be played back without filling the input buffer of the means, a predetermined decoded frame that causes the input buffer to fill the underflow may be generated. By outputting, the underflow of the expansion means can be avoided.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a decoding device according to a first embodiment of the present invention.

FIG. 2 is a timing diagram showing the operation of the decoding device according to the first embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a decoding device according to a second embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a decoding device according to a third embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a decoding device according to a fourth embodiment of the present invention.

FIG. 6 is a diagram illustrating the principle of fast-forward reproduction.

FIG. 7 is a timing diagram showing the operation of the decoding device according to the fourth embodiment of the present invention.

FIG. 8 is a block diagram showing a configuration of a decoding device according to a fifth embodiment of the present invention.

FIG. 9 is a diagram illustrating a process of music data compression processing and encryption processing.

FIG. 10 is a diagram illustrating a frame configuration.

FIG. 11 is a block diagram showing a configuration of a decoding device in a conventional decoding device.

FIG. 12 is a timing chart showing the operation of the decoding device in the conventional decoding device.

[Explanation of symbols]

101 recording medium 102 Microcomputer 104 header separation circuit 105 Decoding circuit 106 header combination circuit 107 Expansion circuit 108 Stream control circuit 109 Auxiliary data control circuit

Claims (12)

[Claims] 1. A cryptographic frame composed of a cryptographic data part obtained by encrypting data compressed in a certain format with a predetermined key and a header part containing a synchronization pattern, and to the encryption of the cryptographic data part. A decryption device for inputting auxiliary data including information, and decrypting the cipher frame based on the auxiliary data, comprising stream control means for holding and managing the inputted cipher frame, and holding the inputted auxiliary data. An auxiliary data control means for managing, a cipher frame input from the stream control means, a header separating means for separating the cipher data portion and the header portion, and the auxiliary data input from the auxiliary data control means,
Decrypting means for decrypting the encrypted data portion input from the header separating means based on the auxiliary data to generate a decrypted data portion; and the decrypted data portion input from the decrypting means and the header inputting from the header separating means. A decoding device comprising: a header combining unit that combines a header unit to generate a decoded frame; and a decompressing unit that decompresses the decoded frame input according to the format. 2. The stream control means outputs the cipher frame to the header separating means after confirming that the decoding means has input the auxiliary data and is ready for decoding. 1. The decoding device according to 1. 3. The header separating means outputs the encrypted data portion to the decrypting means after confirming that the decrypting means has input the auxiliary data and is ready to decrypt the auxiliary data. 1. The decoding device according to 1. 4. The header combining means counts the number of generated decoded frames, outputs a count end signal when the count value reaches a predetermined count value, and outputs the decoded frame immediately after that. The decoding device according to claim 2, wherein the decoding device is stopped. 5. The header combining means counts the number of generated decoded frames, and when the count value reaches a predetermined count value, immediately after outputting a count end signal and a predetermined decoded frame, The decoding device according to claim 2 or 3, wherein output of the decoded frame is stopped. 6. The decryption means, based on the content of the auxiliary data inputted from the auxiliary data control means, outputs the inputted encrypted data portion as it is to the header combining means without decrypting it. The described decoding device. 7. The header separating means outputs the encrypted data part to the header combining means instead of the decrypting means based on the content of the auxiliary data input from the auxiliary data control means. Decoding device. 8. The decoding device according to claim 2, wherein the header combining unit inputs the auxiliary data from the decoding unit and outputs the auxiliary data to the decompression unit in synchronization with the generated decoded frame. 9. The header combining means counts the number of generated decoded frames, and when the count value reaches a predetermined count value, rewrites part of the auxiliary data and outputs the auxiliary data to the decompression means. The decoding device according to claim 8. 10. The header combining means obtains a predetermined count value based on the contents of the auxiliary data input from the auxiliary data control means.
The described decoding device. 11. The header separating means, based on the content of the auxiliary data input from the auxiliary data control means, does not output the header part to the header combining means, but outputs the input encrypted frame to the decrypting means as it is. 4. The decoding apparatus according to claim 2, wherein the header combining unit outputs the decoded data portion input from the decoding unit to the decompression unit as it is, based on the content of the auxiliary data input from the auxiliary data control unit. 12. The header combining means outputs the predetermined frame to the decompressing means immediately after outputting the decoded frame based on the auxiliary data input from the auxiliary data control means. Decoding device.