JP2003086895A - Vertical resonator-type semiconductor light emitting element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that a vertical resonator-type semiconductor light emitting element has high thermal resistance because the semiconductor light emitting element is small in size, and a DBR mirror forming a reflecting mirror is low in thermal conductivity, therefore an active layer rises in temperature by heat released when a current is applied, and it is difficult for the semiconductor light emitting element to output high power. SOLUTION: A groove is cut in around a light emitting part as deep as a current constriction part, and an electrode is formed direct on the groove. By this setup, a distance from a heat releasing part to the electrode is shortened, and heat is easily conducted in a lateral direction.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vertical cavity type semiconductor light emitting device that emits light in a direction perpendicular to one main surface of a substrate.

[0002]

2. Description of the Related Art A vertical cavity type semiconductor laser that emits light in a direction perpendicular to a substrate surface can be produced without cleavage, can be formed into a two-dimensional array, and can easily be circularized as an emitted beam. The edge-emitting semiconductor laser that emits light from the end surface of the substrate has features that are not present in the edge-emitting semiconductor laser, and has attracted attention.

The most general structure of a vertical cavity type semiconductor laser is an active region which is a light emitting layer formed on a semiconductor substrate and semiconductor distributed Bragg reflection type mirrors (hereinafter referred to as distributed Bragg mirrors) above and below this active layer. DBR reflective mirror
(Distributed Bragg Reflect
or) Described as a mirror. ) Is provided for this semiconductor DBR
There is a structure in which a current is injected from an electrode formed outside the mirror via a semiconductor DBR mirror.

FIG. 6 is a sectional view showing the structure of a conventional vertical cavity type semiconductor laser.

As shown in FIG. 6, this vertical cavity type semiconductor laser is an n-type DB formed by alternately laminating AlGaAs layers having different compositions on an n-type GaAs substrate 408.
An R mirror 407 is formed. n-type DBR mirror 4
The n-type InGaAlP clad layer 406, I
nGaAlP-based MQW active layer 405, p-type InGaAl
The P clad layer 404 is sequentially formed.

On the p-type InGaAlP cladding layer 404
Is formed by alternately stacking AlGaAs layers with different compositions
Formed p-type n-type DBR mirror 403 is formed.
The p-type DBR mirror 403 and the n-type DBR mirror 40
7 is alternating AlGaAs with different composition, that is, refractive index
It is a multi-layered film that is laminated on each other, and the thickness of each layer is
Formed so that its optical thickness is 1/4 of the resonance wavelength
Has been done. And these DBR mirrors are used as reflectors
When the light resonates, laser oscillation occurs and n-type GaA
Laser light is emitted in a direction perpendicular to the surface of the substrate 408.
To be done. In addition, Al is used for the high refractive index layer of the DBR mirror.
_0.5Ga_0.5As, Al for the low refractive index layer _0.95G
a_0.05As or the like may be used.

On the p-type DBR mirror 403, p-type Ga is formed.
An As contact layer 402 is formed. These semiconductor layers are formed by MOCVD (Metal Organic).
Chemical Vapor Deposition
Crystals are sequentially grown by the n) method.

In the p-type DBR mirror 403, a high resistance region 410 for current confinement is formed by selectively irradiating protons except a part. Then, on the p-type contact layer 402, a p-side electrode 401 and an n-type GaA formed by opening an emission window for extracting laser light.
A current is caused to flow from the n-side electrode 409 formed on the back surface of the s substrate 408, and the current is narrowed in the active layer 405.

Such a vertical cavity type semiconductor laser is
It is well known that, compared with the edge-emitting semiconductor laser, the light output is saturated at a low current and a sufficient light output cannot be obtained, and the light output sharply decreases as the ambient temperature rises.

The reason why it is difficult to operate at high power at such a high temperature is that D composed of a material having relatively small thermal conductivity is used.
Since the BR mirror is thick, there is a problem in that heat generated by energization near the active layer is difficult to escape.

As a method of releasing the heat generated by energization in the active layer, a method of forming metal plating on the p-side electrode 401 to radiate heat, and a method of mounting the substrate surface side on a heat sink are known.

However, even with the method described above, sufficient heat dissipation cannot be obtained, and there is still a problem that the light output sharply decreases as the temperature rises.

[0013] Such a problem is that vertical resonance in the red wavelength band or the long wavelength band of 1.3 μm to 1.55 μm, in which overflow of carriers in the active layer 405 is remarkable and it is difficult to obtain sufficient temperature characteristics. It is especially serious in container type semiconductor lasers.

[0014]

As described above, in the conventional vertical cavity type semiconductor laser, the heat generated by energization in the vicinity of the active layer is difficult to escape, and the temperature of the active layer rises as the injection current increases. There was a problem that the output operation was difficult.

The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a vertical cavity type semiconductor light emitting device which effectively releases heat generated in an active layer and is excellent in high output operation. To aim.

[0016]

In order to achieve the above object, the present invention provides a substrate, a semiconductor active layer formed on the substrate and having a light emitting region, and a semiconductor active layer sandwiched between the substrate and the semiconductor active layer.
A first semiconductor distributed Bragg reflection mirror provided on the substrate side with respect to the semiconductor active layer and a second semiconductor provided on the side opposite to the substrate, which form a resonator in a direction perpendicular to the substrate. A semiconductor distributed Bragg reflection mirror, a pair of electrodes for injecting a current into the semiconductor active layer through the first and second semiconductor distributed Bragg reflection mirrors, respectively, and the second semiconductor distributed Bragg reflection. A vertical cavity type semiconductor light emitting device formed on the type mirror side and having a current constriction portion for narrowing a current injected from the electrode to the light emitting region, wherein the second semiconductor distribution Bragg on the light emitting region is provided. A recess is formed in the peripheral portion of the second semiconductor distributed Bragg reflection mirror so that the reflection mirror has a convex shape, and one of the electrodes is positioned on the recess. Provide a vertical cavity type semiconductor light emitting device characterized by.

At this time, it is preferable that the concave portion is formed so as to reach the current constriction portion.

It is preferable that a metal film is further formed on the electrode formed on the recess.

Further, it is preferable that a heat sink is further provided, the electrode formed on the recess is provided on the heat sink, and light emitted in the light emitting region is taken out from the substrate side.

Further, it is preferable that the concave portion is formed in a concentric circle shape centering on the light emitting region.

The semiconductor active layer is In
_{1-x (Ga 1-y} Al y) x P -based material is used, it is preferred that the emission wavelength is less than 690nm or more 620 nm.

In this vertical cavity type semiconductor light emitting device, the thickness of the distributed Bragg semiconductor multilayer film is thin in the peripheral portion of the light emitting region, and the metal electrode is formed in this portion, so that the heat conduction is good. The distance between the metal electrode and the heat generating portion can be made shorter than that of the conventional one, and the heat generated near the active layer can be easily escaped. Therefore, the temperature rise of the active layer can be suppressed even when a high current is injected, and a high output operation can be performed.

Also, by applying thick metal plating on the electrodes, it becomes possible to more efficiently release heat.

Further, if the electrodes are mounted on a heat sink with the electrodes facing down and the light is taken out from the substrate side, the heat generated by energization can be more efficiently released.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a sectional view showing a schematic configuration of a vertical cavity type semiconductor light emitting device according to a first embodiment of the present invention. In this embodiment, a red surface emitting laser having an oscillation wavelength of 665 nm will be described.

As shown in FIG. 1, this vertical cavity type semiconductor light emitting device includes an n-type GaAs substrate 109 and an n-type G-type semiconductor substrate 109.
AlGaAs-based n-type DBR mirror 108 formed on the surface of aAs substrate 109, and this n-type DBR mirror 1
N-type InGaAlP cladding layer 10 formed on 08
7, an InGaAlP-based MQW active layer 106 formed on the n-type InGaAlP cladding layer 107, a p-type InGaAlP cladding layer 105 formed on the active layer 106, and the p-type InGaAlP cladding layer 10.
AlGaAs-based p-type DBR mirror 1 formed on 5
04 and p formed on the p-type DBR mirror 104.
Type GaAs contact layer 103.

The n-type DBR mirror 108 and the p-type DBR mirror 104 are formed by alternately stacking AlGaAs layers having different compositions. This n-type DBR mirror 108
The p-type DBR mirror 104 is a multilayer film in which AlGaAs having different compositions, that is, different refractive indexes are alternately laminated, and the thickness of each layer is a quarter of 665 nm whose optical thickness is the resonance wavelength. It is formed to be 1. Then, when these DBR mirrors are used as reflecting mirrors and light resonates, laser oscillation occurs, and the n-type GaAs substrate 1
Laser light is emitted in a direction perpendicular to the surface of 09.
Further, Al _0.5 Ga is used for the high refractive index layer of the DBR mirror.
_0.5 As, Al _0.95 Ga _{0.05 for} the low refractive index layer
As or the like may be used.

A high resistance region 111, which is a current constriction portion formed by selectively ion-implanting protons, is provided in the peripheral portion of the p-type DBR mirror 104. And p-type DB
In the peripheral portion of the R mirror 104, a recess is formed by etching until it reaches the high resistance region 111. A p-side electrode 101 is formed on this recess. And n
An n-side electrode 110 is formed on the back surface of the type GaAs substrate 109.

The active layer 106 uses an InGaAlP-based multiple quantum well structure and is adjusted so that the emission peak wavelength at room temperature is about 655 nm.

Next, a method of manufacturing the vertical oscillator type semiconductor light emitting device will be described.

First, on the n-type GaAs substrate 109, MO
The AlGaAs n-type DBR mirror 10 is formed by the CVD method.
8 is crystal-grown. Low refractive index Al _0.98 Ga so that the optical film thickness is 1/4 wavelength of the resonance wavelength (665 nm).
_0.02 As layer and high refractive index Al _0.5 Ga _0.5 As
The layers were stacked alternately. Here, Al _0.98 Ga _0.0
Start the crystal growth from the ₂ As layer, 50.5 cycle (one cycle _Al 0.98 _{Ga 0 .02} As layer _{/ Al} 0.5 Ga
_0.5 As layer) Repeatedly the final layer was Al _0.98 Ga
_{It was a 0.02} As layer.

Next, on the n-type DBR mirror 108, MO
The n-type InGaAlP cladding layer 10 is formed by the CVD method.
7. InGaAlP-based MQW active layer 106 adjusted to have an emission peak wavelength of 655 nm, p-type InGa
The AlP clad layer 105 is sequentially crystal-grown.

Next, the p-type InGaAlP clad layer 10 is formed.
AlGaAs-based p-type DB by MOCVD on
The R mirror 104 is crystal-grown. A with a low refractive index so that the optical film thickness becomes a quarter wavelength of the resonance wavelength (665 nm).
l _0.98 Ga _0.02 As layer and high refractive index Al _0.5
Ga _0.5 As layers were stacked alternately. Here, Al _0.
Crystal growth was started from the ₉₈ Ga _0.02 As layer, and
Period (one period _{Al 0.} 98 _{Ga 0.02} As layer / Al
_0.5 Ga _0.5 As layer).
_{It was a 0.5} Ga _0.5 As layer.

Next, on the p-type DBR mirror 104, MO
The p-type GaAs contact layer 103 is crystal-grown by the CVD method. At this time, the p-type GaAs contact layer 103
The thickness of is about 5 in order to minimize the loss due to absorption.
nm.

Next, a high resistance region 111 is formed by selectively ion-implanting protons into a region other than the circular region having a diameter of 15 μm which becomes a light emitting region. At this time, the acceleration voltage for ion implantation is 350 kV, and the dose amount is 3 × 10 ¹⁵ cm.
^-2 .

Next, the inner diameter is 20 μm, which is concentric with the light emitting region.
Then, a region having an outer diameter of 40 μm is selectively etched to a depth of 2 μm so as to reach the high resistance region 111.

Next, the p-side electrode 101 is formed on the region including the concentric recesses formed in the previous step by vacuum evaporation and lift-off process. At this time, the p-side electrode 101 is formed so as to have an opening with a diameter of 10 μm above the circular area with a diameter of 15 μm that serves as a light emitting region. This is because the laser light is extracted from this electrode opening.

Next, the p-side electrode 101 thus formed is plated with gold to a thickness of about 10 μm to form a plated electrode 102.

Next, the back surface of the n-type GaAs substrate 109 is polished to a thickness of about 100 μm, and the n-side electrode 110 is formed on this back surface.

FIG. 2 is a top view of the vertical cavity type semiconductor light emitting device thus formed, viewed from above the p-side electrode 101.

The chip size of this vertical cavity type semiconductor light emitting device is 400 μm × 400 μm, the opening of the p-side electrode 101 from which laser light is emitted is circular with a diameter of 10 μm, and the gold-plated electrode 102 is 300 μm × 300.
The diameter of the center of the light emitting area is 2 μm.
It is formed in the region excluding the region of 0 μm.

In the vertical cavity type semiconductor light emitting device shown in FIG. 2, a plurality of gold wires 113 (here, eight) are used for electrical connection with the outside of the device in order to improve heat dissipation.

In the vertical cavity type semiconductor light emitting device thus manufactured, a concave portion is formed in the peripheral portion of the light emitting region so as to reach the high resistance region 111 which is a current constriction portion, and the p side electrode 101 is formed in this portion. Are formed. Therefore, as compared with the conventional structure shown in FIG. 6 in which the recess is not formed, the distance between the pn junction, which is the light emitting region, and the p-side electrode 101 is short, so that the heat generated by the current injection is formed in concentric circles. It efficiently flows laterally from the recess toward the metal electrode 101 near the side surface. Therefore, the thermal resistance of the element is significantly reduced as compared with the conventional one, heat generation due to energization is suppressed, the temperature of the active layer does not rise so much even when high current is injected, and high output operation becomes possible.

The heat dissipation of the device depends on the depth of the concentric recesses formed by etching.

FIG. 3 shows the depth dependence of the recess (groove) of the maximum continuous laser oscillation temperature in the vertical cavity type semiconductor light emitting device shown in FIGS.

As shown in FIG. 3, it can be seen that the maximum continuous laser oscillation temperature increases as the groove depth increases. However, it can be seen that if the depth of the groove is about 1.5 μm or more, the effect of improving heat dissipation can be sufficiently obtained. The depth of 1.5 μm corresponds to about ½ of the thickness of the p-type DBR mirror 104, which is about 3 μm.

(Second Embodiment) FIG. 4 shows a second embodiment of the present invention.
3 is a cross-sectional view showing a schematic configuration of a vertical cavity type semiconductor light emitting device according to the embodiment of FIG. Similar to the first embodiment, this embodiment is also a red surface emitting laser having an oscillation wavelength of 665 nm.

In this embodiment, with the p-side electrode 210 of the vertical cavity type semiconductor light emitting device described in the first embodiment facing down, on the submount 213 which is a heat sink,
It has a structure mounted by a solder material 212.

At this time, the p-side electrode 210 opened the n-side electrode 201 without opening the region corresponding to the light emitting region.

Next, a method of manufacturing the vertical cavity type semiconductor light emitting device will be described.

First, p is placed on a GaAs substrate (not shown).
Type GaAs contact layer 209, AlGaAs p-type D
BR mirror 208, p-type InGaAlP cladding layer 20
7. InGaAlP-based MQW active layer 206 adjusted to have an emission peak wavelength of 655 nm, n-type InGa
The AlP clad layer 205, the AlGaAs n-type DBR mirror 204, and the n-type InGaAlP adhesive layer 203 are MOC.
Crystals are sequentially grown by the VD method.

At this time, the AlGaAs p-type DBR mirror
-208 indicates that the optical film thickness is 1/4 of the resonance wavelength (665 nm).
Al with low refractive index_0.98Ga_0.02
As layer and Al with high refractive index_0.5Ga_0.5Alternating As layers
Laminated. Al here _0.98Ga_0.02As layer
Crystal growth from 50.5 cycles (1 cycle is Al
_0.98Ga_0.02As layer / Al_0.5Ga_0.5A
s layer) Repeat the final layer with Al_0.98Ga_0.02A
The s layer was used.

The AlGaAs n-type DBR mirror 2
No. 04 is Al _0.98 Ga _0.02 A having a low refractive index so that the optical film thickness becomes a quarter wavelength of the resonance wavelength (665 nm).
The s layers and the Al _0.5 Ga _0.5 As layers having a high refractive index were alternately laminated. Here, Al _0. Crystal growth was started from the ₉₈ Ga _0.02 As layer, and 30 cycles (1 cycle of Al _0.
98 Ga _0.02 As layer / Al _0.5 Ga _0.5 As
Layer) Repeatedly, the final layer was an Al _0.5 Ga _0.5 As layer.

Next, the crystal-grown p-type GaAs substrate and n-type GaP substrate 202 are bonded so that the n-type InGaAlP adhesive layer 203 is bonded to the n-type GaP substrate, and then the p-type GaAs substrate is etched. Remove. At this time, the substrate was bonded by heat treatment at 500 ° C. for 10 minutes. The n-type GaAs substrate was etched by wet etching using a sulfuric acid-based etchant.

Next, a high resistance region 211 is formed by selectively ion-implanting protons into a region excluding a circular region having a diameter of 10 μm which serves as a light emitting region. At this time, the acceleration voltage of ion implantation is 400 kV, and the dose amount is 5 × 10 ¹⁵ c
m ⁻² .

Next, the inner diameter is 15 μm, which is concentric with the light emitting region.
Then, a region having an outer diameter of 35 μm is selectively etched to a depth of 2.5 μm so as to reach the high resistance region 211.

Next, the p-side electrode 210 is formed by vacuum evaporation on the region including the concentric recesses formed in the previous step.

The n-type GaP substrate 202 is polished to a thickness of about 100 μm. Next, an n-side electrode 201 having an opening with a diameter of 30 μm in the central portion so as to open the light emitting region is formed. Further, after dividing the created wafer into individual chips, the wafer is mounted on the submount 213 so that the etching groove is completely filled with the solder material 212, thereby forming the vertical cavity light emitting device shown in FIG. .

Also in this vertical cavity type light emitting device, as in the first embodiment, the heat generated by current injection is
It efficiently flows laterally from the concentric groove toward the metal electrode 210 near the side surface. Further, since the electrode 210 is bonded to the submount 213 which is connected to the heat sink, it is possible to obtain an element having further excellent heat dissipation.

(Third Embodiment) FIG. 5 shows a third embodiment of the present invention.
3 is a cross-sectional view showing a schematic configuration of a vertical cavity type semiconductor light emitting device according to the embodiment of FIG. In this embodiment, a surface emitting laser having an oscillation wavelength of 1.3 μm will be described.

In this embodiment, the active layer 306 has a GaInNAs-based quantum well structure with an emission peak wavelength of 1.28 μm at room temperature. A method of manufacturing this vertical cavity type semiconductor light emitting device will be described below.

First, MO is formed on the n-type GaAs substrate 309.
The AlGaAs n-type DBR mirror 30 is formed by the CVD method.
8 is crystal-grown. Low refractive index Al _0.8 Ga so that the optical film thickness is 1/4 wavelength of the resonance wavelength (1.3 μm)
_0.2 As layer and high refractive index Al _{0 . 2} Ga _0.8 As layers were stacked alternately. Here, Al _0.8 Ga _0.2 As
Crystal growth is started from the layer and 30.5 cycles (1 cycle is A
l _0.8 Ga _0.2 As layer / Al _0.2 Ga _0.8 As
Layer) Repeatedly, the final layer was an Al _0.8 Ga _0.2 As layer.

Next, on the n-type DBR mirror 108, MO
The n-type AIGaAs clad layer 307,
GaInNAs / GaAs-based MQW active layer 306, p adjusted to have a peak emission wavelength of 1.28 μm
The type AIGaAs clad layer 305 is sequentially crystal-grown.

Then, the p-type AlGaAs cladding layer 30 is formed.
On top of the first AlGaAs-based p-type n-type DBR mirror 3
To form 04. The first p-type DBR mirror 304 has a low refractive index Al _0.8 Ga _0.2 As layer and a high refractive index Al so that the optical film thickness becomes a quarter wavelength of the resonance wavelength (1.3 μm). _{The 0.2} Ga _0.8 As layers were stacked alternately. Here, the crystal growth is started from the Al _0.8 Ga _0.2 As layer, and 10 cycles (1 cycle is the Al _0.8 Ga _0.2 As layer /
Al _0.2 Ga _0.8 As layer) Repeat the final layer with Al
_{It was a 0.2} Ga _0.8 As layer.

Next, the substrate is taken out from the growth apparatus, and protons are selectively ion-implanted into a region other than a circular region having a diameter of 10 μm, which is a light emitting region, to form a high resistance region 311. At this time, the acceleration voltage of ion implantation was 200 kV, and the dose amount was 1 × 10 ¹⁵ cm ⁻² .

Next, the inner diameter is 15 μm, which is concentric with the light emitting region.
And SiO 2 is formed on the high resistance region 311 having an outer diameter of 35 μm.
_Two films (not shown) are provided.

Next, the substrate is again introduced into the growth apparatus, and CBE (Chemical Beam Epita) is formed on the p-type AIGaAs cladding layer 305 and the high resistance region 311.
xy) method, AlGaAs-based p-type DBR mirror 30
3 is crystal-grown, followed by p-type GaAs contact layer 30
2 is crystal-grown. The p-type DBR mirror 303 has a low refractive index Al _0.8 Ga _0.2 As layer and a high refractive index A so that the optical film thickness becomes a quarter wavelength of the emission wavelength (1.3 μm).
The l _0.2 Ga _0.8 As layer alternately laminated. Here, the crystal growth is started from the Al _0.8 Ga _0.2 As layer,
12 cycles (1 cycle is Al _0.8 Ga _0.2 As layer / Al
_0.2 Ga _0.8 As layer).
_{It was a 0.2} Ga _0.8 As layer.

At this time, since no crystal grows on the SiO ₂ film which acts as a mask, the p-type DBR mirror 304 located above the light emitting portion has a cylindrical shape, and a ring-shaped groove is formed on the substrate surface. (Recess) will be formed. This groove has a depth reaching the high resistance region 311.

Next, after removing the SiO ₂ film used as the mask, the high resistance region 311 which is a circular current constriction portion is removed.
Concentric with, the p-side electrode 301 is formed in a ring region having an inner diameter of 10 μm and an outer diameter of 200 μm. At this time, the inner wall of the ring-shaped groove is completely covered with the p-side electrode 301.

Next, the substrate is polished to a thickness of about 100 μm, and then the n-side electrode 310 is formed to complete the device.

The vertical oscillator type semiconductor light emitting device thus manufactured is similar to the first and second embodiments, in the peripheral portion of the light emitting region, the pn junction portion of the current constriction portion and the p side electrode. Because of the short distance between the and, the heat generated by the current injection efficiently flows laterally from the groove of the ring toward the metal electrode near the side surface.

Therefore, the thermal resistance of the element is significantly reduced as compared with the conventional one, heat generation due to energization is suppressed, and the temperature of the active layer does not rise so much even at the time of high current injection, and high output operation becomes possible.

[0073]

As described in detail above, according to the present invention, it is possible to provide a vertical cavity type semiconductor light emitting device having a small thermal resistance and excellent high output operation.

[Brief description of drawings]

FIG. 1 is a sectional view showing a schematic configuration of a vertical cavity type semiconductor light emitting device according to a first embodiment.

FIG. 2 is a top view of the vertical cavity type semiconductor light emitting device according to the first embodiment.

FIG. 3 is a diagram showing the dependence of the maximum continuous oscillation temperature on the etching groove depth.

FIG. 4 is a schematic configuration diagram of a vertical cavity type semiconductor light emitting device according to a second embodiment.

FIG. 5 is a schematic configuration diagram of a vertical cavity type semiconductor light emitting device according to a third embodiment.

FIG. 6 is a sectional view showing a schematic configuration of a conventional vertical cavity type semiconductor light emitting device.

[Explanation of symbols]

101, 210, 301, 401 ... P-side electrode 102 ... Plated electrodes 103, 209, 302, 402 ... P-type GaAs contact layers 104, 208, 403 ... AlGaAs-based p-type DBR mirrors 105, 207, 404 ... p-type AlGaAs cladding Layers 106, 206, 405 ... InGaAlP-based quantum well structure active layers 107, 205, 406 ... N-type InGaAlP cladding layers 108, 204, 308, 403 ... AlGaAs n-type D
BR mirrors 109, 309, 408 ... n-type GaAs substrate 113 ... gold wires 110, 201, 310, 409 ... n-side electrodes 111, 211, 311, 410 ... high-resistance region 202 ... n-type GaP substrate 203 ... n-type InGaAlP bonding Layer 212 ... Solder material 213 ... Submount 303 ... AlGaAs-based p-type DBR mirror 304 ... AlGaAs-based p-type DBR mirror 305 ... p-type AlGaAs cladding layer 306 ... GaInNAs / GaAs-based quantum well structure active layer 307 ... n-type AlGaAs cladding layer

Claims (5)

[Claims] 1. A substrate, a semiconductor active layer formed on the substrate and having a light emitting region, a semiconductor active layer sandwiched between the substrate and a resonator in a direction perpendicular to the substrate, and the semiconductor active layer. First provided on the substrate side with respect to the layer
Semiconductor distributed Bragg reflection type mirror and second semiconductor distributed Bragg reflection type mirror provided on the opposite side of the substrate, and the semiconductor active layer via the first and second semiconductor distributed Bragg reflection type mirrors, respectively. A vertical line including a pair of electrodes for injecting a current into the second semiconductor, and a current constriction portion formed on the side of the second semiconductor distributed Bragg reflection mirror for narrowing the current injected from the electrodes to the light emitting region. In the resonator-type semiconductor light emitting device, a concave portion is formed in a peripheral portion of the second semiconductor distributed Bragg reflective mirror so that the second semiconductor distributed Bragg reflective mirror on the light emitting region has a convex shape, A vertical cavity type semiconductor light emitting device, wherein one of the electrodes is positioned on the recess. 2. The vertical cavity type semiconductor light emitting device according to claim 1, wherein the recess is formed so as to reach the current constriction portion. 3. A metal film is further formed on the electrode formed on the recess.
A vertical cavity type semiconductor light emitting device as described above. 4. A heat sink is further provided, the electrode formed on the recess is provided on the heat sink, and the light emitted in the light emitting region is taken out from the substrate side. Vertical cavity type semiconductor light emitting device. 5. The vertical cavity type semiconductor light emitting device according to claim 1, wherein the recess is formed in a concentric circle shape centering on the light emitting region.