JP2003060173A - Method for terminal auxiliary drive of ferromagnetic memory - Google Patents

Method for terminal auxiliary drive of ferromagnetic memory

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Publication number
JP2003060173A
JP2003060173A JP2001250200A JP2001250200A JP2003060173A JP 2003060173 A JP2003060173 A JP 2003060173A JP 2001250200 A JP2001250200 A JP 2001250200A JP 2001250200 A JP2001250200 A JP 2001250200A JP 2003060173 A JP2003060173 A JP 2003060173A
Authority
JP
Japan
Prior art keywords
ferromagnetic
variable resistor
memory according
current
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001250200A
Other languages
Japanese (ja)
Other versions
JP4798895B2 (en
Inventor
Masahiko Hirai
匡彦 平井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
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Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2001250200A priority Critical patent/JP4798895B2/en
Publication of JP2003060173A publication Critical patent/JP2003060173A/en
Application granted granted Critical
Publication of JP4798895B2 publication Critical patent/JP4798895B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve the problem that, when a cell area of a conventional MRAM is reduced, a diamagnetic field of a ferromagnetic material is increased, it is necessary to impart a larger rewriting magnetic field, and hence a current to flow to the write wiring is increased with the result that as the cell area is decreased, a current density of the write wiring is remarkably increased. SOLUTION: A method for thermal auxiliary drive of a ferromagnetic memory comprises the steps of supplying currents to a selected variable resistors of a plurality of variable resistors, in the case of writing information in the resistors indicating different electric resistance values of the case that magnetizing directions of first and second ferromagnetic films are parallel, and the case that the magnetizing directions of the first and second ferromagnetic films are anti-parallel; raising the temperature of the variable resistor to a temperature higher than the ambient temperature; and writing information in the resistor.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、強磁性体を用いた
不揮発性メモリに関し、特に、強磁性体メモリの熱補助
駆動方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a non-volatile memory using a ferromagnetic material, and more particularly to a thermally assisted driving method for a ferromagnetic memory.

【0002】[0002]

【従来の技術】一般に、強磁性体は外部から印加された
磁場によって強磁性体内に発生した磁化が外部磁場を取
り除いた後にも残留する(これを残留磁化という)とい
う特性を有している。また、強磁性体は磁化の方向や磁
化の有無などによってその電気抵抗が変化する。これは
磁気抵抗効果と呼ばれており、そのときの電気抵抗値の
変化率を磁気抵抗比(Magneto-Resistance Ratio;MR
比)という。磁気抵抗比が大きい材料としては巨大磁気
抵抗(GMR;Giant Magneto-Resistance)材料や超巨
大磁気抵抗(CMR;Colossal Magneto-Resistance)
材料があり、金属、合金、複合酸化物などである。例え
ば、Fe、Ni、Co、Gd、Tbおよびこれらの合金
や、LaXSr1-XMnO9、LaXCa1-XMnO9などの
複合酸化物などの材料がある。磁気抵抗材料の残留磁化
を利用すれば、磁化方向や磁化の有無により電気抵抗値
を選択して情報を記憶する不揮発性メモリを構成するこ
とができる。このような不揮発性メモリは磁気メモリ
(MRAM;Magnetic RandomAccess Memory)と呼ばれ
ている。
2. Description of the Related Art Generally, a ferromagnet has a characteristic that the magnetization generated in the ferromagnet by a magnetic field applied from the outside remains even after the external magnetic field is removed (this is called remanent magnetization). In addition, the electric resistance of the ferromagnetic material changes depending on the direction of magnetization and the presence / absence of magnetization. This is called the magnetoresistive effect, and the rate of change of the electric resistance value at that time is expressed by the magnetoresistive ratio (MR).
Ratio). Giant Magneto-Resistance (GMR) materials and Colossal Magneto-Resistance (CMR) materials have a large magneto-resistance ratio.
There are materials, such as metals, alloys, and complex oxides. For example, Fe, Ni, Co, Gd, or Tb, and alloys, there are materials such as composite oxide such as La X Sr 1-X MnO 9 , La X Ca 1-X MnO 9. By utilizing the residual magnetization of the magnetoresistive material, it is possible to configure a non-volatile memory for storing information by selecting an electric resistance value depending on the magnetization direction and the presence or absence of magnetization. Such a nonvolatile memory is called a magnetic memory (MRAM; Magnetic Random Access Memory).

【0003】近年、開発が進められているMRAMの多
くは、巨大磁気抵抗材料の強磁性体の残留磁化で情報を
記憶しており、磁化方向の違いによって生じる電気抵抗
値の変化を電圧に変換して記憶した情報が読み出される
方式を採用している。また、書込み用配線に電流を流し
て誘起される磁場により強磁性体メモリセルの磁化方向
を変化させることで、メモリセルに情報を書き込み、ま
た、その情報を書き換えることができる。
Most of MRAMs that have been developed in recent years store information by remanent magnetization of a ferromagnetic material of a giant magnetoresistive material, and change in electric resistance value caused by difference in magnetization direction is converted into voltage. Then, a method of reading the stored information is adopted. Further, by changing the magnetization direction of the ferromagnetic memory cell by a magnetic field induced by passing a current through the write wiring, it is possible to write information in the memory cell and rewrite the information.

【0004】MRAMのセルとしては、トンネル絶縁膜
を2つの強磁性体で挟んだ構造をもつ、トンネル磁気抵
抗素子(TMR;Tunnel Magneto-Resistance、MT
J;Magnetic Tunnel Junction)が高い磁気抵抗変化率
(MR比)をもち、もっとも実用化に近いデバイスと期
待されている。
As a cell of an MRAM, a tunnel magnetoresistive element (TMR; Tunnel Magneto-Resistance, MT) having a structure in which a tunnel insulating film is sandwiched between two ferromagnetic materials is used.
J; Magnetic Tunnel Junction) has a high magnetoresistance change rate (MR ratio), and is expected to be the most practical device.

【0005】[0005]

【発明が解決しようとする課題】従来のMRAMは、記
録層となる強磁性体の磁化によって情報が保持され、情
報書き換え時に書き込み配線に電流を流し、その電流が
誘起する磁場によって、記録層の磁化方向を変更するこ
とが前提となっている。ところが、セル面積を小さくし
ていくと、強磁性体の反磁場が大きくなり、より大きな
書き換え磁場を与える必要がある。そうすると、書き込
み配線に流すべき電流量が増大する結果となり、セル面
積を小さくするにしたがって書き込み配線の電流密度
は、劇的に大きくなる。このため、0.2μmより設計
ルールが小さくなると、書き込み配線が電流密度の大き
さに耐えられなくなる恐れがある。
In the conventional MRAM, information is held by the magnetization of a ferromagnetic material which is a recording layer, a current is passed through a write wiring when the information is rewritten, and a magnetic field induced by the current causes a magnetic field in the recording layer to change. It is assumed that the magnetization direction is changed. However, as the cell area is reduced, the demagnetizing field of the ferromagnetic material increases, and it is necessary to apply a larger rewriting magnetic field. This results in an increase in the amount of current to be passed through the write wiring, and the current density in the write wiring increases dramatically as the cell area is reduced. Therefore, if the design rule is smaller than 0.2 μm, the write wiring may not be able to withstand the high current density.

【0006】この問題を解決するため、特開2000−
285668号公報に公開されているような、磁気メモ
リ素子に素子加熱手段を備えるといった提案がなされて
いるが、素子加熱には、発熱体を過熱するための配線を
別途用意する必要があり、構造が複雑でセル面積を小さ
くする際の障害になりやすい欠点がある。
In order to solve this problem, Japanese Patent Laid-Open No. 2000-
As disclosed in Japanese Patent No. 285668, it has been proposed to provide a magnetic memory element with an element heating means. However, in order to heat the element, it is necessary to separately prepare wiring for overheating a heating element. However, there is a drawback that it is complicated and tends to become an obstacle when reducing the cell area.

【0007】本発明は、このような従来の技術が有する
未解決の課題を解決するべくなされたものであり、簡単
な構造でかつ、セル面積を小さくしても安定に情報を書
き込むことができる強磁性体メモリの熱補助駆動方法を
提供することを目的としている。
The present invention has been made to solve the above-mentioned unsolved problems of the conventional technique, and has a simple structure and can stably write information even if the cell area is reduced. It is an object of the present invention to provide a thermally assisted driving method for a ferromagnetic memory.

【0008】[0008]

【課題を解決するための手段】本発明の強磁性体メモリ
の熱補助駆動方法は、上記目的を達成するために、それ
ぞれが第1および第2の強磁性体膜を有し、該第1およ
び第2の強磁性体膜の磁化方向が平行である場合と、反
平行である場合とで異なる電気抵抗値を示す複数の可変
抵抗器と、予め、互いに平行な複数のビット線と、互い
に平行で該ビット線に交差する複数のワード線と、半導
体基板上に形成され、制御端子が所定のワード線に接続
され一方の端子が接地されたスイッチング素子と、強磁
性体の磁化の方向により異なる電気抵抗値の選択を可能
とし、スイッチング素子の他方の端子に一方の端子が接
続され所定のビット線に他方の端子が接続された可変抵
抗器と、電流を流すことで誘起される磁場によって可変
抵抗器の抵抗値を選択する書き込み配線と、所定のビッ
ト線に接続されていて可変抵抗器の抵抗値を検出する信
号検知回路とを有し、情報書き込みの際に、選択された
可変抵抗器に電流を流し、可変抵抗器の温度を常温より
高くして、情報書き込みを行うことを特徴とする。
In order to achieve the above-mentioned object, a method of thermally assisting a ferromagnetic memory according to the present invention has first and second ferromagnetic films, respectively. And a plurality of variable resistors having different electric resistance values when the magnetization directions of the second ferromagnetic film are parallel and antiparallel, and a plurality of bit lines which are parallel to each other in advance, and A plurality of word lines that are parallel to each other and intersect the bit line, a switching element that is formed on a semiconductor substrate, has a control terminal connected to a predetermined word line and one terminal is grounded, and a magnetization direction of a ferromagnetic material. A variable resistor that enables selection of different electrical resistance values, one terminal of which is connected to the other terminal of the switching element and the other terminal of which is connected to a predetermined bit line, and a magnetic field induced by flowing a current. The resistance of the variable resistor It has a write wiring to be selected and a signal detection circuit connected to a predetermined bit line to detect the resistance value of the variable resistor.When writing information, a current is passed through the selected variable resistor to change the resistance. It is characterized in that the temperature of the resistor is set higher than room temperature to write information.

【0009】可変抵抗器の温度を常温より高くすること
により、強磁性体の磁化反転に必要な磁場を小さくする
ことが可能である。これは、強磁性体がキュリー温度に
近づくと徐々に残留磁化が弱まり、キュリー温度より高
い温度になると常磁性体になり、残留磁化を失う。すな
わち、強磁性体をキュリー温度異常に加熱し、弱い磁場
であっても印加しながら、温度を低くすることで容易に
磁化反転させることができる。
By making the temperature of the variable resistor higher than room temperature, it is possible to reduce the magnetic field required for reversing the magnetization of the ferromagnetic material. This is because when the ferromagnetic material approaches the Curie temperature, the remanent magnetization gradually weakens, and when the temperature rises above the Curie temperature, it becomes a paramagnetic material and loses the remanent magnetization. That is, the magnetization can be easily reversed by heating the ferromagnetic material to an abnormal Curie temperature and applying a weak magnetic field while lowering the temperature.

【0010】本発明の実施態様によれば、可変抵抗器に
接するように、可変抵抗器とは別に発熱層を配置してお
き、書き込み動作時において、選択された可変抵抗器と
発熱層に電流を流し、可変抵抗器の温度を常温より高く
して、情報書き込み動作させてもよい。
According to an embodiment of the present invention, a heating layer is arranged separately from the variable resistor so as to be in contact with the variable resistor, and a current is supplied to the selected variable resistor and the heating layer during a write operation. Alternatively, the temperature of the variable resistor may be made higher than room temperature to perform the information writing operation.

【0011】また、可変抵抗器はトンネル磁気抵抗素子
であってもよい。
The variable resistor may be a tunnel magnetoresistive element.

【0012】また、スイッチング素子は電界効果型トラ
ンジスタであってもよし、薄膜トランジスタを用いても
よい。
The switching element may be a field effect transistor or a thin film transistor.

【0013】また、可変抵抗器は、トンネル磁気抵抗素
子の強磁性体膜の磁化方向を膜面に対して水平方向とし
たものを用いてもよいし、垂直方向としたものを用いて
もよい。
Further, as the variable resistor, one in which the magnetization direction of the ferromagnetic film of the tunnel magnetoresistive element is horizontal to the film surface may be used, or one in which it is vertical may be used. .

【0014】さらに、トンネル磁気抵抗素子は、保磁力
の大きい第1の強磁性体と、該第1の強磁性体よりも保
磁力の小さい第2の強磁性体にトンネル絶縁膜が挟まれ
てなるものを用いてもよい。
Further, in the tunnel magnetoresistive element, a tunnel insulating film is sandwiched between a first ferromagnetic material having a large coercive force and a second ferromagnetic material having a smaller coercive force than the first ferromagnetic material. You may use what is.

【0015】さらにまた、書き込み動作時の前記可変抵
抗器の温度が、記録層強磁性体のキュリー温度より高く
なるようにしてもよい。
Furthermore, the temperature of the variable resistor during the write operation may be higher than the Curie temperature of the recording layer ferromagnetic material.

【0016】[0016]

【発明の実施の形態】次に、本発明の実施の形態につい
て図面を参照して詳細に説明する。
BEST MODE FOR CARRYING OUT THE INVENTION Next, embodiments of the present invention will be described in detail with reference to the drawings.

【0017】図1は、本発明の一実施形態を示す、面内
磁化型の強磁性体メモリの構成図である。実施例の面内
磁化型の強磁性体メモリは、半導体基板1上に、素子分
離領域2と、不純物拡散により形成されたソース/ドレ
イン領域3とゲート電極として機能するワード線4から
なる電界効果型トランジスタ13と、そのソースにプラ
グ5を経由して接続された接地線7と、ドレインにはプ
ラグ5と金属層6とプラグ8を経由して接続されたロー
カル配線9と、ローカル配線9の上にピン層(強磁性
体)/絶縁層/記録層(強磁性体)からなり下部電極部
に接続されたトンネル磁気抵抗素子11と、トンネル磁
気抵抗素子11の上部電極に接続されたビット線12
と、トンネル磁気抵抗素子11の下側に配置された書き
込み線10とから構成されている。
FIG. 1 is a block diagram of an in-plane magnetization type ferromagnetic memory showing an embodiment of the present invention. The in-plane magnetization type ferromagnetic memory according to the embodiment has a field effect including a device isolation region 2, a source / drain region 3 formed by impurity diffusion, and a word line 4 functioning as a gate electrode on a semiconductor substrate 1. Type transistor 13, a ground line 7 connected to the source thereof via the plug 5, a local wiring 9 connected to the drain thereof via the plug 5, the metal layer 6 and the plug 8, and a local wiring 9 A tunnel magnetoresistive element 11 formed of a pinned layer (ferromagnetic material) / insulating layer / recording layer (ferromagnetic material) and connected to a lower electrode portion, and a bit line connected to an upper electrode of the tunnel magnetoresistive element 11. 12
And a write line 10 arranged below the tunnel magnetoresistive element 11.

【0018】この他に、トンネル磁気抵抗素子11に接
するように、下部電極部に発熱層を配置しておいても良
い。
In addition to this, a heating layer may be arranged in the lower electrode portion so as to be in contact with the tunnel magnetoresistive element 11.

【0019】この実施形態では、面内磁化型の強磁性体
メモリは、書き込み線10とビット線12に書き込み電
流を流し、ビット線12に流れる電流により発生する磁
場が、トンネル磁気抵抗素子11に含まれる記録層の磁
化方向を決定し、書き込み線10に流れる電流により発
生する磁場がトンネル磁気抵抗素子11の記録層の磁化
を反転しやすくする。書き込み動作時には、書き込み配
線10に書き込み電流を流すと同時にビット線12にも
電流を流し、さらにワード線4に電圧を与え、スイッチ
ング素子として機能する電界効果型トランジスタ13を
オンとし、ビット線12から分岐した電流が前記トンネ
ル磁気抵抗素子11を貫通して、接地線7まで流れる。
この動作により、トンネル磁気抵抗素子11の記録層が
キュリー温度付近まで加熱されると、きわめて磁化が反
転しやすくなる。この状態から、電界効果型トランジス
タ13をオフとし、前記トンネル磁気抵抗素子11に貫
通電流が流れなくなると、急速にその温度は低くなり、
ビット線12に流れる電流が誘起する磁場方向に沿うよ
うに、記録層の磁化方向が決定される。
In this embodiment, in the in-plane magnetization type ferromagnetic memory, a write current is passed through the write line 10 and the bit line 12, and a magnetic field generated by the current flowing through the bit line 12 is applied to the tunnel magnetoresistive element 11. The magnetization direction of the included recording layer is determined, and the magnetic field generated by the current flowing through the write line 10 facilitates reversal of the magnetization of the recording layer of the tunnel magnetoresistive element 11. During a write operation, a write current is passed through the write wiring 10 and at the same time a current is also passed through the bit line 12, and a voltage is applied to the word line 4 to turn on the field effect transistor 13 that functions as a switching element. The branched current flows through the tunnel magnetoresistive element 11 to the ground line 7.
By this operation, when the recording layer of the tunnel magnetoresistive element 11 is heated to near the Curie temperature, the magnetization is extremely likely to be reversed. From this state, when the field effect transistor 13 is turned off and a through current stops flowing through the tunnel magnetoresistive element 11, the temperature thereof rapidly decreases,
The magnetization direction of the recording layer is determined so as to be along the magnetic field direction induced by the current flowing through the bit line 12.

【0020】図2に、この書き込み動作において、各配
線に与える電圧、電流パルスの変動状況を模式的に示
す。
FIG. 2 schematically shows how the voltage and current pulse applied to each wiring change during this write operation.

【0021】図3は、本発明の一実施形態を示す、垂直
磁化型の強磁性体メモリの構成図である。本実施例の垂
直磁化型の強磁性体メモリは、半導体基板1上に、素子
分離領域2と、不純物拡散により形成されたソース/ド
レイン領域3とゲート電極として機能するワード線4か
らなる電界効果型トランジスタ13と、そのソースにプ
ラグ5を経由して接続された接地線7と、そのドレイン
にはプラグ5と金属層6とプラグ8を経由して接続され
た下部電極14と、下部電極14上にピン層(強磁性
体)/絶縁層/記録層(強磁性体)からなるトンネル磁
気抵抗素子11と、トンネル磁気抵抗素子11の上部電
極に接続されたビット線12と、トンネル磁気抵抗素子
11の下側横に配置された書き込み線10とから構成さ
れている。
FIG. 3 is a block diagram of a perpendicular magnetization type ferromagnetic memory showing an embodiment of the present invention. The perpendicular magnetization type ferromagnetic memory according to the present embodiment has a field effect composed of an element isolation region 2, a source / drain region 3 formed by impurity diffusion, and a word line 4 functioning as a gate electrode on a semiconductor substrate 1. Type transistor 13, a ground line 7 connected to the source via the plug 5, a lower electrode 14 connected to the drain via the plug 5, the metal layer 6 and the plug 8, and a lower electrode 14 A tunnel magnetoresistive element 11 composed of a pinned layer (ferromagnetic material) / insulating layer / recording layer (ferromagnetic material), a bit line 12 connected to an upper electrode of the tunnel magnetoresistive element 11, and a tunnel magnetoresistive element. 11 and a write line 10 arranged on the lower side of the line 11.

【0022】この他に、トンネル磁気抵抗素子11に接
するように、下部電極14に発熱層を配置しておいても
良い。
Besides, a heating layer may be arranged on the lower electrode 14 so as to be in contact with the tunnel magnetoresistive element 11.

【0023】この実施形態では、書き込み線10とビッ
ト線12に書き込み電流を流し、書き込み線10に流れ
る電流により発生する磁場が、トンネル磁気抵抗素子1
1に含まれる記録層の磁化方向を決定し、ビット線12
に流れる電流により発生する磁場がトンネル磁気抵抗素
子11の記録層の磁化を反転しやすくする。
In this embodiment, a write current is passed through the write line 10 and the bit line 12, and the magnetic field generated by the current flowing through the write line 10 causes the tunnel magnetoresistive element 1 to operate.
1 determines the magnetization direction of the recording layer included in the bit line 12
The magnetic field generated by the current flowing in the magnetic field makes it easy to reverse the magnetization of the recording layer of the tunnel magnetoresistive element 11.

【0024】情報の書き換え動作は、面内磁化型の強磁
性体メモリの場合と同様である。
The information rewriting operation is the same as in the case of the in-plane magnetization type ferromagnetic memory.

【0025】本発明の駆動方法を実現することにより、
設計ルールの小さい強磁性体メモリにおいても、簡単な
構造でかつ、容易な駆動方法により、情報を安定に書き
換えることができる。
By implementing the driving method of the present invention,
Even in a ferromagnetic memory having a small design rule, information can be stably rewritten with a simple structure and an easy driving method.

【0026】次に、本実施形態の強磁性体メモリの具体
例を示す。 (第1の具体例)第1の具体例では、トンネル絶縁膜を
2つの強磁性体薄膜で挟んだ構造をもつTMR素子を、
強磁性体の磁化方向を変更可能に選択することで電気抵
抗値を可変とした可変抵抗器として用いたものである。
Next, a specific example of the ferromagnetic memory of this embodiment will be shown. (First Specific Example) In the first specific example, a TMR element having a structure in which a tunnel insulating film is sandwiched between two ferromagnetic thin films is used.
This is used as a variable resistor in which the electric resistance value is made variable by selecting the magnetization direction of the ferromagnetic material to be changeable.

【0027】ここでは可変抵抗器(TMR層)は保磁力
の大きいハード層と、それよりも保磁力の小さいソフト
層によってトンネル絶縁膜を挟んだ構造であり、面内磁
化するものである。TMR層はハード層とソフト層の磁
化方向が平行の場合と反平行の場合で抵抗値が異なる。
そして、この磁化方向は外部から磁場を与えない限り持
続されるため不揮発性メモリを実現できる。
Here, the variable resistor (TMR layer) has a structure in which a tunnel insulating film is sandwiched between a hard layer having a large coercive force and a soft layer having a smaller coercive force, and is in-plane magnetized. The resistance value of the TMR layer differs depending on whether the magnetization directions of the hard layer and the soft layer are parallel or antiparallel.
Then, this magnetization direction is maintained unless a magnetic field is externally applied, so that a nonvolatile memory can be realized.

【0028】まず、第1の具体例におけるメモリの試作
工程について説明する。
First, the process of trial manufacture of the memory in the first specific example will be described.

【0029】図4に示すように、p型シリコン基板15
上に、SiO2からなる埋め込み型素子分離領域16
と、スイッチング素子として機能する電界効果型トラン
ジスタのドレインおよびソースとなるn型拡散領域17
と、SiO2ゲート絶縁膜18とポリシリコンゲート電
極19を形成する。
As shown in FIG. 4, p-type silicon substrate 15
On top of this, a buried element isolation region 16 made of SiO 2 is formed.
And an n-type diffusion region 17 serving as a drain and a source of a field effect transistor that functions as a switching element.
Then, the SiO 2 gate insulating film 18 and the polysilicon gate electrode 19 are formed.

【0030】次に、図5に示すように、層間絶縁膜を形
成し、表面を平坦化した後コンタクトホールをあけ、タ
ングステンを埋め込むことによってなるプラグ20を形
成する。次に、Ti/AlCuSi/Tiからなる配線
層を形成し、フォトリソグラフィー工程を経てビア21
と接地線22を形成する。
Next, as shown in FIG. 5, an interlayer insulating film is formed, the surface is flattened, contact holes are opened, and a plug 20 is formed by burying tungsten. Next, a wiring layer made of Ti / AlCuSi / Ti is formed, and a via 21 is formed through a photolithography process.
And the ground wire 22 is formed.

【0031】次に、図6に示すように、層間絶縁膜を形
成し、表面を平坦化した後、配線を形成する部分に溝を
形成し、主に銅からなる書き込み配線23を埋め込むよ
うに形成する。この手法には、メッキ法を用いる。書き
込み配線23および層間絶縁膜上面は、CMP(Chemic
al Mechanical Polishing)にて平坦化する。この書き
込み線23は図7では示されていないが、別途書き込み
電流制御用トランジスタと接続されている。
Next, as shown in FIG. 6, after forming an interlayer insulating film and flattening the surface, a groove is formed in a portion where a wiring is to be formed so that the write wiring 23 mainly made of copper is embedded. Form. A plating method is used for this method. The write wiring 23 and the upper surface of the interlayer insulating film are CMP (Chemic
flattening by al Mechanical Polishing). Although not shown in FIG. 7, the write line 23 is separately connected to the write current control transistor.

【0032】次に、図7に示すように、厚さ50nm程
度の層間絶縁膜を形成した後、コンタクトホールをあ
け、タングステンからなるプラグ24を形成し、表面を
平坦化する。次に、主にTiNからなるローカル配線層
を形成、フォトリソグラフィー工程を経た後、ローカル
配線25となる。
Next, as shown in FIG. 7, after forming an interlayer insulating film having a thickness of about 50 nm, a contact hole is opened, a plug 24 made of tungsten is formed, and the surface is flattened. Next, after forming a local wiring layer mainly made of TiN and performing a photolithography process, a local wiring 25 is formed.

【0033】次に、図8に示すように、Cu/CoFe
/Al23/γ―MnFeの積層構造26を作製し、層
間絶縁膜を形成した後、CMPプロセスによって、上部
のCu電極を露出させる。γ―MnFe層をピン層と
し、CoFeを記録層とする。
Next, as shown in FIG. 8, Cu / CoFe
After forming a laminated structure 26 of / Al 2 O 3 / γ-MnFe and forming an interlayer insulating film, the upper Cu electrode is exposed by a CMP process. The γ-MnFe layer is used as a pinned layer and CoFe is used as a recording layer.

【0034】次に、図9に示すように、主に銅からなる
ビット線27を銅メッキとCMPによる埋め込みプロセ
スによって形成し、保護膜28を形成して完成となる。
Next, as shown in FIG. 9, a bit line 27 mainly made of copper is formed by a copper plating and burying process by CMP, and a protective film 28 is formed to complete the process.

【0035】また、センスアンプを周辺回路として作製
した。
A sense amplifier was manufactured as a peripheral circuit.

【0036】このような構造のメモリを0.5μmルー
ル(最小加工寸法が0.5μm)で設計し、4×4個の
セルを有するテストチップを作製した。回路の概略を図
10に示す。一つのセル(C11、C12、C13・・
・)は、1個の電界効果型トランジスタ(FET;T1
1、T12、T13・・・)とそのドレイン端子と接続
された1個の可変抵抗器(TMR;R11、R12、R
13・・・)からなり、可変抵抗器の他端はビット線
(BL1、BL2、BL3、BL4)に接続され、FE
Tのソース端子は接地され、FETのゲート電極端子は
ワード線(WL1、WL2、WL3、WL4)に接続さ
れる。また、各ビット線はその電位を参照電圧(Re
f.)と比較するためのセンスアンプ(SA1、SA
2、SA3、SA4)に接続される。また、書き込み線
(WRL1、WRL2、WRL3、WRL4)は、各T
MRの直下に配置される。また、各ビット線は、接地用
トランジスタ(T1、T2、T3、T4)によって、接
地電位にすることができる。
A memory having such a structure was designed according to a rule of 0.5 μm (minimum processing dimension is 0.5 μm), and a test chip having 4 × 4 cells was manufactured. The outline of the circuit is shown in FIG. One cell (C11, C12, C13 ...
・) Is one field effect transistor (FET; T1)
1, T12, T13 ...) and one variable resistor (TMR; R11, R12, R) connected to its drain terminal.
13 ...) and the other end of the variable resistor is connected to the bit lines (BL1, BL2, BL3, BL4),
The source terminal of T is grounded, and the gate electrode terminal of FET is connected to the word lines (WL1, WL2, WL3, WL4). The potential of each bit line is set to the reference voltage (Re
f. ) Sense amplifiers (SA1, SA)
2, SA3, SA4). In addition, the write lines (WRL1, WRL2, WRL3, WRL4) are connected to each T
It is located directly below the MR. Further, each bit line can be set to the ground potential by the grounding transistors (T1, T2, T3, T4).

【0037】図11は、テストチップのセル部分を上か
ら見た様子を示したものである。図中、細かい点線で示
される1マスが最小加工寸法0.5μmを表している。
可変抵抗器(TMR)は、縦横比3の長方形をしてお
り、長手方向に磁化容易軸があり、縦方向に磁化する。
ビット線(BL)に流れる電流に向きによってTMRの
磁化の向きを決定し、書き込み線(WRL)に流す電流
は、TMRの磁化容易軸に対し垂直の磁場を発生し、磁
化を反転しやすくするための補助磁場を発生させる役割
を持つ。
FIG. 11 shows a state where the cell portion of the test chip is viewed from above. In the figure, one mass indicated by a fine dotted line represents the minimum processing dimension of 0.5 μm.
The variable resistor (TMR) has a rectangular shape with an aspect ratio of 3, has an easy axis of magnetization in the longitudinal direction, and magnetizes in the longitudinal direction.
The direction of the TMR magnetization is determined by the direction of the current flowing through the bit line (BL), and the current flowing through the write line (WRL) generates a magnetic field perpendicular to the easy axis of TMR, facilitating the reversal of the magnetization. Has a role of generating an auxiliary magnetic field.

【0038】図10におけるセルC22に「1」を書き
込む動作について説明する。書き込み線WRL2とビッ
ト線BL2に電流を流し(この際T2はオン状態にす
る)、次にワード線WL2の電圧を上げ電界効果型トラ
ンジスタT22をオンとし、TMR(R22)に貫通電
流を流して加熱し、TMR(R22)の記録層とピン層
の磁化方向が反平行となるよう、前記記録層の磁化を反
転させる。このときのビット線BL2とワード線WL2
に流れる電流値は、それぞれ5mAであった。また、T
MR(R22)に流れる貫通電流値は、約60μAであ
る。この操作によって、TMR(R22)を高抵抗状態
とすることができる。次に、セルC22の情報を読み出
すため、選択トランジスタT22をオンとし、BL2に
定電流を流し、ビット線BL2と参照電圧とをセンスア
ンプSA2により比較する。この場合、R22は高抵抗
状態なので、BL2の電位の方が参照電圧より高くな
り、SA2は「Hi」信号を出力する。
The operation of writing "1" in the cell C22 in FIG. 10 will be described. A current is passed through the write line WRL2 and the bit line BL2 (at this time, T2 is turned on), then the voltage of the word line WL2 is raised to turn on the field effect transistor T22, and a through current is passed through TMR (R22). By heating, the magnetization of the recording layer of TMR (R22) is reversed so that the magnetization directions of the recording layer and the pinned layer are antiparallel. Bit line BL2 and word line WL2 at this time
The value of the current flowing through each was 5 mA. Also, T
The value of the through current flowing through the MR (R22) is about 60 μA. By this operation, TMR (R22) can be brought into a high resistance state. Next, in order to read the information of the cell C22, the selection transistor T22 is turned on, a constant current is passed through BL2, and the bit line BL2 and the reference voltage are compared by the sense amplifier SA2. In this case, since R22 is in the high resistance state, the potential of BL2 becomes higher than the reference voltage, and SA2 outputs the “Hi” signal.

【0039】一方、書き込み時に、電界効果型トランジ
スタT22をオフとしたままとし、TMR(R22)に
貫通電流を流さず、すなわち加熱せずに書き込み動作を
終了したところ、情報が書き換わらなかった。
On the other hand, at the time of writing, when the field effect transistor T22 was kept off and the write operation was completed without passing through current to TMR (R22), that is, without heating, no information was rewritten.

【0040】これによって、本発明になる動作の有効性
が確かめられた。 (第2の具体例)第1の具体例と同様な試作工程によ
り、図12に示すようなメモリセルを試作した。第1の
具体例と異なる点は、TbFe/Al23/GdFe積
層膜からなるTMR層29が形成されており、書き込み
線23をTMR層29の横に設けて垂直磁化させる構造
を採った点である。
This confirmed the effectiveness of the operation according to the present invention. (Second Specific Example) A memory cell as shown in FIG. 12 was experimentally manufactured by the same manufacturing process as in the first specific example. The difference from the first specific example is that the TMR layer 29 made of a TbFe / Al 2 O 3 / GdFe laminated film is formed, and the write line 23 is provided beside the TMR layer 29 to vertically magnetize. It is a point.

【0041】このメモリセルについて、第1の具体例と
同様の動作試験を行った結果、同様に本発明になる動作
の効果が確認できた。
As a result of conducting an operation test on this memory cell in the same manner as in the first specific example, the effect of the operation according to the present invention was similarly confirmed.

【0042】[0042]

【発明の効果】本発明によれば、設計ルールが小さくな
っても、簡単な構造でかつ、容易方法で、強磁性体メモ
リの情報書き換えが可能となる。
According to the present invention, it is possible to rewrite information in a ferromagnetic memory with a simple structure and an easy method even if the design rule becomes small.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施形態における強磁性体メモリの
構成を示す断面図である。
FIG. 1 is a sectional view showing a configuration of a ferromagnetic memory according to an embodiment of the present invention.

【図2】本発明の駆動時における電圧、電流の印加方法
を示すための説明図である。
FIG. 2 is an explanatory diagram showing a method of applying a voltage and a current during driving of the present invention.

【図3】本発明の一実施形態における強磁性体メモリの
構成を示す断面図である。
FIG. 3 is a sectional view showing a configuration of a ferromagnetic memory according to an embodiment of the present invention.

【図4】第1の具体例の試作工程を示す断面図(1)で
ある。
FIG. 4 is a sectional view (1) showing a trial production process of the first specific example.

【図5】第1の具体例の試作工程を示す断面図(2)で
ある。
FIG. 5 is a sectional view (2) showing a trial manufacturing process of the first specific example.

【図6】第1の具体例の試作工程を示す断面図(3)で
ある。
FIG. 6 is a sectional view (3) showing a trial manufacturing process of the first specific example.

【図7】第1の具体例の試作工程を示す断面図(4)で
ある。
FIG. 7 is a sectional view (4) showing a trial manufacturing process of the first specific example.

【図8】第1の具体例の試作工程を示す断面図(5)で
ある。
FIG. 8 is a sectional view (5) showing a trial manufacturing process of the first specific example.

【図9】第1の具体例の試作工程を示す断面図(6)で
ある。
FIG. 9 is a sectional view (6) showing a trial manufacturing process of the first specific example.

【図10】第1の具体例の強磁性体メモリ構成を示す回
路図である。
FIG. 10 is a circuit diagram showing a ferromagnetic memory configuration of a first specific example.

【図11】第1の具体例の強磁性体メモリ構成を示す平
面配置図である。
FIG. 11 is a plan layout view showing a ferromagnetic memory configuration of a first specific example.

【図12】第2の具体例の強磁性体メモリ構成を示す断
面図である。
FIG. 12 is a cross-sectional view showing a ferromagnetic memory configuration of a second specific example.

【符号の説明】[Explanation of symbols]

1 半導体基板 2 素子分離領域 3 ソース/ドレイン領域 4 ワード線 5 プラグ 6 金属層 7 接地線 8 プラグ 9 ローカル配線 10 書き込み線 11 トンネル磁気抵抗素子 12 ビット線 13 電界効果型トランジスタ 14 下部電極 15 p型シリコン基板 16 埋め込み型素子分離領域 17 n型拡散領域 18 SiO2ゲート絶縁膜 19 ポリシリコンゲート電極 20 タングステンプラグ 21 ビア 22 接地線 23 銅書き込み線 24 タングステンプラグ 25 TiNローカル配線 26 Cu/CoFe/Al2O3/γ−MnFe 27 銅ビット線 28 保護膜 29 TbFe/Al2O3/GdFe1 semiconductor substrate 2 element isolation region 3 source / drain region 4 word line 5 plug 6 metal layer 7 ground line 8 plug 9 local wiring 10 write line 11 tunnel magnetoresistive element 12 bit line 13 field effect transistor 14 lower electrode 15 p-type Silicon substrate 16 Embedded element isolation region 17 n-type diffusion region 18 SiO 2 gate insulating film 19 polysilicon gate electrode 20 tungsten plug 21 via 22 ground line 23 copper write line 24 tungsten plug 25 TiN local wiring 26 Cu / CoFe / Al2O3 / γ-MnFe 27 Copper bit line 28 Protective film 29 TbFe / Al2O3 / GdFe

Claims (10)

【特許請求の範囲】[Claims] 【請求項1】 それぞれが第1および第2の強磁性体膜
を有し、該第1および第2の強磁性体膜の磁化方向が平
行である場合と、反平行である場合とで異なる電気抵抗
値を示す複数の可変抵抗器を有する強磁性体メモリの駆
動方法であって、情報書き込みの際に、選択された前記
可変抵抗器に電流を流し、前記可変抵抗器の温度を常温
より高くして、情報書き込みを行う強磁性体メモリの熱
補助駆動方法。
1. Each has a first and a second ferromagnetic film, and is different depending on whether the magnetization directions of the first and the second ferromagnetic films are parallel and antiparallel. A method of driving a ferromagnetic memory having a plurality of variable resistors showing an electric resistance value, wherein when writing information, a current is passed through the selected variable resistor so that the temperature of the variable resistor is higher than room temperature. A thermally assisted driving method of a ferromagnetic memory for increasing information writing.
【請求項2】 前記強磁性体メモリが、 互いに平行な複数のビット線と、互いに平行で該ビット
線に交差する複数のワード線と、半導体基板上に形成さ
れ、制御端子が所定の前記ワード線に接続され一方の端
子が接地されたスイッチング素子と、前記強磁性体の磁
化の方向により異なる電気抵抗値の選択を可能とし前記
スイッチング素子の他方の端子に一方の端子が接続され
所定の前記ビット線に他方の端子が接続された可変抵抗
器と、電流を流すことで誘起される磁場によって前記可
変抵抗器の抵抗値を選択する書き込み配線と、所定の前
記ビット線に接続されていて前記可変抵抗器の抵抗値を
検出する信号検知回路とを有し、 情報書き込みの際に、選択された前記可変抵抗器に電流
を流し、前記可変抵抗器の温度を常温より高くして、情
報書き込みを行う請求項1記載の強磁性体メモリの熱補
助駆動方法。
2. The ferromagnetic memory is formed on a semiconductor substrate with a plurality of bit lines parallel to each other, a plurality of word lines parallel to each other and intersecting the bit lines, and a word having a predetermined control terminal. A switching element connected to a line and one terminal of which is grounded, and a different electric resistance value that enables selection of different electrical resistance values depending on the direction of magnetization of the ferromagnetic material, and one terminal of which is connected to the other terminal of the switching element. A variable resistor having the other terminal connected to the bit line, a write wire for selecting the resistance value of the variable resistor by a magnetic field induced by flowing a current, and a write wire connected to a predetermined bit line. And a signal detection circuit for detecting the resistance value of the variable resistor.When writing information, a current is passed through the selected variable resistor to raise the temperature of the variable resistor above room temperature, Ferromagnetic heat-assisted method for driving a memory according to claim 1 for writing.
【請求項3】 前記強磁性体メモリが、 前記可変抵抗器とは別に前記可変抵抗器に接するよう
に、発熱層を有し、 情報書き込みの際に、選択された前記可変抵抗器と前記
発熱層に電流を流し、前記可変抵抗器の温度を常温より
高くして、情報書き込みを行う請求項1または請求項2
記載の強磁性体メモリの熱補助駆動方法。
3. The ferromagnetic memory has a heating layer so as to be in contact with the variable resistor separately from the variable resistor, and when the information is written, the selected variable resistor and the generated heat are generated. 3. An information write is performed by passing a current through the layer to raise the temperature of the variable resistor above normal temperature.
A thermally assisted driving method for a ferromagnetic memory according to claim 1.
【請求項4】 前記可変抵抗器が、 トンネル磁気抵抗素子であることを特徴とする請求項1
または請求項2記載の強磁性体メモリの熱補助駆動方
法。
4. The variable resistor is a tunnel magnetoresistive element.
Alternatively, the heat assisted driving method of the ferromagnetic memory according to claim 2.
【請求項5】 前記スイッチング素子が、 電界効果型トランジスタであることを特徴とする請求項
2記載の強磁性体メモリの熱補助駆動方法。
5. The heat-assisted driving method for a ferromagnetic memory according to claim 2, wherein the switching element is a field effect transistor.
【請求項6】 前記スイッチング素子が、 薄膜トランジスタを用いたことを特徴とする請求項2記
載の強磁性体メモリの熱補助駆動方法。
6. The heat assisted driving method for a ferromagnetic memory according to claim 2, wherein the switching element is a thin film transistor.
【請求項7】 前記トンネル磁気抵抗素子の強磁性体膜
の磁化方向が、 膜面に対して水平方向とすることを特徴とする請求項1
または請求項4記載の強磁性体メモリの熱補助駆動方
法。
7. The magnetization direction of the ferromagnetic film of the tunnel magnetoresistive element is horizontal to the film surface.
5. A heat assisted driving method for a ferromagnetic memory according to claim 4.
【請求項8】 前記トンネル磁気抵抗素子の強磁性体膜
の磁化方向が、 膜面に対して垂直方向とすることを特徴とする請求項1
または請求項4記載の強磁性体メモリの熱補助駆動方
法。
8. The magnetization direction of the ferromagnetic film of the tunnel magnetoresistive element is perpendicular to the film surface.
5. A heat assisted driving method for a ferromagnetic memory according to claim 4.
【請求項9】前記トンネル磁気抵抗素子が、 保磁力の大きい第1の強磁性体と、該第1の強磁性体よ
りも保磁力の小さい第2の強磁性体にトンネル絶縁膜が
挟まれてなる請求項1または請求項4記載の強磁性体メ
モリの熱補助駆動方法。
9. The tunnel magnetoresistive element has a tunnel insulating film sandwiched between a first ferromagnetic material having a large coercive force and a second ferromagnetic material having a smaller coercive force than the first ferromagnetic material. 6. A method of thermally assisting a ferromagnetic memory according to claim 1, wherein
【請求項10】 情報書き込みの際に、選択された前記
可変抵抗器に電流を流し、前記可変抵抗器の温度が、 記録層強磁性体のキュリー温度より高くすることを特徴
とする請求項1記載の強磁性体メモリの熱補助駆動方
法。
10. When writing information, a current is caused to flow through the selected variable resistor so that the temperature of the variable resistor is higher than the Curie temperature of the recording layer ferromagnetic material. A thermally assisted driving method for a ferromagnetic memory according to claim 1.
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