JP2003037437A - Cr oscillation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a CR oscillation circuit having no fluctuation, in the oscillation frequency due to changes in power supply voltage. SOLUTION: A current mirror type bias circuit is used for a bias circuit unit 104. Reference voltages VP and VN at a VDD side and a VSS side which are independent from power supply voltage are outputted, and are respectively inputted into the gates of transistors MP12 and MN12 of an inverter 103. The transistor of a bias circuit unit, the transistor MP12 and MN12 of the inverter 103 each have a current mirror constitution. The inverter 103 outputs a constant charging/discharging current not depending on power supply voltage, and the inverter 103 is reversed by this current. A CR oscillation circuit unit 107 outputs an output signal of a stable frequency, which is independent of a power supply voltage from an output terminal (to), and a switching current of the inverter 103 which is to be miniaturized is reduced. Thus, power consumption can be reduced significantly, and the generation of radiation noises to the outside can be suppressed significantly.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a CR oscillator circuit.

[0002]

2. Description of the Related Art In a conventional CR oscillator circuit, as shown in FIG. 5, a first stage inverter 401 and a second stage inverter 4 are used.
02 is connected in series in series with each other, and the inverter 40
The input terminal ti of 1 is connected to one plate of the capacitive element 404, and the output terminal of the inverter 402 is connected to the other plate of the capacitive element 404. In addition, the inverter 402
The input terminal of the inverter 403 is connected to the output terminal of
A resistance element 405 is connected between the output terminal to of the inverter 403 and the input terminal ti of the inverter 401,
A diode circuit D for removing overvoltage is connected to the input terminal ti.

The operation of the conventional CR oscillator circuit having such a configuration will be described with reference to FIG. In the figure, Vi and Vo are the input terminal ti and the output terminal t shown in FIG. 5, respectively.
o indicates a signal generated at o, and the signal Vi indicates an inverter 403.
Shows a differential waveform when the resistance element 405 and the capacitance element 404 are driven to perform charging / discharging. When the potential of the signal Vi exceeds the predetermined threshold value of the inverter 401 on the VDD side or the VSS side due to the charging / discharging in this case, the output of the inverter 401 is inverted, and accordingly, the output of the inverter 402 is also inverted. Inverter 4
The potential of the electrode plate of the capacitive element 404 connected to 02 rapidly changes to the VDD level or the VSS level.

Considering the charge of the capacitive element 404 immediately before the potential change, the potential of the signal Vi is near the threshold value of the inverter 401, and the output potential of the inverter 402 is VDD or VSS. The potential between the electrodes of the capacitive element 404 is approximately (1/2) VDD. Therefore, when the capacitance value of the capacitive element 404 is C and the charge charged in the capacitive element 404 is Q, the equation (1) is established.

[0005]           Q = C ・ (1/2) VDD ・ ・ ・ (1)

Here, the potential of the signal Vi immediately after the output of the inverter 402 is inverted becomes the value shown in the equation (2) when the inverter 402 is inverted to the VDD side according to the law of charge conservation, and the inverter 402 is turned to the VSS side. It is obvious that the value shown in the equation (3) is obtained when the value is inverted to.

[0007]           Vi = (1/2) VDD + VDD (2)

[0008]           Vi = (1/2) VDD-VDD (3)

Then, the inverter 403 inverts based on the output of the inverter 402, and the equation (2) or (3) is used.
By charging and discharging the potential of the signal Vi given by the equation, a rectangular wave signal Vo as shown in FIG. 6 is output as an oscillation signal.

In this case, assuming that the resistance value of the resistance element 405 is R and the capacitance value of the capacitance element 404 is C as described above, the oscillation frequency F is obtained by the equation (4) with a constant A.

[0011]           F = 1 / ARC (4)

As is apparent from the equation (4), the oscillation frequency F is determined by the charge / discharge characteristics based on the time constant of the resistance element 405 having a resistance value R and the capacitance element 404 having a capacitance value C.

Here, an inverter 403 for charging and discharging
Is a P-channel MOS (Metal Oxide Sem)
and an inverter 403 at the time of switching, and is composed of an N-channel MOS transistor (hereinafter abbreviated as transistor NM) and an N-channel MOS transistor (hereinafter abbreviated as transistor NM).
ON resistance Rtr is added to the resistance value R of the resistance element 405. Therefore, the equation (4) is actually represented by the equation (5).

[0014]           F = 1 / AC (R + Rtr) (5)

[0015]

As described above, in the conventional CR oscillation circuit, the oscillation frequency F is expressed by the equation (5), but when the power supply voltage changes, the inverter 403, which is the charge / discharge driving element, turns ON. Since the resistance Rtr changes, (5)
There is a problem that the oscillation frequency of the CR oscillation circuit changes based on the equation. Incidentally, since the resistance element 405 is made of an impurity diffusion resistance material or a high resistance organosilicon polymer Si heat resistant electrical insulation material, its resistance value does not depend on the power supply voltage. Further, since the electrode plate of the capacitive element 404 is also made of an impurity diffusion resistance material, a high resistance organosilicon polymer Si heat resistant electrical insulation material, or a two-layer Al material, its capacitance value depends on the power supply voltage. There is no such thing. Therefore, the cause of the frequency change accompanying the power supply voltage change is the inverter 4
03 ON resistance only.

Therefore, in order to obtain a stable frequency with respect to the change in the power supply voltage, the inverter 4 is connected to the resistance element 405.
It is necessary to make the ON resistance of 03 as small as possible. In this case, the inverter 403, which is a charge / discharge driving element, is turned on.
In order to reduce the resistance, the MO that constitutes the inverter 403
It is necessary to increase the element size of the S transistor,
When the element size of the OS transistor is increased, the parasitic capacitance of the gate and the drain is increased, which causes difficulty in frequency setting and frequency adjustment in circuit design, which causes an increase in the number of trial manufactures until commercialization. Also, MOS
As the transistor element size increases, the through current of the charging / discharging drive element during switching operation increases, the consumption current increases, the power supply inside the chip becomes unstable, and radiation noise emission to the outside of the chip may occur. . Further, as the oscillation frequency becomes higher, the resistance value of the resistance element 405 becomes smaller, and the element size of the charging / discharging element must be increased correspondingly, and the difficulty of designing becomes deeper.

The present invention has been made in view of the present situation of the oscillation frequency fluctuation associated with the change of the power supply voltage of the conventional CR oscillation circuit as described above, and its purpose is to oscillate depending on the change of the power supply voltage. It is to provide a CR oscillation circuit in which the frequency does not change.

[0018]

In order to achieve the above object, the invention according to claim 1 is a CR which outputs an oscillation signal of a predetermined oscillation frequency based on the charge and discharge characteristics of a capacitance element and a resistance element.
In the oscillator circuit, a bias voltage is supplied from the bias circuit, a constant current source circuit that generates and supplies a constant charging / discharging current that is not affected by fluctuations in the power supply voltage, and the capacitive element and the resistive element are included in the constituent elements. And a charging / discharging circuit that outputs the oscillation signal based on the charging / discharging current supplied from the constant current source circuit.

According to such means, the bias voltage is supplied from the bias circuit to the constant current source circuit, and the constant current source circuit generates and supplies a constant charging / discharging current which is not affected by fluctuations in the power supply voltage. Based on the charging / discharging current supplied from the constant current source circuit, the charging / discharging circuit including the capacitive element and the resistive element as constituent elements causes the predetermined oscillation frequency An oscillation signal is output, and an output signal having a stable oscillation frequency that does not depend on the power supply voltage is output.

To achieve the above object, the invention according to claim 2 is the CR oscillation circuit according to claim 1, wherein the constant current source circuit is a current mirror type circuit, and the bias circuit and the constant current source circuit are It is characterized by having a current mirror configuration.

According to such means, the bias voltage is supplied from the bias circuit to the current mirror type constant current source circuit having a current mirror configuration with the bias circuit,
The current mirror type constant current source circuit generates and supplies a constant charging / discharging current that is not affected by fluctuations in the power supply voltage, and based on the charging / discharging current supplied from the constant current source circuit, a capacitive element and a resistance element are provided. Based on the charge / discharge characteristics of the capacitive element and the resistive element, the charge / discharge circuit including
An oscillation signal with a predetermined oscillation frequency is output, and it is possible to output an output signal with a stable oscillation frequency that does not depend on the power supply voltage, and the constant current source circuit is miniaturized to reduce switching current and reduce power consumption. Is significantly reduced,
Generation of radiation noise to the outside is also greatly suppressed.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] A first embodiment of the present invention will be described with reference to FIGS. 1 is a circuit diagram showing a configuration of the present embodiment, FIG. 2 is a circuit diagram showing a configuration of a first bias circuit which is a constituent element of the bias circuit unit of FIG. 1, and FIG. 3 is a diagram of the bias circuit unit of FIG. It is a circuit diagram which shows the structure of the 2nd bias circuit used as a component.

In this embodiment, as shown in FIG. 1, the bias circuit unit 104, which is connected to the power supply voltage VDD and the power supply voltage VSS and supplies the reference voltages VP and VN to the CR oscillation circuit unit 107, is the CR oscillation circuit unit. 107
It is configured to be connected to. In the CR oscillating circuit unit 107, the first-stage inverter 101 and the second-stage inverter 102 are cascade-connected to each other in series, and the input terminal ti of the inverter 101 is connected to one plate of the capacitive element 105, and the inverter 102 is connected. Is connected to the other electrode plate of the capacitive element 105, and the input terminal ti is connected to the diode circuit D for removing the overvoltage. The inverter 103 is connected to the output terminal of the inverter 102, and the resistance element 106 is connected between the output terminal ti of the inverter 103 and the input terminal ti of the inverter 101.

Here, the inverter 103 includes a transistor MP11, a transistor MP12, and a transistor MN.
11 and the transistor MN12, the source of the transistor MP11 is connected to the drain of the transistor MP12 whose source is connected to the power supply terminal, and the drain of the transistor MP11 is connected to the transistor MN1.
1, the drain of the transistor MN12 is connected to the source of the transistor MN11, and the source of the transistor MN12 is grounded. Then, the output terminal of the reference voltage VP on the VDD side of the bias circuit unit 104 is connected to the gate of the transistor MP12, the output terminals of the inverter 102 are connected to the gates of the transistors MP11 and MN11, and the gate of the transistor MN12 is biased. The output terminal of the reference voltage VN on the VSS side of the circuit 104 is connected, and the output terminal of the inverter 103 is provided at the connection point between the drain of the transistor MP11 and the drain of the transistor MN11.

By the way, to the bias circuit unit 104, the bias circuit 110 having the structure shown in FIG. 2 for supplying the VDD-side reference voltage VP and the bias circuit 111 having the structure shown in FIG. 3 for supplying the VSS-side reference voltage VN are provided. And the bias circuit 110 and the bias circuit 111.
Are both current mirror type bias circuits.

Here, in the bias circuit 110, as shown in FIG. 2, the resistance element R20 is connected between the source of the transistor MP21 and the power supply terminal of the power supply voltage VDD, and the drain and gate of the transistor MP21 are connected to each other. The drain of the connected transistor MN21 is connected, and the source of the transistor MN21 is connected to the power supply terminal of the power supply voltage VSS set to the ground potential.
Also, the source is connected to the power supply terminal of the power supply voltage VDD,
Transistor MP with drain and gate connected to each other
The drain of 20 is connected to the drain of the transistor MN20, and the source of the transistor MN20 is connected to the power supply terminal of the power supply voltage VSS set to the ground potential. Further, the gate of the transistor MP20 is connected to the gate of the transistor MP21, and
The gate of N20 is connected to the gate of the transistor MN21, and the output terminal of the reference voltage VP is provided at the connection point of the drain of the transistor MP20 and the drain of the transistor MN20.

On the other hand, in the bias circuit 111, as shown in FIG. 3, the source is connected to the power supply terminal of the power supply voltage VDD, and the gate and the source are connected to each other in the transistor M.
The source of P31 is connected to the drain of the transistor MN31, and the resistance element R30 is connected between the source of the transistor MN31 and the power supply terminal of the power supply voltage VSS set to the ground potential. The drain of the transistor MP30 whose source is connected to the power supply terminal of the power supply voltage VDD is connected to the drain of the transistor MN30 whose drain and gate are connected to each other, and the source of the transistor MN30 is set to the ground potential. It is connected to the power supply terminal of VSS. Further, the gate of the transistor MP30 is connected to the gate of the transistor MP31, the gate of the transistor MN30 is connected to the gate of the transistor MN31, and the transistor M
An output terminal for the reference voltage VN is provided at a connection point between the drain of P30 and the drain of the transistor MN30.

The operation of this embodiment having such a configuration will be described. In the bias circuit unit 104 shown in FIG. 1, the voltage at the output terminal of the reference voltage VP of the bias circuit 110 shown in FIG. 2 is equal to the gate-source voltage of the transistor MP20 of the bias circuit 110 shown in FIG. The voltage is equal to the sum of the voltage across the resistor element R20 and the source-gate voltage of the transistor MP21. Therefore, the reference voltage VP supplied from the output terminal of the reference voltage of the bias circuit 110 to the inverter 103 is
It becomes a constant value determined by the dimension given by the ratio of the channel length L and the channel width W in the transistors MP20 and MP21 and the resistance value of the resistance element R20.

This reference voltage VP is input to the gate of the transistor MP12 in the inverter 103 shown in FIG. 1, and the transistor MP20 of the bias circuit 110 and the transistor MP12 of the inverter 103 shown in FIG.
Operate as a constant current source circuit having a current mirror configuration, and the current flowing in the transistor MP20 is Imp20,
The current flowing through the transistor MP12 is Imp12,
The channel width of the transistor MP20 is Wmp20 and the channel width of the transistor MP12 is Wmp12 (6)
The formula is obtained.

[0030]   Imp12 = Imp20. (Wmp12 / Wmp20) (6)

In the current mirror type bias circuit 110, the current Imp20 flowing through the transistor MP20 is
Since it is a constant value that does not depend on the power supply voltage, as is apparent from the expression (6), the CR oscillating circuit unit 107 is driven by adjusting Wmp12 and Wmp20 and setting the current Imp12 flowing in the transistor MP12 to an appropriate value. The charging current is set to a constant value that does not depend on the power supply voltage.

Similarly, in the bias circuit unit 104 shown in FIG. 1, the voltage VN at the output terminal of the reference voltage of the bias circuit 111 shown in FIG.
It is equal to the gate-source voltage of 0, which is equal to the sum of the voltage across the resistor element R30 and the gate-source voltage of the transistor MP31. Therefore, the reference voltage V supplied from the reference voltage output terminal of the bias circuit 111
N is a constant value determined by the dimension given by the ratio of the channel length L and the channel width W in the transistors MN30 and MN31 and the resistance value of the resistance element R30.

This reference voltage VN is input to the gate of the transistor MN12 in the inverter 103 shown in FIG. 1, and the transistor MN3 of the bias circuit 111 shown in FIG.
0 and the transistor MN12 of the inverter 103 are
It operates as a constant current source circuit of a current mirror configuration, the current flowing through the transistor MN30 is Imn30, the current flowing through the transistor MN12 is Imn12, the channel width of the transistor MN30 is Wmn30, and the channel width of the transistor MN12 is Wmn12. can get.

[0034]   Imn12 = Imn30 · (Wmn12 / Wmn30) (7)

In the current mirror type bias circuit 111, the current Imn30 flowing through the transistor MN30 is
Since it is a constant value that does not depend on the power supply voltage, as is apparent from the expression (7), the CR oscillation circuit unit 107 is driven by adjusting Wmn12 and Wmn30 and setting the current Imn12 flowing in the transistor MN12 to an appropriate value. The discharge current is set to a constant value that does not depend on the power supply voltage.

In this way, according to the present embodiment,
Due to the current mirror function of the bias circuits 110 and 111, reference voltages VP and VN on the VDD side and the VSS side that do not depend on the power supply voltage are output from these bias circuits, and the transistors MP12 and MN1 of the inverter 103 are output.
It is input to each of the two gates. Then, the transistor MP20 and the inverter 103 of the bias circuit 110
The transistor MP12, the transistor MN30 of the bias circuit 111, and the transistor MN12 of the inverter 103 each operate as a current mirror circuit, and a constant charge / discharge current that does not depend on the power supply voltage is output from the output terminal of the inverter 103. Is output. For this reason, the inverter 103 can invert based on this charge / discharge current, and can output an output signal of a stable oscillation frequency independent of the power supply voltage from the output terminal to of the CR oscillation circuit 107, and It is possible to reduce the size of 103, reduce the switching current, significantly reduce the power consumption, and significantly suppress the generation of radiation noise to the outside.

[Second Embodiment] A second embodiment of the present invention will be described with reference to FIG. FIG. 4 is a circuit diagram showing a main configuration of the present embodiment.

In the present embodiment, as shown in FIG. 4, a NAND inverter 603 is provided in the final stage inverter 103A, one output terminal of the inverter 102 is connected to one input terminal of the NAND inverter 603, and the NAND inverter 603 is connected. The other input terminal is connected to the STOP terminal capable of inputting the STOP signal, and the transistor MP60 supplied with the reference voltage VP is connected between the power supply terminal of the power supply voltage VDD and the NAND inverter 603, and the NAND inverter 603 is connected. A transistor MN60 to which the reference voltage VN is supplied is connected between the power supply terminal of the power supply voltage VSS and the power supply voltage VSS set to the ground potential. The configuration of the other parts of the present embodiment is the same as that of the first embodiment already described, and therefore a duplicate description will not be given.

In the present embodiment, the reference voltage V on the VDD side
The NAND inverter 603 is inverted via the transistor MP60 to which P is applied and the transistor MN60 to which the reference voltage VN on the VSS side is applied, and the output from the output terminal to of the CR oscillation circuit unit 107A is stable independent of the power supply voltage. It becomes possible to output an output signal of the oscillated frequency, and the inverter 103A is miniaturized to reduce the switching current, thereby significantly reducing the power consumption,
The generation of radiation noise to the outside can be significantly suppressed, and the operation of the CR oscillation circuit unit 107A can be controlled by the STOP signal.

In each of the embodiments described above,
The case where two bias circuits, that is, the bias circuit that provides the VDD-side reference voltage VP and the bias circuit that provides the VSS-side reference voltage VN are used in the bias circuit unit has been described. It is not limited to the form of, for example, in the bias circuit unit,
The reference voltage VP on the VDD side by one bias circuit
It is also possible to provide a bias circuit that provides a reference voltage VN on the VSS side. Also, the reference voltage VP on the VDD side
It is also possible to provide the bias circuit unit with a bias circuit that provides either one of the reference voltage VN and the reference voltage VN on the VSS side.

[0041]

According to the invention of the CR oscillator circuit of claim 1, a bias voltage is supplied from the bias circuit to the constant current source circuit, and the constant current source circuit does not affect the power supply voltage. Charge and discharge current is generated and supplied,
Based on the charging / discharging current supplied from the constant current source circuit, by the charging / discharging circuit including the capacitive element and the resistive element as constituent elements, based on the charging / discharging characteristics of the capacitive element and the resistive element,
Since an oscillation signal with a predetermined oscillation frequency is output, it is possible to output an output signal with a stable oscillation frequency that does not depend on the power supply voltage.

According to the invention of the CR oscillator circuit of claim 2, the bias voltage is supplied from the bias circuit to the current mirror type constant current source circuit having the current mirror configuration with the bias circuit, and the current mirror type constant current source circuit is provided. The current source circuit generates and supplies a constant charging / discharging current that is not affected by fluctuations in the power supply voltage, and based on the charging / discharging current supplied from the constant current source circuit, the capacitive element and the resistance element are included in the constituent elements. The included charging / discharging circuit outputs an oscillation signal with a predetermined oscillation frequency based on the charging / discharging characteristics of the capacitive element and the resistive element, so it is possible to output an output signal with a stable oscillation frequency that does not depend on the power supply voltage. In addition, the constant current source circuit is downsized, the switching current is reduced, the power consumption is greatly reduced, and the generation of radiation noise to the outside is also significantly suppressed. Door is possible.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a first bias circuit which is a constituent element of the bias circuit unit of FIG.

FIG. 3 is a circuit diagram showing a configuration of a second bias circuit which is a constituent element of the bias circuit unit of FIG.

FIG. 4 is a circuit diagram showing a main configuration of a second embodiment of the present invention.

FIG. 5 is a circuit diagram showing a configuration of a conventional CR oscillator circuit.

6 is a signal waveform diagram showing an operation of the CR oscillation circuit of FIG.

[Explanation of symbols]

101, 102, 103, 103A ... Inverter, 1
04, 104A ... Bias circuit unit, 105 ...
Capacitance element, 106 .. Resistance element, 107 .. CR oscillation circuit unit, 110, 111 .. Bias circuit.

Claims (2)

[Claims] 1. In a CR oscillation circuit that outputs an oscillation signal of a predetermined oscillation frequency based on the charge / discharge characteristics of a capacitive element and a resistive element, a bias voltage is supplied from a bias circuit, and a constant charge that is not affected by fluctuations in power supply voltage. A constant current source circuit that generates and supplies a discharge current, and a charge / discharge circuit that includes the capacitive element and the resistance element as constituent elements and that outputs the oscillation signal based on the charge / discharge current supplied from the constant current source circuit. And a CR oscillation circuit. 2. The CR oscillator circuit according to claim 1, wherein:
A CR oscillator circuit, wherein the constant current source circuit is a current mirror type circuit, and the bias circuit and the constant current source circuit are in a current mirror configuration.