JP2003015944A - Memory management device and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve a memory management device that can hold down the increase of execution frequency of garbage collection and can prevent the reduction of substantial speed of access to a flash memory without increasing the memory capacity of a reserved memory, for the garbage collection, allocated in a block in the flash memory. SOLUTION: The memory management device is characterized in that two or more logical storage areas on application software that uses two or more continuous pieces of data are associated with storage areas of individually different and collective electric erasing units, and the device has an address conversion table 14 on which the contents of the associations are recorded, identifies storage areas, in the flash memory 2, that are to be writing destinations for two or more continuous pieces of the data on the two or more logical storage areas based on the contents of the address conversion table 14, and writes two or more continuous pieces of the data in the storage areas in a distributed manner.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory management apparatus and method for reading / writing data from / to a semiconductor nonvolatile memory (flash memory) capable of writing and collectively electrically erasing in a predetermined storage area unit.

[0002]

2. Description of the Related Art Conventionally, as one type of semiconductor nonvolatile memory, what is called a flash memory capable of writing and collectively erasing in a predetermined storage area unit has been known. Is used for. Since the flash memory has a large storage capacity despite its small shape, it is used as a storage element (memory) for recording, especially in portable devices that are required to be downsized. For example, although a mobile phone generally has a telephone directory function, a flash memory is used as a memory for recording the telephone directory data (data such as a telephone number and a partner name of the telephone number). If the mobile phone has an e-mail function, data such as a registered e-mail address and received e-mail is recorded in the flash memory.

FIG. 4 is a diagram showing a configuration example of a flash memory. As shown in FIG. 4, the flash memory has blocks 1 to m whose memory area has a predetermined storage capacity.
(M is a natural number and indicates a block number), and it is possible to electrically erase the stored contents collectively in block units. Further, in the flash memory, once data is written, when rewriting the written memory area, it is necessary to erase the block including the memory area once.

FIG. 5 is a block diagram showing the configuration of a conventional memory management device 101 for a flash memory. The memory management device 101 shown in FIG. 5 performs read / write control and recording management of data with respect to the flash memory 2 having the configuration shown in FIG. 4, and recording management of application data. For example, the memory management device 101 is provided in a mobile phone and reads / writes the data from / to the flash memory 2, which is a memory for recording application data (phonebook data or the like), and manages the recording of this recording data. As a result, in the mobile phone, recording of data used by application software such as a telephone directory function (hereinafter, simply referred to as application) and recording management thereof are realized.

The memory management device 101 includes a flash memory control / management unit 11 and an application data management unit 1.
2 and. Flash memory control / management unit 1
Reference numeral 1 is for performing access control and recording management for the flash memory 2, such as reading and writing data, batch erasing in blocks, organizing used memory in each block (garbage collection), and managing memory usage status for each block. I do. Garbage collection is one of the usage management processes of the flash memory, and is a process performed when a written (used) block in the flash memory is reused.

This flash memory control / management unit 11
Manages the memory use status for each of blocks 1 to m in the flash memory 2. For this management, the memory area in one block is used as the configuration shown in FIG. This management configuration includes a management table, sectors 1 to n (n is a natural number and indicates a sector number) that are data writing areas, and a reserved memory.

The flash memory control / management section 11 defines a predetermined storage capacity as one sector and manages data recording in units of this sector. As shown in FIG. 6, in the sectors 1 to n, position information (FLBLm
_n; where m is a block number and n is a sector number). This position information indicates the position (physical address) of the sectors 1 to n on the flash memory 2. The flash memory control / management unit 11 can specify the positions of the sectors 1 to n using this physical address.

Further, the flash memory control / management unit 11
Stores management information on sectors 1 to n in the own block in the management table. This management table is composed of the management information for the number of sectors 1 to n. The management information for one sector is written in the valid / invalid information of the management information, the physical address of the sector, and the sector. The logical address where the retrieved data is located. The logical address will be described later.

The reserved memory is a memory area that is normally reserved in advance as an unused area, and is used by the flash memory control / management unit 11 for garbage collection of the block.

The application data management unit 12 manages recording of data (application data) used by applications such as a telephone directory function.
The recording position of application data is stored. The recording position of the application data refers to the recording position of the data on the logical memory configuration for the application, which is the logical address.

Next, the operation of the conventional memory management device 101 shown in FIG. 5 will be described with reference to FIG. Figure 7 (a)
FIG. 8 is a diagram showing a memory usage example in a logical memory configuration for an application. FIG. 7B is a diagram showing an example of use of the flash memory 2 by the memory management device 101. In the example of use of FIG. 7B, the memory management apparatus 101 uses the used logical address APB under the memory use state of the application shown in FIG.
This corresponds to the application data corresponding to L1 to 4 written in the flash memory 2.

First, the application data management unit 1
2 manages the entire area of the logical memory for application by dividing it into predetermined storage capacities. As the predetermined storage capacity, the storage capacity per one sector of the flash memory 2 or the storage capacity for a predetermined plurality of sectors is used. The application data management unit 12 manages recording of application data for each of the divided areas.
Hereinafter, this divided area is referred to as an application block, and the logical addresses of the application block are APBL1 to pBL (p; is a natural number).

In the example shown in FIGS. 7A and 7B,
For convenience, the number of application blocks is 16 (p = 1
6). Further, the storage capacity of the application block is made equal to the storage capacity of the flash memory 2 per sector. In this case, the logical address is APBL1-16
Although these logical addresses APBL1 to 16 are originally continuous memory areas, they are made to correspond to respective positions of the memory areas obtained by dividing the logical areas APBL1 to 16 by the storage capacity unit of one sector of the flash memory 2. . Further, the number of blocks of the flash memory 2 is 4 (m = 4), and the number of sectors in the block is 4 (n = 4). In this case, the physical addresses are FLBL1_1-4, FLBL2_1-4,
FLBL3_1 ~ 4, FLBL4_1 ~ 4, FLB
L1_1 to 4 indicate the positions of the sectors 1 to 4 of the block 1, FLBL2_1 to 4 indicate the positions of the sectors 1 to 4 of the block 2, FLBL3_1 to 4 indicate the positions of the sectors 1 to 4 of block 3, and FLBL4_1 to 4 is block 4
The positions of sectors 1 to 4 are shown. In this example, since the storage capacity of the application block is equal to the storage capacity per sector, the logical address and the physical address match.

When recording application data, the application data management unit 12 notifies the flash memory control / management unit 11 of a logical address for recording the application data. Next, the flash memory control / management unit 11 writes the application data in the flash memory 2 using the physical address corresponding to this logical address. Here, the flash memory control / management unit 11 writes the management information of the sector of the physical address in the corresponding management table.

For example, when the logical address APBL1 is notified, the flash memory control / management unit 11 writes the application data in the flash memory 2 using the physical address FLBL1_1. As a result, the sector (sector 1 of block 1) corresponding to the physical address FLBL1_1 is managed as being used.

When reading application data, the application data management unit 12 similarly notifies the flash memory control / management unit 11 of the logical address, and the flash memory control / management unit 11 notifies the physical address corresponding to the logical address. Is used to read application data from the flash memory 2.

By the way, in the flash memory 2, once data is written in any of the sectors 1 to n of a certain block, the written sector cannot be overwritten. Here, when data writing to the written sector occurs again, the flash memory control / management unit 11 erases the write target block and newly writes to the block by garbage collection.

In this garbage collection,
The flash memory control / management unit 11 once writes new write data to the reserved memory of the write target block. Next, the data in the entire memory area of the write target block is transferred to the reserved block for garbage collection, and the write target block is erased. Next, the data transferred to the reserved block is rewritten in the corresponding memory area of the write target block. As a result, the overwriting of the written sector is realized.

[0019]

However, the above-described conventional memory management device has a problem that the frequency of garbage collection is high and the access speed to the flash memory is reduced.

For example, as shown in FIG. 7A, in order to record continuous data, logical addresses APBL1 to
When a plurality of application blocks up to 4 are used, as shown in FIG. 7B, all sectors of the block 1 of the physical addresses FLBL1_1 to 4 of the flash memory 2 are used. Then, in this block 1,
In this state, new data cannot be written. Therefore, when a data write request for the same block 1 occurs again, the flash memory control / management unit 11
By the garbage collection, the block to be written is erased, data is rewritten to the block, and new data is written. Therefore, when the data is written in all the sectors of the block 1, the garbage collection is executed every time the write request to the block 1 occurs even though the other blocks 2 to 4 are unused. Will be.

As described above, at the time of recording continuous data using a plurality of application blocks, the data is written in a plurality of sectors of the flash memory, which means that the memory area in a certain block is all used. Or, the used memory area in the same block increases. Then, since there are few unused sectors in this block, the rate at which new data can be written without erasing the block becomes small. Also,
When a data write request is issued to such a block having few unused sectors, it is necessary to erase the original data and then rewrite the data. That is, even if the usage rate of other blocks is low, the frequency of execution of garbage collection increases because there are blocks with high usage rates. Since this garbage collection process takes time, the read / write access speed to the flash memory is substantially reduced.

As a method of increasing the processing speed of this garbage collection, it is possible to transfer at once even if the overwrite data amount is large by increasing the storage capacity of the reserved memory reserved in the block of the flash memory. There is a way. However, in this method, since a large storage capacity of the reserved memory is secured in advance,
The problem arises that the usable data storage capacity of the flash memory is substantially reduced.

The present invention has been made in consideration of such circumstances, and an object thereof is to perform garbage collection without increasing the storage capacity of the reserved memory for garbage collection reserved in the block of the flash memory. It is an object of the present invention to provide a memory management device and its method capable of suppressing an increase in the execution frequency of the memory and preventing a substantial decrease in access speed to a flash memory.

[0024]

In order to solve the above-mentioned problems, the invention according to claim 1 provides a semiconductor non-volatile memory in which writing and batch electrical erasing in a predetermined storage area unit are possible. Write, read and erase data,
A memory management device for performing garbage collection for reusing a written storage area in the semiconductor non-volatile memory, wherein the storage area of a plurality of collective electrical erase units in the semiconductor non-volatile memory is continuous. It is characterized in that a plurality of data are distributed and written.

According to a second aspect of the present invention, the correspondence between a plurality of logical storage areas on the application software that uses the plurality of continuous data and the storage areas of the plurality of collective electrical erase units is recorded. The address conversion table, the plurality of logical storage areas are associated with different storage areas of the collective electrical erasing unit, and based on the contents of the address conversion table. 2. The memory management device according to claim 1, wherein the storage area in the semiconductor nonvolatile memory to which a plurality of consecutive data is written is specified on the plurality of logical storage areas. .

According to a third aspect of the present invention, data is written to, read from, and erased from a semiconductor nonvolatile memory capable of being written and collectively electrically erased in a predetermined storage area unit. A memory management method in a memory management device for performing a garbage collection for reusing a written storage area in a memory, comprising: The data writing destinations are distributed.

[0027]

DETAILED DESCRIPTION OF THE INVENTION An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a memory management device 1 according to an embodiment of the present invention. In FIG. 1, parts corresponding to the respective parts in FIG. 5 are designated by the same reference numerals, and the description thereof will be omitted. The flash memory 2 shown in FIG. 1 has the configuration shown in FIG. 4, and its memory area is divided into blocks 1 to m (m is a natural number and indicates a block number) having a predetermined storage capacity. Therefore, it is possible to electrically erase the stored contents collectively in units of blocks. Further, as described above, the flash memory control / management unit 11 manages the memory usage status for each of the blocks 1 to m in the flash memory 2. For this management, the memory area in one block is shown in FIG. Used as such a configuration.

The memory management device 1 shown in FIG. 1 comprises the conventional memory management device 101 of FIG. 5 with an address conversion unit 13 and an address conversion table 14. The address conversion unit 13 converts the logical address notified from the application data management unit 12 based on the contents of the address conversion table 14, and notifies the flash memory control / management unit 11 of this conversion address. The flash memory control / management unit 11 uses the physical address corresponding to the translated address notified from the address translation unit 13 to read or write data in the flash memory 2.

FIG. 2 is a diagram showing a configuration example of the address conversion table 14 shown in FIG. The address conversion table 14 shown in FIG.
The number of application blocks of 2 is 16 (that is, logical addresses are APBL1 to 16), the number of blocks of the flash memory 2 is 4, and the number of sectors in the block is 4 (that is, physical addresses are FLBL1_1 to 4 and FLBL are FLBL1).
2_1-4, FLBL3_1-4, FLBL4_1-4)
And the storage capacity of the application block is equal to the storage capacity per sector.

In this case, logical addresses APBL1-16
Indicates the positions of the memory areas corresponding to the storage capacity per sector on the continuous memory areas. Further, the physical addresses FLBL1_1 to 4 indicate the positions of the sectors 1 to 4 of the block 1, and the FLBL2_1 to 4 are the sectors 1 of the block 2.
4 to 4, FLBL 3_1 to 4 indicate the positions of sectors 1 to 4 of the block 3, and FLBL 4_1 to 4 indicate the positions of the sectors 1 to 4 of the block 4.

As shown in FIG. 2, the address conversion table 14 stores logical addresses and physical addresses in association with each other. In this address conversion table 14, consecutive logical addresses APBL1 to 4 are physical addresses FLB of sector 1 of different blocks 1 to 4, respectively.
L1_1, FLBL2_1, FLBL3_1, FLBL4_
It is associated with 1. Similarly, consecutive logical addresses APBL5-8, APBL9-12, APBL1
3 to 16 are different blocks 1 to 4 of sector 2
4 physical addresses FLBL1 to 4_2, FLBL1 to 4_
3 and FLBL1 to 4_4. This correspondence is determined in advance, and the address conversion table 14 is created based on this correspondence.

Based on the contents of the address conversion table 14, the address conversion unit 13 informs the flash memory control / management unit 11 of the physical address associated with the logical address notified from the application data management unit 12 as the conversion address. Notice. The flash memory control / management unit 11 reads or writes data to the flash memory 2 using the physical address corresponding to the notified translated address. In this case, one logical address corresponds to one sector of physical Since it corresponds to the address, the translated address can be used as it is as the physical address.

FIG. 3B is a diagram showing a usage example of the flash memory 2 in which data is written by the address conversion. In the usage example of FIG. 3B, the memory management device 1 uses the logical address APBL1 of the usage under the memory usage status of the application shown in FIG.
It corresponds to the application data corresponding to 4 written in the flash memory 2.

As shown in FIGS. 3 (a) and 3 (b), for continuous memory use of logical addresses APBL1 to APBL4,
Sectors 1 (physical addresses FLBL1 to 4_1) of different blocks 1 to 4 are used. As a result, under the same memory usage condition of the application as in FIG. 3A (memory usage example of the application shown in FIG. 7A), the conventional memory management device 101 writes the application data in the flash memory 2. Compared to the case (the conventional flash memory usage example shown in FIG. 7B), the usage rate of the same block in the flash memory 2 is reduced.

As described above, according to this embodiment, the memory management device 1 disperses and uses a plurality of blocks of the flash memory 2 when writing a plurality of continuous application data to the flash memory 2. Therefore, the memory area in a block of the flash memory 2 is completely used, and the used memory area in the same block is increased, which is reduced as compared with the conventional case. As a result, the difference in usage rate between blocks is reduced, and the rate at which new data cannot be written is also reduced. As a result, without increasing the storage capacity of the reserved memory for garbage collection reserved in the block of flash memory, the increase in the frequency of garbage collection is suppressed and the substantial decrease in access speed to flash memory is prevented. The excellent effect of being able to do is obtained.

Further, according to the present embodiment, the conventional memory management device 101 including the application data management unit 12 that manages the recording of the application data and the flash memory control / management unit 11 that manages the recording of the flash memory is used. The memory management device 1 of the present invention can be realized by adding a simple configuration of the address conversion table 14 and the address conversion unit 13.

Although the storage capacity of the application block is equal to the storage capacity per sector in the above-described embodiment, the storage capacity of the application block may be equal to the storage capacity of a predetermined plurality of sectors. . In this case, the flash memory control / management unit 11 may perform conversion to obtain a physical address based on the conversion address and use the physical address of the conversion result to access the flash memory.

The memory management device of the present invention can be applied to non-portable electronic devices as well as portable electronic devices such as portable terminals. By applying the memory management device of the present invention, it is possible to configure a file system in which application software of those electronic devices can be used, using a flash memory. Furthermore, in this file system, as described above, it is possible to prevent an increase in the frequency of garbage collection execution when reusing a written block in the flash memory, so it is possible to prevent a decrease in access speed during file access. The effect that can be obtained is also obtained.

Note that the portable terminal includes portable terminals called portable telephones and PDAs (Personal Digital Assistants). Further, in the case of the PDA, the communication means may be built in or the communication means may be connected from the outside.

Although the embodiment of the present invention has been described in detail above with reference to the drawings, the specific configuration is not limited to this embodiment, and design changes and the like within the scope not departing from the gist of the present invention are also possible. included.

[0041]

As described above, according to the present invention,
Since a plurality of continuous data are distributed and written in the storage area of a plurality of batch electrical erase units in a semiconductor nonvolatile memory (flash memory), the storage area of a batch electrical erase unit in a flash memory ( All the memory areas in a block) are used up, and the used memory area in the same block is increased, which is reduced as compared with the conventional case. As a result, the difference in usage rate between blocks is reduced, and the rate at which new data cannot be written is also reduced. As a result, it is possible to suppress the increase in the frequency of garbage collection execution without increasing the storage capacity of the reserved memory for garbage collection reserved in the flash memory block, and the effective access speed to the flash memory. It is possible to obtain an excellent effect that it is possible to prevent a decrease in

Further, an address conversion table in which the correspondence between a plurality of logical storage areas on application software that uses a plurality of continuous data and a storage area of a plurality of collective electrical erase units is recorded is provided. In this address conversion table, a plurality of logical storage areas are associated with storage areas of different collective electrical erasing units, respectively, and based on the contents of the address conversion table, By specifying the storage area in the semiconductor non-volatile memory that is the writing destination of a plurality of consecutive data in, the application data management unit that manages the recording of application data and the flash memory control that manages the recording of the flash memory. It has a simple configuration (address Conversion table and address conversion unit)
It becomes possible to realize the memory management device of the present invention by adding.

[Brief description of drawings]

FIG. 1 is a memory management device 1 according to an embodiment of the present invention.
3 is a block diagram showing the configuration of FIG.

2 is a diagram showing a configuration example of an address conversion table 14 shown in FIG.

FIG. 3 is a diagram for explaining a flash memory management method of the memory management device 1 shown in FIG. 1.

4 is a diagram showing a configuration of a flash memory 2 shown in FIGS. 1 and 5. FIG.

FIG. 5 is a block diagram showing a configuration of a conventional memory management device 101.

FIG. 6 is a diagram showing a memory area management configuration in one block of the flash memory 2 shown in FIGS. 1 and 5;

FIG. 7 is a diagram for explaining a flash memory management method of the memory management device 101 shown in FIG. 5;

[Explanation of symbols]

1 Memory management device 2 Flash memory 11 Flash memory control / management unit 12 Application data management section 13 Address converter 14 Address conversion table

Claims (3)

[Claims] 1. A written storage area in the semiconductor non-volatile memory for writing, reading and erasing data to and from a semiconductor non-volatile memory capable of being written and collectively electrically erased in a predetermined storage area unit. A memory management device for performing garbage collection for reusing data, characterized in that a plurality of continuous data are distributed and written in a storage area of a plurality of collective electrical erasing units in the semiconductor nonvolatile memory. Memory management device. 2. An address conversion table recording a correspondence between a plurality of logical storage areas on application software that uses the plurality of continuous data and a storage area of the plurality of collective electrical erase units. In the address conversion table, the plurality of logical storage areas are associated with different storage areas of the collective electrical erasing unit, respectively, and the plurality of logical storage areas are stored based on the contents of the address conversion table. The memory management device according to claim 1, wherein a storage area in the semiconductor non-volatile memory to which a plurality of consecutive data is written is specified on the specific storage area. 3. A written storage area in the semiconductor non-volatile memory for writing, reading and erasing data to and from a semiconductor non-volatile memory capable of writing and collectively electrically erasing in a predetermined storage area unit. A memory management method in a memory management device for performing garbage collection for reusing data, wherein a plurality of consecutive data write destinations are distributed in a storage area of a plurality of collective electrical erase units in the semiconductor nonvolatile memory. A memory management method characterized by: