JP2003008462A - Receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a receiver that intermittently drives a reception circuit to suppress power consumption and reduces a drive time per one intermittent drive even when a filter with a large time constant is integrated in the reception circuit to reduce the power consumption. SOLUTION: The receiver that intermittently drives the reception circuit 2 provided with an RSSI(Received Signal Strength Indicator) circuit 30 for detecting a level of a received signal and with a low pass filter(LPF) 32 for stabilizing a detection signal from the RSSI circuit 30 by means of ON/OFF control of a transistor(Tr) 1, is provided with a precharge circuit 50 that pre- charges a capacitor C1 just after supply of power to the reception circuit 2 in order to be able to reduce the drive time of the reception circuit 2 without being affected by the time constant of the LPF 32. As a result, the reception circuit 2 can be quickly and normally operated after receiving supply of power to decrease the continuous drive time per one intermittent drive.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiving apparatus for receiving a high frequency signal and extracting predetermined information from the received signal, and more specifically, for intermittently operating a receiving circuit to reduce power consumption. It relates to a configured receiving device.

[0002]

2. Description of the Related Art Conventionally, for example, in a keyless entry device of an automobile, a transmission signal (in this case, a radio wave) from an electronic key carried by a driver is received, and an ID code given to the electronic key from the received signal. There is used a receiving device that restores a command code indicating the content of a command from a driver or a command (door lock / unlock command, etc.).

Further, in this type of receiving apparatus, if the receiving circuit is constantly operated in order to wait for a transmission signal to be transmitted from the outside, the receiving circuit consumes a large amount of power, especially in an automobile. In the receiving device mounted in, the power is supplied from the battery, which has a limit in the power that can be supplied, so that the receiving circuit is intermittently driven. That is, the power supply to the receiving circuit is intermittently performed in a predetermined cycle to reduce the power consumed by the receiving circuit while waiting for the transmission signal, and thus prevent the battery from running down.

[0004]

In the receiving circuit, in addition to a signal processing circuit for performing various signal processing such as amplification, frequency conversion, detection, etc. of a received signal, a desired signal component is selectively selected. A filter circuit is provided for passing.

When the time constant of the filter circuit is large, the continuous drive time of the receiving circuit cannot be sufficiently shortened when the receiving circuit is intermittently driven as described above.
The effect of reducing power consumption due to intermittent driving is suppressed,
There was such a problem. Hereinafter, this problem will be described in detail by taking the conventional apparatus shown in FIG. 2 as an example.

Incidentally, in FIG. 2, (a) is a receiving circuit 2 which constitutes the receiving device for the above-mentioned keyless entry device.
2B is a block diagram showing a detailed configuration of FIG. 2B, FIG. 3B is an electric circuit diagram showing the overall configuration of the receiving device including a circuit for supplying power for intermittently driving the receiving circuit 2, and FIG. 6 is a time chart illustrating an operation during intermittent driving of the circuit 2.

As shown in FIG. 2A, the receiving device for keyless entry is provided with a receiving antenna 10 for receiving a transmission signal (radio wave) from an electronic key (not shown). The output (received signal) from the receiving antenna 10 is passed through a bandpass filter (BPF) 12 that passes a signal in a predetermined frequency band and an amplifier circuit 14 that amplifies the received signal that has passed through the BPF 12, and a mixing circuit ( It is input to the mixer 18 and is mixed in the mixer 18 with the oscillation signal of the predetermined frequency generated by the oscillation circuit 16 to be converted into a predetermined intermediate frequency signal (IF signal).

Further, the IF signal output from the mixer 18 is passed through a bandpass filter (BPF) 20 which allows only signals in a preset frequency band to pass therethrough, and a detector 24
Entered in. Then, the detector 24 restores a predetermined signal component (binary signal component) included in the received signal by performing envelope detection of the received signal input via the BPF 20, for example. Then, the binary signal component restored by the detector 24 is a low-pass filter (LPF) 26.
After the unnecessary high frequency signal component is removed at
It is input to 8 and is compared with a preset threshold value by the comparator 28 to be converted into binary data.

On the other hand, a part of the IF signal output from the mixer 18 is an RSSI (Received Signal Strength Index).
ator) circuit 30 and converted into a detection signal (voltage signal) representing the signal level (voltage level) of the received signal.
The detection signal from the RSSI circuit 30 is the LPF 32.
After the unnecessary high frequency signal component is removed, the comparator 3
4 is input. Then, the comparator 34 determines whether or not the signal level of the reception signal is equal to or higher than a preset setting level by comparing the detection signal with a preset reference voltage, and a determination signal indicating the determination result. Is output.

The determination signal and the binary data generated by the comparator 28 are used as a body control microcomputer for locking / unlocking the door (FIG. 2 (b)).
Is input to the CPU 4) shown in FIG. And the CPU 4
For example, when the determination signal input from the comparator 34 is at a high level (in other words, the received signal is at or above the set level), the output (binary data) from the comparator 28 is sequentially captured at a predetermined cycle, and the captured signal is captured. By collating the time-series data (serial data) with a preset ID code or command code, the contents of the command from the user who has operated the electronic key and the electronic key that has transmitted a signal to the device can be verified. It is determined and body control is executed according to the determination result.

Next, as shown in FIG. 2B, the receiver receives power from the battery BT to generate a DC constant voltage, and the generated DC constant voltage is supplied to the receiver circuit 2 as a power supply voltage. A constant voltage circuit 8 for supplying is provided. Further, the power supply line 6 from the constant voltage circuit 8 to the receiving circuit 2 is provided with a switching transistor Tr1 for connecting / disconnecting the power supply line 6.

Then, the CPU 4 intermittently drives the receiving circuit 2 by periodically switching the ON / OFF state of the switching transistor Tr1 while waiting for the radio wave transmitted from the electronic key, and when the receiving circuit 2 is driven, When the reception of a reception signal equal to or higher than the set level is detected by the determination signal from the comparator 34, the drive time of the reception circuit 2 is extended, binary data is taken in from the comparator 28, and a process for body control is executed. To do.

In FIG. 2B, the switching transistor Tr1 is a PNP transistor whose emitter is connected to the power supply line 6 on the constant voltage circuit 8 side and whose collector is connected to the power supply line 6 on the receiving circuit 2 side. When the base, which is a control terminal, receives a low-level control signal from the CPU 4, it is turned on, and the power supply line 6 from the constant voltage circuit 8 to the receiving circuit 2 is made conductive, and the CPU 4
When the control signal input to the base from the high level is turned off, the constant voltage circuit 8 receives the signal from the receiving circuit 2
The power supply line 6 leading to is cut off.

Further, in FIG. 2B, the constant voltage circuit 8
Has a collector connected to the positive electrode side of the battery BT, an emitter connected to the power supply line 6 for constant voltage output, and a base grounded to the ground having the same potential as the negative electrode side of the battery BT through the Zener diode ZD. The output transistor Tr0 is composed of an NPN transistor and a bias resistor R0 provided between the collector and base of the output transistor Tr0. The breakdown voltage of the Zener diode ZD and the base-emitter order of the output transistor Tr0 are arranged in this order. A constant voltage determined by the directional voltage (so-called Vf) is generated.

In the receiving circuit 2 described above,
Since the RSSI circuit 30 detects the signal level of the reception signal modulated by the various modulation methods on the transmission side, the detection signal output from the RSSI circuit 30 varies according to the reception signal. In particular, when the received signal is AM-modulated according to the ID code or the like, the amplitude of the received signal greatly changes, so that the detection signal also largely changes according to the amplitude change.

For this reason, a filter having a large time constant is used for the LPF 32 provided in the receiving circuit 2 after the RSSI circuit 30 in order to suppress fluctuations in the detection signal. That is, as illustrated in FIG. 2B, the LPF 32 includes a first-stage filter circuit including resistors R1 and R2 and a capacitor C1, a second-stage filter circuit including a resistor R3 and a capacitor C3, and a coupling connecting them. And a capacitor C2 for use therein, of which the time constant of the first-stage filter circuit is made sufficiently large (specifically, the resistance value of the resistor R2 and the capacitance of the capacitor C1 are made large).
As a result, the fluctuation component of the detection signal due to the change of the binary data superimposed on the reception signal can be absorbed.

However, when the filter having a large time constant is provided in the receiving circuit 2 as described above, the receiving circuit 2
When intermittent driving is performed, it takes time for the LPF 32 (and thus the receiving circuit 2) to operate normally after the driving of the receiving circuit 2 is started (in other words, after the power supply is started). However, there is a problem that the continuous driving time T must be lengthened.

That is, as shown in FIG. 2C, the receiving circuit 2 includes the switching transistor Tr1 from the CPU4.
The control signal output to the base of becomes low level,
When the switching transistor Tr1 is turned on (time point t
In 1), power is supplied from the constant voltage circuit 8 via the power line 6 to start the receiving operation.

When the receiving circuit 2 starts the receiving operation (time t1), the electronic key is transmitting a signal of a set level or more to the receiving circuit 2, and the voltage of the detection signal output from the RSSI circuit 30. Even if the level exceeds the reference voltage of the comparator 34 immediately after the start of the reception operation, the voltage of the capacitor C1 in the LPF 32 (see FIG. 2).
It takes time for the voltage at the point A shown in (b) to reach the operable voltage Va at which the detection signal of the reference voltage or more can be output to the comparator 34 (time point t2).
The larger the time constant of F32, the longer it becomes.

Therefore, when the receiving circuit 2 is driven intermittently, the continuous driving time T per one driving is as follows:
As shown in, the receiving circuit 2 receives the control signal output from the CPU 4 to the base of the switching transistor Tr1.
Low level, switching transistor Tr1
When is turned on (time point t1), power is supplied from the constant voltage circuit 8 via the power line 6 to start the receiving operation.

Then, when the receiving circuit 2 starts the receiving operation (time t1), a signal of a set level or more is being transmitted from the electronic key to the receiving circuit 2, and the voltage of the detection signal output from the RSSI circuit 30. Even if the level exceeds the reference voltage of the comparator 34 immediately after the start of the reception operation, the voltage of the capacitor C1 in the LPF 32 (see FIG. 2).
It takes time for the voltage at the point A shown in (b) to reach the operable voltage Va at which the detection signal of the reference voltage or more can be output to the comparator 34 (time point t2).
The larger the time constant of F32, the longer it becomes.

Therefore, when the receiving circuit 2 is intermittently driven, the continuous driving time T per one driving is at least when the receiving signal of the set level is input to the receiving circuit 2 as shown in FIG. 2 (c). After the power supply to the receiving circuit is started in this state (time point t1), it is necessary to make it longer than the time required for the voltage of the capacitor C1 in the LPF 32 to reach the operable voltage Va (time point t2).

For this reason, in a receiving apparatus in which a filter having a large time constant is incorporated in the receiving circuit, even if the receiving circuit is driven intermittently in order to reduce the power consumption of the receiving circuit, the intermittent driving 1 Continuous drive time T per operation
Must be set long considering the time constant of the filter, and the power consumption cannot be sufficiently reduced due to the intermittent driving of the receiving circuit.

The present invention has been made in view of these problems, and in a receiving device configured to reduce power consumption during reception standby by intermittently driving the receiving circuit, a large time constant is provided in the receiving circuit. It is an object of the present invention to shorten the continuous drive time per intermittent drive so that power consumption can be sufficiently suppressed even when a filter is incorporated.

[0025]

In the receiving apparatus according to the first aspect of the present invention, which has been made to achieve the above object, the intermittent driving means intermittently supplies power to the receiving circuit, as in the conventional apparatus described above. By doing so, the receiving circuit is intermittently driven, but immediately after the intermittent driving means starts supplying power to the receiving circuit, the precharge circuit absorbs the high-frequency signal component forming the analog filter in the receiving circuit. A predetermined voltage is temporarily applied to the capacitive element to precharge the capacitive element.

Therefore, even when the time constant of the analog filter provided in the receiving circuit is large, the analog filter (and by extension the receiving circuit) can operate normally immediately after the power supply to the receiving circuit. The continuous driving time for each intermittent driving of the receiving circuit can be shortened.

Therefore, according to the receiving apparatus of the present invention, by setting the continuous driving time per intermittent driving of the receiving circuit short, it is possible to sufficiently suppress the power consumed by the receiving circuit during the reception standby. Therefore, it is possible to effectively exert the effect of reducing the power consumption obtained by the intermittent driving of the receiving circuit.

Here, according to the present invention, a filter having a large time constant (specifically, a low-pass filter or a band-pass filter) is provided as an analog filter for signal processing in the receiving circuit, and reception is performed according to the time constant of this filter. Any receiver can be applied as long as the receiver cannot shorten the continuous drive time of the circuit. In particular, as described in claim 2, in the receiver,
A level detection circuit that detects the signal level of the received signal and outputs a detection signal corresponding to the signal level is provided.
If it is applied to a device provided with an analog filter for absorbing high-frequency signal components in the subsequent stage of the level detection circuit (that is, a receiving device as described in the related art), the effect can be more exerted.

In other words, in this type of receiving apparatus, the detection signal output from the level detection circuit varies depending on the signal superimposed on the carrier wave of the reception signal by various modulation methods, and therefore it is installed in the subsequent stage of the level detection circuit. A low-pass filter with a large time constant is used as the analog filter. For this reason, in this type of receiving apparatus, as described above, it takes time for the analog filter (low-pass filter) in the subsequent stage of the level detection circuit to function normally after the power is turned on. By applying the present invention, if the precharge circuit is used to precharge the capacitive element forming the analog filter immediately after power-on to the receiving circuit, the analog filter operates normally immediately after power-on. That is, the continuous driving time per time when the receiving circuit is intermittently driven can be made extremely shorter than the conventional one.

In the receiving device according to claim 2,
If the voltage applied to the analog filter by the precharge circuit is too high, the analog filter will detect the signal as a detection signal when the power supply to the receiver circuit is started, even though the received signal is not input to the receiver circuit above the set level. Since the output signal level may increase and cause a device using this receiving device to malfunction, the voltage applied to the analog filter by the precharge circuit should not cause the device to malfunction. , It is necessary to set it appropriately.

For example, when the receiving device is for the keyless entry device described above, the voltage applied by the precharge circuit to the capacitive element of the analog filter is set to a value when the receiving circuit receives a received signal of a set level or higher. It may be set to a voltage value near the voltage charged in the capacitive element and lower than the voltage.

On the other hand, the precharge circuit is for enabling the analog filter (and by extension the reception circuit) to quickly shift to normal operation after power is supplied to the reception circuit. The pre-charging may be performed only once immediately after the power supply to the receiving circuit is started.

Therefore, as the precharge circuit, for example, a voltage generation source for generating a voltage for precharge,
The control circuit may apply the voltage generated by the voltage generation source to the capacitive element for a certain period of time immediately after the power supply to the receiving circuit is started. However, in order to configure the precharge circuit in this way, it is necessary to separately provide a control circuit having a voltage generation source and a timer function in the receiving device, which causes a problem that the receiving device becomes large.

Therefore, it is desirable that the precharge circuit has a circuit configuration as simple as possible. For that purpose, the precharge circuit may be configured as described in claim 3. That is, in the receiving device according to claim 3, the precharge circuit includes a transistor provided between the power supply line from the intermittent driving means to the receiving circuit and the capacitive element, and a power supply for the power supply line to which the transistor is connected. The differential circuit is configured to temporarily drive the transistor immediately after the power supply to the receiving circuit is started by differentiating the voltage and applying the differential signal to the control terminal of the transistor.

Therefore, according to the receiving device of the third aspect, the precharge circuit can be realized very easily by using the transistor and the resistor and the capacitor forming the differentiating circuit. The control terminal of the transistor is the base when the transistor is a bipolar transistor, and the gate when the transistor is a FET.

[0036]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below. FIG. 1 is an explanatory diagram for explaining the configuration and operation of the receiving apparatus of the embodiment to which the present invention is applied. FIG. 1A corresponds to the conventional apparatus shown in FIG. It is an electric circuit diagram showing the composition of the principal part of a device, and (b) is
FIG. 9 is a time chart showing the operation of the LPF 32 during intermittent driving of the receiving circuit 2 in the receiving apparatus of the present embodiment corresponding to FIG.

As is apparent from FIG. 1A, the receiving apparatus of this embodiment is basically constructed in the same way as the conventional receiving apparatus shown in FIGS. 2A and 2B. The difference from the conventional device is that a precharge circuit 50 is added to the conventional device. Therefore, in the following description, the detailed configurations of the receiving circuit 2 and the constant voltage circuit 8, the operation of the CPU 4 that realizes the function as the intermittent driving means of the present invention, and the switching transistor Tr1 for intermittent driving will be described.
The description is omitted, and only the configuration and operation of the precharge circuit 50 will be described in detail.

First, the precharge circuit 50 starts the supply of power to the receiving circuit 2 and then the RSS as a level detecting circuit.
This is for shortening the time required for the LPF 32, which is an analog filter provided in the subsequent stage of the I circuit 30, to function normally. Specifically, immediately after the power supply to the receiving circuit 2 is started, the LPF 32 A predetermined voltage is applied to the capacitive element for absorbing the high frequency signal component (that is, the capacitor C1) that constitutes the filter circuit having a large time constant arranged in the first stage, and the capacitor C1 is precharged.

As shown in FIG. 1A, the precharge circuit 50 includes a switching transistor Tr for intermittent driving.
1 is connected to the power supply line 6 on the collector side (in other words, the receiving circuit 2 side) via a current limiting resistor Rc, and the emitter is connected to the capacitor C1 and the resistor R in the LPF 32.
NPN transistor Tra connected to a connection point (point A) with 2 and one end connected to the base of the NPN transistor Tra and the other end via a capacitor Ca to a power supply line (specifically, a power supply line on the receiving circuit 2 side) A resistor Ra connected to 6 and a resistor R whose one end is also connected to the base of the NPN transistor Tra and whose other end is grounded.
b and.

Of these, the capacitor Ca and the resistors Ra and Rb form a differentiating circuit, and when the switching transistor Tr1 for intermittent driving is turned on and the power supply voltage supplied to the receiving circuit 2 rises, Applying a control voltage for driving to the base of the NPN transistor Tra,
Turn on the NPN transistor Tra to turn on the capacitor C.
A voltage is applied to 1.

This applied voltage is determined by the resistance ratio of the resistance Ra and the resistance Rb, and the resistance Rc and N are applied to the capacitor C1.
Since a predetermined current flows from the power supply line 6 via the PN transistor Tra, the capacitor C1 is quickly charged to the predetermined voltage according to the applied voltage.

The voltage applied from the precharge circuit 50 to the capacitor C1 is from the LPF 32 to the comparator 34, even though the signal level of the received signal is lower than the set level.
When the reception signal is at the set level, the detection signal output to R does not reach the reference voltage of the comparator 34.
The voltage value is set to a value slightly lower than the capacitor voltage (operable voltage Va) when the capacitor C1 is charged by the detection signal from the SSI circuit 30.

In the precharge circuit 50, N
The control voltage for driving is applied to the base of the PN transistor Tra only immediately after the switching transistor Tr1 for intermittent driving is turned on by the operation of the differentiating circuit, and thereafter the NPN transistor Tra is turned off. . Therefore, the charging of the capacitor C1 from the precharge circuit 50 is performed only immediately after the power supply to the receiving circuit 2 is started, and thereafter, the capacitor C1 is charged with RS.
It is charged and discharged by the detection signal output from the SI circuit 30.

As described above, in the receiving apparatus of this embodiment, when the receiving circuit 2 starts the receiving operation by the intermittent driving (time point t1), the precharge circuit 50 causes
The capacitor C1 in the LPF 32 is precharged to a predetermined voltage. For this reason, as shown in FIG. 1B, if a signal of a set level or higher is transmitted from the electronic key to the receiving circuit 2 when the power supply to the receiving circuit 2 is started, the capacitor C1 outputs from the RSSI circuit 30. Is quickly charged to the operable voltage Va by the detected signal, and the LPF3
2 to the comparator 34, a detection signal exceeding the reference voltage of the comparator 34 is output.

Therefore, according to the receiver of the present embodiment, the continuous drive time T per one intermittent drive of the receiver circuit 2 (the time from time t1 to time t2) is made extremely shorter than that of the conventional device. Therefore, it is possible to sufficiently suppress the power consumed by the reception circuit 2 during the reception standby. Therefore, according to the present embodiment, the effect of reducing the power consumption obtained by the intermittent driving of the receiving circuit 2 can be effectively exhibited.

Further, in this embodiment, the precharge circuit 5
Since 0 is composed of the NPN transistor Tra, the capacitor Ca that constitutes the bias differentiating circuit, the resistors Ra and Rb, and the current limiting resistor Rc, the precharge circuit 50 can be configured very easily. In addition, in applying the present invention to a conventional device that does not include a precharge circuit, a large increase in cost of the receiving device is not caused, and the provision of the precharge circuit also prevents the receiving device from increasing in size. it can.

Although one embodiment of the present invention has been described above, the present invention is not limited to the above-mentioned embodiment, and various modes can be adopted. For example, in the above-described embodiment, the LPF 32 that absorbs a high frequency signal component from the detection signal from the RSSI circuit 30 as the level detection circuit and smoothes the detection signal is described as including a front and rear two-stage filter circuit. However, the LPF 32 may be configured by a so-called integrating circuit including a resistor and a capacitor, or a so-called L using a coil L and a capacitor C.
Even if it is composed of a C filter, the same effects as those of the above-described embodiment can be obtained by applying the present invention as in the above-mentioned embodiment.

Further, according to the present invention, in the case of a receiving apparatus having a filter (low-pass filter or band-pass filter) having a large time constant in the receiving circuit 2, the RSSI circuit 30 as a level detecting circuit is provided in the receiving circuit 2. Even if the receiving device is not provided, the same applies as in the above embodiment,
The same effect can be obtained.

Further, although the receiving device of the above-mentioned embodiment is described as the same as the receiving device described in the section of the prior art (that is, the receiving device for the keyless entry device), the present invention has a receiving circuit. Any receiver can be applied as long as it is a receiver that drives intermittently and that requires a shorter continuous drive time per intermittent drive of the receiver circuit. For example, communication is not wireless but communication. Even a receiving device that receives a high-frequency signal via a wire can be applied in the same manner as in the above-described embodiment to obtain the same effect.

[Brief description of drawings]

FIG. 1 is an explanatory diagram illustrating a configuration and an operation of a receiving device according to an embodiment.

FIG. 2 is an explanatory diagram illustrating a configuration and an operation of a conventional receiving device.

[Explanation of symbols]

2 ... Receiving circuit, 4 ... CPU (microcomputer),
6 ... Power supply line, 8 ... Constant voltage circuit, 30 ... RSSI circuit (level detection circuit), 32 ... LPF (low-pass filter), 34 ... Comparator, 50 ... Precharge circuit, Tr1
... Switching transistor (for intermittent drive), Tra ...
PNP transistor (for precharge), BT ... Battery.

Claims (3)

[Claims] 1. A receiving circuit that receives a high-frequency signal, processes the received signal to extract predetermined information, and intermittently supplies power to the receiving circuit, thereby intermittently driving the receiving circuit. And an intermittent driving means for
In a receiving device provided with an analog filter that absorbs a predetermined high-frequency signal component from a signal being processed, the analog filter is configured immediately after the intermittent driving means starts power supply to the receiving circuit. A receiving device comprising a precharge circuit for precharging a capacitive element for absorbing a high-frequency signal component by temporarily applying a predetermined voltage to the capacitive element. 2. The reception circuit includes a level detection circuit which detects a signal level of the reception signal and outputs a detection signal corresponding to the signal level, wherein the precharge circuit is configured such that the intermittent drive means includes the precharge circuit. Immediately after the power supply to the receiving circuit is started, a predetermined voltage is applied to a capacitive element that constitutes an analog filter for absorbing high frequency signal components provided in a subsequent stage of the level detecting circuit. Item 2. The receiving device according to item 1. 3. The precharge circuit is provided between the capacitive element and a power supply line extending from the intermittent driving means to the receiving circuit, and receives a control voltage at a control terminal to cause the capacitive element to operate. And a transistor for applying a predetermined voltage by differentiating the power supply voltage of the power supply line, and applying the differentiated signal to the control terminal of the transistor as the control voltage, whereby the intermittent driving means supplies power to the receiving circuit. 3. The receiver according to claim 1 or 2, further comprising: a differentiating circuit that temporarily drives the transistor immediately after starting.