JP2002510413A5 - - Google Patents

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Publication number
JP2002510413A5
JP2002510413A5 JP1998548035A JP54803598A JP2002510413A5 JP 2002510413 A5 JP2002510413 A5 JP 2002510413A5 JP 1998548035 A JP1998548035 A JP 1998548035A JP 54803598 A JP54803598 A JP 54803598A JP 2002510413 A5 JP2002510413 A5 JP 2002510413A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1998548035A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002510413A (ja
JP4083816B2 (ja
Filing date
Publication date
Priority claimed from US08/841,858 external-priority patent/US6014751A/en
Application filed filed Critical
Publication of JP2002510413A publication Critical patent/JP2002510413A/ja
Publication of JP2002510413A5 publication Critical patent/JP2002510413A5/ja
Application granted granted Critical
Publication of JP4083816B2 publication Critical patent/JP4083816B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

JP54803598A 1997-05-05 1998-01-27 低電力状態で動作する集積回路でキャッシュコヒーレンシを維持する方法および装置 Expired - Lifetime JP4083816B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/841,858 US6014751A (en) 1997-05-05 1997-05-05 Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state
US08/841,858 1997-05-05
PCT/US1998/001519 WO1998050846A1 (en) 1997-05-05 1998-01-27 Method and apparatus for maintaining cache coherency in an integrated circuit operating in a low power state

Publications (3)

Publication Number Publication Date
JP2002510413A JP2002510413A (ja) 2002-04-02
JP2002510413A5 true JP2002510413A5 (enExample) 2005-07-14
JP4083816B2 JP4083816B2 (ja) 2008-04-30

Family

ID=25285871

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54803598A Expired - Lifetime JP4083816B2 (ja) 1997-05-05 1998-01-27 低電力状態で動作する集積回路でキャッシュコヒーレンシを維持する方法および装置

Country Status (5)

Country Link
US (1) US6014751A (enExample)
JP (1) JP4083816B2 (enExample)
AU (1) AU6250798A (enExample)
TW (1) TW414875B (enExample)
WO (1) WO1998050846A1 (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6240522B1 (en) * 1998-09-30 2001-05-29 Compaq Computer Corporation Clock run controller
US6298105B1 (en) * 1998-10-30 2001-10-02 Intel Corporation Method and apparatus for a low skew, low standby power clock network
US6438700B1 (en) * 1999-05-18 2002-08-20 Koninklijke Philips Electronics N.V. System and method to reduce power consumption in advanced RISC machine (ARM) based systems
US6233200B1 (en) 1999-12-15 2001-05-15 Intel Corporation Method and apparatus for selectively disabling clock distribution
US6968469B1 (en) * 2000-06-16 2005-11-22 Transmeta Corporation System and method for preserving internal processor context when the processor is powered down and restoring the internal processor context when processor is restored
US7725748B1 (en) 2000-12-29 2010-05-25 Intel Corporation Low power subsystem for portable computers
US7539878B2 (en) * 2001-09-19 2009-05-26 Freescale Semiconductor, Inc. CPU powerdown method and apparatus therefor
US20030061383A1 (en) * 2001-09-25 2003-03-27 Zilka Anthony M. Predicting processor inactivity for a controlled transition of power states
US7058829B2 (en) * 2002-08-14 2006-06-06 Intel Corporation Method and apparatus for a computing system having an active sleep mode CPU that uses the cache of a normal active mode CPU
US6938146B2 (en) * 2002-12-19 2005-08-30 International Business Machines Corporation Memory power management using prefetch buffers
US7114090B2 (en) * 2003-02-14 2006-09-26 Intel Corporation Computing system with operational low power states
US7080271B2 (en) * 2003-02-14 2006-07-18 Intel Corporation Non main CPU/OS based operational environment
US7254730B2 (en) * 2003-02-14 2007-08-07 Intel Corporation Method and apparatus for a user to interface with a mobile computing device
JP3857661B2 (ja) * 2003-03-13 2006-12-13 インターナショナル・ビジネス・マシーンズ・コーポレーション 情報処理装置、プログラム、及び記録媒体
US7302652B2 (en) * 2003-03-31 2007-11-27 Intel Corporation Leakage control in integrated circuits
EP1477903A3 (en) * 2003-05-13 2004-12-29 Freescale Semiconductor, Inc. Memory system for a radiotelephone
GB2403561A (en) * 2003-07-02 2005-01-05 Advanced Risc Mach Ltd Power control within a coherent multi-processor system
US7356713B2 (en) * 2003-07-31 2008-04-08 International Business Machines Corporation Method and apparatus for managing the power consumption of a data processing system
US9047415B2 (en) 2005-06-10 2015-06-02 Freescale Semiconductor, Inc. Device and method for media access control
US8223910B2 (en) * 2005-06-10 2012-07-17 Freescale Semiconductor, Inc. Method and device for frame synchronization
US7412570B2 (en) 2005-11-15 2008-08-12 Sun Microsystems, Inc. Small and power-efficient cache that can provide data for background DNA devices while the processor is in a low-power state
US7934054B1 (en) 2005-11-15 2011-04-26 Oracle America, Inc. Re-fetching cache memory enabling alternative operational modes
US7516274B2 (en) 2005-11-15 2009-04-07 Sun Microsystems, Inc. Power conservation via DRAM access reduction
US7958312B2 (en) 2005-11-15 2011-06-07 Oracle America, Inc. Small and power-efficient cache that can provide data for background DMA devices while the processor is in a low-power state
US7873788B1 (en) 2005-11-15 2011-01-18 Oracle America, Inc. Re-fetching cache memory having coherent re-fetching
US7941683B2 (en) * 2007-05-02 2011-05-10 Advanced Micro Devices, Inc. Data processing device with low-power cache access mode
US20090138220A1 (en) * 2007-11-28 2009-05-28 Bell Jr Robert H Power-aware line intervention for a multiprocessor directory-based coherency protocol
US9471125B1 (en) * 2010-10-01 2016-10-18 Rockwell Collins, Inc. Energy efficient processing device
US20130117511A1 (en) * 2011-11-08 2013-05-09 Arm Limited Data processing apparatus and method
US9383805B2 (en) 2013-03-12 2016-07-05 Atmel Corporation Generating clock on demand
US20150067363A1 (en) * 2013-09-04 2015-03-05 Sebastien Jouin Clock generator circuit with automatic sleep mode
US10447461B2 (en) * 2015-12-01 2019-10-15 Infineon Technologies Austria Ag Accessing data via different clocks

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2260631B (en) * 1991-10-17 1995-06-28 Intel Corp Microprocessor 2X core design
US5632037A (en) * 1992-03-27 1997-05-20 Cyrix Corporation Microprocessor having power management circuitry with coprocessor support
US5677849A (en) * 1993-11-08 1997-10-14 Cirrus Logic, Inc. Selective low power clocking apparatus and method
US5430683A (en) * 1994-03-15 1995-07-04 Intel Corporation Method and apparatus for reducing power in on-chip tag SRAM
US5530932A (en) * 1994-12-23 1996-06-25 Intel Corporation Cache coherent multiprocessing computer system with reduced power operating features

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