JP2002502070A - 共有メモリリソースを有するマルチプロセッサコンピュータシステムにおける動的優先度競合解消のためのシステムおよび方法 - Google Patents

共有メモリリソースを有するマルチプロセッサコンピュータシステムにおける動的優先度競合解消のためのシステムおよび方法

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Publication number
JP2002502070A
JP2002502070A JP2000529662A JP2000529662A JP2002502070A JP 2002502070 A JP2002502070 A JP 2002502070A JP 2000529662 A JP2000529662 A JP 2000529662A JP 2000529662 A JP2000529662 A JP 2000529662A JP 2002502070 A JP2002502070 A JP 2002502070A
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Japan
Prior art keywords
priority
processing elements
computer system
access
conflict resolution
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
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JP2000529662A
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English (en)
Japanese (ja)
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JP2002502070A5 (https=
Inventor
フッペンサル，ジョン
Original Assignee
エス・アール・シィ・コンピューターズ・インコーポレイテッド
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Publication of JP2002502070A publication Critical patent/JP2002502070A/ja
Publication of JP2002502070A5 publication Critical patent/JP2002502070A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP2000529662A 1998-02-03 1999-01-29 共有メモリリソースを有するマルチプロセッサコンピュータシステムにおける動的優先度競合解消のためのシステムおよび方法 Pending JP2002502070A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/018,032 1998-02-03
US09/018,032 US6026459A (en) 1998-02-03 1998-02-03 System and method for dynamic priority conflict resolution in a multi-processor computer system having shared memory resources
PCT/US1999/001843 WO1999039274A1 (en) 1998-02-03 1999-01-29 System and method for dynamic priority conflict resolution in a multi-processor computer system having shared memory resources

Publications (2)

Publication Number Publication Date
JP2002502070A true JP2002502070A (ja) 2002-01-22
JP2002502070A5 JP2002502070A5 (https=) 2006-03-23

Family

ID=21785895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000529662A Pending JP2002502070A (ja) 1998-02-03 1999-01-29 共有メモリリソースを有するマルチプロセッサコンピュータシステムにおける動的優先度競合解消のためのシステムおよび方法

Country Status (6)

Country Link
US (1) US6026459A (https=)
EP (1) EP1058890B1 (https=)
JP (1) JP2002502070A (https=)
CA (1) CA2317543C (https=)
DE (1) DE69926999D1 (https=)
WO (1) WO1999039274A1 (https=)

Cited By (1)

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Publication number Priority date Publication date Assignee Title
JP2013522764A (ja) * 2010-03-16 2013-06-13 アルカテル−ルーセント システムリソースの再割当てを管理するための方法および装置

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US6467002B1 (en) * 1999-10-19 2002-10-15 3Com Corporation Single cycle modified round-robin arbitration with embedded priority
US6438737B1 (en) 2000-02-15 2002-08-20 Intel Corporation Reconfigurable logic for a computer
US6754677B1 (en) * 2000-05-30 2004-06-22 Outlooksoft Corporation Method and system for facilitating information exchange
US7752400B1 (en) * 2000-12-14 2010-07-06 F5 Networks, Inc. Arbitration and crossbar device and method
US7082569B2 (en) * 2001-01-17 2006-07-25 Outlooksoft Corporation Systems and methods providing dynamic spreadsheet functionality
US7313658B2 (en) * 2001-10-23 2007-12-25 Via Technologies, Inc. Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests
US6985999B2 (en) * 2001-10-23 2006-01-10 Ip-First, Llc Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests
US20030088722A1 (en) * 2001-11-02 2003-05-08 David Price System and method for managing priorities in a PCI bus system
US7065595B2 (en) * 2003-03-27 2006-06-20 International Business Machines Corporation Method and apparatus for bus access allocation
JP4017646B2 (ja) * 2003-06-20 2007-12-05 富士通株式会社 割り込み制御方法、割り込み制御装置及び割り込み制御プログラム
FR2860896A1 (fr) * 2003-10-14 2005-04-15 St Microelectronics Sa Procede d'arbitrage de l'acces a une ressource partagee
DE102004013635B4 (de) * 2004-03-19 2006-04-20 Infineon Technologies Ag Verfahren zur Vergabe von Buszugriffsrechten in Multimaster-Bussystemen, sowie Multimaster-Bussystem zur Durchführung des Verfahrens
US7299339B2 (en) 2004-08-30 2007-11-20 The Boeing Company Super-reconfigurable fabric architecture (SURFA): a multi-FPGA parallel processing architecture for COTS hybrid computing framework
US7890686B2 (en) * 2005-10-17 2011-02-15 Src Computers, Inc. Dynamic priority conflict resolution in a multi-processor computer system having shared resources
US9021365B2 (en) * 2009-05-11 2015-04-28 At&T Intellectual Property I, Lp Apparatus and method for distributing media content
US8984198B2 (en) * 2009-07-21 2015-03-17 Microchip Technology Incorporated Data space arbiter
US10721269B1 (en) 2009-11-06 2020-07-21 F5 Networks, Inc. Methods and system for returning requests with javascript for clients before passing a request to a server
US9069747B2 (en) 2010-08-26 2015-06-30 Sap Se Methods, apparatus, systems and computer readable mediums for use in association with electronic spreadsheets
US20130157639A1 (en) 2011-12-16 2013-06-20 SRC Computers, LLC Mobile electronic devices utilizing reconfigurable processing techniques to enable higher speed applications with lowered power consumption
US10741226B2 (en) 2013-05-28 2020-08-11 Fg Src Llc Multi-processor computer architecture incorporating distributed multi-ported common memory modules
US9153311B1 (en) 2014-05-27 2015-10-06 SRC Computers, LLC System and method for retaining DRAM data when reprogramming reconfigurable devices with DRAM memory controllers
US9530483B2 (en) 2014-05-27 2016-12-27 Src Labs, Llc System and method for retaining dram data when reprogramming reconfigurable devices with DRAM memory controllers incorporating a data maintenance block colocated with a memory module or subsystem
US10091132B2 (en) * 2016-01-29 2018-10-02 Raytheon Company Systems and methods for resource contention resolution
GB2567027B (en) * 2018-03-23 2020-05-06 Imagination Tech Ltd Common priority information for multiple resource arbitration
EP3543861B1 (en) 2018-03-23 2022-12-14 Imagination Technologies Limited Arbitration systems and methods

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US4663756A (en) * 1985-08-29 1987-05-05 Sperry Corporation Multiple-use priority network
US4920486A (en) * 1987-11-23 1990-04-24 Digital Equipment Corporation Distributed arbitration apparatus and method for shared bus
US4991084A (en) * 1988-02-05 1991-02-05 International Business Machines Corporation N×M round robin order arbitrating switching matrix system
US4953081A (en) * 1988-12-21 1990-08-28 International Business Machines Corporation Least recently used arbiter with programmable high priority mode and performance monitor
DE69030640T2 (de) * 1989-11-03 1997-11-06 Compaq Computer Corp Multiprozessorarbitrierung in für Einzelprozessor bestimmten Arbitrierungsschemas
US5553248A (en) * 1992-10-02 1996-09-03 Compaq Computer Corporation System for awarding the highest priority to a microprocessor releasing a system bus after aborting a locked cycle upon detecting a locked retry signal
US5623672A (en) * 1994-12-23 1997-04-22 Cirrus Logic, Inc. Arrangement and method of arbitration for a resource with shared user request signals and dynamic priority assignment
KR0144022B1 (ko) * 1995-05-15 1998-08-17 김주용 엘알유에 의한 중재기
US5842025A (en) * 1996-08-27 1998-11-24 Mmc Networks, Inc. Arbitration methods and apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013522764A (ja) * 2010-03-16 2013-06-13 アルカテル−ルーセント システムリソースの再割当てを管理するための方法および装置

Also Published As

Publication number Publication date
EP1058890A4 (en) 2004-06-23
CA2317543A1 (en) 1999-08-05
WO1999039274A1 (en) 1999-08-05
EP1058890B1 (en) 2005-08-31
DE69926999D1 (de) 2005-10-06
EP1058890A1 (en) 2000-12-13
CA2317543C (en) 2005-02-22
US6026459A (en) 2000-02-15

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