JP2002357847A - Active matrix substrate - Google Patents

Active matrix substrate

Info

Publication number
JP2002357847A
JP2002357847A JP2001164476A JP2001164476A JP2002357847A JP 2002357847 A JP2002357847 A JP 2002357847A JP 2001164476 A JP2001164476 A JP 2001164476A JP 2001164476 A JP2001164476 A JP 2001164476A JP 2002357847 A JP2002357847 A JP 2002357847A
Authority
JP
Japan
Prior art keywords
insulating resin
active matrix
insulating
matrix substrate
photosensitive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001164476A
Other languages
Japanese (ja)
Inventor
Nobuyuki Tsuboi
伸行 坪井
Junji Boshita
純二 坊下
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001164476A priority Critical patent/JP2002357847A/en
Publication of JP2002357847A publication Critical patent/JP2002357847A/en
Pending legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)
  • Optical Elements Other Than Lenses (AREA)

Abstract

PROBLEM TO BE SOLVED: To reduce the increase of costs caused by the increase of masks, the increase of stages and the increase of materials and to reduce yield loss caused by dust and the like by attaining the formation of a contact hole and rugged pattern in an active matrix substrate in one photolithographic stage. SOLUTION: In the photolithographic stage, insulation resin having a prescribed size is mixed in photosensitive insulation resin and the photosensitive insulation resin in which the insulation resin is mixed is applied in the entire surface of the substrate and pre-baked and then only the area of the contact hole is exposed. The contact hole is pierced by the development, the insulation resin in the non-exposed area except the area of the contact hole is not dissolved in developing liquid to be left as it is and the other non-disposed area is dissolved at a slower speed compared with that of the disposed area to form the rugged pattern.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はOA、AV等に用い
られるアクティブマトリックス液晶表示装置の製造方
法、液晶表示装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an active matrix liquid crystal display device used for OA, AV and the like, and a liquid crystal display device.

【0002】[0002]

【従来の技術】従来のアクティブマトリックス基板は図
1(a)に示したように、絶縁物基板上にゲート電極を
形成し、第一絶縁膜を形成、トランジスタ領域を形成
し、ソース・ドレイン電極を形成し、第2絶縁膜を形
成、最終的に薄膜トランジスタ(TFT)を形成し、薄
膜トランジスタを平坦化し開口率を拡大させるために感
光性絶縁樹脂(平坦化樹脂)を塗布し、フォトリソグラ
フによりコンタクトホールを得るためのパターンを形成
し、かつ、凹凸を形成するためのベースとしてコンタク
トホールと同様の穴を形成し、次いで、同様の方法によ
り、最適な散乱特性を確保するため凹凸形成用穴を上記
感光性絶縁樹脂で、ある程度埋め込み、コンタクトホー
ル部のみ露光、現像し、穴を空け、その上に画素電極を
形成、反射液晶用TFTアレイとしていた。ここで、凹
凸を埋めなければならない理由は、1回目の工程で形成
された凹凸パターンは、図1(b)に示した形状をして
いるが、この状態で反射電極を形成すると、入射角度に
よっては全く反射光が戻ってこない状態になる(傾斜角
大)ため、光の利用効率が悪い、非常に暗い液晶パネル
となってしまう。この課題を解決するため、第1の方法
として、上記従来例で、再び感光性絶縁樹脂を塗布し、
凹凸を埋めることにより傾斜角を小さく(〜10°)す
る事で拡散性を確保しつつ、正面に戻ってくる光も最大
限得る事(つまり明るく視野角が広い)ができる。
2. Description of the Related Art As shown in FIG. 1A, a conventional active matrix substrate has a gate electrode formed on an insulator substrate, a first insulating film formed, a transistor region formed, and a source / drain electrode formed thereon. Is formed, a second insulating film is formed, finally a thin film transistor (TFT) is formed, a photosensitive insulating resin (planarizing resin) is applied to flatten the thin film transistor and increase an aperture ratio, and contact is performed by photolithography. A pattern for obtaining holes is formed, and a hole similar to a contact hole is formed as a base for forming unevenness, and then a hole for forming unevenness is formed by a similar method to secure optimal scattering characteristics. The photosensitive insulating resin is filled to some extent, only the contact hole is exposed and developed, a hole is formed, and a pixel electrode is formed thereon. He had been with the array. Here, the reason why the unevenness has to be filled is that the unevenness pattern formed in the first step has the shape shown in FIG. 1B, but if the reflective electrode is formed in this state, the incident angle In some cases, the reflected light does not return at all (large tilt angle), resulting in a very dark liquid crystal panel with poor light use efficiency. In order to solve this problem, as a first method, in the above conventional example, a photosensitive insulating resin is applied again,
By filling the unevenness to reduce the inclination angle (〜1010 °), it is possible to obtain the maximum amount of light returning to the front (that is, bright and wide viewing angle) while securing the diffusivity.

【0003】第2の方法として、図2に示した様に1回
目の凹凸パターン形成時、フォトリソの条件(UV照
射)を最適化、あるいはフォトマスクのパターンを露光
限界まで小さくし、”ぼかす”事で、凹凸の底を感光精
絶縁樹脂の途中で止めることにより、上記凹凸を埋める
プロセスを簡略化し、同様の特性を得る方法があった。
As a second method, as shown in FIG. 2, at the time of forming the first concavo-convex pattern, the conditions of the photolithography (UV irradiation) are optimized, or the pattern of the photomask is reduced to the exposure limit to “blurr”. Thus, there has been a method in which the process of filling the irregularities is simplified by stopping the bottoms of the irregularities in the middle of the photosensitive insulating resin, thereby obtaining similar characteristics.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記の
従来例の第1の方法では、感光性絶縁樹脂塗布プロセス
を2回行う必要があり、マスク増、工程増、材料増によ
るコスト増、ダストによる歩留まりロス等の課題があっ
た。また、第2の方法では露光を途中で止める事にな
り、装置の状態(露光照度、ベーク温度の面内分布)に
よっては反射特性の面内バラツキ、あるいはロット間バ
ラツキが大きくなるという課題があった。
However, in the first method of the above-mentioned conventional example, it is necessary to perform the photosensitive insulating resin coating process twice, which requires an increase in the number of masks, the number of steps, the number of materials, and the cost. There were issues such as yield loss. Further, in the second method, the exposure is stopped halfway, and there is a problem that the in-plane variation of the reflection characteristic or the variation between lots increases depending on the state of the apparatus (exposure illuminance and in-plane distribution of the baking temperature). Was.

【0005】[0005]

【課題を解決するための手段】この課題を解決するため
に本発明のアクティブマトリックス基板における凹凸パ
ターンの形成方法は、第1のフォトリソ工程で、感光性
絶縁樹脂中に所定の大きさの絶縁樹脂を混在させ、この
絶縁樹脂を混在した感光性絶縁樹脂を基板全面に塗布
し、プリベーク、コンタクトホール領域のみ露光処理を
行い、現像によりコンタクトホールは穴をあけ、それ以
外の領域は感光性絶縁樹脂は現像液に溶けずそのまま残
り、それ以外の領域を現像液により溶解させることで、
1回のフォトリソ工程で凹凸が形成でき、同時にコンタ
クとホールも形成できるため、上記課題を解決したすぐ
れた液晶表示装置を実現できる。
According to the present invention, there is provided a method for forming a concavo-convex pattern on an active matrix substrate according to the present invention, wherein a predetermined size of insulating resin is contained in a photosensitive insulating resin in a first photolithography step. And then apply a photosensitive insulating resin mixed with this insulating resin to the entire surface of the substrate, perform pre-baking, expose only the contact hole area, make holes in the contact holes by development, and apply photosensitive insulating resin to the other areas. Is left undissolved in the developer, and is dissolved in the other areas with the developer.
Since unevenness can be formed in a single photolithography step, and at the same time, contacts and holes can be formed, an excellent liquid crystal display device that solves the above problems can be realized.

【0006】[0006]

【発明の実施の形態】(実施の形態1)以下、本発明の
実施の形態について図面を参照しながら説明する。図1
(a)は従来例1の断面図、図1(b)は従来例1の第1
の感光性絶縁樹脂パターン形成後の凹凸形状、図2は従
来例2の断面図である。図3は本発明実施例の断面図、
図4は本発明実施例の平面図、図5〜図7は製造工程図
である。
(Embodiment 1) Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG.
FIG. 1A is a cross-sectional view of Conventional Example 1, and FIG.
2 is a cross-sectional view of Conventional Example 2 after the photosensitive insulating resin pattern is formed. FIG. 3 is a sectional view of an embodiment of the present invention.
FIG. 4 is a plan view of an embodiment of the present invention, and FIGS.

【0007】以下、製造工程にしたがって説明する。ま
ず、スパッタリングによりガラス基板等からなる透明絶
縁基板1上に金属薄膜(例えばAl)を堆積させ、次に
ゲ−トパタ−ンを得るためのレジストパタ−ンを形成し
フォトリソグラフィー、エッチングによりゲ−ト電極2
を形成する。次に、ゲート絶縁膜3として、例えばプラ
ズマCVD法によりSiNx、半導体層4としてa−S
i、ソース、ドレイン電極とのコンタクとを良好に行う
ためのオーミックコンタクト層5であるn+a−Siを
それぞれ3000、2000Å、500Å連続的に堆積
する。次に、フォトリソグラフィー、エッチングにより
上記SiNx、a−Si、n+a−Siを一括して島状
にパターニングする。 次に、ソース電極となる金属
(例えばTi)をスパッタ法により全面に堆積しフォト
リソグラフィによりソース、ドレイン電極パターン6、
7を形成し、薄膜トランジスタアレイ基板が完成する
(図5)。次に、本発明の凹凸形成工程を行う。
Hereinafter, description will be given according to the manufacturing process. First, a metal thin film (for example, Al) is deposited on a transparent insulating substrate 1 made of a glass substrate or the like by sputtering, then a resist pattern for obtaining a gate pattern is formed, and a gate is formed by photolithography and etching. Electrode 2
To form Next, as the gate insulating film 3, for example, SiNx by a plasma CVD method, and as the semiconductor layer 4, a-S
The n + a-Si, which is the ohmic contact layer 5 for satisfactorily contacting the i, source and drain electrodes, is continuously deposited at 3000, 2000 and 500, respectively. Next, the SiNx, a-Si, and n + a-Si are collectively patterned into an island shape by photolithography and etching. Next, a metal (for example, Ti) serving as a source electrode is deposited on the entire surface by a sputtering method, and the source and drain electrode patterns 6 are formed by photolithography.
7, and a thin film transistor array substrate is completed (FIG. 5). Next, the unevenness forming step of the present invention is performed.

【0008】まず、前記薄膜トランジスタアレイ基板上
に直径3μmの絶縁性樹脂9を混在させた感光性絶縁樹
脂8を例えば4um基板全面に塗布する(図6)。次い
でプリベークを行った後、コンタクトホールを得るため
のフォトマスクによる露光、現像を行い、前記フォトマ
スクにより露光されたコンタクトホール部は現像液によ
り溶解し、コンタクトホールが形成され、それ以外の領
域は露光されていないが、露光された領域と比較して遅
い速度で現像液に溶解し、絶縁性樹脂は現像液にはほと
んど溶解しないため、絶縁性樹脂の混合比、現像条件を
制御する事により前記感光性絶縁樹脂と絶縁樹脂とで凹
凸パターンが形成される(図7)。次に反射電極用金属
膜10(例えばAl)をスパッタ法により全面に堆積
し、画素電極を形成するためのレジストを塗布し、レジ
ストパターン形成後不要の反射電極材をエッチャント
(例えば燐酸混合液)でエッチングして画素電極とし、
アクティブマトリックス基板が完成する(図3、図
4)。この実施例によれば、明るく、視野角の広い反射
特性を得るための凹凸パターン形成を、従来平坦化樹脂
を用いたフォトリソ工程で2回行っていたのを1回で行
う事ができ、工程の削減によるコストダウン、歩留まり
ロス低減を図る事ができる。
First, a photosensitive insulating resin 8 in which an insulating resin 9 having a diameter of 3 μm is mixed on the thin film transistor array substrate is applied to, for example, the entire surface of a 4 μm substrate (FIG. 6). Next, after performing pre-baking, exposure and development with a photomask for obtaining a contact hole are performed, and the contact hole portion exposed by the photomask is dissolved by a developing solution, and a contact hole is formed. Although it has not been exposed, it dissolves in the developer at a slower rate than the exposed area, and the insulating resin hardly dissolves in the developer, so by controlling the mixing ratio of the insulating resin and the development conditions An uneven pattern is formed by the photosensitive insulating resin and the insulating resin (FIG. 7). Next, a reflective electrode metal film 10 (for example, Al) is deposited on the entire surface by a sputtering method, a resist for forming a pixel electrode is applied, and after the resist pattern is formed, an unnecessary reflective electrode material is etched with an etchant (for example, a phosphoric acid mixture) Etching with pixel electrode
The active matrix substrate is completed (FIGS. 3 and 4). According to this embodiment, the formation of the concavo-convex pattern for obtaining a bright and wide-viewing-angle reflection characteristic can be performed only once in the conventional photolithography process using a flattening resin. Cost and yield loss can be reduced.

【0009】以上のように本発明の実施の形態によれ
ば、凹凸形成工程で感光性絶縁樹脂中に所定の大きさの
絶縁樹脂を混在させ、この絶縁樹脂を混在した感光性絶
縁樹脂を基板全面に塗布し、プリベーク、コンタクトホ
ール領域のみ露光処理を行い、現像によりコンタクトホ
ールは穴をあけ、それ以外の未露光領域は絶縁樹脂は現
像液に溶けずそのまま残り、それ以外の領域を現像液に
より溶解させることで、1回のフォトリソ工程で凹凸が
形成でき、同時にコンタクとホールも形成できるため、
工程の削減によるコストダウン、歩留まりロス低減を図
る事ができる。
As described above, according to the embodiment of the present invention, an insulating resin having a predetermined size is mixed in the photosensitive insulating resin in the unevenness forming step, and the photosensitive insulating resin containing the insulating resin is mixed with the substrate. Apply to the entire surface, pre-bake, expose only the contact hole area, develop contact holes by development, and in the other unexposed areas, the insulating resin remains undissolved in the developing solution, and the other areas By dissolving in one step, unevenness can be formed in one photolithography step, and contact and holes can be formed at the same time.
It is possible to reduce costs and yield loss by reducing the number of processes.

【0010】第1の発明の実施の形態ではゲート金属2
はAlとしたが、Ti、Cr、Cu、MoW、Alに高融点
金属を添加した合金、あるいはこれら金属の積層構造と
しても良い。また、TFTアレイは低温ポリシリコンに
よるTFTアレイとしても良い。また、画素電極10は
Alとしたが、AlにTa、Mo、W等の高融点金属を
添加した合金、あるいは銀合金、あるいはこれら金属の
積層構造としてもよい。
In the first embodiment of the present invention, the gate metal 2
Is Al, but may be an alloy obtained by adding a high melting point metal to Ti, Cr, Cu, MoW or Al, or a laminated structure of these metals. Further, the TFT array may be a TFT array made of low-temperature polysilicon. Further, although the pixel electrode 10 is made of Al, it may be made of an alloy obtained by adding a high melting point metal such as Ta, Mo, W or the like to Al, a silver alloy, or a laminated structure of these metals.

【0011】[0011]

【発明の効果】以上のように本発明は、凹凸パターン形
成工程で、感光性絶縁樹脂中に所定の大きさの絶縁樹脂
を混在させ、この絶縁樹脂を混在した感光性絶縁樹脂を
基板全面に塗布し、プリベーク、コンタクトホール領域
のみ露光処理を行い、現像によりコンタクトホールは穴
をあけ、それ以外の未露光領域は絶縁樹脂は現像液に溶
けずそのまま残り、それ以外の領域を現像液により溶解
させることで、1回のフォトリソ工程で凹凸が形成で
き、同時にコンタクトホールも形成できるため、従来フ
ォトリソ工程を2回行って形成されていた凹凸パターン
プロセスと比較して、工程の削減によるコストダウン、
歩留まりロス低減を解決したすぐれた液晶表示装置を実
現できる。
As described above, according to the present invention, in the step of forming a concavo-convex pattern, an insulating resin having a predetermined size is mixed in the photosensitive insulating resin, and the photosensitive insulating resin mixed with the insulating resin is coated on the entire surface of the substrate. Coating, pre-baking, exposure treatment only in contact hole area, contact hole is opened by development, and in other unexposed areas, insulating resin remains undissolved in developer, other areas are dissolved by developer As a result, unevenness can be formed in a single photolithography process, and a contact hole can be formed at the same time.
An excellent liquid crystal display device that can reduce the yield loss can be realized.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(a)従来例1の形態におけるアクティブマト
リックス基板断面図 (b)従来例1の形態における第1の平坦化膜形成工程
後の断面図
FIG. 1A is a cross-sectional view of an active matrix substrate in a first conventional example. FIG. 1B is a cross-sectional view after a first planarization film forming step in a first conventional example.

【図2】従来例2の形態における凹凸形成工程図FIG. 2 is a process chart of forming concavities and convexities in the form of Conventional Example 2.

【図3】本発明の形態におけるアクティブマトリックス
基板の断面図
FIG. 3 is a cross-sectional view of an active matrix substrate according to an embodiment of the present invention.

【図4】本発明の形態におけるアクティブマトリックス
基板の平面図
FIG. 4 is a plan view of an active matrix substrate according to an embodiment of the present invention.

【図5】本発明のアクティブマトリックス基板作成の工
程の説明図
FIG. 5 is an explanatory diagram of a process for producing an active matrix substrate of the present invention.

【図6】本発明のアクティブマトリックス基板作成の工
程の説明図
FIG. 6 is an explanatory diagram of a process for producing an active matrix substrate of the present invention.

【図7】本発明のアクティブマトリックス基板作成の工
程の説明図
FIG. 7 is an explanatory view of a process for producing an active matrix substrate of the present invention.

【符号の説明】[Explanation of symbols]

1 透明絶縁基板 2 ゲート電極 3 SiNx 4 a−Si 5 n+a−Si 6 ソース電極 7 ドレイン電極 8 感光性絶縁樹脂 9 絶縁性樹脂 10 反射電極用金属膜 21 画素電極 22 絶縁性樹脂 23 コンタクトホール 24 ゲート配線 25 ソース配線 Reference Signs List 1 transparent insulating substrate 2 gate electrode 3 SiNx 4 a-Si 5 n + a-Si 6 source electrode 7 drain electrode 8 photosensitive insulating resin 9 insulating resin 10 metal film for reflective electrode 21 pixel electrode 22 insulating resin 23 contact hole 24 gate Wiring 25 Source wiring

フロントページの続き Fターム(参考) 2H042 BA03 BA15 BA20 2H091 FA14Z GA01 GA13 LA30 2H092 GA29 JA24 JA32 JA41 MA05 MA08 MA13 MA17 MA29 NA26 PA01 5F110 AA16 AA30 BB01 CC07 DD02 EE02 EE03 EE04 EE06 EE14 EE44 FF03 FF30 GG02 GG13 GG15 GG45 HK04 HK09 HK16 HK21 HK33 HK35 HL03 HL06 HL11 HL23 NN04 NN27 NN72 QQ02 QQ09 Continued on the front page F-term (reference) 2H042 BA03 BA15 BA20 2H091 FA14Z GA01 GA13 LA30 2H092 GA29 JA24 JA32 JA41 MA05 MA08 MA13 MA17 MA29 NA26 PA01 5F110 AA16 AA30 BB01 CC07 DD02 EE02 EE03 EE04 EE06 FF14 GG03 FF03 HK16 HK21 HK33 HK35 HL03 HL06 HL11 HL23 NN04 NN27 NN72 QQ02 QQ09

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板上にマトリックス状に設けられ
た薄膜トランジスタ(TFT)と、この薄膜トランジス
タ上に形成された絶縁膜と、薄膜トランジスタ上の前記
絶縁膜上に設けられた反射型表示電極とを備え、前記反
射型表示電極がそれぞれ前記絶縁膜層に形成されたコン
タクトホールを介して、薄膜トランジスタのドレイン電
極あるいはゲート電極と接続されている薄膜トランジス
タ基板において、前記絶縁膜は感光性の絶縁樹脂であ
り、前記絶縁膜表面に凹凸が形成されている事を特徴と
するアクティブマトリックス基板。
1. A thin film transistor (TFT) provided in a matrix on an insulating substrate, an insulating film formed on the thin film transistor, and a reflective display electrode provided on the insulating film on the thin film transistor. A thin film transistor substrate in which the reflective display electrode is connected to a drain electrode or a gate electrode of a thin film transistor via a contact hole formed in the insulating film layer, wherein the insulating film is a photosensitive insulating resin; An active matrix substrate, wherein irregularities are formed on the surface of the insulating film.
【請求項2】 請求項1記載のアクティブマトリックス
基板において、前記感光性絶縁樹脂中に所定の形状の絶
縁樹脂が混在している事を特徴とするアクティブマトリ
ックス基板。
2. The active matrix substrate according to claim 1, wherein an insulating resin having a predetermined shape is mixed in said photosensitive insulating resin.
【請求項3】 前記感光性樹脂に形成された凹凸パター
ンは前記絶縁樹脂が混在された感光性絶縁樹脂を堆積し
た後の現像工程により前記感光性樹脂中に混在された前
記絶縁樹脂が凸、前記絶縁樹脂が存在しない領域が現像
液により減少することにより凹となることを特徴とする
請求項1記載のアクティブマトリックス基板。
3. The uneven pattern formed on the photosensitive resin, wherein the insulating resin mixed in the photosensitive resin in the developing step after depositing the photosensitive insulating resin mixed with the insulating resin is convex, 2. The active matrix substrate according to claim 1, wherein the region where the insulating resin is not present becomes concave by being reduced by the developer.
【請求項4】 前記絶縁性樹脂は球状、あるいは柱状
で、径が2〜4μmであることを特徴とする請求項2記
載の絶縁樹脂。
4. The insulating resin according to claim 2, wherein the insulating resin is spherical or columnar and has a diameter of 2 to 4 μm.
【請求項5】 前記絶縁性樹脂は現像液にほとんど溶解
しないことを特徴とする請求項2記載の絶縁樹脂。
5. The insulating resin according to claim 2, wherein the insulating resin hardly dissolves in a developer.
【請求項6】 前記コンタクトホールはフォトマスクを
使うUV露光、現像により形成することを特徴とする請
求項1記載のアクティブマトリックス基板
6. The active matrix substrate according to claim 1, wherein said contact hole is formed by UV exposure and development using a photomask.
【請求項7】 前記反射型電極として、AlあるいはA
lを主成分とする合金、あるいは銀、あるいは銀を主成
分とする合金、あるいはこれらの金属の積層構造とする
ことを特徴とする請求項1記載のアクティブマトリック
ス基板の製造方法。
7. The method according to claim 7, wherein the reflective electrode is Al or A.
2. The method for manufacturing an active matrix substrate according to claim 1, wherein the main component is an alloy containing l as a main component, silver, an alloy containing silver as a main component, or a laminated structure of these metals.
JP2001164476A 2001-05-31 2001-05-31 Active matrix substrate Pending JP2002357847A (en)

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Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004295082A (en) * 2003-03-27 2004-10-21 Boe Hydis Technology Co Ltd Method for manufacturing transflective type thin-film transistor liquid crystal display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004295082A (en) * 2003-03-27 2004-10-21 Boe Hydis Technology Co Ltd Method for manufacturing transflective type thin-film transistor liquid crystal display device
JP4559064B2 (en) * 2003-03-27 2010-10-06 ハイディス テクノロジー カンパニー リミテッド Method of manufacturing reflection / transmission composite type thin film transistor liquid crystal display device

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