JP2002330063A - Signal transmission circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the unnecessary radiation of electromagnetic waves in a signal transmitting circuit. SOLUTION: A data outputting circuit 101 of a transmission side circuit and a data inputting part 130 of a reception side circuit are connected through a transmission line 103. An output transistor 105 of the data outputting part 101 is formed as an open drain type structure. The data inputting part 130 is provided with a constant current source 107, an amplitude control unit 109 for controlling the voltage of the transmission path to be present within an almost fixed range, a current mirror 140 including source side and load side transistors 110 and 111, an output node N2 connected to an internal circuit 114 of the reception side circuit, and a load 112 for converting the current output of the load side transistor 111 of the current mirror 140 into a voltage. The voltage amplitude of the transmission line 103 is suppressed so that the unnecessary radiation of the electromagnetic waves can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal transmission circuit for transmitting and receiving signals between a plurality of circuits, and more particularly to a measure for reducing unnecessary radiation of electromagnetic waves in the signal transmission circuit.

[0002]

2. Description of the Related Art Conventionally, when data is input / output between a plurality of circuits, inverter circuits are arranged at an output section of a transmission circuit and an input section of a reception circuit, respectively.
A digital signal having a logical amplitude corresponding to the potential difference between the power supply voltage and the ground voltage of the transmitting circuit is sent from the receiving circuit to the transmitting circuit, and the logical amplitude corresponding to the potential difference between the power supply voltage and the ground voltage is sent to the receiving circuit. Generally, a structure is used in which a digital signal is generated and taken in an internal circuit. That is, a general conventional signal transmission circuit includes an output inverter, a transmission line, and a reception inverter.

FIG. 12 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a conventional liquid crystal panel control system. The signal transmission circuit shown here is built in a liquid crystal driver for driving a TFT matrix color liquid crystal panel and a driver control circuit (control LSI) for driving the liquid crystal driver, and performs data transfer of digital color image signals. .

As shown in FIG. 1, a conventional liquid crystal panel control system includes a control LSI 1101 and a liquid crystal driver 1.
102, control LSI 1101, and liquid crystal driver 110
Data transmission path 1 for transmitting data between
103. The liquid crystal driver 110
In the case where an integrated circuit is formed, a large number of the liquid crystal drivers 1102 are arranged in parallel in correspondence with the columns of one TFT matrix color liquid crystal panel, but FIG. It is drawn as if only one was arranged.

The control LSI 1101 has an internal circuit 1107 for generating a control signal and a data signal (digital signal) Vin which is a control signal generated by the internal circuit.
And a data output unit 1120 for outputting the data. The data output unit 1120 is an inverter circuit in which a p-channel transistor 1105 and an n-channel transistor 1106 are arranged in series between a power supply voltage supply unit supplying the power supply voltage Vdd1 and the ground supplying the ground voltage Vss. It is constituted by.

The liquid crystal driver 1102 receives the data signal Vin transferred from the data output unit 1120 of the control LSI 1101 and controls the internal circuit 1110 to generate a signal for controlling the liquid crystal element. And a data input unit 1130 for generating a signal for the same. The data input unit 1130 receives the power supply voltage Vdd2
And an inverter circuit in which a p-channel transistor 1108 and an n-channel transistor 1109 are arranged in series between a power supply voltage supply unit for supplying the power supply voltage and a ground for supplying the ground voltage Vss.

Here, as shown in FIG. 12, in the data transmission line 1103, a stray capacitance CL exists due to the stray capacitance of the wiring constituting the transmission line. That is, the p-channel transistor 1105 charges the wiring capacitance CL of the data transmission line with electric charge to increase the potential of the data transmission line 1103, and the n-channel transistor 1106
The charge of the wiring capacitance CL of the data transmission line 1103 is discharged to the ground side, and the potential of the data transmission line 1103 is lowered.

[0008]

However, the conventional signal transmission circuit described above has a disadvantage that large unnecessary radiation of electromagnetic waves is generated in the data transmission line 1103, which adversely affects peripheral devices.

FIGS. 13 (a) to 13 (c) show, respectively,
The time change of the data signal Vin in the data transmission line 1103 of the conventional signal transmission circuit, the time change of the through current Is flowing through the data output unit 1120, and the data transmission line 1103
FIG. 7 is a diagram showing a time change of a leakage current Io to a wiring capacitance flowing through the wiring.

[0010] As shown in FIG.
In step 1101, when a high-level data signal is output from the data output unit 1101 in response to a signal from the internal circuit 1107 (timing t100), the potential of the data signal Vin flowing through the data transmission line 1103 changes to the power supply voltage Vdd.
It rises to 1 (timing t101).

At this time, as shown in FIG. 12B, when the data signal Vin rises, a through current Is flows between the p-channel transistor 1105 and the n-channel transistor 1106 of the data output unit 1120. The through current Is is supplied to the data input unit 1130 of the liquid crystal driver 1102.
Flows between the p-channel transistor 1108 and the n-channel transistor 1109 constituting

When the voltage of the data signal Vin in the data transmission line 1103 falls (at timing t10).
Similarly, in 2), the through current Is flows through the data output unit 1120 and the data input unit 1130.

Further, as shown in FIG. 12C, a leakage current Io according to the potential fluctuation flows through the wiring capacitance CL of the data transmission line 1103.

By performing the above operation, the control LSI 1
The data output from the internal circuit 1107 of 101 is transmitted from the data output unit 1120 to the data input unit 1130 as a data signal Vin whose voltage value is either high level or low level.

In the case of a liquid crystal panel control system, the control L
Since the SI and a number of LSIs for a liquid crystal driver are connected by a wiring having a length of several tens of cm, the data output unit is configured by a driving transistor for driving a relatively large bus capacitance.

However, as described above, the data transmission path 1
The larger the width of the voltage transition on 103, the greater the amount of charge charged and discharged from the data transmission path, and the faster the change rate of the data signal Vin on the data transmission path 1103 in order to improve the operation speed of the liquid crystal element. As a result, the amount of change in the current value also increases. A large electromagnetic wave is generated in the data transmission line 1103 according to the amount of change in the current value, and as a result, unnecessary radiation of a large electromagnetic wave is generated.

An object of the present invention is to provide a signal transmission circuit in which unnecessary radiation of an electromagnetic wave in a data transmission line is small by taking measures for suppressing a change in a current value in the data transmission line.

[0018]

A signal transmission circuit according to the present invention is a signal transmission circuit for connecting one transmission side circuit and one or more reception side circuits by a transmission line with one transmission line per signal. A transmission circuit, which is provided between the transmission path and the voltage supply unit in the transmission-side circuit, and has a data output unit including an output transistor that operates according to a digital signal from an internal circuit on the transmission side, A data input unit interposed between the internal circuit of the receiving circuit and the transmission line in the receiving circuit, connected to the internal circuit of the receiving circuit, and a digital signal is supplied to the internal circuit of the receiving circuit. An output node for outputting, the data input unit comprises:
A constant current source connected to the transmission line; an amplitude control unit connected to the current source and the transmission line, for controlling a current to the transmission line such that a voltage in the transmission line falls within a substantially constant range. A current mirror including a first transistor connected to the transmission line via the amplitude control means, a second transistor connected to the output node, and a second transistor of the current mirror via the output node And a load connected to the internal circuit for converting the current output of the second transistor into a voltage.

As a result, the load transistor is not connected to the output transistor in the transmission side circuit, but the output transistor is open. And
By varying the current in the data transmission path so that the voltage in the data transmission path falls within a substantially constant range, data can be transmitted to the data input unit as a current variation signal. That is, there is no need to change the voltage of the transmission line between the power supply voltage and the ground voltage as in the conventional example,
The amount of current fluctuation in the transmission path is reduced. Therefore, the radiation of unnecessary electromagnetic waves in the transmission path can be reduced.

Since the amplitude control means is constituted by a MIS transistor which receives a bias voltage at its gate, it is possible to control the voltage amplitude on the transmission line with a simple configuration.

The above constant current source can be constituted by an MIS transistor which receives a constant bias voltage at its gate.

The load is a constant current source, the first transistor of the current mirror and a third transistor forming a current mirror, and the first and second transistors of the current mirror.
The transistor includes two transistors of opposite conductivity types and is connected to the internal circuit and connected to a complementary current mirror for mirroring a current output of the third transistor and an output of the complementary current mirror. By further providing the current source, a push-pull current having a complementary relationship can be generated, and the waveform of the internal circuit can be shaped.

In the transmitting circuit, a plurality of the data output units are arranged. In the transmitting circuit, a plurality of the transmitting circuits are arranged, and the plurality of data output units and the plurality of the receiving circuits are arranged. By further providing a switching means for switching the connection state between each data input unit to conduction / non-conduction, when performing high-speed operation, increase the number of data output units, and when low power consumption is required, Data transfer conditions such as reducing the number of connected data input units can be selected.

By further providing a current control means for controlling the current flowing to the amplitude control means of the receiving side circuit to be stopped, it is possible to reduce the power consumption of the data input unit which does not require data transfer.

The transmitting side circuit is a liquid crystal driver control circuit of a liquid crystal panel, and the receiving side circuit is a liquid crystal panel which has a long transmission line and is liable to generate unnecessary radiation of electromagnetic waves when the liquid crystal driver of the liquid crystal panel is used. In the control system described above, a remarkable effect can be exhibited.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) FIG. 1 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a first embodiment of the present invention. The signal transmission circuit shown here is built in a liquid crystal driver for driving a TFT matrix color liquid crystal panel and a liquid crystal driver control circuit (control LSI) for driving the liquid crystal driver.
Data transfer of a digital color image signal is performed. That is, the transmitting side circuit is a liquid crystal driver control circuit, and the receiving side circuit is a liquid crystal driver.

As shown in FIG. 1, the liquid crystal panel control system according to the present embodiment includes, for example, a data output unit 101 built in a control LSI, a liquid crystal driver 102, and a data output unit 101 and a liquid crystal driver 102. And a data transmission path 103 for transmitting data. When the liquid crystal driver 102 is integrated, a large number of the liquid crystal drivers 102 are arranged in parallel corresponding to the columns of one TFT matrix color liquid crystal panel. In the present embodiment, a case where one liquid crystal driver 102 is connected to the data output unit 101 is taken as an example.

The data output unit 101 has a control circuit 106 for generating a control signal, and a data signal (digital signal) V which is a control signal generated by the control circuit 106.
An output transistor 105 for outputting in is provided. That is, in the present embodiment, no load element is connected to the drain of the output transistor 105, and the output transistor 105 is configured by an open-drain n-channel transistor. Also, the control circuit 106
It functions as an output control unit for controlling the gate voltage of the output transistor 105 formed of an open-drain transistor and controlling the source-drain current of the output transistor 105.

The liquid crystal driver 102 receives the data signal Vin transferred from the output transistor 105 of the data output unit 101 and controls the internal circuit 114 to generate a signal for controlling the liquid crystal element. And a data input unit 130 for generating a data signal for performing the operation. The data input unit 130 has one terminal connected to the data transmission line 103 and the other terminal grounded, and suppresses the potential fluctuation of the node N1 connected to the data transmission line 103 and the constant current source 107. Node N
An amplitude control unit 109 for controlling the amount of current of the node N1;
Current mirror circuit 140 for controlling the amount of current of
And the load 1 of the current flowing out of the current mirror 140
12 are arranged. The current mirror 140 is connected to the source-side transistor 11 connected to the amplitude controller 109.
0 and the load-side transistor 11 connected to the load 113
1, and the node N3 connecting the gates of the transistors 110 and 111 is also a node connecting the source-side transistor 110 and the amplitude control unit 109.

Here, the load 112 is the current mirror 1
This is a load of the current flowing out of the 40 load-side transistors 111, and converts current fluctuation into potential fluctuation. The node N2 is a part where a data signal which is a voltage signal supplied to the internal circuit 114 is generated.
Further, the constant current source 107 can be configured by, for example, an n-channel transistor or a p-channel transistor (MISFET) in which a constant bias voltage is applied to the gate.

Next, the operation of the signal transmission circuit according to the present embodiment will be described.

FIGS. 2A to 2D are voltage-current characteristic diagrams for explaining operating points of the voltage Vin of the data transmission line 103 and the voltage V1 of the node N3, respectively. FIG. 3 is a timing chart of a voltage Vin, a timing chart of a through current Is of the output transistor 105, and a timing chart of a current Io flowing through the current source 107.

First, referring to the voltage-current characteristic diagram shown in FIG.
9 and the operation point variation control by the load 112 will be described. When the output transistor 105, which is an open-drain transistor in the data output unit 101, is off, no current flows through the data transmission path 103. Therefore, the current value at the node N1 is equal to the current Ib from the constant current source 107.
Only. In this case, the voltage of the node N3 connected to the amplitude control unit 109 of the data input unit 130 is
7 and the operating current characteristic of the source-side transistor 110 of the current mirror 140.
This is the potential at point A in FIG.

Next, when the output transistor 105 in the data output unit 101 is turned on, a current value Is determined by the characteristics of the output transistor 105 flows through the data transmission line 103 from the data input unit 130. For this reason,
The current I by the constant current source 107 is supplied to the source side transistor 110 of the current mirror 140 of the data input unit 130.
The current (Ib + Is) obtained by adding b to the current 1S to the output transistor 105 flows. On the other hand, the amplitude controller 10
9, the current value flowing through the amplitude control unit 109 is increased by lowering the electric resistance of the amplitude control unit 109 so that the voltage Vin of the data transmission unit 103 does not decrease, and the voltage Vin of the data transmission line 103 is kept constant. Is performed.
At this time, as shown in FIG.
s, the operating point moves to the point B, and the node N3
Becomes the potential at the point B.

The current flowing through the source-side transistor 110 in the current mirror 140 also increases by Is.
Since the load-side transistor 111 in the current mirror 140 receives the same voltage value at the gate as the source-side transistor 110, the current flowing through the load-side transistor 111 increases similarly to the source-side transistor 110. Due to this increased current, an output voltage determined by the load value of the load 112 is generated at the node N2. Then, this output voltage is transferred to the internal circuit 114 as a voltage fluctuation value.

By performing the above-described control, FIG.
As shown in (b), the voltage Vin of the data transmission path 103 maintains a constant value irrespective of ON / OFF of the output transistor. Further, as shown in FIG. 2C, when the output transistor 105 is turned on / off (at timing t).
0, t2), the value of the current ls flowing to the output transistor 105 via the data transmission path 103 varies,
As shown in (d), the current Ib flowing through the constant current source 107
Is constant.

As a result, the fluctuation of the current value which causes unnecessary radiation of the electromagnetic wave in the signal transmission circuit is caused by the output transistor 10 composed of an open drain type transistor.
5 (see FIG. 2C). However, if the current-voltage conversion gain of the data input unit 130 is high, the current flowing through the output transistor 105, which is an open-drain transistor, can be reduced, so that a signal transmission circuit with less unnecessary radiation of electromagnetic waves can be realized.

Next, the amplitude controller 10 in the present embodiment
A specific example of the specific configuration of No. 9 will be described.

First Specific Example FIG. 3 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a first specific example in the first embodiment. In this specific example, the amplitude control section 109 in the configuration shown in FIG. 1 includes an n-channel transistor 109A receiving the reference voltage Vref. This reference voltage Vref is for biasing a constant voltage to the gate of the n-channel transistor. Other elements shown in FIG. 3 are the same as those in the configuration shown in FIG. 1, and are denoted by the same reference numerals as those in FIG.

In this specific example, when the output transistor 105 formed of an open drain transistor is off, no current flows through the output transistor 105 as described above. A bias current determined by the constant current source 107 flows through the node N1 of the data input unit 130. Next, when the output transistor 105 is turned on, charges move from the data transmission path 103 and the data input unit 130 to the output transistor 105 of the data output unit 101. At this time, the voltage Vin of the data transmission line 103 temporarily drops. However, in the n-channel transistor 109A (amplitude control transistor) having a gate receiving a constant reference voltage Vref,
Since the gate-source potential difference Vgs increases in accordance with the voltage drop of the node N1 connected to the data transmission path 103, n
The amount of drain current of the channel transistor 109A increases. As a result, the drop of the voltage Vin on the data transmission line 103 is suppressed, so that the change of the voltage Vin is maintained at a certain fine amplitude or less, and the voltage Vin is stabilized.

In this specific example, as shown in FIG.
Since the voltage Vin can be stabilized with an extremely simple circuit configuration, data signal transmission with less unnecessary radiation can be achieved in a system using an LSI having a small integration area and a relatively large number of data signal lines, such as a liquid crystal driver. A circuit can be realized.

Second Specific Example FIG. 4 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a second specific example in the first embodiment. In this specific example, the amplitude control unit 109 in the configuration shown in FIG.
Channel transistor 109B receiving the voltage V1 of
It consists of. That is, the n-channel transistor 109B is diode-connected, and functions as a variable resistance resistor. The other elements shown in FIG. 4 are the same as those in the configuration shown in FIG.

Also in this specific example, when the output transistor 105 formed of an open drain transistor is off, no current flows through the output transistor 105 as described above. A bias current determined by the constant current source 107 flows through the node N1 of the data input unit 130. Next, when the output transistor 105 is turned on, the voltage Vin of the data transmission path 103 once decreases. However, in the diode-connected n-channel transistor 109B (amplitude control transistor),
Since the potential difference Vgs between the gate and the source, that is, the forward voltage increases in accordance with the voltage drop of the node N1 connected to the data transmission path 103, the drain current amount of the n-channel transistor 109B increases. As a result, the data transmission path 10
Since the drop of the voltage Vin of No. 3 is suppressed, the change of the voltage Vin is kept below a certain fine amplitude, and the voltage Vin is stabilized.

That is, in this specific example, it is possible to realize an extremely simple data signal transmission circuit capable of suppressing amplitude without requiring a reference voltage.

Third Specific Example FIG. 5 is an electric circuit diagram showing a configuration of a signal transmission circuit disposed in a liquid crystal panel control system according to a third specific example of the first embodiment. In this specific example, the amplitude control unit 109 in the configuration shown in FIG.
It is configured by an n-channel transistor 109C whose gate receives the voltage of the node N2 commonly connected to the load transistor 111 and the voltage generating load 112. The other elements shown in FIG. 5 are the same as those in the configuration shown in FIG. 1 and are denoted by the same reference numerals as those in FIG.

Also in this specific example, when the output transistor 105 formed of an open drain type transistor is off, no current flows through the output transistor 105 as described above. A bias current determined by the constant current source 107 flows through the node N1 of the data input unit 130. Next, when the output transistor 105 is turned on, the voltage Vin of the data transmission path 103 once decreases. However, in the n-channel transistor 109C (amplitude control transistor) which receives at its gate the voltage (the voltage at the node N2) generated by the transistor 111 and the load 112 that have been current-amplified in the current mirror 140, the data transmission path 103 Since the gate-source potential difference Vgs increases according to the voltage drop of the connected node N1, the amount of drain current of the n-channel transistor 109C increases. As a result, the drop of the voltage Vin on the data transmission line 103 is suppressed, so that the change of the voltage Vin is maintained at a certain fine amplitude or less, and the voltage Vin is stabilized.

That is, in this example, the n-channel transistor 109 serving as the amplitude control transistor is used.
Since the operation range of C can be controlled by the potential of the node N2 that has been current-amplified via the current mirror, the degree of freedom of the design value is widened and the adjustment range of the operation range becomes easy.

(Second Embodiment) FIG. 6 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a second embodiment. The signal transmission circuit shown here is built in a liquid crystal driver for driving a TFT matrix color liquid crystal panel and a driver control circuit (control LSI) for driving the liquid crystal driver, and performs data transfer of digital color image signals. . When the liquid crystal driver 102 is integrated, a large number of the liquid crystal drivers 102 are arranged in parallel corresponding to the columns of one TFT matrix color liquid crystal panel. In the present embodiment, a case where one liquid crystal driver 102 is connected to the data output unit 101 is taken as an example.

In this embodiment, as described later,
In addition to the current mirror 140 composed of two p-channel transistors, the data input unit 130
A complementary current mirror 141 composed of two n-channel transistors is provided. Elements having the same reference numerals as the elements shown in FIG. 2 among the elements shown in FIG. 6 have the same functions as the elements in FIG. 2, and descriptions thereof will be omitted. However, the complementary current mirror 141 may be added to the liquid crystal driver of the second or third specific example of the first embodiment or the liquid crystal driver having other amplitude control means.

As shown in the figure, in this embodiment, the load 112 in the data input section 130 is constituted by a constant current source 112 A connected to the drain of the load-side transistor 111 of the current mirror 140. The gate is the node N3 of the current mirror 140.
, A p-channel transistor 152 forming a current mirror with the load-side transistor 111;
A complementary current mirror 141 connected to the drain of the p-channel transistor 152 is provided. Source-side transistor 15 of complementary current mirror 141
The drain of 1 is connected to the drain of the p-channel transistor 152, and the source is connected to ground. The drain of the output side transistor 150 of the complementary current mirror 141 is connected to the power supply voltage V
Receiving dd2, the source is connected to ground. The constant current source 112A and the constant current source 157 are, for example, n-channel or p-channel MI
It can be constituted by S transistors.

In this embodiment, the data output unit 101
The basic operations of the output transistor 105, the constant current source 107, the n-channel transistor 199A for amplitude adjustment, and the current mirror 140 are the same as those in the second specific example of the first embodiment. In the embodiment,
The following operation is added.

In this embodiment, the current mirror 1
The constant current source 112A is connected to the drain of the load side 111 of the transistor 40. When the output transistor 105 formed of an open drain type transistor of the data output unit 101 is turned on, each transistor 1 of the current mirror 140 is turned on.
The drain currents of 10, 111 increase. At this time, if the drain current of each of the transistors 110 and 111 exceeds the current value of the constant current source 112A, the internal circuit 114 supplies the constant current source 112A of the drain current from the node N2.
The output exceeding the current value is output.

On the other hand, the gate-source voltage Vgs of the p-channel transistor 152 is the same as the gate-source voltage Vgs of each of the transistors 110 and 111 of the current mirror 140. Therefore, the p-channel transistor 152 If the transistor size is the same as that of the transistors 110 and 111, the same drain current flows as the transistors 110 and 111 through the p-channel transistor 152. That is, the complementary current mirror 1
Since the same drain current flows as the load-side transistor 111 of the current mirror 140 also to the source-side transistor 151 (n-channel transistor) of the current mirror 140, the output transistor 105 turns on and the load-side transistor 11
When the drain current of No. 1 increases, the drain current of the source-side transistor 151 of the complementary current mirror 141 also increases.

Further, since the constant current source 157 is connected to the load-side transistor 150 of the complementary current mirror 141, a current equal to the drain current of the load-side transistor 150 that exceeds the current value of the constant current source 157 is used. Flows from the internal circuit 114 as the drawing current / Io. For example, even if the fluctuation amount of the performance of the p-channel transistor is small, the current drawn from the internal circuit 114 due to the fluctuation of the performance of the n-channel transistor can be used. Is compensated.

As described above, in the present embodiment, a complementary current input / output circuit is formed between the data input unit 130 and the internal circuit 114, so that the operation of the p-channel transistor and the n-channel transistor The current characteristics can be set arbitrarily, and an interface to the balanced internal circuit 114 can be constructed. In other words, a complementary push-pull current can be generated, and the waveform of the internal circuit 114 can be shaped.
This circuit configuration can be used particularly as a compensation circuit for equalizing the duty ratio of a signal.

(Third Embodiment) FIG. 7 shows a third embodiment of the present invention.
FIG. 3 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in the liquid crystal panel control system according to the embodiment. The signal transmission circuit shown here is built in a liquid crystal driver for driving a TFT matrix color liquid crystal panel and a driver control circuit (control LSI) for driving the liquid crystal driver, and performs data transfer of digital color image signals. . Elements having the same reference numerals as those shown in FIG. 1 among the elements shown in FIG. 7 have the same functions as the elements shown in FIG. 1, and descriptions thereof will be omitted.

As shown in the drawing, the liquid crystal panel control system according to the present embodiment transmits data between the data output unit 101, the N liquid crystal drivers 102, and the data output unit 101 and the liquid crystal driver 102. And a data transmission path 103 for performing the operation. In general, when a liquid crystal driver is formed as an integrated circuit, a large number of liquid crystal drivers are arranged side by side in correspondence with one TFT matrix color liquid crystal panel column.

Each of the liquid crystal drivers 102 has the same basic configuration as the liquid crystal driver 102 (see FIG. 1) in the first embodiment. As a specific structure, the structures shown in FIGS. is there. Further, a device provided with a complementary current mirror shown in FIG. 6 may be used.

In this embodiment, the wiring capacitance CL of the data transmission line 103 shown in FIG.
Each is different. Therefore, the operating point shown in FIG. 2 also varies, but this operating point is controlled by the data input unit 130 of each liquid crystal driver 102. Therefore, according to the present embodiment, the same data can be transmitted from one data output unit 101 to a plurality of liquid crystal drivers 102.

However, in the process shown in FIG. 7, when the number of the liquid crystal drivers 102 increases, the variation of the operating point may not be sufficiently controlled. Therefore, in the following modified example, a configuration for coping with an increase in the number of liquid crystal drivers will be described.

First Modification FIG. 8 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a first modification of the third embodiment. In this modification, M (M <N) data output units 101 are provided in the control LSI 160 corresponding to the N liquid crystal drivers 102 being arranged.
Is provided. The data output unit 101 includes an output transistor 105 and a control circuit 105. Further, the control LSI 160 is provided with a drive number selecting unit 161 for selecting the number of the data output units 101 to be operated.

In this modification, for example, when there are 100 liquid crystal drivers 102, the number of driving units 161 is determined to operate the ten data output units 101. In the configuration shown in FIG. 7, since a plurality of data output units 101 are provided, the voltage Vin of the data transmission line 103 is lower than that in the configuration shown in FIG. However, since the amount of current driven by the plurality of data output units 101 increases, the current fluctuation of the current mirror 140 increases, and a signal transmission circuit with a high operation speed can be obtained.

-Second Modification- FIG. 9 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a second modification of the third embodiment. In this modification, M (M <N) data output units 101 are provided in the control LSI 160 corresponding to the N liquid crystal drivers 102 being arranged.
And an input / output correspondence selecting means 165 between the data output unit 101 and the data input unit in the liquid crystal driver 102. The input / output correspondence selection unit 165 may be used, for example, to transfer data to only one liquid crystal driver 102, to transfer data to two liquid crystal drivers 102, and to further output one data output unit 101 according to the data transfer situation.
It is configured such that an arbitrary input / output relationship can be selected, for example, when current driving is performed only by using only the three data output units 101 and data is transferred.

According to the present modification, it is possible to configure a data signal transmission circuit according to power consumption and operation speed according to data transfer conditions. That is, when performing high-speed operation, the number of data output units can be increased, and when low power consumption is required, data transfer conditions such as reducing the number of connected data input units can be selected.

Third Modification FIG. 10 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a third modification of the third embodiment.

The data transmission circuit according to the present modification has the same structure as that shown in FIG. 9 in the second modification, and further includes a passing current Ib of the amplitude controller 109 in each liquid crystal driver 102.
And a current control unit 166 for controlling the cutoff of the current.

FIG. 11 is a timing chart for controlling three liquid crystal drivers according to this modification.
As shown in FIG.
According to LK (1)-(3), data DATA (1)-(3) is extracted from each data output unit 101. that time,
ON signal START (1) from current control section 166-
According to (3), the amplitude controller 1 of each liquid crystal driver 101
09 current flows. And a first liquid crystal driver and a second liquid crystal driver.
A constant current Ib (1)-(3) flows through the constant current source 107 of the liquid crystal driver and the third liquid crystal driver, and data is sent to the internal circuit of each liquid crystal driver.

According to the configuration of this modification, the current control unit 16
According to 6, the current output state can be set only for the data input unit that requires data transfer, and the idling current of the data input unit that does not need data transfer can be stopped, so that the power consumption of the system can be reduced. .

(Other Embodiments) In each of the above embodiments, an example in which the present invention is applied to a data transmission circuit in a liquid crystal panel control system in which a transmission side circuit is a control LSI and a reception side circuit is a liquid crystal driver. Although described, the present invention is not limited to such an embodiment, and can be applied to other systems.

In the above embodiments, the output transistor 105 is constituted by a MIS transistor (MISFET). However, the output transistor 105 and transistors such as the transistors 110 and 111 in the current mirror are constituted by bipolar transistors. Is also good. In that case, for example, the output transistor can be an open collector bipolar transistor.

Also, as in the above embodiments, when each of the transistors such as the output transistor and the transistor in the current mirror is constituted by an MIS transistor, the conductivity type of each MIS transistor is limited to the above embodiments. Instead, the p-channel type and the n-channel type may be reversed from each embodiment. Further, the power supply voltage Vdd and the ground voltage VSs can be reversed.

[0072]

According to the signal transmission circuit of the present invention, since a means for keeping the voltage in the transmission line within a substantially constant range is employed, unnecessary radiation of electromagnetic waves in the transmission line can be reduced.

[Brief description of the drawings]

FIG. 1 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a first embodiment of the present invention.

FIGS. 2A to 2D are voltage-current characteristic diagrams for explaining a voltage operating point of a data transmission path, respectively, in order;
FIG. 4 is a timing chart of a voltage of a data transmission path, a through current of an output transistor, and a current flowing to a current source.

FIG. 3 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in the liquid crystal panel control system of the first specific example in the first embodiment.

FIG. 4 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system of a second specific example according to the first embodiment.

FIG. 5 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system of a third specific example in the first embodiment.

FIG. 6 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a second embodiment of the present invention.

FIG. 7 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a third embodiment of the present invention.

FIG. 8 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a first modification of the third embodiment.

FIG. 9 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a second modification of the third embodiment.

FIG. 10 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a liquid crystal panel control system according to a third modification of the third embodiment.

FIG. 11 is a timing chart for controlling three liquid crystal drivers in a third modification of the third embodiment.

FIG. 12 is an electric circuit diagram showing a configuration of a signal transmission circuit arranged in a conventional liquid crystal panel control system.

13 (a) to 13 (c) respectively show, in order, a time change of a data signal in a data transmission line of a conventional signal transmission circuit, a time change of a through current flowing in a data output portion, and a wiring flowing in the data transmission line. FIG. 6 is a diagram illustrating a temporal change of a leakage current to a capacitor.

[Explanation of symbols]

 Reference Signs List 101 data output unit 102 liquid crystal driver (reception side circuit) 103 data transmission line 105 output transistor 106 control circuit 107 constant current source 109 amplitude control means 110 source side transistor 111 load side transistor 112 load 114 internal circuit 130 data input unit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification FI FI theme coat ゛ (Reference) H03K 19/00 101Z F-term (Reference) 2H093 NA16 ND60 NE10 5C006 BB16 BC06 BC16 FA32 FA47 5C080 AA10 BB05 DD12 FF11 JJ02 JJ03 JJ04 JJ05 5J056 AA01 AA04 BB26 CC01 CC02 CC26 DD13 DD28 DD55 EE03 FF08 GG05 KK01 KK03

Claims (7)

[Claims] 1. A signal transmission circuit for connecting one transmission side circuit and one or a plurality of reception side circuits by a transmission line of one transmission line per signal, wherein A data output unit that is provided between the transmission line and the voltage supply unit and has an output transistor that operates according to a digital signal from a transmission-side internal circuit; and an internal circuit of the reception-side circuit in the reception-side circuit And a data input unit interposed between the transmission line and an output node connected to an internal circuit of the receiving circuit and outputting a digital signal to the internal circuit of the receiving circuit. The input unit is connected to the constant current source connected to the transmission path, and connected to the current source and the transmission path, and controls a current to the transmission path so that a voltage in the transmission path falls within a substantially constant range. Amplitude control A first control unit connected to the transmission line via the amplitude control unit.
A current mirror including a transistor and a second transistor connected to the output node; and a current mirror connected to the second transistor and the internal circuit of the current mirror via the output node, converting a current output of the second transistor into a voltage. Signal transmission circuit having a load for performing 2. The signal transmission circuit according to claim 1, wherein said amplitude control means receives a bias voltage at a gate.
A signal transmission circuit comprising an IS transistor. 3. The signal transmission circuit according to claim 1, wherein the constant current source is constituted by an MIS transistor receiving a constant bias voltage at a gate. 4. The signal transmission circuit according to claim 1, wherein the load is a constant current source, and a first transistor of the current mirror and a third transistor forming a current mirror are connected to the load. A complementary current mirror that includes two transistors of opposite conductivity types to the first and second transistors of the current mirror, is connected to the internal circuit, and mirrors a current output of the third transistor; And a current source connected to the output of the complementary current mirror. 5. The signal transmission circuit according to claim 1, wherein the transmission side circuit includes a plurality of the data output units, and the transmission side circuit includes a plurality of the data output units. Signal transmission, further comprising switching means for switching a connection state between the plurality of data output units and each data input unit of the plurality of reception side circuits to conduction / non-connection. circuit. 6. The signal transmission circuit according to claim 1, further comprising a current control means for controlling a current flowing through the amplitude control means of the reception side circuit to be stopped. A signal transmission circuit characterized by the above-mentioned. 7. The transmission circuit according to claim 1, wherein the transmission side circuit is a liquid crystal driver control circuit of a liquid crystal panel, and the reception side circuit is a liquid crystal driver of a liquid crystal panel. A transmission circuit, characterized in that: