JP2002312080A - Power management method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an improved power management device and method for a personal computer. SOLUTION: In a computer system shifting to a power saving mode when there is no user input from a keyboard and the like for a fixed period of time, a circuit detecting writing to a video memory and a power management controlling program for controlling power cooperating with the circuit are used. When writing to the video memory is detected, shifting to the power saving mode is prohibited even if there is no input from the keyboard and the like for the fixed period of time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power saving function of a computer system, and more particularly to an apparatus and a method for switching to a power saving mode when there is no input at a predetermined time.

[0002]

2. Description of the Related Art In recent years, from the viewpoint of energy saving, a power saving function by power management according to a user's use condition has become important not only in a notebook type but also in personal computers in general. The conventional power-saving function is that a power-saving button is pressed or that there is no input from a keyboard or the like for a certain period of time as a trigger (condition or event) for transition from the normal power-on mode to the power-saving mode. And so on. However, "pressing the power saving button" is complicated because it requires an extra operation of the user, and "there is no input from the keyboard or the like for a certain period of time" is the same as "pressing the power saving button". It is excellent in that it does not require extra user action, but has the following new problems. That is,
When playing a moving image from a CD-ROM or the like, even if there is no key input from the user, because the user wants to see the screen, but there is no keyboard input for a predetermined time by the above trigger, There was a problem that the screen disappeared. Then, in order to solve the above-mentioned inconvenience, the user has only to input a useless keyboard or the like at intervals shorter than a predetermined time or to prohibit the power saving function itself. However, the above-mentioned "use of unnecessary use of a keyboard or the like" or "prohibition of the power saving function itself" is contrary to the provision of the power saving function which is easy for the user to use, and is overturned.

[0003] A patent application of Mitsubishi Electric Corporation
214174 has a trigger (condition) of the conventional power saving function.
Discloses an apparatus that uses the presence or absence of writing to a display memory. This device is also similar to the present invention in that a predetermined trigger causes a transition from a normal power-on state to a power saving mode. However, in the case of this device, only the presence or absence of writing of a display memo is used to shift from the normal power-on state to the power saving mode, and no trigger or function for inhibiting the shift is shown. Therefore, in the case of an application that does not involve screen writing, the inconvenience that the transition to the power saving mode according to the related art cannot be prohibited cannot be avoided.

[0004]

SUMMARY OF THE INVENTION An object of the present invention is to provide a power saving function of a personal computer, which prohibits an unnecessary transition from a normal power-on state to a power saving mode which is not desired by a user. The goal is to make the functions easier to use.

[0005]

In order to realize the present invention, in a computer system having at least one power saving mode state in addition to a power on state and a power off state, a transition from a power on state to a power off state is performed. Decide,
A first trigger condition and a second trigger condition that is determined when the first trigger condition is satisfied;
If the second trigger condition is not satisfied after the first trigger condition is satisfied, the process returns to the determination of the first trigger condition again, and if the second trigger condition is satisfied after the first trigger condition is satisfied. Is, by the device or method characterized by first entering the power saving mode,
A new power saving function is provided in which the transition from a conventional user to an unexpected power saving mode is reduced.

[0006]

Embodiments of the present invention will be described below with reference to the drawings in the following order.

A. B. Personal computer system (FIG. 1) B. Hardware configuration of personal computer system (FIG. 2) Graphics video controller (FIG. 3) Power state transition (FIG. 4) Conventional power saving function (FIG. 5) Power saving function of the present application (FIGS. 6 to 8)

For convenience of explanation, the configuration and operation of the apparatus of the present invention will be described below mainly with reference to an example of a notebook personal computer most likely to use the power saving function most frequently. Is not limited to the notebook personal computer, but can be realized by a wide range of computer systems such as a desktop type and a floor stand type.

A. Personal Computer System (FIG. 1) Referring to FIG. 1, there is shown an overall view of a computer system for implementing the present invention. Computer·
The main body 10 of the system is preferably a portable PC as shown, but may be a desktop PC or another PC or workstation. Computer·
The system 10 includes a keyboard 1 as an input device for characters and the like.
2. A liquid crystal panel 13 as an output device for characters and figures, a CD-ROM drive 14 as a large capacity storage medium,
Some devices are provided with a speaker 11 as an output device for audio and the like, and recently a video camera 15 as an image input device. Note that details such as a keyboard and a liquid crystal panel are not shown in FIG. 1 because they are not directly related to the configuration of the present invention.

B. Hardware Configuration of Personal Computer System (FIG. 2) Referring to FIG. 2, there is shown a block diagram of a logic circuit inside the notebook personal computer of FIG. 1 and usually arranged on a motherboard (planar). ing. In recent personal computer systems, there are a plurality of buses to which devices of various processing speeds are connected, and a circuit called a bus bridge for performing protocol conversion between the buses bridges the plurality of buses. . As a representative example of such a bus configuration, FIG. 2 shows a CPU local bus 212 directly connected to the CPU 202, PCI buses 213 and 216 for connecting relatively high-speed peripheral devices, and relatively low-speed peripheral devices. Bus 22 for connecting
1, a PCMCIA bus 219 and an IDE bus 217 are shown.

The CPU bus 212 and the PCI bus 2
13 and a PCI-ISA bus bridge circuit 21 for connecting the PCI bus 213 and the ISA bus 221 to each other.
5. PCI-PCMCIA bus bridge circuit 214 for connecting PCI bus 213 and PCMCIA bus 219
Etc. are also shown in FIG. Also, a plurality of peripheral devices and the like adapted to the processing speed of the bus are connected to each bus. For example, a CPU is connected to the highest-speed CPU local bus 212 as the name implies, a high-speed graphic / video controller 222 is connected to the PCI bus 213, and a keyboard controller 229 and an audio controller are connected to the ISA bus 221. 230 or a Super I / O controller 231 which is a general-purpose I / O control circuit. Further, the host bridge / memory control circuit 204 has a memory control function in addition to the bus bridge function, and the memory / data buffer 2
05 and the main storage device RA
M207. Also, the graphic / video controller 222 connected to the PCI bus 213
Has a video memory 223 for screen display, is connected to the LCD panel by a digital signal via a buffer 224, and digitizes an external analog video input via an analog front end (AFE) 225. Take in.

C. Graphics Video Controller (FIG. 3) FIG. 3 describes the graphics video controller 222 of FIG. 2 and its peripheral circuits in more detail. Referring to FIG. 3, first, a graphics video controller 31 for controlling functions related to graphics and video, this graphics video controller 3
A clock generation circuit 32 for generating a clock signal to
A plurality of video memories 37 for storing screen information and the like, and a digital video signal 44 generated by the graphics video controller 31 are converted into an analog video signal 4.
1, a DAC 38 for converting the digital video signal 45 generated by the graphics video controller 31 and a driver circuit 39 for transmitting the digital signal 42 to the liquid crystal panel are described as main components. The graphics video controller 31 and the video memory 37 are provided with a plurality of address lines 34 indicating storage locations of the memory and a plurality of data lines 35 for transferring data to be read / written between the video memory 37. , And a plurality of control lines 36 for controlling the operation of the video memory 37. And
The control line 36 includes a write enable signal (WE #) to the video memory 37 and a row address strobe signal (RAS).
#), A column address strobe signal (CAS #) and a data output enable signal (OE #) from the video memory.

D. Power State Transition (FIG. 4) FIG. 4 shows a power state transition. A general personal computer having a power saving function has several "power saving states" in addition to "normal power on state" and "power off state" as power states. In FIG.
As examples of the “power saving state”, a “standby state” and a “suspend state” are shown. The difference between the “standby state” and the “suspend state” is simply the degree of power saving, that is, the difference in power consumption. The power consumption decreases in the order of “normal power on state”, “standby state”, “suspend state”, and “power off state”. The "power saving state" can be divided into two or more, but is limited to two in this embodiment for simplicity of explanation. For example, in the “standby state” 402, power is saved by turning off the liquid crystal panel (LCD) and the CRT display, and the “suspend state” 402
In step 403, in addition to turning off the liquid crystal panel and the CRT display, the clock frequency of the CPU is reduced, the spindle motor of the hard disk is stopped, and the video signal is stopped. This will save power even more.

A "normal power-on (normally on) state" is shown in block 401 of FIG. The transition from the “normal on state” 401 to the “standby state” 402 occurs when the timer 407 of a predetermined time elapses. Conversely, from the "standby state" 402, when there is an input from any keyboard or mouse, the state transits to the "normally on state". From the “standby state” 402,
A state transition is made to a “suspend state” 403 by the elapse of a predetermined timer or by the utility program 409. From the “suspend state” 403, input from a keyboard or the like or a suspend switch (SW)
Transition is made to the next block 405 with 11 or the like as a trigger. Block 405 prompts for a password and transitions to 412 when the correct password is entered and to the normal "normal on" state. on the other hand,
In the "normally ON state" 401, the power switch (S
When W) is pressed, the state transitions to 406 and a “power off state” 404, and when the power switch is pressed in the “power off state” 404, conversely, from the “power off state” 404 to the “power on state” 401 After the transition, the personal computer enters the normal operation mode.

E. Conventional power saving function (FIG. 5) FIG. 5 shows a "normal state" in a personal computer having a transitional power saving state as shown in FIG.
The flow of the process from “to the standby state” is described as a flowchart. This subroutine program is entered from the entrance of the block 51. First, block 52
, The value of the timer is cleared (set to the initial value).
This timer measures the elapsed time from the input of the immediately preceding user from the keyboard or the mouse or the like to the input of the next user. In block 53, it is checked whether there is an input from a keyboard or the like. If there is a user input from the keyboard or the like in block 53, the flow proceeds to block 54, where the value of the timer is reset, and the flow returns to block 53. Conversely, if there is no input from the keyboard or the like in block 53, the value of the timer indicating the elapsed time is incremented (block 5).
5) After that, the process moves to block 56. In block 56, it is checked whether the value of the timer exceeds a predetermined value, that is, a timeout value. In the block 56, if the value of the timer exceeds the predetermined value, the process proceeds to block 57, and if not, the process proceeds to block 53 again. When the process proceeds to block 57, processing for shifting to the standby mode is performed, and the process shifts to the standby mode. Finally, at block 58, the subroutine is exited.

F. Power Saving Function of the Present Application (FIGS. 6 to 8) The present invention will be described in detail with reference to FIGS. First, referring to FIG. 7, FIG.
The flow of processing from the "normal state" to the "standby state" in the personal computer in the case of the present invention corresponding to the present invention is described as a flowchart.
The subroutine program is entered from the entrance of block 71. First, at block 72, the value of the timer is cleared. This timer measures the elapsed time from the input of the immediately preceding user from the keyboard or the mouse or the like to the input of the next user. In block 73, it is checked whether there is an input from a keyboard or the like. If there is a user input from the keyboard or the like in block 73, the process proceeds to block 74, where the value of the timer is reset, and the process returns to block 73. Conversely, if there is no input from the keyboard or the like in block 73, the process moves to block 75. In block 75, a check is made as to whether the video memory write bit is on. The video memory write bit indicates that writing to the video memory for screen display (37 or the like in FIG. 3) has been completed after the previous reading of the bit. This will be described later.
As a result of checking the bit in block 75, if the bit is on, that is, if writing to the video memory has been performed, the flow jumps to block 74 to reset the timer value. Therefore, even if the transition to the standby mode has conventionally been made by writing to the video memory, the transition to the standby mode is prohibited.

In block 75, if there is no write to the memory, the flow proceeds to block 76, and after the value of the timer indicating the elapsed time is incremented, the flow proceeds to block 77.
In block 77, it is checked whether the value of the timer exceeds a predetermined value, that is, a timeout value. In this block 77, if the value of the timer has exceeded the predetermined value, the flow shifts to block 78; otherwise, the flow shifts to block 73 again. When the process proceeds to the block 78, processing for shifting to the standby mode is performed, and the process shifts to the standby mode. Finally, at block 79, exit from the subroutine.

Turning to FIG. 6, the hardware necessary for the configuration of the present invention will be described. An example of a circuit for realizing the video memory write bit used in the description of FIG. 7 is shown in FIG. The main component of the circuit is a 1-bit register indicated by 601. Such a register 601 is actually a preset and clear D
A type flip flop or the like (for example, 74) is used. Since the preset input is always pulled up to high (+5 V) by the pull-up resistor 611, the preset function does not operate. Similarly, since the data input D is pulled high by the pull-up resistor 611, the data input is always "1". Therefore, when WE # (all the signals with # at the end are low active) becomes active (low), the flip-flop 601
Becomes active (high). And
The output Q 608 is sent to the video memory write bit signal (VIDEO MEMORY WR) via the driver 603.
TE BIT). The output control of the driver 603 reads the status (STATUS READ #)
The output of the driver 603 is generated only when the status read signal is active (low), that is, the CPU can read the video memory write bit 607.

On the other hand, the clear input terminal of the flip-flop 601 is connected to the output of an AND gate 602, and this AND gate is further connected to a reset signal (R
ESET #) 605 and status clear signal (ST
ATUS CLEAR #) 610 signal is connected. That is, one of the reset signal 605 and the status clear signal 610 is active (low).
, The AND gate 602 outputs a low to clear the flip-flop 601. Therefore, the video memory write bit is cleared via the AND gate 602 by the reset signal 605 at the time of reset such as power-on, and by the status clear signal 610 after reading the video memory write bit. this,
An embodiment of the present invention is realized by control by the video memory write bit shown in FIG. 6 and the program shown in FIG. In FIG. 6, the components of the present invention are configured using discrete components to form a circuit.
A similar circuit can be realized by using an ASIC or PAL.

FIG. 8 is a block diagram showing the relationship between the components of the present invention and other software and hardware components on a personal computer. First, software on a personal computer can be roughly divided into two functional parts. The first part is above the dotted line 821 and is commonly referred to as the operating system (OS) layer 801. As a representative of this part,
There are IBM OS / 2, PC DOS and Microsoft Windows (R). The second part is a part called a device driver (D / D) layer illustrated in a region above the dotted line 822 and below the dotted line 821. Then, hardware exists in an area below the dotted line 822.

The OS 801 generally does not directly access the hardware, but rather does not directly access the hardware.
The hardware is indirectly accessed via the IOS. On the other hand, the device driver directly accesses the hardware in response to a request from the OS or an application program, and returns an access result from the hardware to the OS or the like. I do.

The operation of the present invention described with reference to FIGS. 6 and 7 will be described with reference to FIG. First, keyboard 8
Input 816 from 05 is always the keyboard D / D
804. The keyboard D / D controls input from a keyboard and a pointing device such as a mouse between the OS and the hardware. Next, the keyboard D / D 804 transfers the received key input to the event timer 803 this time 814. This event timer measures the elapsed time from the previous input from the keyboard or the like to the next input from the keyboard or the like. Then, when the elapsed time is periodically compared with a predetermined elapsed time (timeout value) set by the user, and as a result, it is determined that the non-input elapsed time from the keyboard or the like exceeds the predetermined timeout value. Indicates that the time-out has occurred.
02. The power management program 802 is a program for controlling a power saving function in a personal computer. The power management program 802, which has received the occurrence of the timeout from the event timer, issues a standby request 812 to the OS to shift to the standby state. Standby request 8 from power management 802
The OS 801 having received the command 12 controls the graphics D / D for controlling a device (for example, LCD or CRT illustrated in FIG. 4) to be conserved in the standby state.
To the standby request 813.

The graphics D / D 806 that has received the standby request 813 conventionally sends an LCD / CRT off request to the LCD and CRT to turn off the LCD / CRT as described with reference to FIG. On the other hand, in the case of the present invention, the standby request 813
The graphics D / D 806 received from 01 checks whether or not the video memory (VRAM) has been written by reading 817 the video memory write bit.
A report 815 is made to the event timer 803 that the RAM has been written. The event timer 803 having obtained the VRAM writing information resets the timer value of the elapsed time (blocks 75 and 74 in FIG. 7). VRAM 80 described above
9 is usually written to the graphics controller 8
08 (819) or an external video input terminal (8
By writing to the VRAM from outside via (10), (82)
0) done.

In summary, other embodiments are listed below. (1) A computer system which shifts to a power saving mode when a predetermined input is not performed within a predetermined time, and has a bit for indicating whether or not writing to a screen display memory is performed,
A computer, wherein even if there is no predetermined input during the predetermined time, if the bit indicates that data has been written to the screen display memory, shifting to the power saving mode is prohibited. ·system. (2) The computer system according to (1), wherein the predetermined input is an input from a keyboard. (3) the predetermined input is an input from a keyboard or a pointing device;
The computer system according to (1). (4) The computer system according to (1), wherein the display of the display is prohibited in the power saving mode. (5) The computer system according to (1), wherein in the power saving mode, display on a display is prohibited and rotation of a hard disk is stopped. (6) writing into the image display memory from outside the computer system is possible;
The computer system according to (1). (7) The bit for indicating the presence or absence of writing to the screen display memory is constituted by a 1-bit register, and one of the inputs is a write enable (WE) signal to the screen display memory. The computer system according to (1). (8) A power management method in a computer system, the computer system comprising: A bit indicating whether or not the video memory has been written, wherein the power management method comprises the steps of: checking for the presence or absence of the predetermined input for the predetermined time; When there is no predetermined input, checking a bit indicating whether or not the video memory is written; and as a result of checking the bit indicating whether or not the video memory is written, the video memory When there is a write to the power saving state,
A power management method comprising: (9) A power management method in a computer system having a power-saving state other than a power-on state and a power-off state, the method including a step of checking whether a first event has been established, and the establishment of the first event. If there is,
Checking whether or not a second event has been established; and, if the second event has been established, transitioning the computer system from the power-on state to the power-saving state. Characteristic power management method.

[0025]

As described above, according to the configuration of the present invention, in the power saving function of the personal computer, an unnecessary transition from the normal power-on state to the power saving mode is inhibited, which is an improvement over the prior art. Power saving features are provided.

[0026]

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a computer system for implementing the present invention.

FIG. 2 is a block diagram showing a logic circuit inside a computer system for implementing the present invention.

FIG. 3 is a block diagram showing a graphics peripheral circuit inside a computer system for implementing the present invention.

FIG. 4 is a transition diagram of a power supply state for implementing the present invention.

FIG. 5 is a flowchart of a conventional control program for controlling a power saving function.

FIG. 6 is a circuit diagram of a register for implementing the present invention.

FIG. 7 is a flowchart of a control program of the present invention for controlling a power saving function.

FIG. 8 is a block diagram showing the relationship between components of the present invention and other components of a personal computer.

[0027]

[Explanation of symbols]

 Reference Signs List 10 Computer system 11 Speaker 12 Keyboard 13 Liquid crystal panel (LCD) 14 CD-ROM drive 15 Video camera 201 Clock generation circuit 202 CPU 204 Host bridge / memory control circuit 214 PCI-PCMCIA bridge circuit 215 PCI-ISA bridge circuit 222 Graphics / Video Controller 223 Video Memory 229 Keyboard 31 Graphics / Video Controller 32 Clock Generation Circuit 33 PCI Bus 34 Address Line 35 Data Line 36 Control Line 37 Video Memory 38 DAC 39 Driver 43 Graphics / Video Peripheral Circuit 401 Normal ON state 402 Standby state 403 Suspend state 404 OFF state 405 Password input request 60 1 D type flip flop 602 AND gate 603 Driver 801 Operating system 802 Power management program 803 Event timer 804 Keyboard D / D 805 Keyboard 806 Graphics D / D 807 LCD / CRT 808 Graphics controller 809 VRAM 810 External video input terminal

Continued on the front page (72) Inventor Tetsu Yamazaki 1623-14 Shimotsuruma, Yamato-shi, Kanagawa Prefecture Inside the Yamato Office of IBM Japan, Ltd. (72) Inventor Takeshi Takeshi 1623-14 Shimotsuruma, Yamato-shi, Kanagawa Inside the Yamato Works of IBM Corporation (72) Inventor Riki Kigoshi 1623-14 Shimotsuruma, Yamato-shi, Kanagawa Prefecture F-term in the Yamato Works of IBM Japan, Ltd.

Claims (1)

[Claims] A computer system having a power-saving state other than a power-on state and a power-off state.
A management method, comprising: a step of checking whether a first event has been established; and a step of, if the first event has been established, checking whether a second event has been established; If the event 2 is established, the computer
Transitioning the system from the power-on state to the power-saving state.