JP2002299048A - Lighting system and method of driving the lighting system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a lighting system using an electroluminescence element, capable of continuously varying light-emitting luminance and a color tone, without changing the circuit element constants. SOLUTION: The frequency and the duty ratio of a boosting circuit 103 for driving a boosting element and the output of the boosting circuit 103 are rectified by a rectifying circuit 104. After charging the electroluminescence element 105, the frequency, the duty ratio, and the output time of a discharge circuit 106 are set as a single driving value. These are stored in plural number in terms of time series, and one driving pattern is constituted. The one driving pattern is selected from among a plural driving pattern storage circuit 112 for storing a plurality of these patterns, to drive the boosting circuit 103 and the discharge circuit 106.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lighting device powered by a low-voltage power supply and a driving method thereof.

[0002]

2. Description of the Related Art With respect to a conventional lighting device, a lighting device in which a light emitting element is an electroluminescent element (hereinafter, referred to as "EL") will be described with reference to the drawings. FIG.
FIG. 2 is a functional block diagram of a conventional lighting device using EL. FIG. 6 is a timing chart of a conventional lighting device using EL.

A conventional lighting apparatus includes a boosting element 502 for boosting the voltage of a power supply 501, a boosting circuit 503 for generating a boosted voltage from the boosting element 502, and a boosting signal generation for controlling the boosting circuit 503. A circuit 507, a rectifier circuit 504 for rectifying the boosted voltage obtained from the booster circuit 503, an EL 505 which emits light by charging and discharging the boosted voltage rectified by the rectifier circuit 504,
A discharge circuit 506 for discharging the charge charged in the EL 505, a discharge signal generation circuit 509 for controlling the discharge circuit 506, a boost signal generation circuit 507, and a clock signal serving as a reference for operation of the discharge signal generation circuit 509 And a control circuit 511 for operating the oscillation circuit 508 by a drive instruction signal 511a from a lighting switch or the like of the lighting device.

In a conventional lighting device, when a drive instruction signal 511a is generated and held by a lighting switch or the like, the control circuit 511 activates an oscillation circuit 508 by the drive instruction signal 511a, and a boost reference signal 508 is supplied to a boost signal generation circuit 507.
a is supplied to the discharge signal generation circuit 509 by the discharge reference signal 508b.
Are output. The boost signal generation circuit 507 generates a boost clock signal 507 a based on the boost reference signal 508 a from the oscillation circuit 508 and supplies the generated clock signal 507 a to the boost circuit 503. The booster circuit 503 causes the booster 502 connected to the power supply 501 to generate a high-voltage pulse 503a in response to a boosted clock signal 507a.

The high voltage pulse 503a is rectified by the rectifier circuit 504 to charge the EL 505 as a light emitting element. The discharge signal generation circuit 509 uses the basic discharge signal 508b from the oscillation circuit 508 to generate a discharge clock signal 509a for discharging the voltage charged in the EL 505 at a longer cycle than the boosted clock signal 507a.

The discharge circuit 506 discharges the voltage charged in the EL 505 according to the discharge clock signal 509a.
The EL 505 emits light by the charge and discharge described above.

[0007]

SUMMARY OF THE INVENTION In a conventional lighting device,
Since the emission luminance greatly changes depending on the size of the emission area, the frequency of the boost clock signal and the discharge clock signal must be changed in order to change the inductance and resistance of the boost coil for each lighting device and to increase the drive voltage. Changes need to be made. Therefore, in order to change the frequency of the oscillation circuit that is the source of the frequency, there is a problem that the characteristic values of the crystal oscillator, the resistor, the capacitor, and the like constituting the oscillation circuit must be adjusted. This adjustment is especially
Is remarkable.

Further, in order to control the lighting time, there is another problem that the state must be maintained by switching a switch or a signal for instructing lighting is continuously applied from the outside.

Further, in order to draw attention to display contents as illumination, it is necessary to increase or decrease the luminance in a time series or to change the light emission color tone by changing the drive frequency, which requires a drive circuit having several circuit constants. There was a problem that it had to be prepared and switched. .

[0010]

According to the present invention, there is provided a power supply for supplying a low voltage, a booster for boosting the voltage of the power supply, and a booster circuit for generating a boosted voltage from the booster. A boosting signal generating circuit for generating a signal indicating the piezoelectricity to the boosting circuit, a rectifying circuit for rectifying the boosted voltage obtained from the boosting circuit, and a boosted voltage rectified by the rectifying circuit. A light-emitting element that emits light by discharging, a discharge circuit for discharging electric charges charged in the light-emitting element, a discharge signal generation circuit for generating a signal instructing the discharge circuit to perform discharge, and the boost signal A boost signal indicating value for giving the frequency and duty ratio of the boost signal to the generating circuit, a discharge signal indicating value for giving the frequency and duty ratio of the discharge signal to the discharge signal generating circuit, and the boost signal A drive set value including an indicated value and an output time value giving a time for outputting the discharge signal instruction value, drive pattern data in which a plurality of the drive set values are stored in time series, and a plurality of the drive pattern data are stored. A plurality of drive pattern storage circuits, and a plurality of the drive setting values for one drive pattern selected by an externally provided drive pattern designating signal from the plurality of drive patterns stored in the drive pattern plurality storage circuit. A drive pattern reading circuit that supplies a boost signal indication value and a discharge signal indication value to the boost signal generation circuit and the discharge signal generation circuit, respectively, within the time of the output time value read in time series; An oscillation circuit for supplying a clock signal as a reference for operation to the discharge signal generation circuit and the drive pattern reading circuit; To operate the oscillation circuit by Shimesuru drive instruction signal, a lighting device and a control circuit for outputting a signal indicative of operation of said drive pattern reading circuit.

Further, the present invention is the lighting device, wherein the light emitting element in the lighting device is an electroluminescent element.

Further, according to the present invention, there is provided a selecting step of selecting one driving pattern from a plurality of driving patterns when a driving instruction signal for instructing lighting is input, and selecting a plurality of driving patterns from the one driving pattern selected in the selecting step. And an output step of chronologically selecting and outputting one drive signal from the plurality of drive signals extracted in the extraction step. .

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment will be described with reference to the drawings.

FIG. 1 is a functional block diagram showing the operation of the lighting device according to the present invention. Power supply 101 for supplying a low voltage, and booster 10 for boosting the voltage of the power supply
2, a boosting circuit 103 for generating a boosted voltage from the boosting element, a boosting signal generating circuit 107 for controlling the boosting circuit 103, and a rectifying circuit 104 for rectifying the boosted voltage obtained from the boosting circuit 103. And the rectifier circuit 104
Element 105 that emits light by charging and discharging the boosted voltage rectified by the above, a discharge circuit 106 for discharging the charge charged in the light emitting element 105, and a discharge circuit 1
06, a boost signal indicating value for giving the frequency and duty ratio of the boost signal to the boost signal generating circuit 107, and the frequency and duty ratio of the discharge signal for the discharge signal generating circuit 109. A drive set value including a discharge signal indication value, a boost signal indication value, and an output time value giving a time for outputting the discharge signal indication value, drive pattern data in which a plurality of drive set values are stored in time series, and drive pattern data And a plurality of drive pattern data stored in the drive pattern storage circuit 112 and a plurality of drive pattern data selected by an externally supplied drive pattern designation signal from a plurality of drive pattern data stored in the drive pattern storage circuit 112. The drive set value is read out in time series, and the boost signal generation circuit 107 Each boost signal indicated value telegraphic communication generation circuit 109, boost reference signal and the driving pattern readout circuit 110 to provide a discharge signal indication value, a reference signal of the boost signal generation to boost the signal generating circuit 107, discharge signal generating circuit 1
An oscillation circuit 108 for supplying a discharge reference signal serving as a reference signal for generating a discharge signal and a basic clock signal for reading the operation of the drive pattern reading circuit 110 to the circuit 09 and an oscillation circuit 108 when a drive instruction signal for instructing lighting is given. And a control circuit 111 for outputting a signal instructing the operation of the drive pattern reading circuit 110.

When a drive instruction signal 111a is given to the control circuit 111 by a lighting switch or the like, an oscillation instruction signal 111b is output to the oscillation circuit 108 to perform an oscillation operation. Also, the drive pattern readout circuit operation instruction signal 111c
Is output to the drive pattern reading circuit 110 to operate the driving pattern reading circuit 110. The oscillating circuit 108 supplies a boost reference signal 108a to the boost signal generating circuit 107 as a reference signal for generating a boost signal, a discharge reference signal 108b to the discharge signal generating circuit 109 as a reference signal for generating a discharge signal, and the operation of the drive pattern reading circuit 110. Of the readout circuit reference clock signal 108c.

The boost reference signal 108a and the discharge reference signal 10
8b and the readout circuit reference clock signal 108c are not necessarily separate signals, and may be one signal. In this embodiment, the case of one signal will be described.

The driving pattern reading circuit 110 receives a driving pattern specifying signal 110a specified from the outside,
Decode into an address signal 110b. Address signal 1
By 10b, a leading drive setting value of one drive pattern is designated from among a plurality of drive patterns stored in the drive pattern multiple storage circuit 112. The drive pattern read circuit 110 increments the address signal 110b from the drive pattern multiple storage circuit 112. And
A plurality of drive setting values 1 stored as drive patterns
12a are read in order. The drive setting value 112a read in order is composed of a boost signal instruction value 110c, a discharge signal instruction value 110d, and an output time value output from these. Further, the boost signal instruction value 110c and the discharge signal instruction value 110d give the frequency and duty ratio of the boost signal 107a and the discharge signal 109a, respectively.

The drive pattern read circuit 110 counts down using the read reference clock signal 108c during the read output time value, and outputs the boost signal instruction value 110c,
The discharge signal instruction value 110d is set to the boost signal generation circuit 1
07 and continue to be output to the discharge signal generation circuit 109.

The boosting signal generation circuit 107 generates a boosting signal based on the boosting signal instruction value 110c and generates a boosting reference signal 108a.
And outputs it to the booster circuit 103. Booster circuit 1
03 generates a high voltage pulse 103a by the boosting clock signal 107a from the boosting element 102 connected to the power supply 101. The light emitting element 105 is charged by rectifying the high voltage pulse 103a by the rectifier circuit 104.

The discharge signal generation circuit 109 generates a discharge clock signal 109a from the discharge reference signal 108b,
Output to the discharge circuit 106. Discharge clock signal 109a
Accordingly, the discharge circuit 106 discharges the voltage charged in the light emitting element 105. Light is emitted by charging and discharging the light emitting element 105 described above.

The drive pattern reading circuit 110 outputs a drive end signal 110 e to the control circuit 111 when the drive setting value 112 a read from the drive pattern plural storage circuit 112 is drive end data. Control circuit 11
1 stops output of the oscillation instruction signal 111b when the drive end signal 110e is input. Thereby, the oscillation circuit 108 stops the oscillation operation.

When the oscillation operation of the oscillation circuit 108 is stopped, the boost reference signal 108a, the discharge reference signal 108b, and the readout circuit reference clock signal 108c are stopped. By stopping the boost reference signal 108a, the discharge reference signal 108b, and the readout circuit reference clock signal 108c, the boost signal generation circuit 10
7. The operations of the discharge signal generation circuit 109 and the drive pattern reading circuit 110 stop. When the boost signal generation circuit 107 and the discharge signal generation circuit 109 are stopped, the operations of the boost circuit 103 and the discharge circuit 106 are stopped, and the charge / discharge operation of the light emitting element 105 is stopped. FIG. 2 shows a drive pattern multiple storage circuit 1.
12 shows the stored contents.

The drive pattern multiple storage circuit 112 stores a boost signal frequency (boost frequency) f of the boost signal instruction value 110c applied to the boost signal generation circuit 107 for each address.
up, a duty ratio (step-up duty) Dup, and a discharge signal instruction value 110d given to the discharge signal generation circuit 109
And the output time value t which gives the time when the drive pattern reading circuit 110 outputs the indicated values of the frequency (discharge frequency) fd and the duty ratio (discharge duty) Dd of the discharge signal.

One drive set value is composed of a boost frequency fup, a boost duty Dup, a discharge frequency fd, a discharge duty Dd, and an output time value t. One drive pattern is composed of a plurality of drive setting values.

For example, the drive time value of the last drive set value of the drive pattern is 0. This indicates the end of the data.

In this embodiment, the driving pattern 1 is from address AD1 to ADn, the driving pattern 2 is from address ADn + 1 to ADn + k, and the driving pattern continues thereafter. The driving pattern N is from address ADm to ADz.
And has a total of N drive patterns.

In the drive pattern 1, as the first drive set value at the address AD1, the boost frequency fup1, the boost duty Dup1, the discharge frequency fd1, the discharge duty D
d1 and an output time value t1 are stored. The next address AD2 has a boosting frequency fup2, a boosting duty Dup2, and a discharging frequency fd as the second drive setting values.
2, the discharge duty D2 and the output time value t2 are stored. The address AD3 and thereafter are stored in the same manner, and the boosting frequency fu is set in the address ADn as the n-th drive setting value.
pn, the boost duty Dupn, the discharge frequency fdn, the discharge duty D2, and the output time value tn = 0 are stored.

From drive pattern 2 to drive pattern N, the boost frequency fup, the boost duty Dup, the discharge frequency fd, the discharge duty D2
And the output time value t are stored.

The boost signal indicating value 110c and the discharge signal indicating value 110d are not necessarily the frequency and the duty ratio, but may be values proportional to the frequency and the duty ratio. Further, it may be constituted by a value inversely proportional to the frequency.

FIG. 3 shows an operation flowchart of the drive pattern read circuit 110. Drive pattern reading circuit 110
Is a drive pattern designation signal 110a designated from the outside
, And is decoded to the address of the drive pattern stored in the drive pattern multiple storage circuit 112. Then, the address signal 110b is output to the drive pattern multiple storage circuit 112 (step 301). When designating drive pattern 1, "1" is input to drive pattern designation signal 110a. As a result, the drive pattern reading circuit 110 receives the input “1” of the drive pattern designation signal
, And outputs the address value “AD1” to the drive pattern multiple storage circuit 112.

Next, the drive pattern read circuit 110 reads the boost signal instruction value, the discharge signal instruction value, and the output time value as drive setting values from the multiple drive pattern storage circuit 112 (step 302). In the case of drive pattern 1, address signal 1 from drive pattern read circuit 110
In response to the output of the address value “AD1” of 10b, the drive pattern reading circuit 110
From the address AD1, the boost frequency fup1 and the boost duty Dup1 as the boost signal instruction value, and the discharge frequency fd1 and the discharge duty D as the discharge signal instruction value.
Read d1 and output time value t1.

Next, it is determined whether the read drive setting value is end data (step 303). It is determined whether the output time value in the read drive setting values is end data. At this time, for example, if the end date is “0”,
It is determined whether it is equal to “0”.

If the data is not the end data, the boosted signal indicating value 110c and the discharge signal indicating value 110d are output to the boosting signal generating circuit 107 and the discharging signal generating circuit 109 from the read drive setting values (step 304). In the case of the driving pattern 1, the boost frequency fup1 and the boost duty Dup1 are supplied to the boost signal generation circuit 107 as the boost designation value 110c, and the discharge frequency fd1 and the discharge duty Dd1 are supplied to the discharge signal generation circuit 10 as the discharge signal instruction value 110d.
9 respectively.

The drive pattern read circuit 110 outputs the boost signal indicating value 110c and the discharge signal indicating value 110d to the boost signal generating circuit 107 and the discharge signal generating circuit 109, respectively, and then sets the drive based on the read circuit basic clock signal 108c. The output time value of the value is counted down (step 305). In the case of the drive pattern 1, the drive time value t1 in the drive set value read from the address AD1 is counted down based on the read circuit basic clock signal 108c.

The drive pattern reading circuit 110 waits for the end of the countdown of the output time value (step 306). Upon completion, the address is incremented, and the process returns to the reading of the next drive setting value (step 307).

In the case of the driving pattern 1, when the driving time value t1 in the driving set value read from the address AD1 is counted down, the driving pattern reading circuit 110 increments the address value "AD1" and changes the address value to "AD1". AD2 ". Thereafter, in drive pattern 1, the above operation is repeated up to the address value “ADn−1”.

In the case of end data (step 303),
The drive end signal 110e is output to the control circuit 111 (Step 308).

In the case of drive pattern 1, since the drive time value tn in the drive set value of the address ADn of the drive pattern plural storage circuit 112 is "0", the drive pattern reading circuit 110 sends a drive end signal to the control circuit 111. 11
0e is output. The control circuit 111 outputs the drive end signal 110
e, the oscillation instruction signal 1
The output of 11b is stopped. When the output of the oscillation instruction signal 111b stops, the oscillation circuit 108
a, the discharge reference signal 108b and the readout circuit reference clock signal 108c stop. By stopping the boost signal reference signal 108a, the discharge signal reference signal 108b, and the readout circuit reference clock signal 108c, the boost signal generation circuit 10
7. The operations of the discharge signal generation circuit 109 and the drive pattern reading circuit 110 stop. When the boost signal generation circuit 107 and the discharge signal generation circuit 109 stop, the boost circuit 103,
Since the operation of the discharge circuit 106 stops, the light emitting element 105
Drive operation stops.

FIG. 4 shows a timing chart of the present invention.

A drive instruction signal 111a is given to the control circuit 111 by a lighting switch or the like. It is not always necessary to keep inputting the drive instruction signal 111a. For example, the input may be enabled when the input is at a high level for a time during which the chattering of the switch stops.

When the drive instruction signal 111a becomes valid, the control circuit 111 sends the oscillation instruction signal 111b to the oscillation circuit 108.
Is output as a high level. Further, a driving pattern circuit operation instruction signal 110c is sent to the driving pattern reading circuit 110.
Is output at a high level. Oscillation instruction signal 111b
Becomes high level, the oscillation circuit 108 starts the oscillation operation. Thus, the oscillation circuit 108 supplies the boost reference signal 108a to the boost signal generation circuit 107, the discharge reference signal 108b to the discharge signal generation circuit 109, and the read circuit reference clock signal 108c to the drive pattern reading circuit 110.

In this embodiment, the boost reference signal 108a, the discharge reference signal 108b, and the readout circuit reference clock 108c are one signal.

The drive pattern readout circuit 110, which has received the drive pattern circuit operation instruction signal 110c, takes in a drive pattern designation signal 110a designated from outside. In the embodiment, it is assumed that “1” indicating that the drive pattern designating signal 110a designates the drive pattern 1 is input. The drive pattern reading circuit 110 decodes the address of the drive pattern stored in the drive pattern multiple storage circuit 112 based on the received drive pattern designation signal 110 a, and outputs an address signal 110 b to the multiple storage circuit 112.

In the case of drive pattern 1, "AD1" is output to drive pattern multiple storage circuit 112 as drive pattern address signal 110b. The drive pattern multiple storage circuit 112 outputs the drive setting value stored at the corresponding address to the drive pattern read circuit 110 in response to the drive pattern address signal 110b.

When "AD1" is output as drive pattern address signal 110b to drive pattern plural storage circuit 112, drive set value DT1 is read from drive pattern read circuit 1
10 is read. The read drive setting value is
It is divided into a boost frequency, a boost duty, a discharge frequency, a discharge duty, and a drive time value. The step-up frequency and the step-up duty are set as a step-up signal instruction value 110c from the drive pattern reading circuit 110 to the step-up signal generation circuit 107.
Is output to

The discharge frequency and the discharge duty are output from the drive pattern reading circuit 110 to the discharge signal generation circuit 109 as a discharge signal instruction value 110d.
In the drive setting value DT1 of the drive pattern 1, the boost frequency fup1 and the boost duty Dup1 are output to the boost signal generation circuit 107 as the boost signal instruction value 110c.
The discharge frequency fd1 and the discharge duty Dd1 are output to the discharge signal generation circuit 109 as the discharge signal instruction value 110d.

The boost signal generation circuit 107 generates the boost signal 107a at the boost frequency and the boost duty given by the boost signal instruction value 110c using the boost reference signal 108a. In response to the boost signal 107a, the boost circuit 103 drives the boost element 102 connected to the power supply 101 to generate a high voltage pulse 103a. The light emitting element 105 is charged by the rectifier circuit 104 rectifying the high voltage pulse 103a.

The discharge signal generation circuit 109 uses the discharge reference signal 108b to generate a discharge signal 109a at the discharge frequency and discharge duty given by the discharge signal instruction value 110d. The discharge circuit 106 discharges the charged light emitting element 105 by the discharge signal 109a. Light emitting element 105
Emits light by repeating charge and discharge.

In the case of the drive set value DT1 of the drive pattern 1, the light emitting element 105 is charged by the boost frequency fup1 and the boost duty Dup1. On the other hand, the light emitting element 105
Are discharged by the discharge frequency fd1 and the discharge duty Dd1.

When the light emitting element 105 is charging / discharging, that is, when the driving pattern read circuit 110
10c and the discharge signal instruction value 110d are output to the boost signal generation circuit 107 and the discharge signal generation circuit 109, respectively. This is performed based on the signal 108c.

In the case of the drive set value DT1 of the drive pattern 1, the output time value t1 is counted down. During this countdown, the boost signal generation circuit 107 generates the boost signal 107a with the boost frequency fup1 and the boost duty Dup1.
Is supplied to the boosting circuit 103, and the discharge signal generation circuit 109 generates the discharge signal 10 at the discharge frequency fd1 and the discharge duty Dd1.
9a is supplied to the discharge circuit 106 to charge and discharge the light emitting element 105.

When the countdown of the output time value is completed, the drive pattern reading circuit 110 increments the address, reads the next drive set value from the drive pattern multiple storage circuit 112, and sets the output time value of the drive set value to "0". The above operation is repeated until they become equal. When the output time value of the drive setting value read by the drive pattern read circuit 110 becomes equal to “0”, the drive pattern read circuit 11
0 outputs the drive end signal 110e to the control circuit 111.

When the drive end signal 110 e is received by the control circuit 111, the oscillation instruction signal 111
b is set to low level. When the oscillation instruction signal 111b becomes low level, the oscillation circuit 108
a, the discharge reference signal 108b and the readout circuit reference clock signal 108c are stopped. Step-up reference signal 108a, discharge reference signal 108b, and readout circuit reference clock signal 108c
Stops, the operations of the boost signal generation circuit 107, the discharge signal generation circuit 109, and the drive pattern reading circuit 110 stop.

In the case of drive pattern 1, the drive set value DT1
To DTn−1, the boost signal instruction value, that is, the boost frequency, the boost duty, and the discharge signal instruction value, that is, the discharge frequency, the discharge duty, and the output time value change in time series. Further, since the output time value is “0” at the drive set value DTn, the drive operation is stopped.

As described above, the frequency and the duty ratio of the boosted clock signal 107a for charging / discharging the light emitting element 105 and the discharge clock signal 109a can be changed in a time-series manner. In this case, the emission luminance and the color tone can be changed. For example,
When the duty ratio of the boosted clock signal is changed while the frequencies of the boosted clock signal and the discharge clock signal are fixed, the voltage applied to the light emitting element increases as the duty ratio increases, and as a result, the brightness of the light emitting element increases. Further, when the frequency and the duty ratio of the boost clock signal are fixed and the frequency of the discharge clock signal is changed, the voltage and frequency applied to the light emitting element change. As a result, the luminance and the emission color of the light emitting element change.

In the case of drive pattern 1, the drive set value DT1
Raises the boost frequency fup1 and increases the boost duty Dup1.
And the discharge frequency fd1 is set high,
The brightness is low and the color tone is blue. Next drive setting value DT2
Since the boost frequency fup2 is set low, the boost duty is set high, and the discharge frequency fd2 is set low, the luminance is high and the color tone is green. Since the boost frequency, the boost duty, the discharge frequency, and the discharge duty are gradually reduced by the subsequent drive setting values, the luminance gradually decreases and the color tone changes to more green.

According to the present invention, one drive pattern is selected from a plurality of drive patterns stored in a plurality of drive pattern storage circuits, and a step-up clock of a drive set value stored in the selected one drive pattern is provided. The frequency and the duty ratio and the output time value of each of the signal and the discharge clock signal are read in time series, and the boosted clock signal and the discharge clock signal are output with the read output time value based on the read values, so that the light emitting element is continuously output Brightness and color tone can be varied.

[0058]

The present invention is embodied in the form described above, and has the following effects.

Depending on the size of the light emitting area of the EL, the constants of the inductance and the resistance of the booster coil are changed, and the frequencies of the booster clock signal and the discharge clock signal are changed, so that the crystal oscillator constituting the oscillation circuit can be changed. resistance,
There is no need to adjust the characteristic values of the capacitors and the like. Further, since the lighting time is controlled, it is not necessary to continuously apply a signal for instructing lighting from the outside. Furthermore, by providing a plurality of various driving patterns, it becomes possible to change the luminance or the emission frequency by changing the driving frequency so as to draw attention to the display contents as illumination.

[Brief description of the drawings]

FIG. 1 is a functional block diagram of a lighting device according to the present invention.

FIG. 2 is a data configuration diagram of a drive pattern multiple storage circuit in the lighting device according to the present invention.

FIG. 3 is an operation flowchart of a drive pattern reading circuit in the lighting device according to the present invention.

FIG. 4 is a timing chart of the lighting device according to the present invention.

FIG. 5 is a functional block diagram of a lighting device using a conventional EL light emitting element.

FIG. 6 is a timing chart of a lighting device using a conventional EL light emitting element.

[Explanation of symbols]

 101, 501 Power supply 102, 502 Boost element 103, 503 Boost circuit 104, 504 Rectifier circuit 105, 505 Light emitting element (EL) 106, 506 Discharge circuit 107, 507 Boost signal generation circuit 108, 508 Oscillator circuit 109, 509 Discharge signal generation Circuit 110 Drive pattern reading circuit 111, 511 Control circuit 112 Drive pattern plural storage circuit

Claims (3)

[Claims] 1. A power supply for supplying a low voltage, a booster for boosting a voltage of the power supply, a booster for generating a boosted voltage from the booster, and instructing the booster to boost the voltage. A boosting signal generating circuit for generating a boosted signal, a rectifying circuit for rectifying a boosted voltage obtained from the boosting circuit, and a light emitting element which emits light by charging and discharging the boosted voltage rectified by the rectifying circuit. A discharge circuit for discharging the electric charge charged in the light emitting element; a discharge signal generation circuit for generating a signal for instructing the discharge circuit to perform a discharge; and a frequency of a boost signal to the boost signal generation circuit. A boost signal indicating value giving a duty ratio, a frequency of the discharge signal to the discharge signal generating circuit, a discharge signal indicating value giving a duty ratio, the boost signal indicating value, and the discharge signal. A driving set value and an output time value which gives the time of outputting the instruction value,
From the drive pattern data in which a plurality of the drive setting values are stored in chronological order, a plurality of drive pattern storage circuits in which the drive pattern data are stored, and the plurality of drive patterns stored in the plurality of drive pattern storage circuits, The boost signal generation circuit and the discharge signal generation circuit within a time of an output time value in which a plurality of the drive setting values are read in time series for one drive pattern selected by the given drive pattern designation signal. A driving pattern readout circuit that supplies a boosted signal instruction value and a discharge signal instruction value, an oscillating circuit that supplies a clock signal as an operation reference to the boosted signal generation circuit, the discharge signal generation circuit, and the drive pattern readout circuit, The oscillation circuit is operated by a driving instruction signal for instructing lighting, and the operation of the driving pattern reading circuit is performed. Lighting device and a control circuit for outputting a signal instructing. 2. The lighting device according to claim 1, wherein the light emitting device is an electroluminescent device. 3. A selecting step of selecting one driving pattern from a plurality of driving patterns when a driving instruction signal for instructing lighting is input, and a plurality of driving signals from the one driving pattern selected in the selecting step. And an output step of chronologically selecting and outputting one drive signal from the plurality of drive signals extracted in the extraction step.