JP2002280848A - Input level indication circuit - Google Patents

Input level indication circuit

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Publication number
JP2002280848A
JP2002280848A JP2001082118A JP2001082118A JP2002280848A JP 2002280848 A JP2002280848 A JP 2002280848A JP 2001082118 A JP2001082118 A JP 2001082118A JP 2001082118 A JP2001082118 A JP 2001082118A JP 2002280848 A JP2002280848 A JP 2002280848A
Authority
JP
Japan
Prior art keywords
wave
output
voltage
input
band
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001082118A
Other languages
Japanese (ja)
Inventor
Akira Saito
彰 斎藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Kokusai Electric Inc
Original Assignee
Hitachi Kokusai Electric Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Kokusai Electric Inc filed Critical Hitachi Kokusai Electric Inc
Priority to JP2001082118A priority Critical patent/JP2002280848A/en
Publication of JP2002280848A publication Critical patent/JP2002280848A/en
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an input level indication circuit that can accurately indicate the input level of a signal of its own channel (D wave) even when a disturbing wave (U wave) exists in an adjacent channel and reduces an error in an AGC voltage so as to keep an output level within a prescribed rated value. SOLUTION: The input level indication circuit is provided with a band limit filter eliminating a required wave and extracting only an unwanted wave and placed at an input terminal side, and a differential amplifier that compares the detection voltage of the unwanted wave which has passed through the filter with the detection voltage of a required wave which has passed through a band pass filter to extract the required wave from an output of an AGC circuit so that, when the unwanted wave voltage is greater than the required wave voltage by a prescribed voltage or over, a transistor is shifted from a cut-off state into an active state and the effect of the wave is reduced to obtain an accurate meter indication value.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は例えばデジタル信号
を伝送するマイクロ波伝送装置等の入力レベル表示回路
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input level display circuit such as a microwave transmission device for transmitting digital signals.

【0002】[0002]

【従来の技術】図2は従来の入力レベル表示回路を示
す。本回路は入力レベルの変動を出力において一定にす
るAGC回路を一部利用したものである。その動作は、
入力端子1から高周波信号が入力されると帯域濾波器
(以下BPFと称す)4により所要波(以下D波と称
す)が選択され、検波器5により入力レベルに応じた直
流電圧V1が得られる。差動増幅器6によりV1は増幅
され利得制御器2のバイアスを制御することにより出力
レベルを一定とし、出力端子3から出力されるものであ
る。すなわち、入力信号レベルが増加するとV1も増加
し差動増幅器6の出力は減少するが、利得制御器2に例
えばピンダイオード・アッテネータを用いた場合は、こ
の減衰量が増大し出力レベルが減少し、結果、出力端子
3の出力レベルは一定に保たれる。
2. Description of the Related Art FIG. 2 shows a conventional input level display circuit. This circuit partially uses an AGC circuit for making the fluctuation of the input level constant at the output. Its behavior is
When a high-frequency signal is input from the input terminal 1, a required wave (hereinafter, referred to as D wave) is selected by a bandpass filter (hereinafter, referred to as BPF) 4, and a DC voltage V1 corresponding to the input level is obtained by a detector 5. . V1 is amplified by the differential amplifier 6, and the output level is kept constant by controlling the bias of the gain controller 2, and is output from the output terminal 3. That is, as the input signal level increases, V1 also increases and the output of the differential amplifier 6 decreases. However, when a pin diode attenuator is used for the gain controller 2, for example, the attenuation increases and the output level decreases. As a result, the output level of the output terminal 3 is kept constant.

【0003】入力レベル表示10は、この制御電圧を用
いて入力信号のレベルを表示するものである。
An input level display 10 displays the level of an input signal using the control voltage.

【0004】しかしながら、従来回路では使用チャネル
に信号が無く、隣接チャネルに信号U波が存在するよう
な場合、周波数が近接しているためBPF4をリークし
てしまう。このリークがあるとAGCにより概略定格出
力レベルとなりそれに対応する直流電圧V1が発生する
ため入力メータ10が振れ、あたかも希望信号D波が存
在するかの錯覚をオペレータに与えてしまう。
However, in the conventional circuit, when there is no signal in the used channel and the signal U wave exists in the adjacent channel, the BPF 4 leaks because the frequencies are close to each other. If this leak occurs, the output level becomes approximately the rated output level by the AGC, and the corresponding DC voltage V1 is generated, so that the input meter 10 fluctuates, giving an illusion to the operator as if the desired signal D wave exists.

【0005】[0005]

【発明が解決しようとする課題】隣接チャネルにU波が
ありD波が無い場合、BPFで除去しきれなかった不要
波(以下U波と称す)が検波され入力レベルメータが振
れてしまう。このような場合でもメータが振れないよう
にする必要がある。
When a U-wave is present in an adjacent channel and a D-wave is not present, an unnecessary wave (hereinafter referred to as a U-wave) that cannot be completely removed by the BPF is detected and the input level meter fluctuates. In such a case, it is necessary to prevent the meter from swinging.

【0006】[0006]

【課題を解決するための手段】本発明は上記の目的を達
成するために、U波のみを通過させる帯域制限濾波器
(以下NFと称す)12と、U波の検波器13と、この
検波電圧を適当な値V2に設定する可変抵抗器14と、
このV2と前記V1の差電圧を増幅する差動増幅器7
と、この出力電圧で制御されるトランジスタ8と、前記
D波の検波電圧の差動増幅出力であるAGC電圧に合成
するダイオード11を具備することにより隣接妨害によ
る入力メ―タの指示誤差を除去するものである。
In order to achieve the above object, the present invention provides a band-limited filter (hereinafter referred to as NF) 12 for passing only a U-wave, a U-wave detector 13, and a detector for the U-wave. A variable resistor 14 for setting the voltage to an appropriate value V2;
A differential amplifier 7 for amplifying the difference voltage between V2 and V1.
And a transistor 8 controlled by the output voltage and a diode 11 for synthesizing an AGC voltage which is a differentially amplified output of the detection voltage of the D-wave, thereby eliminating an error in indicating an input meter due to adjacent interference. Is what you do.

【0007】[0007]

【発明の実施の形態】本発明の一実施例を図1により説
明する。同図において、図2と同一参照符号を付したも
のは同一物を示す。1は入力端子でレベル不定の高周波
信号が入力され、2は利得制御器で適当なレベルに制御
するもの、3は出力端子でレベルが一定となった高周波
信号が出力される。4は本線信号から分岐された信号か
ら必要な信号D波を取り出すBPF、5はこれを検波す
るダイオード、6はこの検波電圧を増幅する差動増幅
器、9はここで得られた制御電圧から分岐された電圧を
増幅する差動増幅器、10は入力レベルを指示するメー
タである。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described with reference to FIG. In the figure, the same reference numerals as in FIG. 2 denote the same items. Reference numeral 1 denotes an input terminal for inputting a high-frequency signal having an undefined level, 2 denotes a gain controller for controlling an appropriate level, and 3 denotes an output terminal for outputting a high-frequency signal having a constant level. 4 is a BPF for extracting a required signal D wave from a signal branched from the main signal, 5 is a diode for detecting the signal, 6 is a differential amplifier for amplifying this detection voltage, and 9 is a branch from the control voltage obtained here. And a differential amplifier 10 for amplifying the input voltage.

【0008】BPS4とBPS4の出力の検波ダイオー
ド5と、差動増幅器6により利得制御器2の出力を一定
に保つよう制御する制御手段を構成する。差動増幅器9
とメータ10によりこの制御手段の出力に応じてそのレ
ベルを表示する表示手段を構成する。
The BPS 4 and a detecting diode 5 for the output of the BPS 4 and a differential amplifier 6 constitute control means for controlling the output of the gain controller 2 to be kept constant. Differential amplifier 9
And the meter 10 constitute display means for displaying the level according to the output of the control means.

【0009】また、差動増幅器7の出力とトランジスタ
8、ダイオード11により表示制御手段を構成する。
A display control means is constituted by the output of the differential amplifier 7, the transistor 8 and the diode 11.

【0010】本回路は入力レベルの変動を出力において
一定にするAGC回路を一部利用したものである。その
動作は、入力端子1から高周波信号が入力されるとBP
F4によりD波が選択され、検波器5により入力レベル
に応じた直流電圧V1が得られる。差動増幅器6により
V1は増幅され利得制御器2のバイアスを制御すること
により出力レベルを一定とし、出力端子3から出力され
るものである。すなわち、入力信号レベルが増加すると
V1も増加し差動増幅器6の出力は減少するが、利得制
御器2に例えばピンダイオード・アッテネータを用いた
場合は、この減衰量が増大し出力レベルが減少し、結
果、出力端子3の出力レベルは一定に保たれる。
This circuit partially utilizes an AGC circuit for making the fluctuation of the input level constant at the output. When a high-frequency signal is input from the input terminal 1, the BP
The D wave is selected by F4, and the DC voltage V1 corresponding to the input level is obtained by the detector 5. V1 is amplified by the differential amplifier 6, and the output level is kept constant by controlling the bias of the gain controller 2, and is output from the output terminal 3. That is, as the input signal level increases, V1 also increases and the output of the differential amplifier 6 decreases. However, when a pin diode attenuator is used for the gain controller 2, for example, the attenuation increases and the output level decreases. As a result, the output level of the output terminal 3 is kept constant.

【0011】入力レベル表示は、この制御電圧を用いて
入力信号のレベルを表示するものであり、例えば入力信
号レベルが増加するとV1が増加し差動増幅器6及び9
を経てメータ10をレベル大の方へ振らせるものであ
る。
The input level display indicates the level of the input signal using the control voltage. For example, when the input signal level increases, V1 increases and the differential amplifiers 6 and 9 are displayed.
And causes the meter 10 to swing toward the higher level.

【0012】ここで入力端子1からU波のみ入力された
場合、U波はNF12で選択され検波器13で検波され
た後、レベル調整用ボリューム14で適当な電圧V2に
設定されて差動増幅器7の反転入力側に入力される。ま
た、同差動増幅器7の非反転入力側にはU波のリーク分
の検波電圧V1が入力されている。ここで、V2がV1
よりある一定値より大きくなればトランジスタ8はON
し、更に差動増幅器7の出力電圧が差動増幅器6の出力
電圧よりも低ければダイオード11はONする。そして
バイアス電圧VBは概略0Vとなり、出力レベルは抑え
込まれるとともにメータ10は概略0を指示することに
なる。
When only the U-wave is input from the input terminal 1, the U-wave is selected by the NF 12, detected by the detector 13, and then set to an appropriate voltage V2 by the level adjusting potentiometer 14 to set the differential amplifier. 7 is input to the inverted input side. The detection voltage V1 for the leak of the U wave is input to the non-inverting input side of the differential amplifier 7. Here, V2 is V1
If it becomes larger than a certain fixed value, the transistor 8 is turned on.
If the output voltage of the differential amplifier 7 is lower than the output voltage of the differential amplifier 6, the diode 11 is turned on. Then, the bias voltage VB becomes approximately 0 V, the output level is suppressed, and the meter 10 indicates approximately 0.

【0013】次にD波が入力されるか、U波が無くなる
と、V1が大きくなるかV2が小さくなることによりト
ランジスタ8がカットオフ方向に動作し、バイアス電圧
VBはV1に追従するようになる。このような場合は当
然D波の入力レベルに対応したAGC電圧とメータ指示
が得られる。
Next, when the D wave is input or the U wave disappears, V1 increases or V2 decreases, so that the transistor 8 operates in the cutoff direction, and the bias voltage VB follows V1. Become. In such a case, the AGC voltage and the meter indication corresponding to the input level of the D wave can be naturally obtained.

【0014】[0014]

【発明の効果】以上述べたように本発明によれば、隣接
チャネルに妨害波(U波)が存在するような場合でも、
正確に自チャネルの信号(D波)の入力レベルを表示す
るとともに、AGC電圧も誤差が少なくなり出力レベル
を一定の定格値に保つことができる。
As described above, according to the present invention, even when an interference wave (U wave) exists in an adjacent channel,
In addition to accurately displaying the input level of the signal (D wave) of the own channel, the error of the AGC voltage is reduced and the output level can be maintained at a constant rated value.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例を示す全体のブロック図FIG. 1 is an overall block diagram showing an embodiment of the present invention.

【図2】 従来の一実施例を示す全体のブロック図FIG. 2 is an overall block diagram showing a conventional embodiment.

【符号の説明】[Explanation of symbols]

4:D波用BPF、5:D波用検波器、6:D波用差動
増幅器、12:U波用NF、13:U波用検波器、7:
D波とU波のレベル差を検出する差動増幅器
4: D-wave BPF, 5: D-wave detector, 6: D-wave differential amplifier, 12: U-wave NF, 13: U-wave detector, 7:
Differential amplifier for detecting level difference between D wave and U wave

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 所要波を通過させる帯域濾波器と、不要
波のみを通過させる帯域制限濾波器と、前記所要波を検
波し利得を制御するAGC回路と、不要波の検波器と、
該不要波の検波電圧を所定の値に設定する可変抵抗器
と、該可変抵抗器の出力電圧と前記所要波の検波電圧の
差電圧を増幅する差動増幅器と、この差動出力電圧で制
御されるトランジスタと、前記所要波の検波電圧の差動
増幅出力であるAGC電圧と合成するダイオードを具備
することを特徴とする隣接妨害除去機能を有した入力レ
ベル指示回路。
A band-pass filter for passing a required wave, a band-limited filter for passing only an unnecessary wave, an AGC circuit for detecting the required wave and controlling a gain, and a detector for an unnecessary wave;
A variable resistor for setting the detection voltage of the unnecessary wave to a predetermined value, a differential amplifier for amplifying a difference voltage between the output voltage of the variable resistor and the detection voltage of the required wave, and control by the differential output voltage An input level indicating circuit having an adjacent interference removing function, comprising: a transistor to be operated; and a diode for synthesizing an AGC voltage which is a differential amplification output of the detection voltage of the required wave.
【請求項2】 利得制御器と、該利得制御器の入力側に
接続され入力信号の不要波成分を通過出力する帯域制限
濾波器と、該帯域制限濾波器出力の検波器と、前記利得
制御器の出力側に接続され出力信号の所要波を通過出力
する帯域濾波器と、該帯域濾波器出力の検波器と、該検
波器の出力に応じて前記利得制御器の出力を一定に保つ
よう制御する制御手段と、該制御手段の出力に応じてそ
のレベルを表示する表示手段と、前記帯域濾波器出力の
検波手段の出力と前記帯域制限濾波器出力の検波手段の
出力とを入力とする差動増幅器と、該差動増幅器の出力
に応じて前記制御手段のレベルを所定値以下にし前記表
示手段を制御する表示制御手段よりなることを特徴とす
る入力レベル指示回路。
2. A gain controller, a band-limited filter connected to an input side of the gain controller for passing and outputting an unnecessary wave component of an input signal, a detector for outputting the band-limited filter, and the gain control. A bandpass filter connected to the output side of the filter for passing and outputting a required wave of an output signal; a detector for outputting the bandpass filter; and maintaining the output of the gain controller constant according to the output of the detector. Control means for controlling, display means for displaying the level in accordance with the output of the control means, output of the detection means for the output of the band-pass filter, and output of the detection means for the output of the band-limited filter as inputs. An input level instruction circuit, comprising: a differential amplifier; and a display control unit that controls the display unit to lower the level of the control unit according to an output of the differential amplifier.
JP2001082118A 2001-03-22 2001-03-22 Input level indication circuit Pending JP2002280848A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001082118A JP2002280848A (en) 2001-03-22 2001-03-22 Input level indication circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001082118A JP2002280848A (en) 2001-03-22 2001-03-22 Input level indication circuit

Publications (1)

Publication Number Publication Date
JP2002280848A true JP2002280848A (en) 2002-09-27

Family

ID=18938107

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001082118A Pending JP2002280848A (en) 2001-03-22 2001-03-22 Input level indication circuit

Country Status (1)

Country Link
JP (1) JP2002280848A (en)

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