JP2002279732A - Modulation method, modulator, demodulation method, demodulator, recording medium, transmission, and transmission method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable high-density recoding by improving a coding rate to record a signal which cannot be falsified as a result of making a signal into a signal which cannot be directly outputted to a recording signal as data, and thereby to realize the prevention of a illegal copy or the like. SOLUTION: The restriction of a value of k is enabled from the outside by using the 8-15 modulation of an RLL (2, k) restriction. Thereby, auxiliary information can be recorded as a watermark generated by the modulation by superimposing the auxiliary information to main information.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a modulation method, a modulation device, a demodulation method, a demodulation device, a recording medium, a transmission device, and a transmission method, and particularly to recording and reproducing digital signals on a recording medium such as an optical disk or a magnetic disk. The present invention also relates to a modulation method, a modulation device, a demodulation method, a demodulation device, a recording medium, a transmission device, and a transmission method suitable for transmitting a digital signal.

[0002]

2. Description of the Related Art Generally, the length of a pit recorded on an optical disc is limited by the minimum run length (minimum pit or land length) and the clock reproduction due to the optical transmission characteristics of recording / reproduction and physical restrictions on pit generation. To limit the maximum run length (maximum pit or land length) because of easiness, and to protect the servo band, it is necessary to modulate the digital signal to be recorded so as to have the low-frequency component suppression characteristic of the recorded digital signal. is there.

[0003] Among conventional modulation methods satisfying this limitation,
CD with minimum run length of 3T (T = cycle of channel bit) and minimum run length of 11T
EFM (8-
14 modulation) system and EFMPlus (8-1) used for DVD (digital versatile disk).
6 modulation) system is known.

As is well known, the EFM system converts 8-bit data into a code word of 14 channel bits and always converts "1" between channel bits to "1" at the time of the conversion. The run length restriction rule RLL (2, 10) that two or more 0 "s are continuous is satisfied, and three margin bits are always added between the 14-bit code words. This is a modulation method provided to satisfy RLL (2, 10) at the word connection portion and to reduce the DC component and low frequency component of the modulated signal.

In the latter EFMPlus system, 8-bit data is directly converted into a 16-bit code word so as to satisfy the run-length restriction rule RLL (2, 10), and the two preceding and succeeding code words are combined. Also the above RL
This is a modulation method that combines so as to satisfy L (2, 10).

Further, Japanese Patent Laid-Open No. 2000-286709 discloses a modulation method which has a higher coding rate for higher density recording and satisfies a run length restriction rule of a minimum run length of 3T and a maximum run length of 11T. This modulation method uses a plurality of encoding tables for an input digital signal (input data word) in order to encode the input digital signal into a code word.
The plurality of coding tables have a code word corresponding to the input digital signal, state information for selecting a coding table for coding the next input digital signal, and a specific code for a predetermined input digital signal. The signal obtained by NRZI-modulating the code word in the encoding table of FIG. 1 and the code word of another specific encoding table have opposite polarities (evenness of the number of “1” is different). Thus, for example, 8-bit data can be converted into a 15-bit codeword while performing DSV (Digital Sum Value) control.

[0007]

However, the EFMPlus system of the 16-bit code word improves the coding rate by about 6% as compared with the EFM system of the 17-bit code word when the margin bits are included. In order to perform high-density recording, there is a problem that the coding rate needs to be further improved.

Further, in view of the further suppression of the low-frequency component of the signal to be recorded and the higher performance of DSV control, in the modulation method using the 8-15 modulation method without using the margin bit between codes, A modulation method and a modulation apparatus capable of performing higher-performance DSV control by optimizing a coding table based on information on the appearance frequency of an input data word and thereby further suppressing low-frequency components of a modulated signal And Japanese Patent Application Laid-Open No. 2000-286, for an encoding table capable of limiting the minimum run length of a code word to 3T and the maximum run length to 11T for providing a recording medium.
No. 709.

As a measure against illegal copying of an information medium, a DVD (Digital Versatile Disc) has a BCA (burst cutting area) recorded on the inner periphery of the disc. However, there is a problem that it is not enough and it is necessary to more reliably prevent illegal copying.

The present invention enables high-density recording by increasing the coding rate, and records a signal that cannot be falsified as a result by making it impossible to directly output a recording signal as data. Therefore, an object of the present invention is to realize prevention of illegal copying and the like.

[0011]

In order to solve the above-mentioned problems, the present invention obtains a q-bit (where q> p) code word from a p-bit input data word using a plurality of encoding tables. In performing the modulation, the plurality of encoding tables correspond to each input data word, and a code word and a next code word that directly satisfies a predetermined run-length restriction rule even when directly coupled to the code word. State information indicating the encoding table used to modulate the next input data word to obtain a particular encoding table of the plurality of encoding tables and another particular code. The conversion table stores, for a given input data word, each codeword stored corresponding to the given input data word as N
Code words are assigned so that the RZI-converted signal has the opposite polarity, and when modulating the predetermined input data word, each time input data to be modulated using the specific coding table appears. In the past, from all the output codewords selected in the past and the codeword modulated using the specific coding table that appeared before the time when the input data to be modulated using the specific coding table appeared From the absolute value of the obtained DSV and the absolute value of the DSV obtained from the codeword up to the time when the input data to be modulated using the specific coding table appears, select the codeword with the smaller absolute value. Thus, in a modulation method for outputting a codeword satisfying the predetermined run-length restriction rule under DSV control, the p bits are 8 bits, and the q bits are 15 bits. The run-length restriction rule is that, except for a synchronization signal, the minimum run length of a signal obtained by NRZI-converting a code word is 3T (where T is the channel bit period of the code word) and the maximum run length is 14T or less. And input means for auxiliary information different from the q-bit input data word in which a specific run length of 12 T or more does not appear for a selected run length of 13 T or more. A modulation method is provided, wherein the auxiliary information is superimposed and modulated.

Further, the present invention provides a modulator for modulating the input data word by the above-mentioned modulation method in order to solve the above-mentioned problems.

The present invention also provides a demodulation method for demodulating a codeword string encoded by the above-described modulation method into input data in order to solve the above-mentioned problems.
Serial-to-parallel conversion of the coded code string back to a coded bit string of code words, detects coding table candidates in which the code words are coded, and uses the output of the detected coding table candidates. A codeword is input by a demodulation table that demodulates input data from the codeword and an output of the detected encoding table. A demodulation method is provided, wherein demodulation is performed on data words and auxiliary information superimposed on the input data words.

Further, the present invention is a demodulation device for demodulating a codeword string encoded by the above-mentioned modulation method to input data in order to solve the above-mentioned problems,
Serial-to-parallel conversion means for converting an encoded code string into an encoded bit-word code string, first detection means for detecting an encoding table candidate in which the code word is encoded, and the detected code A second detecting means for determining in which state of the plurality of coding tables the coding word is coded using the output of the coding table candidate, and input data based on the code word and the output of the detected coding table. A demodulation means for demodulating a code word into an input data word by using a demodulation table for demodulating the input data word; and an auxiliary information demodulation means for demodulating auxiliary information superimposed on the input data word. .

Further, the present invention provides a recording medium characterized in that a modulation signal generated by the above-described modulation method or modulation device is recorded at least partially in order to solve the above-mentioned problems.

Further, the present invention provides a transmission apparatus characterized by transmitting a modulation signal generated by the above-described modulation method or modulation apparatus in order to solve the above-mentioned problems.

Further, the present invention provides a transmission method characterized by transmitting a modulation signal generated by the above-described modulation method or modulation apparatus in order to solve the above-mentioned problems.

[0018]

Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a block diagram of a disk recording apparatus to which an embodiment of a modulation method and a modulation apparatus according to the present invention is applied.

In FIG. 1, the disk recording apparatus 1 comprises a format section 12, an 8-15 modulation section 13, an NRZI conversion drive circuit 14, and a record drive circuit 15, and relates to input information such as video and audio. This is a device for recording digital signals on a recording medium 2 such as an optical disk.

First, a digital signal relating to information such as video and audio is input to a format section 12 together with a control signal and the like to be recorded together. Is converted to a control format conforming to the recording format of the above, and is output to the 8-15 modulation unit 13 as a format signal.

On the other hand, the auxiliary information signal is input to the format section 12 together with the digital information signal, and is output to the 8-15 modulation section 13 as the maximum run setting signal in the format section 12. The maximum run setting signal is, for example, as shown in FIG.
As shown in FIG. 6, a binary signal of 1 or 0 is output for each recording sector. As an example, when the maximum run setting signal is 1, the maximum run length (Tmax) is 12, and when the maximum run setting signal is 0, the maximum run length (Tmax) is 11 so that the maximum run length (Tmax) is modulated by the 8-15 modulator as described later. Is made.

In this embodiment, the maximum run length is 12T or 11T, but other combinations, such as selecting 12T or more when the maximum run setting is 1, are also effective in the present invention. Further, for example, when the maximum run setting is 13T, it is also effective in the present invention to combine run settings so that 12T does not appear. For the recording sector, for example, 2048 bytes of a digital information signal is selected, and this can also be set arbitrarily within a range where auxiliary information can be recorded.

The signal (recording signal) output from the 8-15 modulation section 13 is supplied to a recording drive circuit 15 and is recorded on the recording medium 2 such as an optical disk. In this embodiment, the recording medium 2 is described as an example,
The recording signal is subjected to an encoding process suitable for transmission by the transmission encoding unit 21, and can be transmitted via the transmission medium 22.

FIG. 2 is a block diagram showing an example of the 8-15 modulator 13 shown in FIG. Although FIG. 2 shows a case where two path memories for temporarily storing codes are provided, the present invention can be applied to a case where more path memories are provided. The maximum run setting signal is input from the format unit 12 to the code word option presence / absence detection circuit 100 in FIG. 2, and the code word option presence / absence detection circuit 100 selects the maximum run length using the maximum run setting signal.

Here, in describing the embodiment of the modulator according to the present invention with reference to FIG. 2, the configuration of the encoding table 120 will be described in detail with reference to FIGS. Will be described. First, the maximum run is 11T
A detailed description of the operation will be given for the case of being restricted to.

The encoding table 120 is, as shown in FIG.
Corresponding to the input data word, a code word (ie, the output code word after conversion) and a predetermined run length restriction rule (eg, minimum run length 3T,
And state information indicating the encoding table 120 used to modulate the next input data word to obtain the next code word that satisfies the maximum run length 11T).
Also, a specific encoding table 120 of the plurality of encoding tables 120 and another specific encoding table 120
For a given input data word, the codeword stored corresponding to the given input data word is
Codewords are assigned so that the RZI-converted signal has the opposite polarity.

In FIGS. 3 to 7, the 8-bit input word is 15 bits.
State “S = 0” to “S” for conversion to bit codeword
6 shows an example of six encoding tables of “5”. FIGS.
In each of the encoding tables, the input word (the column marked “Data” on the left of FIGS. 3 to 7) is shown in decimal, the output code word after conversion is shown in binary (15 bits), and The rightmost digit of each output codeword is used to modulate the next input dataword to obtain the next codeword that meets the predetermined run-length restriction rules, even though the connection between the codewords is direct. 2 shows status information indicating an encoding table to be used.

For example, referring to the encoding table of the state “S = 0” shown in FIG. 3, if the input word “0”, the state information S
+1 is “4”, and the state information S + 1 for the input word “1”
Is "5", and if the input word is "2", the state information S + 1
Is "0". Therefore, the state “S = 0”
When the modulation (encoding) of the input word “0” is performed using the encoding table of “1”, the state “S” is output for the next input word.
The modulation is performed using the coding table of "= 4".

Focusing on the tables of the state “S = 0” and the state “S = 3”, the signal obtained by NRZI-converting the output codeword corresponding to the input words “0” to “38” has the opposite polarity. (Evenness of the number of “1” included in the code word is different). This allows the next codeword to be N
The initial value at the time of RZI conversion can be set differently. When the polarity is reversed, the direction can be increased and decreased in the case of DSV.

With respect to the encoding rule, the state "S ="
When "0" is selected, the zero run length on the previous output codeword LSB side is set to "0" (that is, the output codeword ends with "1"). Also, the state “S =
In the 3 ″ encoding table, the input words “0” to “3”
Each output codeword corresponding to “8” is arranged such that the zero run length on the MSB side is “2”. Therefore, the state "
The output codewords corresponding to the input words “0” to “38” of the encoding table of S = 3 ”correspond to the input words“ 0 ”to“ 38 ”of the encoding table of the state“ S = 0 ”, respectively. Even if each output code word is exchanged, the run length restriction rule in which the run length after NRZI conversion is limited to 3T to 11T can be maintained. Input words "0" to "11" and "26" of each encoding table of state "S = 2" and state "S = 4"
Similarly, “-47” is also arranged so that the run-length restriction rule can be maintained even if replacement is performed.

Next, the operation of FIG. 2 will be described. First, an initial table (initial values of options of an encoding table) is selected for an input data word SCt such as a synchronization signal. Next, when an 8-bit input data word SCt is input, the code word option presence / absence detection circuit 100 outputs the current input data word SCt and the encoding table address operation unit 110.
, The output codeword corresponding to the current input data word SCt is uniquely determined or there is an option based on the state information determined by the preceding output codeword (here, the selected initial value) supplied from. Is detected, and the detection result is compared with the encoding table address calculation unit 110 and the absolute value comparison unit 14.
Output to 0.

Here, focusing on each of the tables “S = 0” and “S = 3” in the encoding table shown in FIGS. 3 to 7, as described above, Input data words (input words) “0” to among the output code words of the table
The output codeword corresponding to "38" can maintain the encoding rule even when exchanged with the output codeword in the table in the state "S = 0", and can be demodulated. Also, the state “S =
Focusing on each table of "2" and state "S = 4", it corresponds to the input words "0" to "11" and "26" to "47" among the output code words of the table of state "S = 4". Even if the output code word is exchanged with the output code word in the table in the state “S = 2”, the encoding rule can be maintained and demodulation is possible.

Further, in the encoding tables shown in FIGS. 3 to 7, the output code words of the tables of the state "S = 0" and the state "S = 2" are respectively the state "S = 3" and the state "S". = 4 "
N in the output codeword corresponding to the input word in the table
Since the polarity after the RZI conversion is configured to be reversed, the input words “0” to “3” of the table in the state “S = 0”
8 "and input words" 0 "to"
When “11” and “26” to “47” occur,
A plurality of output codewords can be obtained, and DSV control can be performed by selecting an optimum output codeword using the DSV value as the path “1” and the path “2”.

Therefore, the code word option presence / absence detection circuit 100
Is a detection result of “there is an option” when the state information S + 1 supplied from the encoding table address operation unit 110 is the state “S = 0” and the input data word SCt is “0” to “38”. Is output. At this time, the encoding table address calculation unit 110 reads the output code word OC1t corresponding to the input data word SCt in the table of the state “S = 0” in the encoding table 120, and also reads the state “S =
The output code word OC2t corresponding to the input data word SCt in the 3 ″ table is read.

A codeword option presence / absence detection circuit 100
Is that the state information S + 1 supplied from the encoding table address operation unit 110 is the state “S = 2” and the input data word SCt is “0” to “11” or “26” to “47”.
In the case of, the detection result of “there is an option” is output. At this time, the encoding table address calculation unit 110 reads out the output code word OC1t corresponding to the input data word SCt of the table in the state “S = 2” in the encoding table 120, and also reads the table in the state “S = 4”. Input data word SC
The output code word OC2t corresponding to t is read.

Further, a code word option presence / absence detection circuit 100
Is that the state information S + 1 supplied from the encoding table address operation unit 110 is the state “S = 3”, the zero run length on the LSB side of the previous output codeword is 2 to 6, and the next output codeword Is in a range that does not break the coding rule even if it is replaced with an output codeword in the coding table in the state “S = 0”, that is, when coding is possible without the maximum run length exceeding 11T. Also outputs the detection result of “there is an option”. At this time, the coding table address calculation unit reads out the output code word OC1t corresponding to the input data word SCt of the table of the state “S = 3” in the coding table, and inputs the input code word OC1t of the table of the state “S = 0”. The output code word OC2t corresponding to the data word SCt is read.

As described above, the codeword option presence / absence detection circuit 1
If the detection result of “00” indicates “there is an option”, the number of addresses calculated by the encoding table address calculation unit 110 is two. In this case, the encoding table 12
0 outputs two types of codewords by time division processing or the like.
One of the two types of codewords output from the encoding table 120 is an output codeword of the path “1”, and the other is an output codeword of the path “2”.

The codeword option presence / absence detection circuit 100 supplies a detection result of “no option” (uniquely determined) to the coding table address calculation unit 110 under the conditions other than the above. The coding table address calculation unit 110 calculates the address of the coding table 120 based on the detection result from the codeword option presence / absence detection circuit 100.

That is, the code word option presence / absence detection circuit 10
If the detection result of “0” is “no choice (uniquely determined)”, the address calculated by the encoding table address calculation unit 110 is one, and the output code word corresponding to this address is the encoding table. The same output code word is read from the address and input to the path memory 131 and the path memory 132.

When the detection result of the codeword option presence / absence detection circuit 100 is “there is an option”, the path memory 131 outputs the output codeword (OC1t−1, OC1t−1, OC1t-2, ...,
OC1Tdsvc) is stored in the path memory 132, and the output codewords (OC2t-1, OC2t-2, OC2t-2, OC2t-2,
.., OC2Tdsvc) are accumulated.

The DSV operation memory 130 stores DSV values (DSV1) obtained from all output codewords selected in the past and the output codeword of the path "1" input immediately before.
t-1) is stored in the DSV operation memory 133, and the DSV value (DSV2t-1) obtained from all the output codewords selected in the past and the output codeword of the path "2" input immediately before is output. ) Is stored.

On the other hand, the absolute value comparison unit 140 calculates the absolute value | D of the sum of the DSVs from the DSV operation memory 130 so far.
SV1t-1 | is compared with the absolute value | DSV2t-1 | of the total sum of the DSVs from the DSV operation memory 133, and the comparison result is stored in the memory control / code output unit 1.
Output to 50.

The memory control / sign output unit 150 outputs | DSV1t when the comparison result input from the absolute value comparison unit 140 is
-1 | <| DSV2t-1 |, the past output code word (OC1Td) stored in the path memory 131
svc,..., OC1t-2, OC1t-1) are output as the selected output codewords, and the storage contents of the DSV operation memory 132 are stored in the DSV having the smaller absolute value of the DSV.
Rewrite to DSV1t-1 stored in V operation memory 130.

On the other hand, the comparison result input from the absolute value comparison unit 140 is | DSV1t-1 | ≧ | DSV2t−
1 |, the past output code words (OC2Tdsvc,..., OC2t) stored in the path memory 133.
-2, OC2t-1) as the selected output codeword, and stores the contents of the DSV operation memory 130 as D
The SV is rewritten to DSV2t-1 stored in the DSV operation memory 132 having the smaller absolute value of SV.

Thereafter, the output code word OC1t of the path "1" is output.
Is stored in the path memory 131 and the output code word OC
The DSV including 1t is calculated and stored in the DSV calculation memory 130. Further, the output code word OC2t of the path “2” is stored in the path memory 133, and the output code word OC2t is stored in the path memory 133.
The DSV including t is calculated by the DSV calculation memory 132 and stored. When the detection result of the codeword option presence / absence detection circuit 100 is “no option”, the output codewords of the path “1” and the path “2” are the same.

The above operation is repeated until there are no more input data words, and output is performed.
Can output a DSV-controlled output codeword that satisfies the run-length restriction rule of 11T to 11T. The control method of immediately outputting the codewords stored in the two-system codeword memories when the detection result of the codeword option presence / absence detection circuit 100 is “there is an option” has been described. , Code word option presence / absence detection circuit 1
Instead of immediately outputting a codeword when the detection result of 00 indicates “there is an option”, an optimal codeword may be selected based on DSV values up to a time when a plurality of options appear.

FIGS. 4 to 12 show another example of the configuration of the encoding table according to the present invention. The encoding table shown in FIGS. 3 to 7 does not cause any trouble even if the storage area of the encoding table is reduced. It is a configuration table. Regarding the state “S = 2” of the encoding table shown in FIGS.
Codewords that overlap with the codeword of state “S = 0” and codewords that overlap with state “S = 4” are reduced, and for state “S = 3”, the codeword of state “S = 0” is reduced. FIG. 8 to FIG.
Shown in

According to FIGS. 3 to 7, the encoding table of the state "S = 2" has the same code word arrangement as that of the state "S = 0" for the input words "0" to "156". "15
7 "to" 255 "have the same code word arrangement as in the state" S = 4 ". Also, the input word “1” of the state S = 3
66 to 255, the same code word arrangement as in the state “S = 0” is performed.

When encoding is performed using the encoding tables shown in FIGS. 8 to 13, encoding is performed in accordance with the following rules.

When the code word in the state "S = 2" is selected, when the input word is "0" to "156", the coding table selects the state "S = 0".

In the case of "157" to "255" after the input, the encoding table selects the state "S = 4".

When the code word of the state "3" is selected, the state of the coding table is "S = 0" when the input word is "166" to "255". However, the input word is "255"
When the zero run length of the lower bits of the preceding code word is larger than 6, the encoding table selects the state "S = 4". This processing can be performed by the encoding table address operation unit 110 in FIG. .

In the above description, the coding rules in accordance with the code word arrangement of the coding tables shown in FIGS. 8 to 13 have been described. If the code word arrangement of the encoding table is changed for a reason, this rule can be changed with the change of the arrangement. For example, FIGS. 19 to 23 show another embodiment of the encoding table in which the code word arrangement is changed within the rules of the present invention. According to the examples of FIGS. 19 to 23, after zero-run on the codeword LSB side has continued for 7 or more, the input words “81” to “25”
When the code word of state "5" is selected in "5", the arrangement is made such that the code word of state "1" can be exchanged in the state encoding rule. The present invention is also applicable to an encoding table configured to increase the frequency of appearance of codewords whose run length restriction is lengthened by arranging codewords in this manner. FIG. 17 is a flowchart showing the DSV control processing described above.

By the way, as described above, 3T is obtained by the code word conversion table shown in FIG. 3 to FIG. 7 or FIG.
It has been shown that the run length is limited to 11T and that a codeword sequence capable of suppressing the DC component can be generated. Next, control based on the maximum run setting signal shown in FIG. 1 or FIG. 2 will be described with reference to FIG.

Initialization of the path memory, DSV operation memory, coding table state, etc. is performed (step 401). Then, a synchronization word is read based on the coding table state, and the path memory and DSV operation memory are updated. (Step 40
2). Next, one input data word is read (step 40).
3) Go to step 404. In step 404, it is determined whether or not the input data word is the condition 1 input data word. If the input data word is the condition 1 input data word (Y in step 404), the process proceeds to step 408. If the input data word is not the condition 1 input data word (step 404). In the case of N), the process proceeds to step 405. Condition 1 is ((state = 0) && (input data word <39)).

In step 405, it is determined whether or not the input data word is the condition 2 input data word.
If the input data word is not the condition 2 (N in step 405)
Moves to step 406. Condition 2 is ((state = 2) && ((input data word <12 || ((input data word> 25) && (input data word <48)))).

In step 406, it is determined whether the input data word is the input data word of the condition 3. If the input data word is the input data word of the condition 1 (in the case of Y in the step 406), the process proceeds to step 408.
If not the input data word of condition 3 (N in step 406)
) Moves to step 407. Condition 3 is that when the maximum run setting signal = 0, (leading zero run 0,1> 2) &
& (State = 3) && (input data word <155)) &&
When k = 10 is maintained and the maximum run setting signal = 1, (leading zero run 0,1> 2) && (state = 3) &&
(Input data word <155)) && Maximum run is 12T
It is.

In step 408, a path memory having a small DSV is selected, and a code word is output from the path memory. Based on this selection result, the data of the path memory that has already been input is aligned with the smaller DSV data and held again. That is, DSVs 0 and 1 are set to the smaller DSV, the state under each condition is set, and the routine proceeds to step 410. Under condition 3 shown in FIG. 17, when k = 10, that is, when the maximum run length is 11T, a process of selecting an encoding table in which the DSV becomes small is performed. This is an effective process when the maximum run setting signal is, for example, 0. When the maximum run setting signal is 1, for example, if the condition 3 is satisfied, the same processing is performed. When the code word in the state 0 is selected, the state 0 is unconditionally changed when k = 11, that is, when the maximum run length is 12T. The next state is set.

Thus, when the maximum run setting signal is 0, modulation is performed by a modulation method that satisfies the RLL (2, 10) limit that satisfies k = 10, and the maximum run setting signal becomes 1
In the case of, it is possible to switch the modulation scheme so that modulation is performed by a modulation scheme that satisfies the RLL (2, 11) restriction that satisfies k = 11. That is, by selecting the maximum run setting signal to be 0 or 1 according to the auxiliary information, it is possible to generate an area having a different modulation scheme, and it is possible to superimpose auxiliary information by switching the modulation scheme on the main information. is there. Of course, if state 0 is not taken unconditionally and the appearance frequency of 12T is sufficient, DS
It is also possible to select an encoding table in which V becomes smaller.

At step 407, it is determined whether or not the condition is an exceptional condition. If the condition is an exceptional condition, an exception process is executed.
09, and if it is not an exceptional condition, the process directly proceeds to step 409. Exception handling is as follows: (Leading zero run> 6)
&& (status = 3) && (input data word = 255)) → status = 2 or 2. (Leading zero run = 7o
r8) && (state = 4) && (input data word = 25
In the case of 5)) → state = 1.

At step 409, the state is set by the input data word, and the routine goes to step 410. In step 410, OC1t is input to the path memory (candidate 0) based on the state set in step 409 or 408, and
t is input to the path memory (candidate 1), DSV0,1 is updated, and the routine proceeds to step 411. In step 411, it is determined whether or not the next input data word is a synchronizing word, and if it is a synchronizing word (if Y in step 411), step
412, if it is not a synchronization word (N in step 411)
Moves to step 413. In step 412, a path memory with a small DSV is selected, and a codeword is output from the path memory. Based on this selection result, the data of the path memory that has already been input is aligned with the smaller DSV data and held again. That is, DSV0,1 is changed to DSV
Align to the smaller V and proceed to step 402. In step 413, it is determined whether or not there is no next input data word, and whether or not the input data word has ended. If the input data word has ended (in the case of Y in step 413), the process ends, and the input data word has not ended. In this case (N in step 413), the process returns to step 403. In the flowchart of FIG. 17, a case has been described where the maximum run setting signal can be set to 11T and 12T when the maximum run setting signal is 0 and 1, respectively. However, the maximum run can be further increased. Further, for example, it is possible to control so that a code of a specific run length does not appear so that 12T does not appear while restricting by 13T. In this case, in condition 3, (leading zero run 0,1> 2) && (state = 3) && (input data word <155)) && The maximum run is not 13T && 12. DS by the condition of
Run setting is possible while performing V control. By giving a specific run length that does not appear while setting the maximum run, a plurality of bits of auxiliary information can be recorded. That is, when the maximum run is 11T, the auxiliary information bit “0”,
Auxiliary information bit "1" when the maximum run is 12T, auxiliary information bit "2" when the maximum run is 13T and 12T does not appear, and auxiliary information bit "3" when the maximum run is 13T and 12T also appears. , Two auxiliary information bits can be allocated with the maximum run limit.

Next, an embodiment of the demodulation device according to the present invention will be described. FIG. 13 is a block diagram schematically showing a configuration example of the demodulation device of the present invention. As shown in FIG. 13, a reproduction signal reproduced from a recording medium or the like (not shown) is binarized by a reproduction signal processing means (not shown) and is input to a demodulation device (NRZI demodulator 30) as a codeword bit string to be input to the demodulation device. Is entered. One of the input codeword bit strings is input to the serial / parallel converter 32, and the other is input to the synchronization detection circuit 31. It is also input to the auxiliary information demodulator 38, and this operation will be described later.

The synchronization detection circuit 31 detects the synchronization word inserted in the code word bit string, generates a word clock at code word string intervals, inputs the word clock to the serial / parallel converter 32, and uses the word clock as a timing signal to generate the code word. Convert to a column. This is referred to as an input code Ck. One of Ck is input to the word register 33, and is delayed by one codeword length. One is input to the state calculator 34.

The output of the word register 33 is input to the codeword case detection circuit 35, while the address output together with the case output from the codeword case detection circuit 35 and the Sk output from the state calculator 34 to which Ck is input. The address of the demodulation table 37 is input to an address generator 36 for performing an operation, and the demodulation table 37 outputs an output data word based on the address.

The demodulator will be described in more detail below.

The codeword strings Ck-1, Ck-1 encoded as described above by the encoding tables shown in FIGS.
.. Are grouped by zero run on the LSB side as shown in Table 1 (hereinafter referred to as case).
The next possible state is determined by the case.

[0067]

[Table 1]

That is, the case of Ck-1 is detected,
If the state in which k is encoded is known, the output data is uniquely determined.

For example, it is assumed that Ck-1: 000000000100000 Ck: 010010001000100 Ck + 1: 100000000000000 Ck + 2: 0000100000000001 is input to the demodulator as a codeword string. At this time, the case of Ck-1 is shown in Table 1 from Table 2, and it is understood that Ck is coded in any of the states 1, 3, 4, and 5, and Ck is coded in state 4. Therefore, it is demodulated to 0. The case of Ck is also 2, and Ck + 1 is demodulated as 1 since it is coded in state 5. Similarly, Ck + 1 is demodulated as 2.

Although state 2 does not exist in FIGS. 4a to 4e, for example, the following operation (formula 1) can calculate and output the state in which the subsequent codeword is encoded by the subsequent codeword and case. The state “2” is also output by calculation. Equation 1 if ((Ck == 8208) || (Ck == 8224) || (Ck == 8225) || (Ck == 825
6)) flag = 1; if ((Ck == 8712) || (Ck == 8720) || (Ck == 8736) || (Ck == 877
7)) flag = 2; if (Case == 0) [/ * Zero run on LSB side of Ck-1 = 0 *
/ if ((Ck <= 1024) || ((Ck> = 4168) && (Ck! = 4224))) Sk = 0; if ((1025 <= Ck) && (Ck <= 4164) || (Ck == 4224)) Sk
= 1;] else if (Case == 1) [/ * Zero run on LSB side of Ck-1 = 1 * / if ((1025 <= Ck) && (Ck <= 4164) || (Ck == 4224)) S
k = 1; if ((Ck <= 585) || (Ck> = 8712) && (flag! = 2) || (Ck
== 8704) || (flag == 1)) Sk = 2; if ((Ck == 1024) || ((4168 <= Ck) && (Ck <= 8708) && (C
k! = 4224) && (Ck! = 8704)) && (flag! = 1) || (flag ==
2)) Sk = 3;] else if (Case == 2) [/ * Zero run on LSB side of Ck-1 = 2 ~ 6
* / If ((1025 <= Ck) && (Ck <= 4164) || (Ck == 4224)) Sk
= 1; if ((Ck <= 1024) || ((4168 <= Ck) && (Ck <= 8708) &&
(Ck! = 4224) && (Ck! = 8704)) || (flag == 2)) Sk = 3; if ((Ck == 8704) || ((8712 <= Ck) && (Ck <= 16900 ) &&
(Ck! = 16896) && (flag! = 2)) || (flag == 1)) Sk = 4; if ((Ck == 16896) || (Ck> = 16904)) Sk = 5;] else if (Case == 3) [/ * Zero run on LSB side of Ck-1 = 7 or 8
* / If ((Ck <= 1024) || (Ck == 9216) || ((4168 <= Ck) &
& (Ck <= 8708) && (Ck! = 4224) && (Ck! = 8704)) || (flag == 2)) Sk = 3; if ((Ck == 16896) || (Ck> = 16904 )) Sk = 5; if ((Ck == 8704) || ((8712 <= Ck) && (Ck <= 16900) &&
(Ck! = 9216) && (Ck! = 16896) && (flag! = 2)) || (flag == 1) || (Ck == 422
4)) Sk = 4;] else if (Case == 4) [/ * Zero run on LSB side of Ck-1 = 9 or 1
If 0 * / if ((Ck == 8704) || ((8712 <= Ck) && (Ck <= 16900) &&
(Ck! = 16896) && (flag! = 2)) || (flag == 1)) Sk = 4; if ((Ck == 16896) || (Ck> = 16904)) Sk = 5;] return
FIG. 14 shows a demodulation flowchart for the contents described above. The demodulation operation will be further described with reference to FIG.

As the first process, the demodulator reads a codeword and sets it as Ck (step 41). Next word register 3
In step 3, Ck is delayed to generate Ck-1, and at the same time, a codeword is read and set as Ck (step 42). Codeword case detector 35
Then, the case of Ck-1 is detected according to Table 1 (step 4).
3) Output to the state calculator 34 as Case, and calculate and output the state Sk obtained by encoding Ck-1 according to Equation 1 (step 44).

In the address generation 36, a table address of the demodulation table 37 is generated from Ck-1 and Sk, and the output data word is demodulated from the demodulation table 37 (step 4).
5). This operation is repeated until the end of the data (step 46), that is, when the data is not the end (in the case of N in step 46), the process returns to the step 42, and when the data is ended (in the case of Y in step 46), the processing is ended. .

FIG. 15 is a diagram showing a part of a configuration example of a demodulation table suitable for the demodulator of FIG. An output codeword Dk-1 is output based on the input Ck-1 and the state Sk of the subsequent codeword. The address generation unit shown in FIG. 13 can output Dk-1 by generating the address of the ROM table constituting the demodulation table shown in FIG.

Next, demodulation of auxiliary information will be described.
As an example of the configuration of the auxiliary information demodulator shown in FIG. 13, a configuration as shown in FIG. 18 can be considered. Here, the sector information is a signal indicating a break of a recording block, and can be detected by, for example, a specific pattern detected by a synchronization detection circuit or a signal processing circuit (not shown) following the demodulation table. When a subsequent circuit is used, the time delay required for detection can be compensated by adding a time delay to the auxiliary information demodulator.

The input bit string is added to a register 50 in units of bits. For example, when 12T is the maximum run, the adder 51 detects that 11-bit length 0 continues, and the counter 52 determines the number of occurrences of 12T. The number is counted, the comparator 53 compares the number with the reference value 54, and outputs 1 when the number exceeds the reference value. The reference value 54 is for dealing with the case where an error bit occurs, and an error can be removed by setting a predetermined value in advance.

As described above, according to FIG. 18, whether the maximum run has been modulated to 11T or 12 T
It is possible to detect whether T is set.

It should be noted that the demodulation of the auxiliary information is not limited to this, and it is apparent that the demodulation can be performed by detecting the appearance of 12T by an operation based on the equation (1).

[0078]

According to the present invention, the coding rate is improved to enable high-density recording. In addition, by making the recording signal a signal that cannot be directly output as data, it cannot be falsified as a result. This has the advantage that the input data word can be modulated to record the signal, thus preventing unauthorized copying and the like.

Further, according to the present invention, high-density recording is performed by increasing the coding rate, and a signal that cannot be falsified is recorded as a signal that cannot be directly output as data to a recording signal. In particular, a signal obtained by modulating an input data word can be demodulated satisfactorily.
In an encoding table in which the minimum run length of a controllable codeword can be limited to 3T and the maximum run length can be limited to 11T or 12T or 13T or 14T, the storage area of the codeword can be reduced without deteriorating the original performance. It is possible to further superimpose the auxiliary information on the main information, and there is an advantage that the demodulation can be performed by the same demodulator regardless of the insertion of the auxiliary information.

The present invention enables high-density recording by improving the coding rate, and also makes it impossible to output a signal directly as data to a recording signal, thereby resulting in a signal that cannot be falsified. An advantage is that a recorded recording medium can be created, thereby preventing unauthorized copying and the like.

The present invention enables high-density recording by improving the coding rate, and also makes it impossible to output a signal directly as a recording signal, thereby resulting in a signal that cannot be falsified. There is an advantage that a signal in a recorded form can be transmitted, so that prevention of unauthorized copying and the like can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a modulation device according to the present invention.

FIG. 2 is a block diagram illustrating a detailed configuration of a modulation device according to the present invention.

FIG. 3 is a first configuration example of an encoding table according to the present invention.

FIG. 4 is a first configuration example of an encoding table according to the present invention.

FIG. 5 is a first configuration example of an encoding table according to the present invention.

FIG. 6 is a first configuration example of an encoding table according to the present invention.

FIG. 7 is a first configuration example of an encoding table according to the present invention.

FIG. 8 is a second configuration example of an encoding table according to the present invention.

FIG. 9 is a second configuration example of an encoding table according to the present invention.

FIG. 10 is a second configuration example of an encoding table according to the present invention.

FIG. 11 is a second configuration example of the encoding table according to the present invention.

FIG. 12 is a second configuration example of the encoding table according to the present invention.

FIG. 13 is an embodiment of a demodulation device of the present invention.

FIG. 14 is a flowchart showing an embodiment of the demodulation method of the present invention.

FIG. 15 is a configuration example of a demodulation table used in the demodulation device of the present invention.

FIG. 16 is a diagram for explaining a method of inserting auxiliary information.

FIG. 17 is a diagram for explaining a DSV control method.

FIG. 18 is a diagram for explaining an operation example of the demodulator for auxiliary information according to the present invention.

FIG. 19 is a third configuration example of an encoding table according to the present invention.

FIG. 20 is a third configuration example of the encoding table according to the present invention.

FIG. 21 is a third configuration example of an encoding table according to the present invention.

FIG. 22 is a third configuration example of an encoding table according to the present invention.

FIG. 23 is a third configuration example of the encoding table according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Modulator, 2 ... Recording medium, 12 ... Format part, 13 ... 8-15 modulation part, 14 ... NRZI conversion circuit, 15 ... Recording drive circuit, 21 ... Transmission code part, 22 ... Transmission medium, 100 ... Codeword Option presence / absence detection circuit, 110: coding table address calculation unit, synchronous word generation unit, 120: coding table, 130, 132: DSV calculation memory, 131, 133: path memory, 140: absolute value comparison unit, 150: memory control Encoding output unit, 30 demodulator (NRZI demodulation), 31 synchronization detection circuit, 32 serial-parallel converter, 33 word register, 34 state calculator, 35 codeword case detector, 36 address generation 37, demodulation table, 38, auxiliary information demodulator, 50, register, 51, adder, 52, counter, 53, comparator, 5 4: Reference value,

Claims (13)

[Claims] When modulating a p-bit input data word to obtain a q-bit (where q> p) code word by using a plurality of encoding tables, the plurality of encoding tables include a plurality of encoding tables. Used to modulate a codeword corresponding to a dataword and the next input dataword to obtain the next codeword that, when directly combined with this codeword, still satisfies a predetermined run-length restriction rule. State information indicating an encoding table, and a specific encoding table and another specific encoding table of the plurality of encoding tables are, for a predetermined input data word, Codewords are assigned so that signals obtained by performing NRZI conversion on the respective codewords stored corresponding to the input datawords have opposite polarities. When modulating the predetermined input dataword, Encoding Every time the input data that modulates using the table appears, all the output codewords selected in the past and the input data that modulates using the specific coding table appeared before the time that the input data appeared. The absolute value of the DSV obtained from the code word modulated using the specific coding table, and the DSV obtained from the code word up to the time when the input data to be modulated using the specific coding table appears
In the modulation method of outputting a code word satisfying the predetermined run-length restriction rule under DSV control by selecting a code word having a smaller absolute value from among the absolute values of , The q bits are 15 bits, and the run-length restriction rule is that the minimum run-length of a signal obtained by NRZI-converting a codeword is 3T (where T is the channel bit period of the codeword), except for a synchronization signal. Modulation characterized in that the maximum run length is 14T or less, and input means for inputting auxiliary information different from the q-bit input data word is provided, and the auxiliary information is superimposed and modulated on the q-bit data word. Method. 2. The method according to claim 1, wherein the maximum run length is 11T to 14T.
The method according to claim 1, wherein a restriction is imposed on a selected run length equal to or greater than 13T so that a specific run length equal to or smaller than the selected run length does not appear. Modulation method. 3. The modulation method according to claim 2, wherein the auxiliary information is superimposed on an input data word by performing modulation while changing a maximum run length. 4. The modulation method according to claim 3, wherein said auxiliary information forms an information unit in a block unit having a predetermined number of bits. 5. A modulation device for modulating the input data word by the modulation method according to claim 1. 6. A demodulation method for demodulating a code word sequence encoded by the modulation method according to claim 1 to input data, wherein the encoded code sequence is encoded. Serial-to-parallel conversion back to a bit-word code word string, detecting a coding table candidate in which the code word is coded, and using the output of the detected coding table candidate, a coding table having a plurality of the code words A demodulation table for demodulating input data from the code word and the output of the detected encoding table, and demodulating the code word into an input data word. A demodulation method characterized by demodulating auxiliary information superimposed on a word. 7. A demodulation device for demodulating a code word sequence encoded by the modulation method according to claim 1 to input data, wherein the demodulation device encodes the encoded code sequence. Serial-to-parallel conversion means for returning to a code word string in bit units, first detection means for detecting a coding table candidate in which the code word is coded, and the code using an output of the detected coding table candidate A second detecting means for determining in which state of the encoding table a plurality of words are encoded, and a demodulation table for demodulating input data from the code word and the output of the detected encoding table, A demodulator comprising: a demodulator for demodulating an input data word; and an auxiliary information demodulator for demodulating auxiliary information superimposed on the input data word. 8. A recording medium characterized in that a modulation signal generated by the modulation method according to claim 1 is recorded at least in part. 9. A recording medium wherein a modulation signal generated by the modulation device according to claim 5 is recorded at least in part. 10. A transmission apparatus for transmitting a modulation signal generated by the modulation method according to claim 1. Description: 11. A transmission apparatus for transmitting a modulation signal generated by the modulation apparatus according to claim 5. 12. A transmission method characterized by transmitting a modulation signal generated by the modulation method according to claim 1. 13. A transmission method, comprising transmitting a modulated signal generated by the modulation device according to claim 5.