JP2002271146A - High-frequency power amplifier and high-frequency power output method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency power amplifier and a method for outputting high-frequency power, by which individual power efficiency can be improved, when the magnitude of the powder which should be outputted is varied. SOLUTION: Active devices are divided and are connected, in parallel in such a way that the power can be amplified as a general structure of the high- frequency power amplifier. An impedance matching circuit is provided at the output of each of the active devices which are divided and are provided in parallel. Accordingly, proper impedance matching can be performed for each active device. Also, the amplifier can be designed such that power efficiency is maximal or nearly maximal, when the output of each active device is maximal. An input side bias voltage from a DC voltage output circuit can be applied to the input of each active device and a control circuit controls as to whether the input side bias voltage is applied to each active device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency power amplifier for performing power amplification at a high frequency and a high frequency power output method, and more particularly to a method for changing the magnitude of power to be output and improving the power efficiency in that case. The present invention relates to a high-frequency power amplifier and a high-frequency power output method suitable for an electronic device.

[0002]

2. Description of the Related Art In a system using a limited capacity power supply such as a mobile terminal, the efficiency of a power amplifier is a primary factor in determining battery life. This is because the power efficiency of the power amplifier is defined by (high-frequency power value / DC power consumption value), and for the same high-frequency power output, the DC power consumption decreases as the power efficiency increases. Therefore, improvement of power efficiency is always desired.

[0003] Such a power amplifier usually comprises an amplifier circuit of one or more stages of active elements. Of these active elements, especially the last stage is an element for outputting a required predetermined power. Large in size. For example, if the active element is a bipolar transistor, the emitter area is made larger than other elements, and the active element is a FET (field effect).
transistor), the gate width is made larger than other elements.

Therefore, even when designing such an active element amplifier having a large element size, generally, the power efficiency is maximized or nearly maximized when the large predetermined power is output. In the amplifier having such a design, when a predetermined power is output, the power efficiency is appropriately secured, and when the output is squeezed, the power efficiency is reduced to a considerable degree. However, this is of course not a problem in a system having a terminal that always outputs a large predetermined power.

Here, a conventional example of a power amplifier will be described with reference to FIGS. FIG. 4 is a circuit diagram showing a configuration of a power amplifier as a conventional example, and FIG. 5 is a diagram showing a relationship between output power and power efficiency of the power amplifier shown in FIG.

As shown in FIG. 4, this power amplifier receives an input signal from an input terminal Pin and performs an active element (for example, a heterojunction bipolar transistor (HBT) which performs a power amplifying function via coupling capacitors C41 and C42. )) The structure is guided to Q41 and Q42. The reason that the same signal is amplified by the two active elements Q41 and Q42 is to facilitate the configuration of the impedance matching circuits 41 and 42. That is, if they are combined into one system, low impedance is required in view of the input side of the impedance matching circuit, which is not suitable for fabrication on a semiconductor chip.

The same input bias voltage is applied to the input sides of the two active elements Q41 and Q42 by the bias circuit 43 in order to set the active elements Q41 and Q42 at appropriate DC operating points. Further, choke inductors L41 and L42 connected to the power supply Vcc are provided on the output side. The impedance matching circuits 41 and 42 include an active element Q
The impedance is matched in order to properly extract the output powers of the output terminals 41 and Q42.

That is, in order to properly extract the output power of the active elements Q41 and Q42, the matching circuits 41 and 42 must be made visible at an impedance value corresponding to the output impedance of the element. On the other hand, the output terminal P
The impedance when the matching circuits 41 and 42 are viewed from the out must be in accordance with the input impedance of an external element connected to the output terminal Pout. It is the function of the matching circuits 41 and 42 to perform impedance conversion in order to satisfy these requirements. The function of such an impedance matching circuit is well-known as well as that used between stages.

The relationship between output power and power efficiency of such a power amplifier is generally as shown in FIG. FIG.
In the graph, the horizontal axis represents input power, and the vertical axis represents output power or power efficiency. As shown in FIG. 5, the output power Pout also increases with an increase in the input power Pin. However, when, for example, 27 dBmW is required as the maximum power output, the power efficiency is η1 shown in FIG. It is a close value. This indicates the above-described design in which the power efficiency is maximized or nearly maximized when a large predetermined power is output. In such a design,
For example, if an intermediate power such as 15 dBmW is output, the power efficiency becomes η2 as shown in FIG.

It should be noted that such a power amplifier amplifies a signal having a frequency of several hundred MHz to several GHz, and its output power (high-frequency output power).
Can be measured using, for example, a power meter. The unit dBmW is a dB display in which 1 mW is set to 0 dBmW (that is, power is halved or doubled for every 3 dBmW difference).

[0011]

By the way, in recent mobile communication systems, CDMA (code division mult) is used.
An iple access) modulation scheme is adopted, and a terminal can change its power output value according to a distance from a base station. The maximum output is set so as not to hinder communication even in the peripheral portion of the area covered by the base station, but if the terminal is located at a position other than the peripheral portion of the cover area, the output up to that point This is because communication is possible without it.

As a concept of designing a power amplifier in a terminal that changes the power output value according to the distance from the base station, at present, the power efficiency is maximized or maximized at the time of maximum output. ing. This is because suppressing the current at the time of maximum power output is considered to be most appropriate for reducing power consumption.
That is, although the power efficiency at the time of the intermediate power output is lower than that at the time of the maximum power output, the current consumption is originally small at the time of the intermediate power output, so that the total power consumption is low.

However, as the number of base stations increases and the communication infrastructure is improved, there is a fact that the probability that the terminal is in the intermediate power output state is higher than the probability that the terminal is in the maximum output state. That is, the maximum power output state is limited only when the terminal is actually present at the periphery of the coverage area of the base station, or when searching for the base station at the time of connection, and in such a case, as a percentage of the total time. It is small.

Therefore, in the above-described conventional power amplifier, the average power efficiency tends to be reduced. That is, even if the efficiency at the time of maximum power output is high, the efficiency at the time of intermediate power output, which is frequently used, is low, and the battery consumption as a whole is rather increased, resulting in a problem that the operation time of the battery operation is not extended.

SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described circumstances, and an object of the present invention is to provide a high-frequency power amplifier for amplifying power at a high frequency, in which individual power efficiency is improved when the magnitude of power to be output is changed. It is an object of the present invention to provide a high-frequency power amplifier and a high-frequency power output method capable of performing the following.

[0016]

In order to solve the above-mentioned problems, a high-frequency power amplifier according to the present invention comprises: an active element capable of power-amplifying an input signal when an input-side bias voltage is applied; On the output side of the element, an impedance matching circuit provided to extract the output power of the active element, a DC voltage output circuit for generating the input side bias voltage, and whether the DC voltage output circuit outputs the bias voltage. A control circuit for controlling whether or not the active element is provided in parallel, a plurality of active elements can be provided in parallel and can amplify the same input signal, and the impedance matching circuit,
A plurality of DC voltage output circuits are provided for each of the plurality of active elements and connected so that outputs of the plurality of impedance matching circuits are substantially added to each other, and a plurality of the DC voltage output circuits are provided for each of the plurality of active elements. (Claim 1).

That is, as an overall configuration of the high-frequency power amplifier, the active elements are divided and provided so as to be able to amplify power in parallel. An impedance matching circuit is provided for each active element at the output of the active element divided and provided in parallel. Thereby, impedance matching can be appropriately performed for each active element. In addition, the power efficiency can be designed to be maximum or close to maximum at the time of maximum output of each active element.

An input side of the active element is provided so that an input side bias voltage can be applied from a DC voltage output circuit.
Whether or not an input-side bias voltage is applied to each active element is controlled by a control circuit. Among the active elements, those to which the input side bias voltage is applied perform the power amplification operation, and those to which the input side bias voltage is not applied do not perform the power amplification operation and generate no output. The impedance matching circuits connected to the outputs of the active elements substantially add amplified signals at their output sides.

Therefore, each of the active elements to be operated can be designed so that the power efficiency is maximized or nearly maximized at the time of the maximum output. It is always possible to make the power efficiency high.

A high-frequency power output method according to the present invention is a high-frequency power amplifier, comprising: an active element capable of amplifying an input signal by applying an input-side bias voltage; and an output side of the active element. An impedance matching circuit provided to extract the output power of the active element; a DC voltage output circuit for generating the input-side bias voltage; and controlling whether the DC voltage output circuit outputs the bias voltage. A plurality of active elements are provided in parallel to amplify the same input signal by power, and the impedance matching circuit is provided for each of the plurality of active elements and the plurality of active elements are provided. The output side of the impedance matching circuit is connected so as to be substantially added, and a plurality of the DC voltage output circuits are provided for each of the plurality of active elements. Is a high-frequency power output method in such a high-frequency power amplifier. The method comprises the steps of: determining an active element to be operated according to a required power output value; applying an input-side bias voltage to the determined active element to be operated; Power amplifying an input signal by the active element provided (claim 6).

That is, in the high-frequency power amplifier having the configuration as described above, an active element is determined, an input-side bias voltage is applied to the active element, and an input signal is amplified by the active element to which the voltage is applied. In each case. Therefore, each of the active elements to be operated can be designed so that the power efficiency is maximized or near the maximum at the time of maximum output. It becomes possible to output high frequency power with high efficiency.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a preferred embodiment of the present invention, the plurality of active elements have different element sizes. By making the element sizes different, it is possible to flexibly set the power at the time of the intermediate power output with respect to the time of the maximum power output.

In a preferred embodiment of the present invention, the DC voltage output circuit is supplied with a single negative voltage and a single positive voltage as power supplies, and is biased by the control circuit. An operation for outputting a voltage is performed. Since operation can be performed only by supplying a single negative voltage and a single positive voltage as power supplies, a power supply system for operating the circuit can be simplified.

[0024] In a preferred embodiment of the present invention, the control circuit includes:
A control signal is output to the DC voltage output circuit to apply an input bias voltage to an active element to be operated among the plurality of active elements. If the required power output value can be met, the power setting can be suitably performed using the terminal.

In a preferred embodiment of the present invention, the active element is a MESFET (metal semiconducer).
tor FET), MOSFET (metal oxide semiconductor)
FET), bipolar transistor, JFET (junction)
FET), HEMT (high electron mobility transisto)
r). According to these active elements, power amplification can be performed at a high frequency required for a terminal. In addition, MESFET, bipolar transistor, JFE
For T and HEMT, a compound semiconductor (for example, GaAs) may be used. In addition, a homojunction type (for example, one using a semiconductor material such as silicon germanium) may be used as the bipolar transistor in addition to a heterojunction type suitable for high frequency.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a high-frequency power amplifier according to an embodiment of the present invention. As shown in the figure, this high-frequency power amplifier has an input terminal Pin, coupling capacitors C1, C2, C3, HBTs (heterojunction bipolar transistors) Q1, Q2, Q3, choke inductors L1, L2, L3, an impedance matching circuit. 11, 12, 13, bias circuits 14, 15, 16,
The control circuit 17 has an output terminal Pout.

An input signal is supplied to the input terminal Pin. Here, the high-frequency power amplifier will be described as a last stage. Therefore, in practice, the power amplifier of the preceding stage is connected before the input terminal Pin, and an impedance matching circuit is usually interposed between them. The function of the inter-stage impedance matching circuit has already been described in the section of the prior art, and will not be described.

Coupling capacitors C1, C2, C3
Is for cutting the DC component and transmitting the signal components to the bases of Q1, Q2 and Q3. A bias circuit 1 as a DC voltage output circuit is provided on each base of Q1, Q2, and Q3.
4, 15, and 16 are respectively connected.

The bias circuits 14, 15, and 16 operate independently of each other, and can supply an input-side bias voltage to each base of Q1, Q2, and Q3. Q1, Q2,
Whether the input side bias voltage is supplied to each base of Q3 is controlled by the control circuit 17.

When an input-side bias voltage is supplied to the bases of Q1, Q2, and Q3, the base input signal can be amplified. Here, the emitter sizes of Q1, Q2, and Q3 are different from each other. For example, assuming that the emitter area of the basic transistor is 4 μm × 30 μm, Q1
What was made as one active element by using two elements, Q2
Is used as one active element using eight of them, and Q3 is used as one active element using two of them.

The emitters of Q1, Q2 and Q3 are grounded, and the collector outputs are connected to choke inductors 11, 1 and 1, respectively.
2 and 13 are connected between the power supply Vcc and constitute a common emitter type amplifier circuit.

The impedance matching circuits 11, 12, 13
Has its input impedance determined so that the output power of each transistor Q1, Q2, Q3 is generated most efficiently. That is, the input impedance value to be taken has a property determined by the parameters of the transistors Q1, Q2, and Q3 as elements.

For example, in this embodiment, in order to obtain a maximum power output of 27 dBmW, each transistor Q1,
The input impedances of the matching circuits 11, 12, and 13 adjusted so that Q2 and Q3 are all set to the power amplification operation state efficiently are measured, and the values obtained by paralleling these (measured values) are (6.2 + 2.4j). ) The measurement result can be obtained as Ω. Since this value is the input impedance of the impedance matching circuit to be connected to the output of the element having an emitter area 22 + 8 + 2 (= 32) times that of the basic transistor, an appropriate input of the matching circuit corresponding to one basic transistor The impedance is 32 times the above value.

In the matching circuit 11, the appropriate input impedance is (32/2) of the above value.
2) When looking at the matching circuit 12, the appropriate input impedance is (32/8) times the above value, and when looking at the matching circuit 13, the appropriate input impedance is (32/2) times the above value. is there.

It should be noted that, in this embodiment, the emitter area of the basic transistor is 4 μm × 30.
A total of 32 μm are used as active elements of the power amplifier, and a maximum power output of 27 dBmW is obtained. There is actually another important factor in determining these, which is the distortion characteristic at the time of maximum power output.
For example, in the CDMA system, the leakage power ratio to adjacent channels is determined to be -49 dBc or less, but in order to keep this specification, it is necessary to increase the power efficiency so that the load on the elements is not excessive. is there. The above results have been obtained to satisfy this. (Note that the unit dBc is a dB display indicating the ratio to the power of the desired frequency, and the power is halved or doubled for each 3 dBc difference.)

To continue the description of the structure, the matching circuits 11, 1
The outputs of 2 and 13 are connected so that these outputs are added substantially, and the total output is led to an output terminal Pout.

Next, the operation of the high-frequency power amplifier at the time of maximum power output and at the time of intermediate power output will be described with reference to FIG. FIG. 2 is a diagram showing the relationship between the output power and the power efficiency of the high-frequency power amplifier at the time of maximum power output and at the time of intermediate power output.

FIG. 2A shows bias circuits 14, 15,
FIG. 16 is a diagram illustrating a relationship between output power and power efficiency when Q1, Q2, and Q3 are all set to an operation state according to FIG. The horizontal axis is input power, and the vertical axis is output power or power efficiency. The input / output power characteristic in this case is represented by “Po” in FIG.
ut ", and as already mentioned,
When the maximum power output is set to 27 dBmW, the power efficiency is close to the maximum ηa.

Next, FIG. 2B shows the output power and power when the bias circuit 15 puts only Q2 into operation and Q1 and Q3 stop the operation of the bias circuits 14 and 16 to make them inactive. It is a figure which shows the relationship of efficiency. In this case, since only Q2 is operated, FIG.
The output is 8/32 (= 1/4) times, that is, 6 dBmW less than the state shown in FIG. This is the characteristic of “Pout” shown in FIG.

At the time of the 21 dBmW output shown in FIG. 4B, however, the power efficiency ηb hardly changes from the above ηa. This is because, as described above, the input impedance of each impedance matching circuit is set so that the efficiency of the basic transistor becomes close to the maximum. (This, on the contrary, Q1, Q
Since the input impedance of each matching circuit is set so that the power efficiency becomes close to the maximum for each of Q2 and Q3, FIG.
In the case shown in (a), it can be said that the power efficiency is close to the maximum. )

Similarly, FIG. 2C shows the bias circuit 14.
FIG. 9 is a diagram showing the relationship between output power and power efficiency when only Q3 is in the operating state and the bias circuits 15 and 16 are stopped and inactive for Q1 and Q2. In this case, since only Q3 is operated, the output is reduced by 2/32 (= 1/16), that is, reduced by 12 dBmW as compared with the state shown in FIG. This is the characteristic of “Pout” shown in FIG.

At the time of the 15 dBmW output shown in FIG. 2C, the power efficiency η is similar to that described with reference to FIG.
c hardly changes from the above-mentioned ηa. This is also because, as described above, the input impedance of each impedance matching circuit is set so that the efficiency of the basic transistor is close to the maximum.

As described above, in this embodiment,
Intermediate power output 21d for maximum power output 27dBmW
Even when outputting BmW and 15 dBmW,
It is possible to operate with near maximum power efficiency.
Naturally, it is possible to operate with an output other than these with the power efficiency close to the maximum by an arbitrary combination of Q1, Q2, and Q3. Further, when an intermediate power output other than an arbitrary combination is to be output, the output power can be selected from Q1, Q2, and Q3 so as to be larger in size than a transistor required to output power to be output. In this case, a transistor of an extra size is operated, so that a high level of power efficiency can be obtained although the efficiency is slightly degraded.

The element size can be set to a different size ratio by providing an intermediate power output value for which power efficiency is to be considered. Also, although not practically as useful as above, Q1, Q
Even if all of the elements Q2 and Q3 have the same element size, by operating one of them when three are operated, it is possible to efficiently realize the state of the intermediate power output of 5 dBmW reduction.

The control circuit 17 outputs a control signal to operate the bias circuits 14, 15, 16 according to the power output value required when the high-frequency power amplifier is used in a terminal. Thus, for example,
A terminal for receiving an input relating to a required power output value from a terminal is provided, and a bias circuit 14 is provided in accordance with the information.
It can be configured as a logic circuit that determines which one of 15, 15 should be operated. With such a configuration, Q1, Q2, Q3 can be selected according to the required power output value.
Of the above can be operated.

When this high-frequency power amplifier was actually made, and another power amplifier was added as a driver in the preceding stage, and the power efficiency was measured, the maximum power output (27 dBm) was obtained.
At the time of W output), a power efficiency of about 40% was obtained, but at the time of intermediate power output (at the time of 22 dBmW output and at the time of 15 dBmW output), a power efficiency of about 40% was obtained. This power efficiency is at the time of intermediate power output (15 dBmW) in the power amplifier shown in FIG.
This is a great improvement compared to the power efficiency (at the time of output) of about 8% (measured value). Further, in the power amplifier shown in FIG. 4 described in the conventional example, the power efficiency can be slightly improved (for example, a 2-3% improvement) by slightly adjusting the bias point by the bias circuit 43 at the time of intermediate power output. However, it does not reach the effect of the embodiment of the present invention at all.

In the above embodiment, the case where the HBT is used as the active element has been described. However, the present invention is applied to an amplifier using an active element (the one described above) corresponding to a high frequency. You can also. Further, similar effects can be obtained even if modifications and improvements are made within a range that does not change the gist of the present invention.

Next, a configuration example of the bias circuits 14, 15, 16 shown in the high-frequency power amplifier shown in FIG. 1 will be described with reference to FIG. The figure shows the bias circuits 14, 1
It is a circuit diagram which shows the example of a structure of 5 and 16.

Although this bias circuit is not much different from a known configuration as the circuit configuration itself, the configuration will be described first. A resistor R31, a diode Q31,
A current pole is formed by Q32, and its positive side is a control input terminal.

The control input terminal is connected to a control circuit 17 (FIG. 1).
Supplies a control input. That is, when a predetermined voltage or current is supplied from the control circuit 17, the resistance R31,
A current flows through the diodes Q31 and Q32, and accordingly, a voltage is applied to the base of the transistor Q33 via R32, and Q33 is turned on. When Q33 turns on, power supply Vc
A current flows from c to the current pole of Q33 and diode Q34. As a result, a voltage is generated at the emitter of Q33, and this voltage becomes a bias output via R33 and L31. The bias output is connected to each base of the transistors Q1, Q2, Q3 as shown in FIG. Note that L
31 is a choke inductor for cutting off signals from the Q1, Q2, and Q3 sides.

When a predetermined voltage or current is not supplied from the control circuit 17 to the control input terminal, Q31, Q3
2, Q33 and Q34 are all turned off, and as a result no bias voltage is output. In this case, Q1, Q2, and Q3 connected to the bias circuit do not perform the power amplification operation.

The current supply capabilities of the bias circuits 14, 15, 16 for the transistors Q1, Q2, Q3 are as follows:
It is preferable to change according to the size of the transistors Q1, Q2, Q3 that are the driving destinations. That is, in the embodiment described above, the size of Q1 is the largest and 22 times the size of the basic transistor, the size of Q2 is 8 times the size of the basic transistor, and the size of Q3 is twice the size of the basic transistor. Therefore, the current driving capabilities of the bias circuits 14, 15, 16 are made different according to (preferably almost in proportion to) these multiples. More specifically, for example, the power supply V
It is designed to change the current value of the current pole from cc to ground via Q33 and diode Q34 in proportion to the above multiple.

Since such a bias circuit can be operated only by supplying a single negative voltage and a single positive voltage as power supplies, it is possible to simplify a power supply system for operating the circuit. become.

[0054]

As described in detail above, according to the present invention,
As an overall configuration of a high-frequency power amplifier, active elements are divided and provided so as to be capable of power amplification in parallel.
An impedance matching circuit and a DC voltage output circuit for supplying an input side bias voltage are provided. Whether or not the input-side bias voltage is applied to each active element is controlled by a control circuit. Therefore, each of the active elements to be operated can be designed so that the power efficiency is maximized or near the maximum at the time of maximum output. High efficiency can be achieved.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a high-frequency power amplifier according to an embodiment of the present invention.

FIG. 2 is a diagram showing a relationship between output power and power efficiency of the high-frequency power amplifier shown in FIG. 1 at the time of maximum power output and at the time of intermediate power output.

FIG. 3 is a circuit diagram showing a configuration example of bias circuits 14, 15, and 16 in FIG.

FIG. 4 is a circuit diagram showing a configuration of a power amplifier as a conventional example.

FIG. 5 is a diagram showing a relationship between output power and power efficiency of the power amplifier shown in FIG.

[Explanation of symbols]

11, 12, 13 ... impedance matching circuit 14, 1
5, 16: bias circuit 17: control circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J069 AA01 AA41 CA36 FA10 HA02 HA09 HA10 HA11 HA12 HA19 HA25 HA29 HA33 KA12 KA29 MA19 MA21 SA13 TA02 5J091 AA01 AA41 CA36 FA10 HA02 HA09 HA10 HA11 HA12 HA19 HA25 HA29 HA19 SA13 TA02 UW08 5J092 AA01 AA41 CA36 FA10 GR09 HA02 HA09 HA10 HA11 HA12 HA19 HA25 HA29 HA33 KA12 KA29 MA19 MA21 SA13 TA02

Claims (6)

[Claims] 1. An active element capable of power-amplifying an input signal when an input-side bias voltage is applied thereto, and an impedance matching circuit provided at an output side of the active element for extracting output power of the active element. A DC voltage output circuit that generates the input-side bias voltage; and a control circuit that controls whether the DC voltage output circuit outputs the bias voltage. A plurality of the active elements are provided in parallel. A plurality of impedance matching circuits are provided for each of the plurality of active elements, and connected so that outputs of the plurality of impedance matching circuits are substantially added; A high-frequency power amplifier, wherein a plurality of DC voltage output circuits are provided for each of the plurality of active elements. 2. The high-frequency power amplifier according to claim 1, wherein the plurality of active elements have different element sizes. 3. An operation as to whether the DC voltage output circuit is supplied with a single negative voltage and a single positive voltage as power supplies and outputs a bias voltage under the control of the control circuit. 2. The high-frequency power amplifier according to claim 1, wherein: 4. The control circuit outputs a control signal to the DC voltage output circuit to apply an input bias voltage to an active element to be operated among the plurality of active elements according to a required power output value. 2. The method according to claim 1, wherein
The high-frequency power amplifier according to any one of the preceding claims. 5. The active element includes a MESFET, a MOS,
FET, bipolar transistor, JFET, HEMT
2. The high-frequency power amplifier according to claim 1, wherein: 6. An active element capable of power-amplifying an input signal when an input-side bias voltage is applied thereto, and an impedance matching circuit provided on an output side of the active element for extracting output power of the active element. A DC voltage output circuit that generates the input-side bias voltage, and a control circuit that controls whether the DC voltage output circuit outputs the bias voltage, and a plurality of the active elements are provided in parallel. The same input signal can be power amplified and the impedance matching circuit is provided in plurality for each of the plurality of active elements and connected so that the output sides of the plurality of impedance matching circuits are substantially added, The DC voltage output circuit is a high-frequency power output method in a high-frequency power amplifier provided for each of the plurality of active elements. Determining an active element to be operated according to the force output value; applying an input-side bias voltage to the determined active element to be operated; and inputting an input signal by the active element to which the input-side bias voltage is applied. And amplifying the power.