JP2002271015A - Semiconductor electronic equipment system, semiconductor integrated circuit device, mounted board, and electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor electronic equipment system which is constructed by combination of semiconductor integrated circuit devices and easily repaired and reworked. SOLUTION: The semiconductor electronic equipment system comprises a base board 1 having a plurality of mounting sections 2 for mounting PTPs 6. Any function of the semiconductor electronic equipment system can be achieved by various combinations of the PTPs 6 to be mounted on the mounting sections 2 of the base board 1. The PTPs 6 are removably mounted on the mounting sections 2 of the base board 1. By replacing the PTPs 6 which are mounted removably, any function is repaired and any function is reworked.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor electronic device system capable of repair and rework, and a semiconductor integrated circuit device and a mounting board suitably usable for the semiconductor electronic device system.

[0002]

2. Description of the Related Art The miniaturization and thinning of a semiconductor integrated circuit device are rapidly progressing, and the package thereof has been changed from the most general TSOP (Thin Small Outline Package) at present.
CSP whose size has been reduced to almost the same size as IC chips
(Chip Scale Package) has been developed. In recent years, PTP (Paper Thin) whose thickness has been made thinner like paper
Package).

[0003] PTP is a device in which an IC chip whose thickness is reduced to about 10 µm to 150 µm is mounted on an insulating base having a thickness of about 10 µm to 50 µm, and is described in, for example, JP-A-2000-277683. Have been.

The thickness of PTP is, for example, 20 μm to 200 μm.
Since it is extremely thin, having a thickness of about μm, and an inexpensive material such as paper or polyethylene terephthalate (PET) can be used for the insulating base, the manufacturing cost is very low. For this reason, attention has been paid to an IC package suitable for a semiconductor electronic device that is becoming smaller, lighter, and less expensive.

[0005]

When PTP is mounted on a mounting board, solder is used. For this reason, PTP
Once mounted on the mounting board, it is necessary to use a solder remover or the like to remove it, and it is difficult for the user to remove it. This makes it difficult for the user to respond to a request for repair or rework of the semiconductor electronic device or reuse of the PTP.

[0006] In addition, paper or PE is used for the insulating base of PTP.
A material that is inexpensive but weak to heat, such as T, is used. For this reason, when mounting on a mounting board, the temperature control is very difficult, and it is difficult to mount as well as remove.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and a first object of the present invention is to provide a semiconductor electronic device system constructed by a combination of semiconductor integrated circuit devices, which can cope with the repair and rework. It is to provide a simple semiconductor electronic device system.

A second object of the present invention is to provide a semiconductor integrated circuit device which can be suitably used for the above-mentioned semiconductor electronic device system.

It is a third object of the present invention to provide a mounting board which can be suitably used for the above-mentioned semiconductor electronic device system.

A fourth object of the present invention is to provide an electronic component which can be suitably used in the above-mentioned semiconductor electronic device system.

[0011]

In order to achieve the first object, a semiconductor electronic device system according to the present invention has a mounting substrate having a plurality of mounting portions on which a semiconductor integrated circuit device is mounted. A semiconductor electronic device system which achieves an arbitrary function by a combination of the semiconductor integrated circuit device mounted on a mounting portion of the mounting substrate, wherein the semiconductor integrated circuit device is detachably mounted on a mounting portion of the mounting substrate. By replacing the detachably mounted semiconductor integrated circuit device, the arbitrary function is repaired and the arbitrary function is reworked.

According to such a semiconductor electronic device system, mounting / removing the semiconductor integrated circuit device is facilitated by detachably mounting the semiconductor integrated circuit device on the mounting portion of the mounting substrate. By facilitating attachment / detachment of the semiconductor integrated circuit device, a semiconductor electronic device system capable of repairing and reworking the semiconductor integrated circuit device can be obtained.

Further, since an IC socket is not used, it can be realized at low cost.

Preferred examples of the detachable mounting are as follows.

(1) An adhesive is provided on the surface of the semiconductor integrated circuit device on which the external terminals are arranged, and the semiconductor integrated circuit device is removably mounted on a mounting portion of the mounting board by the adhesive. .

(2) A slit is provided at a corner of a mounting portion of the mounting substrate, and a corner of the semiconductor integrated circuit device is inserted into the slit, whereby the semiconductor integrated circuit device can be detachably mounted on the mounting portion of the mounting substrate. To be implemented.

(3) The mounting substrate and the semiconductor integrated circuit device are sandwiched by at least a magnetic material and a magnetized magnetic material from both sides of the mounting surface and the back surface of the mounting substrate, thereby mounting the mounting substrate. The semiconductor integrated circuit device is detachably mounted on the unit.

(4) The mounting substrate has a magnetic material, and the mounting substrate having the magnetic material and the magnetized magnetic material sandwich the semiconductor integrated circuit device so that the mounting portion of the mounting substrate is The semiconductor integrated circuit device is detachably mounted.

(5) The mounting substrate has a magnetized magnetic material, and the semiconductor integrated circuit device is sandwiched between the mounting substrate having the magnetized magnetic material and the magnetic material or the magnetized magnetic material. Then, the semiconductor integrated circuit device is detachably mounted on the mounting portion of the mounting substrate.

(6) A convex portion is provided on the surface of the semiconductor integrated circuit device on which the external terminals are arranged, and a hole for inserting the convex portion is provided in a mounting portion of the mounting substrate. The semiconductor integrated circuit device is removably mounted on the mounting portion of the mounting substrate by inserting the semiconductor integrated circuit device.

(7) A dent into which the semiconductor integrated circuit device is inserted is provided in a mounting portion of the mounting substrate, and the semiconductor integrated circuit device is inserted into the dent, whereby the semiconductor is mounted on the mounting portion of the mounting substrate. The integrated circuit device is detachably mounted.

(8) A post is provided on a mounting portion of the mounting substrate, and the post is inserted into an external terminal of the semiconductor integrated circuit device, so that the semiconductor integrated circuit device can be detachably mounted on the mounting portion of the mounting substrate. Implement.

According to the above-mentioned mounting methods (1) to (8), in any case, the mounting / removal of the semiconductor integrated circuit device can be performed without using a dedicated device such as a soldering device or a solder peeling device. However, attachment / detachment can be easily performed only by a manual operation by an operator or only by an operation of an assembling robot in a semiconductor manufacturing factory.

Also, since mounting is not performed by using a molten metal such as solder, attachment / detachment can be performed at room temperature, and is suitable for mounting, for example, PTP or the like that is weak against heat.

Therefore, attachment / detachment of the semiconductor integrated circuit device can be facilitated as compared with the related art.

In order to achieve the second object, a semiconductor integrated circuit device according to the present invention has any one of the following constitutions (1) to (3).

(1) A semiconductor integrated circuit device removably mounted on a mounting portion of a mounting substrate, wherein an adhesive is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged. It is characterized by:

According to such a semiconductor integrated circuit device,
On the surface where the external terminals of the semiconductor integrated circuit device are arranged,
Since adhesive material is provided, using this adhesive material,
It can be detachably mounted on the mounting portion of the mounting substrate.

(2) A semiconductor integrated circuit device which is detachably mounted, wherein a convex portion is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged.

According to such a semiconductor integrated circuit device,
Since the convex portion is provided on the surface of the semiconductor integrated circuit device where the external terminals are arranged, the convex portion is detachably attached to the mounting portion of the mounting substrate so that reliable electric contact can be obtained using the convex portion. Can be implemented.

(3) A semiconductor integrated circuit device detachably mounted on a mounting portion of a mounting substrate, wherein a circuit symbol is attached to a surface of the semiconductor integrated circuit device.

With such a semiconductor integrated circuit device,
Since the circuit symbol is attached to the surface, by recognizing the circuit symbol, it is possible to understand what functions the semiconductor integrated circuit device before or after mounting has. . Therefore, an arrangement error at the time of rework can be reduced.

According to the semiconductor integrated circuit devices as described in (1) to (3) above, any of them can be suitably used for the semiconductor system according to the present invention.

In order to achieve the third object, a mounting board according to the present invention has any one of the following constitutions (1) to (9).

(1) A mounting board on which a semiconductor integrated circuit device is detachably mounted, wherein a slit into which a corner of the semiconductor integrated circuit device is inserted is provided at a corner of the mounting portion of the mounting board. It is characterized by being provided.

According to such a mounting board, the semiconductor integrated circuit device can be removably mounted on the mounting portion only by inserting the corner of the semiconductor integrated circuit device into the slit provided in the mounting portion. .

(2) A semiconductor integrated circuit device is a mounting substrate having a mounting portion to be removably mounted, wherein the mounting substrate has a magnetic material.

According to such a mounting board, since the mounting board has a magnetic material, the semiconductor integrated circuit device can be removably mounted on the mounting portion using the magnetized magnetic material.

(3) A semiconductor integrated circuit device is a mounting substrate having a mounting portion to be removably mounted, wherein the mounting substrate has a magnetized magnetic material.

According to such a mounting board, since the mounting board has a magnetized magnetic material, the semiconductor integrated circuit device can be detachably attached to the mounting portion using the magnetic material or the magnetized magnetic material. Can be implemented.

(4) A semiconductor integrated circuit device having a projection provided on a surface on which external terminals are arranged, the semiconductor integrated circuit device having a mounting portion to be detachably mounted, wherein the mounting portion of the mounting substrate is The semiconductor integrated circuit device further comprises a hole into which the protrusion of the semiconductor integrated circuit device is inserted.

According to such a mounting board, the mounting portion is provided with a hole into which the convex portion of the semiconductor integrated circuit device is inserted. Therefore, only by inserting the convex portion of the semiconductor integrated circuit device into the hole. The semiconductor integrated circuit device can be removably mounted on the mounting portion.

(5) A semiconductor integrated circuit device having a mounting portion on which the semiconductor integrated circuit device is inserted, wherein the mounting portion is detachably mounted. It is characterized by having.

According to such a mounting board, since the mounting portion is provided with the recess into which the semiconductor integrated circuit device is inserted, the semiconductor integrated circuit device can be simply inserted into the recess. Can be removably mounted on the mounting portion.

(6) A mounting board on which the semiconductor integrated circuit device has a mounting portion to be detachably mounted, wherein the mounting portion of the mounting board is provided with a post to be inserted into an external terminal of the semiconductor integrated circuit device. It is characterized by being.

According to such a mounting board, since the post is provided in the mounting portion, the external terminal of the semiconductor integrated circuit device is simply inserted into the post, and the semiconductor integrated circuit device is mounted on the mounting portion. It can be detachably mounted on the device.

The post is a needle-like conductive terminal, for example, a metal terminal, and is a semiconductor integrated circuit device, for example, a PT.
Contact is made through the external terminal of P.

(7) A mounting substrate on which a semiconductor integrated circuit device has a plurality of mounting portions which are removably mounted in at least an array, wherein each of the mounting portions provided in the array is adjacent to each other. It is characterized in that it is connected to the mounting part.

According to such a mounting board, since at least each of the mounting portions provided in an array is connected to the mounting portions adjacent to each other, the semiconductor integrated circuit devices are sequentially detachably mounted on the mounting portions. , A semiconductor electronic device system having an arbitrary function can be constructed.

(8) A mounting substrate on which the semiconductor integrated circuit device has a plurality of mounting portions to be removably mounted in at least an array, wherein at least some of the mounting portions provided in the array are mutually separated. It is characterized in that it is connected to a mounting part other than the adjacent mounting part.

According to such a mounting board, since at least some of the mounting portions provided in an array are connected to mounting portions other than the mounting portions adjacent to each other, the semiconductor electronic device system can be freely constructed. More often.

(9) The semiconductor integrated circuit device is a mounting board having a mounting portion to be removably mounted. The mounting portion of the mounting substrate has connection terminals, and the connection terminals are raised. Features. This swell can be made by solder plating or the like.

According to such a mounting board, since the connection terminals of the mounting portion are raised, the semiconductor integrated circuit device can be more reliably brought into contact with the connection terminals.

According to the mounting boards as described in the above (1) to (9), any of them can be suitably used for the semiconductor system according to the present invention.

To achieve the fourth object, an electronic component according to the present invention has the following configuration (1).

(1) An electronic component detachably mounted on a mounting portion of a mounting board, wherein the electronic component is a dedicated wiring device for connecting the mounting portions of the mounting board. .

According to such an electronic component, since it is a dedicated wiring device for connecting between the mounting portions of the mounting substrate, it can be used in combination with a semiconductor integrated circuit device mounted on the mounting portion of the mounting substrate. When constructing an equipment system, the degree of freedom can be increased.

Therefore, the electronic component as in the above (1)
It can be suitably used for the semiconductor system according to the present invention.

[0059]

Embodiments of the present invention will be described below with reference to the drawings. In this description, common parts are denoted by common reference numerals throughout the drawings.

(First Embodiment) FIG. 1 is a plan view showing an example of a base board (mounting board) used in a semiconductor electronic device system according to a first embodiment of the present invention.

First, as shown in FIG.
Has a plurality of mounting units 2. These plural mounting units 2
Are provided at least in an array, for example, and in this example, they are particularly provided in a matrix of 4 rows × 5 columns. Connection terminals 3 are arranged on each of the plurality of mounting units 2.
The mounting unit 2 of this example is different from the mounting units 2 adjacent to each other.
The connection terminals 3 are electrically connected via a wiring 4 connecting the connection terminals. An external terminal area 5 is provided on the periphery of the base board 1.
, Where external terminals (not shown) of the base board 1 are arranged. An external terminal (not shown) arranged on the base board 1 is electrically connected to, for example, the outermost connection terminal 3 via the wiring 4.

A semiconductor integrated circuit device is detachably mounted on the plurality of mounting portions 2. The mounted semiconductor integrated circuit devices are electrically connected to the base board 1 via connection terminals 3 provided on each mounting portion 2. Connected.

FIG. 2A is a plan view showing an example of a semiconductor integrated circuit device used in the semiconductor electronic device system, and FIG.
2A is a sectional view taken along line 2B-2B in FIG. 2A, and FIG. 2C is a plan view showing the back surface (external terminal surface) side of the semiconductor integrated circuit device.

As shown in FIGS. 2A to 2C, an example of the semiconductor integrated circuit device 6 is PTP, and the insulating base 7 is made of paper, PET, or the like.
m-200 μm, which is extremely thin. Hereinafter, the semiconductor integrated circuit device 6 is referred to as PTP6. A plurality of wirings 8 are formed on the insulating base 7 of the PTP 6, and one ends of these wirings 8 are electrically connected to pads of the IC chip 9 via gold bumps 10. A sealing material 11 made of, for example, resin is formed around the IC chip 9, and the wiring 8 and the gold bump 1 are formed.
In addition to sealing the connection portion with the outside from the outside, the IC chip 9 is fixed to the insulating base 7. Further, the other end of the wiring 8 is led out to the back surface of the insulating base 7 through a through hole 12 provided in the insulating base 7 and is connected to an external terminal 13 provided on the back surface. Solder bumps 14 are formed on the external terminals 13 in this example. The external terminal 13 of the PTP 6 is connected to the connection terminal 3 of the base board 1 shown in FIG.
Is provided so as to be aligned with the position. Thus, the external terminals 13, particularly the solder bumps 14, can be simply and reliably brought into contact with the connection terminals 3 of the base board 1 simply by placing the PTP 6 on the mounting portion 2 of the base board 1.

FIG. 3 is a plan view after PTP mounting.

As shown in FIG. 3, in the semiconductor electronic device system according to the present invention, the PTP 6 is removably mounted on the mounting section 2, and an arbitrary function is achieved by a combination of the mounted PTP 6.

In this specification, the detachable mounting means that the mounting / removal of the semiconductor integrated circuit device is performed manually by an operator without using a dedicated device such as a soldering device or a solder peeling device. A method that can be performed only by work or only by the work of an assembly robot in a semiconductor manufacturing factory, and a method that does not use an IC socket,
Is defined.

The PTP 6 includes, for example, a basic circuit functional element such as an OR gate, an AND gate, an inverter, and a flip-flop, a counter, a decoder, an encoder,
All functional elements can be included, including dedicated functional elements such as memories and processors. By combining these functional elements arbitrarily, a semiconductor electronic device system having an arbitrary function is constructed.

Preferred examples of the system include an internal circuit of a digital portable device such as a cellular phone and a camera, which is becoming smaller, lighter and less expensive, a semiconductor recording medium, and the like.
For example, a memory card or an IC card can be used.

Further, according to the present invention, the PTP 6 is detachably mounted on the mounting portion 2 of the base board 1, thereby facilitating its attachment / detachment, and repairing (repairing) and reworking (reconstructing) the semiconductor electronic device system. ) Can be easily handled.

FIGS. 4A, 4B, 5A and 5B show an example of the repair.

As shown in FIG. 4A, out of the PTPs 6 mounted in 4 rows × 5 columns on the mounting section 2 of the base board 1, 2
It is assumed that a failure occurs in the PTP 6-24 mounted at the position of the row 4 column. In this case, as shown in FIG.
Remove -24. Thereafter, as shown in FIGS. 5A and 5B, a PTP 6-24S having the same function as the PTP 6-24 is prepared, and is attached to the mounting section 2-24 at the position of 2 rows and 4 columns. Thus, the semiconductor electronic device system is repaired.

The advantage of such a repair is that an increase in repair cost can be suppressed as compared with the related art. Conventionally, when a failure occurs in a semiconductor electronic device system having the exact same function as that of FIG. 4A, the entire system needs to be replaced.
That is, it is only necessary to replace only the part where the failure has occurred.

Since this repair does not involve a soldering operation, the repair can be performed in a short time without any special skill.

Also, for the rework, FIGS.
The procedure can be performed in the same manner as the procedure shown in FIG.

Further, PTP6 removed by rework
If there is no defect, it can be reused (reused) and can be recycled (reproduced).

Next, a specific example of detachable mounting will be described as a second embodiment.

(Second Embodiment) The second embodiment is the same as the first embodiment.
It is a specific example regarding the detachable mounting described in the embodiment. Hereinafter, some specific examples regarding the detachable mounting will be described.

<First Specific Example Regarding Removable Mounting> FIG. 6A is a plan view showing a semiconductor integrated circuit device according to a first specific example of the second embodiment, and FIG. 6B is along line 6B-6B in FIG. 6A. FIG. 6C is a plan view showing the back surface (connection terminal surface) side of the semiconductor integrated circuit device.

As shown in FIGS. 6A to 6C, in this specific example, an adhesive material, for example, an adhesive tape 15 is provided on the surface of the PTP 6 on which the external terminals 13 are arranged. The PTP 6 is attached to the mounting portion 2 of the base board 1 with the adhesive tape 15. This allows, for example, solder melting
A detachable mounting that cannot be obtained from a solidified mounting can be achieved.

<Second Specific Example of Removable Mounting> FIG. 7 is a plan view of a base board according to a second specific example of the second embodiment.

As shown in FIG. 7, in this embodiment, slits 16 are provided at the corners of the mounting portion 2 of the base board 1, preferably at the four corners. These slits 16
, The corner of the PTP 6 is inserted. Thereby, detachable mounting can be achieved. In this mounting method, reliable contact of the terminals can be obtained because of the elasticity of the base material of the PTP 6.

FIG. 7 shows one PTP 6 inserted into the slit 16.

In this example, since the corners of the semiconductor integrated circuit device are inserted into the slits 16 provided at the corners of the mounting section 2, the semiconductor integrated circuit device itself may be, for example, a PT.
It is more desirable to be flexible like P.

<Third Specific Example Regarding Removable Mounting> FIGS. 8A and 8B are cross-sectional views of a semiconductor electronic device system according to a third specific example of the second embodiment.

As shown in FIGS. 8A and 8B, in this specific example, a magnetized magnet (magnet) 17 is magnetized from both the surface (mounting surface) on which the mounting portion 2 of the base board 1 is formed and the back surface thereof. , 18 sandwich the base board 1 and the PTP 6. Thereby, detachable mounting can be achieved.

In this example, the magnetic member 1
It is not necessary that both 7 and 18 are magnets, and at least one may be a magnet.

<Fourth Specific Example Regarding Removable Mounting> FIG. 9 is a sectional view of a semiconductor electronic device system according to a fourth specific example of the second embodiment.

As shown in FIG. 9, in this example, the base board 1 has a magnetic material, and the base board 1 having the magnetic material and the magnetized magnetic material (magnet) 17 are used to form the PT.
P6 is interposed. As the base board 1 having this magnetic material, for example, as shown in FIG. 9, a magnetic material layer 19 is provided on the back surface of the base board 1, a magnetic material layer is provided inside the base board 1, or the wiring 4 itself is provided. May be made of a magnetic material. Also in such a specific example, detachable mounting can be achieved.

The base board 1 has a magnetized magnetic material (magnet), and the base board 1 having the magnetized magnetic material and the magnetic material or the magnetized The PTP 6 may be sandwiched between the body 17. In this mounting method, reliable contact of the terminals can be obtained because of the elasticity of the base material of the PTP 6.

<Fifth Specific Example Regarding Removable Mounting> FIG. 10A is a plan view showing a semiconductor integrated circuit device according to a fifth specific example of the second embodiment, and FIG.
FIG. 10C is a cross-sectional view taken along line 10B, and FIG. 10C is a plan view showing the back surface (connection terminal surface) side of the semiconductor integrated circuit device.

FIG. 11A is a plan view of a base board according to a fifth specific example of the second embodiment, and FIG. 11B is a sectional view taken along line 11B-11B in FIG. 11A. These FIG.
In FIG. 11A and FIG. 11B, the wiring 4 is omitted to prevent the figure from being complicated.

As shown in FIGS. 10A and 10B, the PTP 6 of the present example has a projection (convex portion) 20 provided on the surface on which the external terminal 13 is arranged.

As shown in FIGS. 11A and 11B, the base board 1 of this embodiment has holes 21 of the same size as the projections 20 in the mounting portion 2. The hole 21 is provided at a position matching the position of the projection 20, and the hole 21 has a P
The protrusion 20 of TP6 is inserted. Thereby, detachable mounting is achieved.

FIGS. 11A and 11B show protrusions 2.
0 indicates one PTP 6 inserted in the hole 21.

In this specific example, the size of the projection 20 of the PTP 6 is the same as the size of the hole 21 of the base board 1. However, the size of the projection 20 is slightly larger than the size of the hole 21 or slightly larger. It can be either small or small. However, it is preferable that the size of the projection 20 be slightly larger than the size of the hole 21. Because the projection 20
Is a so-called "tight fit" in the hole 21, so that the PTP 6 can be more firmly mounted on the mounting portion 2 of the base board 1.

<Sixth Specific Example Regarding Removable Mounting> FIG. 12A is a plan view of a base board according to a sixth specific example of the second embodiment, and FIG. 12B is a sectional view taken along line 12B-12B in FIG. 12A. is there. In FIGS. 12A and 12B, the wiring 4 is omitted to prevent the figure from being complicated.

As shown in FIGS. 12A and 12B, in the base board 1 of this example, a recess 22 having the same size as the PTP 6 is provided in the mounting portion 2, and the PTP 6 is provided in the recess 22.
Is inserted. In such a specific example,
Removable mounting can be realized.

FIGS. 12A and 12B show the depression 2
One PTP6 inserted in 2 is shown.

In this example, the size of the depression 22 is the same as the size of the PTP 6, but the size of the depression 22 may be slightly larger or smaller than the size of the PTP 6. However, as in the fifth specific example, if the PTP 6 is more firmly mounted on the mounting portion 2 of the base board 1, the size of the recess 22 may be slightly smaller than the size of the PTP 6.

The depth of the depression 22 may be either deeper or shallower than the thickness of the PTP 6, but it is preferable to make the depth shallower. This is because, for example, the PTP 6 can be easily removed even by a manual operation of an operator. Also in this case, mounting can be performed with high accuracy by adjusting the position of the hole.

<Seventh Specific Example Regarding Removable Mounting> FIG. 13A is a plan view of a base board according to a seventh specific example of the second embodiment, and FIG. 13B is a sectional view taken along line 13B-13B in FIG. 13A. is there. In FIGS. 13A and 13B, the wiring 4 is omitted to prevent the figure from being complicated.

FIGS. 14A and 14B are cross-sectional views showing, on an enlarged scale, the mounting portions of the semiconductor integrated circuit device and the base board to be mounted.

As shown in FIGS. 13A and 13B, the base board 1 of this example is provided with the posts 23 on the connection terminals 3 of the mounting section 2. The shape of the post 23 is shown in FIG.
As shown in FIG. 4A, it is not limited to the pointed shape,
It is preferably pointed. This pointed post 23
As shown in FIG. 14B, it is inserted into the external terminal 13 of the PTP 6. Particularly, in this example, the pointed post 23 is inserted into the external terminal 13. The post 23 is made of metal or a material having conductivity.

In such a specific example, the pointed post 2
By inserting the PTP 3 into the external terminal 13, the PTP 6 can be removably mounted on the mounting portion 2 of the base board 1. This mounting method is effective because the base material of the PTP 6 is not a hard solid but an elastic material.

It is desirable that the posts 23 be provided on each of the connection terminals 3 of the base board 1. This is because the post 23 is connected to the connection terminal 3 of the base board 1 and P
It makes electrical contact with the external terminal 13 of TP6. Therefore, if the same number of the posts 23 are provided as the number of the connection terminals 3 of the base board 1, any PTP 6 in which the external terminals 13 are arranged so as to correspond to these connection terminals 3 can be detachably mounted at the same time. Enables electrical contact.

In this specific example, the external terminal 13 of the PTP 6 may not have a projection such as a solder bump 14, as shown in FIGS. 14A and 14B. Post 2
This is because the post 23 and the external terminal 13 can be easily and reliably brought into contact with each other simply by inserting the external terminal 3 into the external terminal 13.

<Eighth Specific Example Regarding Removable Mounting> This eighth specific example relates to a modification of the seventh specific example.

FIGS. 15A and 15B are sectional views showing a semiconductor electronic device system according to an eighth example of the second embodiment. FIGS. 15A and 15B are enlarged views of the semiconductor integrated circuit device to be mounted and the mounting portion of the base board, respectively.

In the seventh specific example, the external terminals 13 of the PTP 6 do not need to be provided on the mounting surface side of the base board 1, and as shown in FIG. 15A and FIG. May be provided on the same surface as the surface on which is formed.

The advantages of the eighth embodiment are, for example, that the through holes 12 are formed in the insulating base 7, the through holes 12 are filled with a conductive material, and the external terminals 13 are formed on the back surface of the insulating base 7. There is no need to do
Compared to the seventh example, the manufacturing cost of PTP6 can be further reduced.

<Ninth Specific Example Regarding Removable Mounting> This ninth specific example relates to a modification of the seventh specific example.

FIGS. 16A and 16B are sectional views showing a semiconductor electronic device system according to a ninth example of the second embodiment. FIGS. 16A and 16B are enlarged views of the semiconductor integrated circuit device to be mounted and the mounting portion of the base board, respectively.

The eighth embodiment is particularly different from the seventh embodiment in that the post 23 has a conical shape as shown in FIGS. 16A and 16B.

Further, as shown in FIG.
Are provided with through holes 24 in the portion of the external terminal 13.
For example, the position of the through-hole 24 corresponds to the position of the post 23 having a circular head shape. For this reason, as shown in FIG. 16B, the post 23 having a circular head shape fits into the through hole 24.

The advantage of the ninth specific example is that the through-hole 24 is provided in advance at the portion of the external terminal 13 so that the post 23 is pierced into the external terminal 13 of the PTP 6 as in the seventh specific example. Is that the PTP 6 is less likely to be damaged.

<Tenth Specific Example Regarding Removable Mounting>
The tenth example relates to a modification of the eighth example.

FIGS. 17A and 17B are cross-sectional views showing a semiconductor electronic device system according to a tenth example of the second embodiment. 17A and 17B are enlarged views of the semiconductor integrated circuit device to be mounted and the mounting portion of the base board, respectively.

The tenth example is particularly different from the eighth example, as shown in FIGS. 17A and 17B.
That is, the post 23 has a circular head shape. And FIG.
17A and the external terminal 13 of the PTP 6 as shown in FIG.
Is provided with a through hole 24 similar to that of the ninth example.

The advantage of the tenth embodiment is that the same advantages as those of the ninth embodiment can be obtained by comparing with the eighth embodiment.
P6 is unlikely to be damaged.

FIG. 18 shows an example of the plane of the PTP 6 according to the tenth specific example and the ninth specific example.

<Eleventh Example of Removable Mounting>
The eleventh example relates to a modification of the seventh example.

FIG. 19A is a plan view of a base board according to an eleventh example of the second embodiment, and FIG. 19B is a plan view of FIG.
It is sectional drawing which follows 9B-19B line. In FIGS. 19A and 19B, the wiring 4 is omitted to prevent the figure from being complicated.

As shown in FIGS. 19A and 19B, the difference between the base board 1 according to the eleventh embodiment and the base board 1 according to the seventh embodiment is that the connection terminals 3 of the mounting section 2 It is a post type. As described above, the connection terminal 3 itself may be in the form of a post.

FIGS. 19A and 19B show one PTP 6 inserted into the post-shaped connection terminal 3.

Next, the P which is detachably mounted on the mounting section 2 is
A specific example of TP6 will be described as a third embodiment.

(Third Embodiment) The third embodiment is similar to the first embodiment.
The present invention relates to a specific example of the semiconductor integrated circuit device which is detachably mounted on the mounting portion of the mounting board described in the embodiment. Hereinafter, some specific examples of such a semiconductor integrated circuit device will be sequentially described.

<First Specific Example of Semiconductor Integrated Circuit Device> FIG. 20 is a plan view of a semiconductor integrated circuit device according to a first specific example of the third embodiment. In FIG. 20, the wiring 8, the sealing material 11, and the like are omitted to prevent the drawing from being complicated.

As shown in FIG. 20, the PTP6
Is one or more pairs of power supply terminals 13-VCC as external terminals 13.
And 13-VSS and a plurality of signal terminals 13-SGL.
The PTP 6 is a square, and its external terminals 13 (1
3-SGL, 13-VCC, 13-VSS) are arranged point-symmetrically from the center point of PTP6.

The power supply terminal 13 of the external terminals 13
-VCC and 13-VSS are arranged at the corners of the PTP 6, preferably at the four corners, and the signal terminals 13-SGL are arranged at positions other than the four corners. In this specific example, the power supply terminals 13-VCC and 13-VSS
Are two sets, power terminals 13-VCC and power terminals 13
-VSSs are arranged on the same diagonal line. This makes it possible to rotate the PTP 6 by 180 ° and attach it to the base board 1, thereby improving the degree of freedom in mounting.

Although not particularly shown, the connection terminals 3 of the base board 1 are also arranged at the four corners of the mounting portion 2 together with the PTP 6 so that connection terminals for power supply are arranged.

Further, PTP6 used in the present invention is as follows:
Since it corresponds to attachment / removal, its I
As the n-type impurity, the n-type impurity other than arsenic is used for the C chip 9 without using arsenic.

By not using arsenic in the IC chip 9, the PTP 6 before the attachment or after the removal is removed.
It is possible to prevent an accidental accident caused by the handling of the vehicle.

Although the PTP 6 is square in this example, it may be rectangular as shown in FIG.
In this case, the external terminals 11 are preferably arranged symmetrically with respect to the center line of the PTP 6.

In this specific example, the number of the IC chip 9 in the PTP 6 is one.
000-277683, as disclosed in
Needless to say, a plurality of IC chips 9 may be provided by stacking.

<Second Specific Example Regarding Semiconductor Integrated Circuit Device> FIG. 22 is a diagram showing a semiconductor integrated circuit device according to a second specific example of the third embodiment.

As shown in FIG. 22, even when the signal terminal 13-SGL of the PTP 6 comes into contact with the power supply connection terminal 3 of the mounting portion 2, a protection resistor having a resistance value in a range where the IC chip 9 is not damaged. 25 may be provided in the chip 9.

The protection resistor 25 may be connected in series to the internal wiring of the IC which connects the I / O pad 26 which is an external terminal of the IC chip 9 and the I / O circuit 27, for example.

The resistance value is set to a value such that the semiconductor element in the IC chip 9 is not destroyed by a large current, for example, 10
A good value is about 100Ω.

<Third Specific Example Regarding Semiconductor Integrated Circuit Device> FIGS. 23A and 23B are plan views of a semiconductor integrated circuit device according to a third specific example of the third embodiment. 23A and 23B, the wiring 8, the sealing material 11, and the like are omitted to prevent the drawing from being complicated.

As shown in FIGS. 23A and 23B, in this specific example, PTPs having the same circuit function but different external terminal positions (configurations) are prepared. By preparing the PTP 6 having the same circuit function and different external terminal positions as described above,
The degree of freedom in circuit construction can be increased.

In FIGS. 23A and 23B, IN is an input terminal, OUT is an output terminal, VCC is a power supply terminal (high potential), VSS
Indicates a power terminal (ground), and NC indicates a non-connection terminal.

<Fourth Specific Example of Semiconductor Integrated Circuit Device> FIGS. 24A to 24D show the fourth specific example of the third embodiment, respectively.
It is a top view of the semiconductor integrated circuit device concerning a specific example.

As shown in FIGS. 24A to 24D, in this example, a circuit symbol is attached to the surface of PTP6. By attaching the circuit symbol 28 in this way,
The operator can visually recognize what function the PTP 6 has, which is convenient for attaching / detaching.

Of course, if the circuit symbol 28 is added,
Not only the worker, but also the assembling robot in the semiconductor manufacturing factory can recognize what function the PTP 6 has by recognizing the circuit symbol 28 by, for example, image recognition.

The circuit symbol 28 may be any symbol as long as it can be visually recognized by an operator or image recognition by an assembling robot.
24A to 24D, generally used circuit symbols are desirable. By using a commonly used circuit symbol, mistakes can be reduced during reconfiguration.

Note that FIG. 24A shows a NAND gate circuit, FIG. 24B shows a NOR gate circuit, FIG. 24C shows a flip-flop circuit, and FIG. 24D shows an adder circuit.

Next, a specific example of the base board 1 on which the PTP 6 is detachably mounted will be described as a fourth embodiment.

(Fourth Embodiment) In the fourth embodiment, the first
The present invention relates to a specific example of a mounting board having a plurality of mounting portions on which the semiconductor integrated circuit device described in the embodiment is removably mounted. Hereinafter, some specific examples of such a mounting board will be sequentially described.

<First Specific Example Regarding Mounting Board> FIG. 25A
FIG. 25B is a plan view of a base board according to a first specific example of the fourth embodiment, FIG. 25B is a plan view of the back side of the base board, and FIG.
FIG. 5C is a sectional view taken along line 25C-25C in FIGS. 25A and 25B.

As shown in FIGS. 25A to 25C, the base board 1 of this embodiment has two or more wiring layers, one of which is a wiring layer dedicated to a power supply.

Particularly, in this specific example, a signal wire 4-SGL for connecting the connection terminals (signal terminals) 3-SGL to each other is formed on the mounting portion 2 side of the base board 1, and the connection is formed on the back surface of the mounting portion 2 side. The power supply lines 4-VCC and 4-VSS for connecting terminals (power supply terminals) 3-VCC and 3-VSS are formed. The power supply wirings 4-VCC and 4-VSS are electrically connected to connection terminals 3 provided on the mounting section 2 through through holes 29 formed in the base board 1. Further, in this example, the power supply lines 4-VCC and 4-VSS formed on the back surface are alternately arranged.

As described above, the base board 1 may be configured to have two or more wiring layers.

When two or more wiring layers are provided, one of the layers is a wiring layer dedicated to the power supply, thereby improving the noise resistance as compared with the base board 1 shown in FIG. 1, for example. it can.

<Second Specific Example Regarding Mounting Board> FIG. 26A
Is a first example of the base board according to the first specific example of the fourth embodiment.
26B is a plan view of a second layer of the base board, and FIG. 26C is a plan view of 26C-FIG. 26A and FIG. 26B.
26D is a sectional view taken along line 26C, and FIG.
It is sectional drawing which follows the 26D-26D line in B.

As shown in FIGS. 26A to 26D, the base board 1 of this example has three or more wiring layers,
The layer is a wiring layer extending in the X direction, the second layer is a wiring layer intersecting in the X direction, for example, extending in the orthogonal Y direction, and the third layer is a third wiring layer.
The layer is a wiring layer dedicated to the power supply.

Particularly, in this specific example, an X-direction signal wiring 4X-SGL is formed in a lower layer (first layer) of the mounting portion 2 of the base board 1, and a Y-direction signal wiring is formed in a lower layer (second layer) of the wiring 4X-SGL. The signal wiring 4Y-SGL is formed, and the power supply wiring 4-V
CC and 4-VSS.

The X-direction signal wiring 4X-SGL is electrically connected to the connection terminal 3 provided on the mounting portion 2 via the front surface-first interlayer through hole 29-1 formed on the base board 1. . Similarly, the Y-direction signal wiring 4Y-SGL is formed on the front surface-second interlayer through hole 29 formed on the base board 1.
-2, and is electrically connected to the connection terminal 3. Further, the power supply wirings 4-VCC and 4-VSS are electrically connected to the connection terminals 3 via the through holes 29-3 formed on the base board 1 between the front and back surfaces.

As described above, the base board 1 may be configured to have three or more wiring layers. In the case of having three or more layers of wiring, as in this specific example, the X direction signal wiring 4X-SGL and the Y direction signal wiring 4Y-SGL are formed in different layers from each other, so that the X direction signal wiring 4X-SGL is formed in the same layer. Compared to the case where the wirings and the Y-directional wirings are mixedly formed, for example, higher-density wirings can be realized.

Therefore, the base board 1 according to this example is
Is advantageous, for example, when the multi-terminal PTP 6 is detachably mounted.

The power supply lines 4-VCC and 4
The -VSS plane pattern is, for example, as shown in FIG.
This is the same as the plane pattern shown in FIG.

<Third Specific Example Regarding Mounting Board> FIG. 27 is a plan view of a base board according to a third specific example of the fourth embodiment.

As shown in FIG. 27, in the base board 1 of this example, some of the mounting portions 2 provided in an array form
The jump wiring 4J is used to connect to the mounting parts 2 other than the mounting parts 2 adjacent to each other.

As described above, by connecting some of the mounting units 2 to the mounting units 2 other than the mounting units 2 adjacent to each other, for example, compared with the base board 1 as shown in FIG. It is possible to improve the degree of freedom in constructing the system.

<Fourth Specific Example of Mounting Board> FIG. 28A
And FIG. 28B are enlarged cross-sectional views each showing a mounting portion of a base board according to a fourth specific example of the fourth embodiment.

As shown in FIG. 28A and FIG. 28B, the base board 1 of this example is one in which the connection terminals 3 provided on the mounting section 2 are raised, for example, into a spherical shape. Solder plating is suitable for the method of raising the connection terminals 3.

By swelling the connection terminal 3 in this manner, the external terminal 13 of the PTP 6 can more easily come into contact with the connection terminal 3.

Therefore, according to the base board 1 according to this example, it is possible to reduce poor contact even in the case of manual mounting, for example.

Next, a technique for improving the degree of freedom of the combination of the semiconductor integrated circuit devices will be described as a fifth embodiment.

(Fifth Embodiment) In the fifth embodiment, the first
In the semiconductor electronic device system capable of repair and rework described in the embodiment, the present invention relates to a technique for improving the degree of freedom of combination of semiconductor integrated circuit devices. For this purpose, in the present embodiment, in addition to the semiconductor integrated circuit device, a dedicated wiring device dedicated to wiring is prepared. Hereinafter, some specific examples of the semiconductor electronic device system using the dedicated wiring device will be described.

<First Specific Example of Wiring Only Device> FIG. 29 is a plan view of a semiconductor electronic device system according to a first specific example of the fifth embodiment.

As shown in FIG. 29, in this specific example, in addition to the PTP 6, the PTP 6
The wiring-dedicated device 30 having the same external terminal arrangement as that described above is detachably mounted.

Particularly, in this specific example, the wiring-dedicated device 30 and the PTP 6 are alternately mounted on the mounting portions 2 provided in an array.
It is mounted detachably.

As described above, in addition to the PTP6, a dedicated wiring device 30 functioning only as a wiring is separately prepared.
By using in combination with the above, the degree of freedom in combination of semiconductor integrated circuit devices, that is, the degree of freedom in constructing a semiconductor electronic device system can be improved.

Further, the dedicated wiring device 30 is provided with the IC chip 9.
A PTP having no wiring and only the wiring 8 would be preferable.

Further, the circuit symbol 2 described with reference to FIG. 24A to FIG.
As in the case of 8, it would be more convenient to add a wiring symbol. In this case, as a wiring symbol, for example, as shown in FIG. 29, at least how the external terminals 13 of the wiring-dedicated device 30 are connected by wiring may be indicated.

<Second Specific Example of Wiring Only Device> FIG. 30 is a plan view of a semiconductor electronic device system according to a second specific example of the fifth embodiment.

As shown in FIG. 30, in this specific example, when the PTP 6 is removably mounted on the mounting portions 2 provided in an array, all of the mounting portions 2 adjacent to the periphery of the PTP 6 are connected to the wiring dedicated device 30. Are detachably mounted.

As described above, it is possible to detachably mount the wiring-dedicated device 30 on all the mounting portions 2 adjacent to the periphery of the PTP 6.

It is desirable that the dedicated wiring device 30 is arranged with a certain rule as in the second specific example and the first specific example. It goes without saying that this is appropriately determined by the system to be constructed.

Next, a technique for facilitating the attachment of the PTP 6 to the base board 1 will be described as a sixth embodiment.

(Sixth Embodiment) The sixth embodiment is directed to the first embodiment.
The present invention relates to a technique for facilitating mounting of a semiconductor integrated circuit device in a semiconductor electronic device system capable of repair and rework described in the embodiment. For this purpose, in the present embodiment, an alignment mark is prepared.

FIG. 31A is an enlarged plan view showing a mounting portion of a base board according to the sixth embodiment, FIG. 31B is a plan view of a semiconductor integrated circuit device according to the sixth embodiment, and FIG. 31C is a semiconductor integrated circuit device FIG. 6 is a plan view showing a state in which is mounted.

As shown in FIGS. 31A to 31C, in the sixth embodiment, the mounting portion 2 of the base board 1 and the PTP 6
Are provided with alignment marks 31 respectively.

The insulation base 7 of the PTP 6 is made of, for example, PE
Since T can be used, it can be made transparent. When the insulating base 7 is transparent, an alignment mark 31 (31-PTP) is attached to this. Similarly, an alignment mark 31 (31-BD) corresponding to the alignment mark of the PTP 6 is also attached to the mounting section 2. Then, as shown particularly in FIG. 31C, the PTP 6 is set so that the mark 31-PTP matches the mark 31-BD,
It is mounted on the mounting section 2 of the base board 1.

As described above, the mounting of the PTP 6 can be facilitated by providing the alignment mark 31 on each of the mounting portion 2 and the PTP 6.

As long as the alignment mark 31 can be aligned as long as it can be aligned, FIGS.
A shape other than the cross shape as shown in FIG. 1C may be used.

The alignment mark 31 is a PTP
6 and the mounting section 2 are desirably formed in the same shape. However, as long as alignment can be performed, the shapes need not necessarily be the same.

Further, the insulating base 7 of the PTP 6 is preferably transparent, particularly transparent and colorless. However, as long as the alignment mark 31-BD attached to the mounting portion 2 can be confirmed through the insulating base 7, the insulating base 7 is limited to colorless and transparent. And may be colored.

Further, it is needless to say that the alignment mark 31 as in this embodiment may be attached to the wiring dedicated device 30 as well.

Next, a technique for improving the earthquake resistance and corrosion resistance of a semiconductor electronic device system according to the present invention will be described as a seventh embodiment.

(Seventh Embodiment) FIG. 32A is a plan view of a semiconductor electronic device system according to a seventh embodiment, and FIG. 32B is a sectional view taken along line 32B-32B in FIG. 32A.

As shown in FIGS. 32A and 32B, the book 7
In the embodiment, the PTP 6
Is detachably mounted, and then P
TP6 is fixed to the base board 1 and sealed from the outside.

Thus, the mounting portion 2 of the base board 1
After the PTP 6 is detachably mounted, the resin 32 is detachable.
Thus, by fixing and sealing the PTP 6, the earthquake resistance and the corrosion resistance of the semiconductor electronic device system can be improved.

Further, the resin 32 can be peeled off. For example, even without using a dedicated peeling device, only manual work by an operator can be performed.
Alternatively, peeling can be performed only by the operation of an assembly robot in a semiconductor manufacturing factory. As a result, it is possible to respond to repair and rework without impairing the effect.
The seismic resistance and corrosion resistance of the semiconductor electronic device system can be improved.

As described above, the present invention has been described with reference to the first to seventh embodiments. However, the present invention is not limited to each of these embodiments, and various modifications may be made without departing from the spirit of the present invention. It is possible to transform to

For example, in the above embodiment, the PTP is exemplified as the semiconductor integrated circuit device. However, the semiconductor integrated circuit device is not limited to the PTP, and various semiconductor integrated circuit devices can be used.

Further, each of the above-described embodiments may be practiced alone or in appropriate combination.

Furthermore, the above embodiments include inventions of various stages, and it is also possible to extract inventions of various stages by appropriately combining a plurality of constituent elements disclosed in each embodiment. is there.

[0200]

As described above, according to the present invention, there is provided a semiconductor electronic device system constructed by combining semiconductor integrated circuit devices, wherein the semiconductor integrated circuit device can be easily attached / detached. A semiconductor electronic device system capable of repair and rework can be provided.

Further, it is possible to provide a semiconductor integrated circuit device, a mounting board, and an electronic component which can be suitably used in the above-mentioned semiconductor electronic device system.

[Brief description of the drawings]

FIG. 1 is a plan view of a base board used in a semiconductor electronic device system according to a first embodiment of the present invention.

2A is a plan view of a PTP used in the semiconductor electronic device system according to the first embodiment, FIG. 2B is a cross-sectional view taken along line 2B-2B in FIG. 2A, and FIG. 2C is a rear view of the PTP. Plan view.

FIG. 3 is a plan view after PTP mounting.

FIGS. 4A and 4B are views showing removal of a PTP.

FIG. 5A and FIG. 5B are views showing attachment of a PTP.

FIG. 6A is a plan view of a semiconductor integrated circuit device according to a first specific example of the second embodiment, and FIG. 6B is 6B-6 in FIG. 6A.
FIG. 6C is a sectional view taken along the line B, and FIG. 6C is a plan view of the back surface side of the semiconductor integrated circuit device.

FIG. 7 is an exemplary plan view of a base board according to a second specific example of the second embodiment;

FIGS. 8A and 8B are cross-sectional views of a semiconductor electronic device system according to a third specific example of the second embodiment.

FIG. 9 is an exemplary sectional view of a semiconductor electronic device system according to a fourth specific example of the second embodiment;

10A is a plan view of a semiconductor integrated circuit device according to a fifth specific example of the second embodiment, FIG. 10B is a cross-sectional view taken along line 10B-10B in FIG. 10A, and FIG. FIG.

FIG. 11A is a plan view of a base board according to a fifth specific example of the second embodiment, FIG. 11B, and FIG.
Sectional drawing which follows 11B line.

12A is a plan view of a base board according to a sixth specific example of the second embodiment, and FIG. 12B is a plan view of 12B in FIG. 12A.
Sectional drawing which follows the -12B line.

FIG. 13A is a plan view of a base board according to a seventh specific example of the second embodiment, and FIG. 13B is a plan view of 13B in FIG. 13A.
Sectional drawing which follows the -13B line.

FIG. 14A and FIG. 14B are enlarged cross-sectional views showing a mounting portion of a semiconductor integrated circuit device and a base board to be mounted, respectively.

FIGS. 15A and 15B are cross-sectional views of a semiconductor electronic device system according to an eighth example of the second embodiment.

FIG. 16A and FIG. 16B are cross-sectional views of a semiconductor electronic device system according to a ninth specific example of the second embodiment.

17A and 17B are cross-sectional views of a semiconductor electronic device system according to a tenth example of the second embodiment.

FIG. 18 is a ninth specific example of the second embodiment and the first specific example;
0 is a plan view of a semiconductor integrated circuit device according to a specific example.

FIG. 19A is a plan view of a base board according to an eleventh example of the second embodiment, and FIG.
Sectional drawing which follows the B-19B line.

FIG. 20 is a plan view of a semiconductor integrated circuit device according to a first specific example of the third embodiment;

FIG. 21 is a plan view of another semiconductor integrated circuit device according to the first specific example of the third embodiment;

FIG. 22 is a view showing a semiconductor integrated circuit device according to a second specific example of the third embodiment.

FIGS. 23A and 23B are plan views of a semiconductor integrated circuit device according to a third specific example of the third embodiment.

FIGS. 24A to 24D are plan views of a semiconductor integrated circuit device according to a fourth specific example of the third embodiment.

25A is a plan view of a base board according to a first specific example of the fourth embodiment, FIG. 25B is a plan view of the back side of the base board, and FIG. 25C is a plan view of FIG. 25A and FIG.
Sectional drawing which follows the 5C-25C line.

26A is a plan view of a base board according to a first specific example of the fourth embodiment, FIG. 26B is a plan view of a second layer of the base board, and FIG. 26C is 26C in FIGS. 26A and 26B. 26D is a cross-sectional view taken along line -26C, and FIG. 26D is a cross-sectional view taken along line 26D-26D in FIGS. 26A and 26B.

FIG. 27 is a plan view of a base board according to a third specific example of the fourth embodiment;

FIGS. 28A and 28B are enlarged cross-sectional views each showing a mounting portion of a base board according to a fourth specific example of the fourth embodiment;

FIG. 29 is an exemplary plan view of an electronic apparatus system according to a first specific example of the fifth embodiment;

FIG. 30 is an exemplary plan view of an electronic apparatus system according to a second specific example of the fifth embodiment;

31A is an enlarged plan view showing a mounting portion of a base board according to a sixth embodiment, FIG. 31B is a plan view of a semiconductor integrated circuit device according to a sixth embodiment, and FIG. 31C is a semiconductor integrated circuit FIG. 2 is a plan view when the device is mounted.

FIG. 32A is a plan view of a semiconductor electronic device system according to a seventh embodiment, and FIG. 32B is a view showing 32B- in FIG. 32A;
Sectional drawing which follows the 32B line.

[Explanation of symbols]

1: Base board (mounting board), 2: Base board mounting part, 3: Base board connection terminal, 3-SGL: Base board connection terminal (signal terminal), 3-VCC: Base board connection terminal (VCC Power supply terminal), 3-VSS: Base board connection terminal (VSS power supply terminal), 4: Base board wiring, 4-SGL: Base board wiring (for signal), 4-VCC: Base board wiring (VCC power supply) 4-VSS: Wiring of base board (for VSS power supply), 4X-SGL: X-direction wiring of base board (for signal), 4Y-SGL: Y-direction wiring of base board (for signal), 5: Base External terminal area of board, 6: PTP (semiconductor integrated circuit device), 7: PTP insulating base, 8: PTP wiring, 9: IC chip, 10: gold bump, 11: sealing material, 12: PTP through Hall, 13 ... PTP external terminal, 1 -SGL ... PTP external terminal (signal terminal), 13-VCC ... PTP external terminal (VCC power terminal), 13-VSS ... PTP external terminal (VSS power terminal), 14 ... PTP solder bump, 15 ... Adhesive tape 16: slit, 17: magnetized magnetic material, 18: magnetized magnetic material, 19: magnetic material layer, 20: projection of PTP, 21: hole of base board, 22: depression of base board, 23: base Board post, 24 ... PTP through hole, 25 ... Protective resistor, 26 ... IC chip I / O pad, 27 ... IC chip I / O circuit, 28 ... Circuit symbol attached to PTP, 29 ... Base board 30 ... Wiring dedicated device, 31-BD: Alignment mark on base board, 31-PTP: Alignment mark on PTP, 32: Peelable resin.

Claims (23)

[Claims] 1. A semiconductor having a mounting board having a plurality of mounting portions on which a semiconductor integrated circuit device is mounted, and achieving an arbitrary function by a combination of the semiconductor integrated circuit devices mounted on the mounting portion of the mounting substrate. An electronic device system, wherein the semiconductor integrated circuit device is detachably mounted on a mounting portion of the mounting substrate, and the arbitrary functions are repaired and replaced by replacing the detachably mounted semiconductor integrated circuit device. A semiconductor electronic device system characterized by reworking an arbitrary function. 2. The semiconductor electronic device system according to claim 1, wherein the plurality of mounting portions on which the semiconductor integrated circuit device is removably mounted are provided at least in an array on the mounting substrate. . 3. An adhesive material is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged, and the semiconductor integrated circuit device is removably mounted on a mounting portion of the mounting substrate by the adhesive material. The semiconductor electronic device system according to claim 1, wherein: 4. A slit is provided at a corner of a mounting portion of the mounting substrate, and a corner of the semiconductor integrated circuit device is inserted into the slit, so that the semiconductor integrated circuit device can be detachably attached to the mounting portion of the mounting substrate. The semiconductor electronic device system according to claim 1, wherein the system is mounted. 5. A mounting portion of the mounting substrate by sandwiching the mounting substrate and the semiconductor integrated circuit device between at least a magnetic material and a magnetized magnetic material from both sides of a mounting surface and a back surface of the mounting substrate. 2. The semiconductor electronic device system according to claim 1, wherein said semiconductor integrated circuit device is detachably mounted. 6. The mounting substrate has a magnetic material, and the mounting substrate having the magnetic material and the magnetized magnetic material sandwich the semiconductor integrated circuit device, so that the mounting portion of the mounting substrate has: 2. The semiconductor electronic device system according to claim 1, wherein said semiconductor integrated circuit device is detachably mounted. 7. The mounting substrate has a magnetized magnetic material, and the semiconductor integrated circuit device is sandwiched between the mounting substrate having the magnetized magnetic material and the magnetic material or the magnetized magnetic material. 2. The semiconductor electronic device system according to claim 1, wherein the semiconductor integrated circuit device is detachably mounted on a mounting portion of the mounting substrate. 8. A projection is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged, a hole for inserting the projection is provided in a mounting portion of the mounting substrate, and the projection is provided in the hole. 2. The semiconductor electronic device system according to claim 1, wherein the semiconductor integrated circuit device is detachably mounted on a mounting portion of the mounting substrate by being inserted. 9. The semiconductor integrated circuit device is inserted into a mounting portion of the mounting substrate by providing a recess into which the semiconductor integrated circuit device is inserted, and by inserting the semiconductor integrated circuit device into the recess. 2. The semiconductor electronic device system according to claim 1, wherein the circuit device is detachably mounted. 10. A mounting portion of the mounting substrate is provided with a post, and the post is inserted into an external terminal of the semiconductor integrated circuit device, whereby the semiconductor integrated circuit device is removably mounted on the mounting portion of the mounting substrate. The semiconductor electronic device system according to claim 1, wherein: 11. A semiconductor integrated circuit device removably mounted on a mounting portion of a mounting substrate, wherein an adhesive is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged. A semiconductor integrated circuit device characterized by the above-mentioned. 12. A semiconductor integrated circuit device removably mounted on a mounting portion of a mounting substrate, wherein a projection is provided on a surface of the semiconductor integrated circuit device on which external terminals are arranged. A semiconductor integrated circuit device characterized by the above-mentioned. 13. A semiconductor integrated circuit device detachably mounted on a mounting portion of a mounting substrate, wherein a circuit symbol is provided on a surface of the semiconductor integrated circuit device. apparatus. 14. A mounting board having a mounting portion on which a semiconductor integrated circuit device is detachably mounted, wherein a slit into which a corner of the semiconductor integrated circuit device is inserted is provided at a corner of the mounting portion of the mounting substrate. A mounting board characterized by being carried out. 15. A mounting substrate having a mounting portion on which a semiconductor integrated circuit device is removably mounted, wherein the mounting substrate has a magnetic material. 16. A mounting board having a mounting portion on which a semiconductor integrated circuit device is detachably mounted, wherein the mounting board has a magnetized magnetic material. 17. A mounting board having a mounting portion for detachably mounting a semiconductor integrated circuit device in which a projection is provided on a surface on which external terminals are arranged, wherein the mounting portion of the mounting board is A mounting board provided with a hole into which the protrusion of the semiconductor integrated circuit device is inserted. 18. A mounting board having a mounting portion on which a semiconductor integrated circuit device is detachably mounted, wherein the mounting portion of the mounting board is provided with a recess into which the semiconductor integrated circuit device is inserted. A mounting board characterized by the above-mentioned. 19. A mounting substrate having a mounting portion on which a semiconductor integrated circuit device is detachably mounted, wherein a mounting portion of the mounting substrate is provided with a post to be inserted into an external terminal of the semiconductor integrated circuit device. A mounting substrate, characterized in that: 20. A mounting substrate on which a semiconductor integrated circuit device has a plurality of mounting portions which are removably mounted in at least an array, wherein each of the mounting portions provided in an array is adjacent to each other. A mounting board, which is connected to a mounting section. 21. A mounting substrate on which a semiconductor integrated circuit device has a plurality of mounting portions which are removably mounted in at least an array, wherein at least some of the mounting portions provided in an array are adjacent to each other. A mounting board, which is connected to a mounting part other than the mounting part. 22. A mounting substrate having a mounting portion on which the semiconductor integrated circuit device is detachably mounted, wherein the mounting portion of the mounting substrate has connection terminals, and the connection terminals are raised. And the mounting board. 23. An electronic component detachably mounted on a mounting portion of a mounting board, wherein the electronic component is a dedicated wiring device for connecting the mounting portions of the mounting board. parts.