JP2002254705A - Image forming device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image forming device improving efficiency and reducing circuit scale. SOLUTION: A image forming device is provided with a plurality of laser diode 2, 11, LD modulators 1, 10 controlling each laser diode, a basic write clock generator 6 controlled to output a prescribed clock, phase locked controllers, 5, 7 generating a write synchronizing signal, and a phase delay controller 4, 9 controlling a phase delay of a write clock in order to align a write position, and performs write position alignment for each beam by inputting an output signal of a synchronizing signal controller to the phase locked controller. Consequently, an instruction signal corresponding to delay amounts stored in a storage units 3, 8 is outputted from phase delay controllers 4, 9 to the phase locked controller 5, 7 and compensate the write position errors. The delaying of the phase of write clock by using the phase delay in this configuration can make a write position gap and the position gap can be compensated with low cost and small circuit scale.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image forming apparatus, for example, an image forming apparatus including an optical writing device for simultaneously scanning a plurality of lines by a plurality of LDs to form a latent image. .

[0002]

2. Description of the Related Art There is a system in which a plurality of lasers called a multi-beam system are used as writing means of an image forming apparatus, and a plurality of lines are simultaneously scanned to form an image. In this method, since a plurality of lines are written at one time, the writing speed is increased by the number of laser beams as compared with the case of writing one line at a time. This method is often used in high-speed image forming apparatuses (printers). However, in this type of image forming apparatus, a dot position shift occurs in the main scanning direction due to mechanical factors, laser chromatic aberration, and the like.
In order to correct this, for example, Japanese Patent Laid-Open No.
As disclosed in Japanese Unexamined Patent Publication No. 27037, Japanese Unexamined Patent Application Publication No. 9-66630, and Japanese Unexamined Patent Application Publication No. 9-58989, a method of modulating a write clock for each laser to correct a dot position shift has been proposed. I have.

[0003]

However, in the above-mentioned method of correcting the dot position shift by modulating the write clock for each laser, a write clock generator is required for each laser, and It is necessary that the writing clock can be finely adjusted in order to correct the positional deviation of one dot or less. For this reason, there is a problem that the circuit scale is increased and the cost is increased.

Accordingly, a first object of the present invention is to provide an image forming apparatus which can be configured with a small circuit scale for correcting a writing positional deviation.

A second object of the present invention is to provide an image forming apparatus which is less expensive than the conventional write clock modulation method and which can obtain substantially the same image quality in practical use.

A third object is to provide an image forming apparatus which can be easily replaced when the circuit scale is reduced and which is excellent in serviceability.

On the other hand, it is desirable to correct the write position error by delaying the phase outside the image area for the write position adjustment position as described above. However, when the write position error becomes large, the write position is adjusted before writing the image data. In some cases, the position error cannot be corrected.

Therefore, a fourth object is to provide an image forming apparatus which can correct even if a writing position error becomes large.

A further object of the present invention is to provide an image forming apparatus capable of minimizing deterioration of image quality even when correction is performed in an image area due to a large writing position error.

[0010]

In order to achieve the above object, a first means comprises a plurality of laser diodes, an LD modulation means for controlling each laser diode, and a write controlled to output a predetermined clock. A clock generation unit, a synchronization signal control unit for generating a write synchronization signal, and a phase synchronization control unit for controlling a phase of a write clock for write alignment, wherein the phase synchronization control unit controls an output signal from the synchronization signal control unit. An image forming apparatus comprising: an optical writing unit for inputting the writing position of each beam by inputting to the unit; and an image forming unit for visualizing an image written by the optical writing unit and forming an image on a sheet. A phase delay control means for instructing the phase synchronization control means of a phase delay of the write clock; And storage means for storing the amount,
The phase delay control means outputs an instruction signal corresponding to the delay amount stored in the storage means to the phase synchronization control means, and corrects a write position error.

The second means is an image forming apparatus based on the same premise as the first means, wherein a phase delay control means for instructing a phase delay of the write clock to the phase synchronization control means, and a delay amount are set. And a phase delay control unit that outputs an instruction signal corresponding to the delay amount set in the dip switch to the phase synchronization control unit, and corrects a write position error. I do.

The third means is an image forming apparatus based on the same premise as the first means, wherein a phase delay control means for instructing the phase synchronization control means of a phase delay of the write clock and a delay amount are inputted. Input means, a storage means for storing the delay amount, and a control means for storing the delay amount input by the input means in the storage means, wherein the phase delay control means is stored in the storage means. An instruction signal corresponding to the delay amount is output to the phase synchronization control means to correct a write position error.

A fourth means is the first to third means, wherein the phase delay control means outputs the instruction signal a plurality of times to correct the writing position error even in an image area. I do.

A fifth means is the fourth means, further comprising image data analysis means, wherein the phase delay control means is configured to determine the phase delay based on the amount of delay stored in the storage means and the input image data. An instruction signal is output to control the phase delay timing.

A sixth means is the fifth means, further comprising a dispersion control means for dispersing the phase delay timing, wherein the dispersion control means disperses the phase delay timing.

A seventh means is the fifth means, further comprising image processing means for performing predetermined image processing on the input image data, wherein the image processing means is configured to perform a predetermined image processing based on the input image data. The phase delay timing is instructed.

The eighth means is characterized in that, in the third means, the delay amount is set according to a writing position shift amount due to chromatic aberration between the laser diodes.

The ninth means is the same as the eighth means, further comprising a write leading edge synchronization detecting means and a trailing edge synchronization detecting means, wherein the write position shift amount is one line, and the leading edge synchronization detecting means and the trailing edge synchronization detecting means are aligned. It is characterized in that it is set based on a difference in detection time of the detection means.

A tenth means is characterized in that the plurality of laser diodes are manufactured from the same lot or the same wafer.

[0020]

Embodiments of the present invention will be described below with reference to the accompanying drawings.

In the following description, the same reference numerals are given to the same parts, and the duplicate description will be omitted.

<First Embodiment> FIGS. 1 to 7 show an image forming apparatus according to a first embodiment of the present invention.

FIG. 6 is a schematic diagram showing the overall mechanical configuration of the image forming apparatus according to the present embodiment, and FIG. 7 is a block diagram showing the same overall electrical configuration. 6, the image forming apparatus 100 basically includes a document feeding unit 110, an image reading unit 120, an image forming unit 130, and a paper feeding unit 140. The document feeding unit 110 includes the document table 11.
The process of separating the originals one by one from the original bundle placed on the original bundle, feeding the originals onto the contact glass 121 of the image reading unit 120, and discharging the originals to the original discharge tray 112 is repeated.
All the documents on the document table 111 can be automatically read.

The image reading unit 120 irradiates illumination light to a document placed or fed on a contact glass (not shown in detail), and a first scanner and a second scanner (not shown) as auxiliary devices. It is a known device that moves in the scanning direction and guides reflected light to a light receiving surface of a CCD via an imaging lens to read image information. The read image information is stored in an image memory 73 described later, and laser writing is performed on the charged surface of the photoconductor 131 from the writing optical system of the image forming unit 130 to form a latent image on the surface of the photoconductor 131. The formed latent image is developed with toner by the developing device 132, the toner image is transferred to a sheet fed from the sheet feeding unit 140, fixed by the fixing unit 133, and discharged.

The paper feed unit 140 includes four paper feed stages 141 and a double-sided paper feed unit 145 to be described later. The paper picked up from one of the paper feed stages 141 is moved to the position of the registration roller 142 via the vertical conveyance path 143. And is sent out at the position of the registration roller 142 at a timing with the toner image formed on the photoconductor 131. The same operation is performed on the sheet sent from the double-sided sheet feeding unit 145 to form an image on the back side of the sheet.

As shown in FIG. 7, the image forming apparatus 100 sends an operation display section 72, A
DF (automatic document feeder-document feeder) 110, optical unit (optical reader and optical writer) 121,
Image memory 73, image processing unit 74, nonvolatile memory 75,
The respective units such as a paper feeding unit 140, a double-sided paper feeding unit 145, an image forming unit 130, and a fixing unit 133 are connected.
1 with each other. The system control unit 71 includes the nonvolatile memory 7
5, and controls the above-described units and the entire system.

FIG. 1 is a block diagram showing details of the image writing unit. This embodiment is an image writing apparatus of a multi-beam system using two laser diodes (hereinafter, referred to as LD). In FIG. 1, the image writing apparatus according to the present embodiment includes a first LD modulator (LD modulator (1)) 1 to which first image data (data 1) is input, and a first LD (LD (1 )) 2, a first storage device (storage device (1)) 3, a first phase delay control unit (phase delay control unit (1)) 4, and a first synchronization signal (synchronization signal 1). A first phase synchronization control unit (phase synchronization control unit (1)) 5, a basic write clock generator 6, and a second phase synchronization control unit (phase synchronization control) to which a second synchronization signal (synchronization signal 2) is input Unit (2)) 7, second storage device (storage device (2)) 8, second phase delay control unit (phase delay control unit (2)) 9, and second image data (data 2) are input. A second LD modulator (LD modulator (2)) 10 and a second LD (LD (2)) 11

The basic write clock generator 6 is constituted by an oscillator such as a crystal oscillator or a PLL circuit, and is set so as to output a frequency N times higher than a desired write clock. The first and second phase synchronization controllers 5 and 7 have a function of generating a desired write clock from a basic write clock output by the basic write clock generator, and each of the LD modulators 1 and 10
Are prepared one by one. The phases of the write clocks of the LDs 2 and 11 are set by the input timings of the synchronization signals (synchronization signals 1 and 2) input to the first and second phase synchronization controllers 5 and 7, respectively. .

FIG. 2 is a timing chart showing timings selected by the basic write clock output from the basic write clock generator 6 and the write clock phase synchronization control signals output from the phase synchronization controllers 5 and 7. In the present embodiment, the first and second LDs 2 and 11 are configured by using the above-described configuration of the image forming apparatus.
It is possible to operate at the same frequency and different phase.

At the same time, the first and second phase synchronization control units 5 and 7 respectively use the delay instruction signals output from the first and second phase delay control units 4 and 9 to write the write clock as shown in FIG. Is delayed by M times a half cycle. That is, the write clock is delayed by a period that is an integral multiple of 基本 of the basic write clock (１ ／ period in FIG. 3). FIG. 3 shows the basic write clock, write clock 1, write clock 2, and write clock 1.
This indicates the timing at which the delay is changed from "1" to "write clock 2", and the desired delay amount can be obtained by delaying the half period of the delay amount as a unit by an integral multiple to obtain a multiple delay.

First and second phase delay controllers 4 and 9
Is a block for controlling the output timing of the delay instruction signal, and controls the timing so that a delay occurs at a desired timing.

The first and second storage devices 3 and 8 are blocks for storing the amount of delay, and the first and second phase delay control units 4 and 4 at the subsequent stage according to the amount of delay stored therein.
9 generates a delay instruction signal. The delay signal does not need to be output when no delay is required (0 times), and can be output once or a plurality of times depending on the delay amount. This makes it possible to adjust the writing timing by completing the delay before writing the image, or to adjust the writing timing with the delay after the image writing. In addition, as described in an embodiment described later, when writing timing is delayed after writing an image,
It is desirable to take care not to adversely affect the image formation.

The write clocks output from the first and second phase synchronization controllers 5 and 7 correspond to the LDs 2 and 11 respectively.
Are input to the first and second LD modulators 1 and 10, respectively, and the first and second LDs 2 and 11 are turned on and off at the timing specified by the clock. The blinking operation of the first and second LDs 2 and 11 is determined by respective data input to the first and second LD modulators 1 and 10, respectively.

With this configuration, it is possible to delay at a desired timing by the delay amount stored in the first and second storage devices 3 and 8. This makes it possible to correct the writing position deviation of the beams LD2 and 11 with high accuracy. For example, a predetermined delay amount can be divided into a plurality of times by a delay smaller than one pixel and delayed at a predetermined timing. Further, as described above, the delay is repeated a plurality of times, causing a delay that cannot be visually recognized even in the image area, and a writing position due to a difference in scanning length due to a mechanical alignment error between a plurality of beams and chromatic aberration. The error can be corrected.

<Second Embodiment> FIG. 4 is a block diagram showing details of an image writing section according to a second embodiment of the present invention. Since the overall mechanical configuration and the overall electrical configuration of the image forming apparatus are the same as those of the first embodiment shown in FIGS. 6 and 7 described above, the same reference numerals are given to the same components, and the same components are duplicated. Description is omitted.

In the present embodiment, the first and second storage devices 3 and 8 in the first embodiment are replaced with DIP switches (DIPSW) 3a and 8a, respectively, and other components are the same as those in the first embodiment. It is configured the same as the form. That is, in this embodiment, the first and second storage devices 3 and 8 are DIPWS 3a and 8a, respectively, so that the delay amounts of the first and second LDs 2 and 11 can be set. In actual use, the measurer of the writing position deviation of the two beams may be changed by the DIPSW3 according to the deviation amount.
The adjustment is made by operating the set values of a and 8a.

With this configuration, the circuit constituting the image writing unit is formed into an ASIC, and can be easily incorporated on one board. Further, when the board is assembled and unitized, the dot position deviation becomes a value unique to each unit. Therefore, if this dot displacement is measured in advance in the assembling process, and a dot displacement correction value is set in the DIPSW installed on the board,
Unit replacement can be easily performed, and serviceability can be improved.

Other parts not particularly described are the same as those described in the first embodiment.
The configuration and operation are the same as those of the first embodiment.

<Third Embodiment> FIG. 5 is a block diagram showing details of an image writing section according to a third embodiment of the present invention. Since the overall mechanical configuration and the overall electrical configuration of the image forming apparatus are the same as those of the first embodiment shown in FIGS. 6 and 7 described above, the same reference numerals are given to the same components, and the same components are duplicated. Description is omitted.

This embodiment is provided with a main body control section 51 which can externally set the delay amount for the first and second storage devices 3 and 8 in the first embodiment. This enables data input to the main body control unit 51 from outside. With this configuration, it is possible to set the amount of delay in the first and second storage devices 3 and 8 when the image forming apparatus main body is started.

In actual use, a measurer of a two-beam writing position shift sticks a sticker or the like indicating a shift amount or a correction value to the unit, and in a subsequent assembly process,
The correction amount is input via the operation panel of the main body or a network. Alternatively, the serviceman inputs the correction amount via the operation display unit 72 or the like according to the correction amount or the like specified on the sticker when the unit is replaced. Therefore, the input means in claim 3 corresponds to the operation display section 72, and the main body control section 51 corresponds to the control means.

Other parts not particularly described are the same as those described in the first embodiment.
The configuration and operation are the same as those of the first embodiment.

<Fourth Embodiment> FIG. 8 is a block diagram showing details of an image writing section according to a fourth embodiment of the present invention. Since the overall mechanical configuration and the overall electrical configuration of the image forming apparatus are the same as those of the first embodiment shown in FIGS. 6 and 7 described above, the same reference numerals are given to the same components, and the same components are duplicated. Description is omitted.

In the present embodiment, when the delay is performed even in the image forming area, the image analysis unit 81 analyzes the image data with respect to the first embodiment in consideration of not deteriorating the image quality of the formed image. , 82 (image analysis (1),
(2)). Image data to the first and second LDs 2 and 11 are input to the first and second image analysis units 81 and 82, and the analysis results of the image analysis units 81 and 82 and the first and second image analysis units 81 and 82, respectively. The output timing of the delay instruction signal is controlled by the timing controlled by the phase delay control units 4 and 9, so that a change in the image due to the delay is reduced.

The image data analyzed by the image analyzers 81 and 82 are, for example, black (color) solid portions, edge portions, and the like. Image shift is not noticeable. On the other hand, when the image shifts at the edge portion, the shift is visually noticeable. Therefore, when the input image data is analyzed and the delay is performed in the image area, the delay is performed in an area that is as inconspicuous as possible. Specifically, the delay is made in a solid black portion or a solid color portion.

Other parts which are not particularly described are the same as those described in the first embodiment.
The configuration and operation are the same as those of the first embodiment.

<Fifth Embodiment> FIG. 9 is a block diagram showing details of an image writing section according to a fifth embodiment of the present invention. Since the overall mechanical configuration and the overall electrical configuration of the image forming apparatus are the same as those of the first embodiment shown in FIGS. 6 and 7 described above, the same reference numerals are given to the same components, and the same components are duplicated. Description is omitted.

In this embodiment, the first and second image analyzers 81 and 82 in the fourth embodiment are replaced by first and second random controllers 91 and 91 (random control (1), ( 2)). The random control units 91 and 92 are blocks that control or assist the delay instruction signals controlled by the first and second phase delay control units 4 and 9 to be output at random timing.
In the example shown in FIG. 9, the first and second random control units 91 and 92 correspond to the first and second LDs 2 and 11, respectively, but the same operation is possible even with one random control unit. is there.

As described above, the first and second random control units 91 and 92 are provided, and the output timings of the delay instruction signals output from the first and second phase delay control units 4 and 9 are randomly varied. Thereby, the change of the image due to the delay is dispersed. Therefore, if a delay is made at a random timing at a halftone portion in an image area, an image shift due to the delay is inconspicuous. Therefore, in combination with the above-described fourth embodiment, a black (color) solid area and a halftone area are identified according to input image data, and the halftone area is delayed at random timing by a random control unit. Can also be configured.

The other parts not particularly described are the same as those of the first embodiment.
The configuration and operation are the same as those of the first embodiment.

<Sixth Embodiment> FIG. 10 shows a sixth embodiment of the present invention.
FIG. 4 is a block diagram illustrating details of an image writing unit according to the embodiment. Since the overall mechanical configuration and the overall electrical configuration of the image forming apparatus are the same as those of the first embodiment shown in FIGS. 6 and 7 described above, the same reference numerals are given to the same components, and the same components are duplicated. Description is omitted.

This embodiment is different from the third embodiment in that the main body controller 52 and the first and second storage devices 3 and 8 are provided.
And an image processing apparatus 1001 configured to output image data 1 and 2 to the first and second LDs 2 and 11.

The image processing apparatus 1001 has a CPU and a ROM.
And a RAM, and a page memory for image processing. After the input image data is expanded in the page memory, a portion to be delayed in the image area is determined. And
The output timing of the delay instruction signal is instructed to the first and second phase delay control units, and the first and second phase delay control units control the output timing of the delay instruction signal. Therefore, since the image processing apparatus 1001 stores the delay amount, the first and second storage devices are not required in the configuration.
The CPU executes processing according to a program stored in the ROM while using the RAM as a work area. With this configuration, it is possible to reduce the influence on the image by taking into account delay when performing image processing such as dither processing in the image processing apparatus 1001 corresponding to a higher processing block.

In an actual configuration, a higher quality image can be obtained by combining the above configurations.

<Seventh Embodiment> In the first to sixth embodiments, the write position deviation is accurately corrected by delaying at a desired timing by a desired amount of delay. However, a plurality of LDs are used. In the writing optical unit, LD
A writing shift due to chromatic aberration occurs. This shift causes image deterioration similarly to the above-described shift of the image writing position, and particularly in a color image, the shift is remarkable for multiple colors. However, image deterioration is not conspicuous until this deviation exceeds a certain value. FIG. 11 is a timing chart showing the write timing at this time. FIG. 11A shows an example of the write timing in the conventional example. In this example, a shift of Δt occurs between the first LD 2 and the second LD 11.

As described above, the image deterioration is not conspicuous until the deviation exceeds the predetermined value. Therefore, the writing start position is shifted according to the writing position deviation due to the chromatic aberration evaluated in advance, and the relative pixel position error is reduced by one. / 2. That is, the writing start position of the image is set in FIG.
As shown in (b), the delay is performed by Δt / 2, so as to be 位置 of the maximum writing position shift amount between the beam 1 by the first LD 2 and the beam 2 by the second LD 11. As a result, even if the timing is largely shifted, the difference can be reduced to 従 来 of the conventional timing, so that the possibility of image degradation can be minimized.

In the case of this embodiment, the configuration is the same as that of the third embodiment shown in FIG. 5, and the amount of change of the writing position is calculated by measuring the wavelengths of both in advance, or the time for operating the fixed length is calculated. , Or by measuring the writing position in a certain time. The calculated data, that is, the difference in the writing time of the beam 2 with respect to the beam 1 is input from the operation display unit 72 and
After the calculation of Δt / 2 at 1, the first and second storage devices 3 and 8 are set. Thereafter, the delay amount is set in the same manner as in the third embodiment, and the writing is performed with the delay amount being delayed at the start of writing.

It should be noted that the writing position deviation is ΔΔ
If Δt is large even when set to t / 2, image degradation may occur. In consideration of such a case, by selecting a combination of the first and second LDs 2 and 11, image deterioration can be prevented. Also, LD
Is a semiconductor, so that the same lot or the same wafer has a small variation in wavelength and the like. Therefore, if a combination of LDs of the same lot or LDs of the same wafer is selected,
Image deterioration can be prevented. In the case where the combination is selected by measuring the characteristics of the LD, if the combination of the LD of the same lot or the LD of the same wafer is selected, these measurement steps become unnecessary.

Other parts which are not particularly described are the same as those of the third embodiment.
The configuration and operation are the same as those of the first embodiment.

<Eighth Embodiment> In the seventh embodiment, the amount of change in the writing position is calculated by measuring both wavelengths in advance, or the time for operating a certain length, or writing in a certain time. The calculation is performed by measuring the position. Then, the delay time is set from the operation display unit 2 based on the calculation result. On the other hand, the present embodiment is an example in which the setting of the delay time can be automatically performed by using the front end synchronization detection sensor and the rear end synchronization detection sensor. The configuration of the image writing unit is the same as that of the above-described third embodiment, and the detection outputs of the front-end synchronization detection sensor and the rear-end synchronization detection sensor are input to the main body control unit 51.
Is processed.

As shown in FIG. 12, this optical scanning optical system includes a laser diode array chip 1201, a collimating lens 1202, an aperture 1208, a cylindrical lens 1203, a polygon mirror 1204, an fθ lens 1
205, surface tilt correction lens 1206, mirror 1209,
Tip synchronization mirror 1210, tip synchronization detection sensor 121
1. The laser diode array chip 1 includes a rear end synchronization mirror 1220 and a rear end synchronization detection sensor 1221.
Photosensitive drum 1 by the laser beam emitted from
The optical writing is performed on 207 to form a latent image.

Laser diode array chip 1201
Are arranged at a substantially same position in the main scanning direction and separated by a predetermined distance in the sub-scanning direction, which is the rotation direction of the photosensitive drum 7, and two light-emitting sources that can be individually modulated and controlled are arranged on one chip. I have. Each of the laser diode light emitting sources emits a laser beam modulated according to image data. These two laser beams are shaped into laser beams having a predetermined shape by a collimating lens 1202, an aperture 1208, and a cylindrical lens 1203, and are applied to a polygon mirror 1204. In this optical system, the two laser beams are converted into a parallel light beam by a collimating lens 1202, and an extra laser beam is cut off by an aperture 1208 having a slit corresponding to the writing density. Each parallel light beam shaped by the aperture 1208 is condensed by a cylindrical lens 1203 so that each laser beam for writing an image in the main scanning direction has a predetermined size on the surface of the photoconductor drum 1207, and a polygon is formed. The light is applied to the mirror 1204.

The polygon mirror 1204 is rotating at a predetermined speed, and the laser beam hitting the polygon mirror 1204 is directed to the mirror 1209, where it is reflected and in the main scanning direction (the direction of the rotation axis of the photosensitive drum 7) X. Scanning is repeated. At this time, the laser beam reflected by the polygon mirror 1204 is subjected to conversion from constant angular velocity movement to constant velocity movement by the pair of Fθ lenses 1205 and correction of surface tilt by the surface tilt correction lens 1206, and then the angle of reflection by the reflection mirror 1209. Can be changed, and the photosensitive drum 120
7 is spot-shaped with a predetermined beam diameter.

Laser diode array chip 1201
Has two light emitting sources, so that the photosensitive drum 1207
Are irradiated with two laser beam trajectories having a pitch (position difference) in the sub-scanning direction (rotation direction of the photosensitive drum 1207) Y. In FIG. 12, the photosensitive drum 1
The laser beam immediately before the main scan on the surface of the photoconductor drum 207 is transmitted to the tip synchronization mirror 1 provided on the laser beam path on the main scan start point side outside the main scan write area on the surface of the photosensitive drum 1207.
The tip synchronization detection sensor 1211 detects the laser beam via 210, and generates and outputs a synchronization detection signal. Further, the rear end synchronization detection sensor 1221 detects the laser beam via the rear end synchronization mirror 1220 provided on the main scanning end point side laser beam path outside the main scanning writing area, and generates and outputs a synchronization detection signal. The write timing at this time is shown in the timing chart of FIG.

As can be seen from FIG. 13A showing a conventional example, even if writing is conventionally started based on the leading edge synchronization detection signal, a shift of ΔT may occur at the write end position, and this shift is large. When the value exceeds a certain value, image deterioration becomes conspicuous. Therefore, FIG.
As shown in FIG. 3 (b), the time difference ΔT between beam 1 and beam 2
The writing start position is shifted by の of the above, and the relative pixel position error is reduced to １ ／. That is, the writing start position of the image is delayed by ΔT / 2 as shown in FIG. 13B, and the half of the maximum writing position shift amount between the beam 1 by the first LD 2 and the beam 2 by the second LD 11 is reduced. To be. As a result, even if the timing is largely shifted, the difference can be reduced to 従 来 of the conventional timing, so that the possibility of image degradation can be minimized.

The calculation and instruction of the deviation amount are executed by the above-described main body control unit 51 and set in the first and second storage devices 3 and 8.

In addition, each unit not particularly described is configured and operates in the same manner as in the first, third and seventh embodiments.

As described in the seventh embodiment, in the first to eighth embodiments, the first and second LDs 2 and 11 are manufactured using the same lot or the same wafer. use. By doing so, the emission wavelengths of both are close to each other, and the writing position deviation due to chromatic aberration is reduced. By using this invention together with the present invention, it is possible to inspect all the products of each LD and select a set with uniform characteristics. Time and labor can be saved, and the number of steps in the assembly process can be significantly reduced.

[0069]

As is apparent from the above description, the image forming apparatus according to the present invention instructs the phase synchronization control device about the delay of the write clock, stores the delay amount, and stores the delay amount in the stored delay amount. A corresponding instruction signal is output from the phase delay control device to the phase synchronization control device, and the write position error is corrected. Since the write position can be shifted by delaying the phase of the write clock using the phase delay of this configuration, the write position shift can be corrected with a low-cost and small circuit scale.

According to the second aspect of the present invention, the phase delay control means outputs an instruction signal corresponding to the delay amount set in the DIP switch to the phase synchronization control means, and corrects the write position error. In addition, the unit can be easily replaced, and the serviceability can be improved.

According to the third aspect of the present invention, the phase delay control means for instructing the phase synchronization control means on the phase delay of the write clock, the input means for inputting the delay amount, and the storage for storing the delay amount. Means, and control means for storing the delay amount inputted by the input means in the storage means, wherein the phase delay control means sends an instruction signal corresponding to the delay amount stored in the storage means to the phase synchronization control means. Output, and the write position error is corrected.
Since the dot position shift correction value detected by the measurement is previously written on the sheet, and the dot position shift correction value written on this sheet is input from the input means, the dot position shift correction can be performed at low cost.

According to the fourth aspect of the present invention, the phase delay control means outputs the instruction signal a plurality of times and corrects the writing position error even in the image area. The writing position deviation can be corrected with a small circuit scale that is costly. Further, since the writing position can be shifted by an amount sufficiently smaller than one dot, it is possible to reduce the influence on the image even in the image area when correcting the writing position deviation.

According to the fifth aspect of the present invention, there is further provided image data analysis means, wherein the phase delay control means outputs an instruction signal based on the delay amount stored in the storage means and the input image data, Since the phase delay timing is controlled, the delay amount of the image is reduced, and the delay timing is determined in relation to the image, whereby the influence on the image can be further reduced as compared with the invention according to claim 4.

According to the sixth aspect of the invention, there is further provided a dispersion control means for dispersing the phase delay timing, and the dispersion control means disperses the phase delay timing. Since the portion is difficult to understand, the influence on the image can be further reduced as compared with the fourth aspect of the invention.

According to the seventh aspect of the present invention, there is further provided image processing means for performing predetermined image processing on input image data, wherein the image processing means sets a phase delay timing based on the input image data. Since the instruction is given, the image processing is combined to take into account the delay, so that the effect on the image can be further reduced as compared with the fourth aspect of the present invention.

According to the eighth aspect of the present invention, since the delay amount is set according to the write position shift amount due to the chromatic aberration between the laser diodes, the write position shift can be corrected with a small circuit scale at low cost. It can be suppressed to a level that is not recognized as image deterioration.

According to the ninth aspect of the present invention, the apparatus further includes a write leading synchronization detecting means and a trailing end synchronization detecting means, and the amount of deviation of the writing position is detected by the leading synchronization detecting means and the trailing synchronization detecting means in one line. Since the setting is made based on the difference between the two, the correction of claim 8 can be automatically performed.

According to the tenth aspect of the present invention, since a plurality of laser diodes manufactured using the same lot or the same wafer are used, all the laser diodes are inspected to form a set having uniform characteristics. The labor of selecting can be omitted, and the number of steps in the assembling process can be significantly reduced. Further, the number of bits of a storage device prepared for correction can be reduced, and image deterioration due to an increase in correction amount can be prevented.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a first embodiment of the present invention.

FIG. 2 is a timing chart showing timings selected by a basic write clock output from a basic write clock generator and a write clock phase synchronization control signal output from a phase synchronization control unit.

FIG. 3 shows a basic write clock and a write clock 1
4 is a timing chart showing the timing when the write clock is changed from write clock 1 to write clock 2;

FIG. 4 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a second embodiment of the present invention.

FIG. 5 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a third embodiment of the present invention.

FIG. 6 is a schematic diagram showing an overall mechanical configuration of an image forming apparatus according to each embodiment of the present invention.

FIG. 7 is a block diagram illustrating an overall electrical configuration of the image forming apparatus according to each embodiment of the present invention.

FIG. 8 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a fourth embodiment of the present invention.

FIG. 9 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a fifth embodiment of the present invention.

FIG. 10 is a block diagram illustrating details of an image writing unit of an image forming apparatus according to a sixth embodiment of the present invention.

FIG. 11 is a timing chart illustrating a writing shift due to chromatic aberration between LDs of an image forming apparatus according to a seventh embodiment of the present invention.

FIG. 12 is a diagram illustrating an optical scanning optical system of an image forming apparatus according to an eighth embodiment of the present invention.

FIG. 13 is a timing chart illustrating a writing shift due to chromatic aberration between LDs in an image forming apparatus according to an eighth embodiment of the present invention.

[Explanation of symbols]

 Reference Signs List 1 LD modulator (1) 2 LD (1) 3 Storage device (1) 3a DIPSW (1) 4 Phase delay control unit (1) 5 Phase synchronization control unit (1) 6 Basic write clock generator 7 Phase synchronization control unit (2) 8 storage device (2) 8a DIPSW (2) 9 phase delay control unit (2) 10 LD modulator (2) 11 LD (2) 51 main body control unit 81, 82 image analysis unit 91, 92 random control unit 1001 Image processing device 1211 Front end synchronization detection sensor 1221 Rear end synchronization detection sensor

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2C362 AA07 AA10 BA48 BA70 2H027 DA18 DE07 ED04 EE01 EE02 EE08 EF09 5C072 AA03 CA06 HA02 HA13 HB11 HB13 XA05 5C074 AA11 BB03 CC22 EE02 EE04 HH02 HH04

Claims (10)

[Claims] 1. A plurality of laser diodes, LD modulation means for controlling each laser diode, write clock generation means controlled to output a predetermined clock,
A synchronization signal control unit for generating a write synchronization signal; and a phase synchronization control unit for controlling a phase of a write clock for write alignment, and inputting an output signal from the synchronization signal control unit to the phase synchronization control unit. An optical writing unit that performs writing alignment of each beam by writing, and an image forming unit that visualizes an image written by the optical writing unit and forms an image on a sheet. Phase delay control means for instructing the phase synchronization control means of a clock phase delay; and storage means for storing a delay amount, wherein the phase delay control means is responsive to the delay amount stored in the storage means. An image forming apparatus which outputs the instruction signal to the phase synchronization control means to correct a writing position error. 2. A plurality of laser diodes, LD modulating means for controlling each laser diode, write clock generating means controlled to output a predetermined clock,
A synchronizing signal control unit for generating a write synchronizing signal, and a phase synchronizing control unit for controlling a phase of a write clock for writing alignment, and inputting an output signal from the synchronizing signal control unit to the phase synchronizing control unit. An optical writing unit that performs writing alignment of each beam by writing, and an image forming unit that visualizes an image written by the optical writing unit and forms an image on a sheet. A phase delay control unit for instructing the phase synchronization control unit on a phase delay of a clock; and a dip switch for setting a delay amount, wherein the phase delay control unit sets the delay amount set in the dip switch to Outputting a corresponding instruction signal to the phase synchronization control means to correct a write position error. Image forming apparatus. 3. A plurality of laser diodes, LD modulating means for controlling each laser diode, write clock generating means controlled to output a predetermined clock,
A synchronizing signal control unit for generating a write synchronizing signal, and a phase synchronizing control unit for controlling a phase of a write clock for writing alignment, and inputting an output signal from the synchronizing signal control unit to the phase synchronizing control unit. An optical writing unit that performs write alignment of each beam by writing, and an image forming unit that visualizes an image written by the optical writing unit and forms an image on a sheet. Phase delay control means for instructing the phase synchronization control means of a clock phase delay; input means for inputting a delay amount; storage means for storing the delay amount; and the delay amount input by the input means And control means for storing in the storage means, wherein the phase delay control means stores An instruction signal corresponding to output to the phase synchronization control means, the image forming apparatus and correcting a writing position error. 4. The apparatus according to claim 1, wherein said phase delay control means outputs said instruction signal a plurality of times to correct said writing position error even in an image area.
The image forming apparatus according to claim 1. 5. The apparatus according to claim 1, further comprising an image data analysis unit, wherein the phase delay control unit outputs the instruction signal based on the amount of delay stored in the storage unit and the input image data, and adjusts the phase delay timing. The image forming apparatus according to claim 4, wherein the control is performed. 6. The image forming apparatus according to claim 5, further comprising a distribution control unit that distributes the phase delay timing, wherein the distribution control unit distributes the phase delay timing. 7. An image processing apparatus further comprising image processing means for performing predetermined image processing on input image data, wherein the image processing means indicates the phase delay timing based on the input image data. The image forming apparatus according to claim 5, wherein 8. The image forming apparatus according to claim 3, wherein the delay amount is set according to a writing position shift amount due to chromatic aberration between the laser diodes. 9. A writing head synchronization detecting means and a trailing edge synchronization detecting means, wherein the writing position deviation amount is based on a difference between detection times of the one-line leading edge synchronization detecting means and the trailing edge synchronization detecting means. The image forming apparatus according to claim 8, wherein the setting is set. 10. The laser diode according to claim 1, wherein the plurality of laser diodes are manufactured from the same lot or from the same wafer. Image forming device.