JP2002215066A5 - - Google Patents
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- JP2002215066A5 JP2002215066A5 JP2001010576A JP2001010576A JP2002215066A5 JP 2002215066 A5 JP2002215066 A5 JP 2002215066A5 JP 2001010576 A JP2001010576 A JP 2001010576A JP 2001010576 A JP2001010576 A JP 2001010576A JP 2002215066 A5 JP2002215066 A5 JP 2002215066A5
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- light shielding
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- shielding film
- optical device
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Description
【発明の名称】電気光学装置及びプロジェクタPatent application title: Electro-optical device and projector
Claims (15)
前記第1基板上に、画素電極と、該画素電極に接続された薄膜トランジスタと、該薄膜トランジスタに接続されており前記薄膜トランジスタの上側に配置されると共に前記薄膜トランジスタのチャネル隣接領域、ソース領域及びドレイン領域のうち少なくとも一つに対向する領域に一の窓が開けられた配線と、前記薄膜トランジスタの少なくともチャネル領域を下側から覆う下側遮光膜とを備えており、
前記第2基板上に、前記一の窓を上側から覆う第1遮光膜を備えており、
前記第1遮光膜及び前記配線のうち少なくとも一方は、前記薄膜トランジスタの少なくとも前記チャネル領域を上側から覆うことを特徴とする電気光学装置。An electro-optical material is sandwiched between a pair of first and second substrates,
A pixel electrode, a thin film transistor connected to the pixel electrode, and a thin film transistor connected to the first substrate are disposed on the upper side of the thin film transistor and adjacent to a channel adjacent region, a source region and a drain region of the thin film transistor And a lower light shielding film covering at least a channel region of the thin film transistor from the lower side.
A first light shielding film is provided on the second substrate to cover the one window from the upper side,
At least one of the first light shielding film and the wiring covers at least the channel region of the thin film transistor from the upper side.
前記第1基板上に、画素電極と、該画素電極に接続された薄膜トランジスタと、該薄膜トランジスタに接続された配線と、前記薄膜トランジスタの上側に配置されており各画素の非開口領域を少なくとも部分的に規定すると共に前記薄膜トランジスタのチャネル隣接領域、ソース領域及びドレイン領域のうち少なくとも一つに対向する領域に一の窓が開けられた内蔵遮光膜と、前記薄膜トランジスタの少なくともチャネル領域を下側から覆う下側遮光膜とを備えており、
前記第2基板上に、前記一の窓を上側から覆う第1遮光膜を備えており、
前記第1遮光膜及び前記内蔵遮光膜のうち少なくとも一方は、前記薄膜トランジスタの少なくとも前記チャネル領域を上側から覆うことを特徴とする電気光学装置。An electro-optical material is sandwiched between a pair of first and second substrates,
A pixel electrode, a thin film transistor connected to the pixel electrode, a wire connected to the thin film transistor, and an upper side of the thin film transistor are disposed on the first substrate at least partially A built-in light shielding film having a window opened in a region adjacent to at least one of a channel adjacent region, a source region and a drain region of the thin film transistor, and a lower side covering at least a channel region of the thin film transistor And a light shielding film,
A first light shielding film is provided on the second substrate to cover the one window from the upper side,
At least one of the first light shielding film and the built-in light shielding film covers at least the channel region of the thin film transistor from above.
前記第1遮光膜を構成する帯状部分の幅は、前記内蔵遮光膜を構成する帯状部分の幅よりも狭いことを特徴とする請求項2から4のいずれか一項に記載の電気光学装置。Each of the built-in light shielding film and the first light shielding film includes a plurality of strip portions,
The electro-optical device according to any one of claims 2 to 4, wherein a width of a band-shaped portion constituting the first light shielding film is narrower than a width of a band-shaped portion constituting the built-in light shielding film.
前記帯状部分の幅は、前記配線の幅よりも狭いことを特徴とする請求項1から7のいずれか一項に記載の電気光学装置。The first light shielding film includes a plurality of strip portions extending along the wiring,
The electro-optical device according to any one of claims 1 to 7, wherein a width of the strip portion is narrower than a width of the wiring.
前記窓は、該コンタクトホール開孔領域にも開けられていることを特徴とする請求項1から10のいずれか一項に記載の電気光学装置。Each of a part of the source region and a part of the drain region is a contact hole open area,
The electro-optical device according to any one of claims 1 to 10, wherein the window is also opened in the contact hole opening area.
前記チャネル領域の上側にゲート絶縁膜を介してゲート電極が配置されていることを特徴とする請求項1から11のいずれか一項に記載の電気光学装置。The window is not open in the area opposite the channel area,
The electro-optical device according to any one of claims 1 to 11, wherein a gate electrode is disposed above the channel region via a gate insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001010576A JP3729071B2 (en) | 2001-01-18 | 2001-01-18 | Electro-optical device and projector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001010576A JP3729071B2 (en) | 2001-01-18 | 2001-01-18 | Electro-optical device and projector |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2002215066A JP2002215066A (en) | 2002-07-31 |
JP2002215066A5 true JP2002215066A5 (en) | 2004-12-24 |
JP3729071B2 JP3729071B2 (en) | 2005-12-21 |
Family
ID=18877862
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2001010576A Expired - Fee Related JP3729071B2 (en) | 2001-01-18 | 2001-01-18 | Electro-optical device and projector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP3729071B2 (en) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4021392B2 (en) * | 2002-10-31 | 2007-12-12 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
JP5258277B2 (en) | 2006-12-26 | 2013-08-07 | 株式会社半導体エネルギー研究所 | Liquid crystal display |
-
2001
- 2001-01-18 JP JP2001010576A patent/JP3729071B2/en not_active Expired - Fee Related
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