JP2002197052A - Bus mode switchable communication equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide communication equipment which serves as a master or a slave according to the volume of data to be communicated. SOLUTION: When an internal memory 101 has sufficient capacity for data to be communicated, the mode is switched to a slave mode and the internal memory 101 is used; when data exceeding the capacity of the internal memory 101 are communicated, the mode is switched to a master mode and an external memory 120 can be used, thus one LSI can serve as either of the master and slave and is usable for an equipment incorporated system where data communicated to a CPU 110 are shared without being affected by the data capacity nor the state of a bus.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication device used for a mobile communication system or the like, and more particularly, to a communication device for controlling a shared memory for storing communication data.

[0002]

2. Description of the Related Art Conventionally, as a method for controlling a shared memory for storing communication data in a communication device, a device or a LSI having a function to become a bus master is used, and an external memory connected to a bus is shared with a CPU. And a system using a slave type device or an LSI having a built-in memory.

FIG. 2 is a block diagram of a communication device having a function of becoming a bus master.
210 shares an external memory 220 for storing communication data via a data bus and an address bus. In order for the communication device 200 to access the external memory 220, the arbitration control circuit 202 outputs a bus right request signal and acquires a bus right by receiving a bus right release signal. As a result, the communication device 200 becomes a bus master, and the communication device 200
Are valid for the external memory 220.

[0004] The method of sharing an external memory shown in FIG. 2 is useful when a large amount of data is communicated at a high speed.
For example, it is suitable for a case where image data is read / written from / to a memory by a personal computer via a PCI bus. On the other hand, there is a problem that the system becomes complicated due to the provision of the external memory, and a bus right must be acquired in order to perform data communication, and it takes time to establish communication.

FIG. 3 is a block diagram of a slave type communication device having a built-in memory.
U310 is connected to each other by a data bus and an address bus, and data transfer is controlled by a handshake method. The arbitration control circuit 302 controls arbitration between access from the CPU 310 to the internal memory 301 and access from the communication device 300 itself.

The method using the built-in memory shown in FIG.
When a small amount of data is communicated at a relatively low speed, the built-in memory is also required to have a small capacity. For example, in the case of a mobile communication system, a PIAFS card-type modem that communicates at a speed of 32 kbps or 64 kbps, etc. Is preferred. On the other hand, there is a problem that the communication device becomes expensive due to the built-in memory.

[0007]

When performing data communication, one of the methods shown in FIGS. 2 and 3 is selected according to the nature of the data to be communicated. In this case, there is no problem when the amount of data to be communicated is fixed, but a problem arises when the amount of data to communicate varies depending on the number of connected devices such as a USB host.

That is, when data communication is performed by the method shown in FIG. 2, when the amount of data is small, there is a problem that not only the external memory is not effectively used, but also it takes time to establish communication. On the other hand, when performing data communication by the method shown in FIG. 3, when the data amount is large, there is a problem that communication data cannot be stored in the internal memory.

The present invention solves the above-mentioned conventional problems, and makes it possible to select a large-capacity shared memory or a small-capacity built-in memory according to the nature of data to be communicated. It is another object of the present invention to provide a communication device capable of switching between bus modes of a bus master and a slave type according to the amount of data to be communicated.

[0010]

A communication device capable of switching bus modes according to the present invention is a communication device (communication device 100) for processing communication data via a bus, and a built-in memory (communication device) for storing the communication data. Communication data control means (arbitration control circuit 102) for switching the bus mode for the arbitration control of the bus according to the nature of the communication data to control the path of the communication data. When the communication data control means is switched to the master mode as the bus mode, an external memory (external memory 120) connected to the bus and having a larger capacity than the internal memory is used as a memory for storing the communication data. When the selected mode is switched to the slave mode as the bus mode, the internal memory is selected as the storage memory for the communication data. And wherein the door.

According to the communication device capable of switching the bus mode of the present invention, when a small amount of data is communicated depending on the system specifications, or when it is not necessary to become a bus master because there is already an arbitration control circuit of another bus master. If you select the slave mode and use the built-in memory to perform large-capacity data communication exceeding the built-in memory, select the master mode and use an external shared memory to improve the characteristics of the data to be communicated. The processing mode can be changed accordingly.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a communication device capable of switching between bus modes according to an embodiment of the present invention.

In FIG. 1, a communication device 100 capable of switching a bus mode according to the present invention comprises an external memory 1 and a CPU 100 connected by a data bus and an address bus.
20 is shared, a bus right is acquired by a bus right request signal and a bus right release signal, and communication is established.

The communication device 100 includes a built-in memory 101, an arbitration control circuit 102 for controlling a path of communication data in a master mode and a slave mode, and means for accessing the external memory 120 and the built-in memory 101 (DM).
A) 103 and a bus mode switching terminal 104 are provided.
The switching terminal 104 is supplied with an output signal (for example, the logic level is H in the master mode and the logic level is L in the slave mode) of the external bus mode switching circuit 130 for switching between the master mode and the slave mode. The arbitration control circuit 102 is controlled based on.

The arbitration control circuit 102 controls the bus in response to a bus right request signal, a bus right release signal, and a handshake signal in accordance with the bus mode, and controls the path of communication data inside the communication device 100. In particular, the external memory 120 is selected as a communication data storage memory in the master mode in which the communication device 100 becomes a bus master when communicating a large amount of data, and the built-in memory 101 is used as the communication device 1 when communicating a small amount of data.
00 is selected as a memory for storing communication data in the slave mode in which the slave is set to 00.

The operation of the communication device configured as described above will be described below by taking as an example a case where the communication device is applied to a USB host. The communication device used for the USB host greatly differs in the amount of data to be communicated depending on the number of connected devices. U
The SB host can communicate with up to 128 devices according to the standard.

If the communication data is small or the connected devices are limited and processing can be performed within the capacity of the built-in memory, as in the case of use in a portable terminal or data communication, the bus mode switching terminal 104 is connected. The internal memory is used by fixing the slave mode (logic level L). At this time, the arbitration control circuit 102 suppresses the bus right control signals (the bus right request signal and the bus right release signal) (makes them high impedance), performs communication with the CPU 110 using the handshake signal, and transmits the communication data. The communication data path is controlled so that the internal memory 101 is used as the storage memory.

On the other hand, when the number of connected devices reaches the maximum number of the USB standard, such as when used in a personal computer, or when the capacity of communication data exceeds the capacity of the built-in memory, the bus mode switching terminal 104 is set. The external memory 120 is used while being fixed at the master mode (logic level H). At this time, the arbitration control circuit 102 gives the CPU 1 a bus right for accessing the external memory 120 by a bus right control signal (a bus right request signal and a bus right release signal).
Obtain from 10.

When the communication device 100 becomes a bus master, the chip select signal nCS1 from the CPU 110 to the communication device 100 and the chip select signal nCS2 to the external memory 120 are used independently, and when the communication device 100 becomes a slave, Since the register of the slave of the communication device 100 and the internal memory 101 can be continuously allocated, the chip select signal nCS1 is commonly used. As a result, the control software in each case can respond to the bus mode change with the minimum change that only changes the memory arrangement.

As described above, according to the communication apparatus of the present embodiment, one LSI can easily become both a bus master and a slave. Irrespective of the amount of data and the configuration of the bus, one LSI can cope with the problem.

In the illustrated example, the bus mode switching for selecting the master mode or the slave mode is realized by inputting the signal of the external bus mode switching circuit to the bus mode switching terminal. However, the present invention is not limited to this. For example, another control signal may be input to the bus mode switching terminal, the bus mode switching terminal may not be provided, and the bus mode switching terminal may be made programmable, or may be dependent on a reset state. May be.

[0022]

As described above, according to the present invention,
Since one communication device can be either a bus master or a slave, select the slave mode if the amount of data to be communicated is sufficient with the internal memory capacity, and use the master mode if the amount of data exceeding the internal memory capacity is to be communicated. Can be selected for communication, and in a device-embedded system that shares communication data with the CPU, one communication device can be handled regardless of the amount of communication data or the bus configuration. Also, the control software at that time can be handled with a minimum change according to the change of the bus mode.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a communication device capable of switching a bus mode according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional communication device having a built-in bus master function.

FIG. 3 is a block diagram illustrating a configuration of a conventional communication device of a slave type having a built-in memory.

DESCRIPTION OF SYMBOLS 100 Communication device 101 Internal memory 102 Arbitration control circuit 103 DMA 104 Bus mode switching terminal 110 CPU 120 External memory 130 Bus mode switching circuit

Claims (2)

[Claims] 1. A communication device for processing communication data via a bus, comprising: a built-in memory for storing the communication data; and a bus mode for arbitration control of the bus, which is switched according to a property of the communication data. Communication data control means for controlling a path of the communication data, wherein when the communication data control means is switched to the master mode as the bus mode, from the built-in memory connected to the bus A bus mode, wherein a large-capacity external memory is selected as the communication data storage memory, and when the bus mode is switched to the slave mode, the built-in memory is selected as the communication data storage memory. Switchable communication device. 2. An integrated circuit comprising the communication device capable of switching between bus modes according to claim 1.