JP2002190545A - High-frequency integrated circuit device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture an integrated circuit device wherein the deterioration of the performance of its circuit generated due to dielectrics can be reduced and its reliability relative to physical shocks is also made high. SOLUTION: In the integrated circuit device, a semiconductor chip 103 is subjected to flip-chip mounting on the surface of a wiring board 110, so as to joint it mechanically to the wiring board 110 by using an insulating bonding agent 104. In the wiring board 110, there is formed a cavity region 106, having such a shape/dimension that the insulating bonding agent will not penetrate to reach active circuits 10f7 provided in the semiconductor chip 103.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit device manufactured using flip-chip mounting, and more particularly to a high-frequency integrated circuit device for high frequencies in microwave and millimeter wave bands.

[0002]

2. Description of the Related Art Flip chips for connecting electrodes to each other in a state where the surface of a semiconductor chip provided with an integrated circuit is opposed to a wiring board (hereinafter, this state may be simply referred to as "face down"). The implementation is widely known.
This flip-chip mounting has an excellent property that the area occupied by the mounting can be reduced as compared with wire bonding mounting in which an integrated circuit is bonded using wires. In addition, a circuit formed by flip-chip mounting can prevent a signal waveform from being disturbed by wire inductance generated in wire bonding mounting, particularly when a high frequency in a microwave or millimeter wave band is targeted.

FIGS. 7A to 7G show a conventional flip-chip mounting method for connecting a semiconductor chip on which bump electrodes are formed face down to a wiring board. FIG.
7A to 7G are cross-sectional views of the semiconductor chip 1, the conductive adhesive container 5, and the wiring board 6 in the order of steps.

In the conventional flip chip mounting method, first, as shown in FIG. 7A, a projection electrode 2 is provided on an electrode 3 provided on a surface of a semiconductor chip 1 provided with an integrated circuit.
(Hereinafter sometimes referred to as “stud bumps”). The protruding electrode 2 is formed by applying ball bonding, which is a type of wire bonding. According to this ball bonding, a gold wire having a diameter of about 15 to 30 μm is connected to the electrode 3 provided on the surface of the semiconductor chip 1 by using an ultrasonic wave, and then the gold wire is cut to form the protruding electrode 2. Is formed.

Next, as shown in FIGS. 7 (b) to 7 (d), in order to connect the semiconductor chip 1 to a wiring board 6, which will be described later, conductive electrodes are formed on the projecting electrodes 2 formed on the semiconductor chip 1. The adhesive 4 is supplied. In the step of supplying the conductive adhesive 4, first, the conductive adhesive 4 is supplied to the conductive adhesive container 5 in which a groove lower than the height of the protruding electrode 2 is formed (see FIG. 7B )). Next, the protruding electrode 2 provided on the semiconductor chip 1 is immersed in the conductive adhesive 4 supplied to the groove of the conductive adhesive container 5 (FIG. 7C). Then, the conductive adhesive 4 is transferred to the projecting electrode 2 by pulling up the projecting electrode 2 from the groove of the conductive adhesive container 5 (FIG. 7D).

Next, the semiconductor chip 1 provided with the protruding electrodes 2 to which the conductive adhesive 4 has been transferred in the above process is opposed to the wiring board 6, and both are electrically and mechanically connected.

First, the surface of the semiconductor chip 1 provided with the bump electrodes 2 to which the conductive adhesive 4 has been transferred is opposed to the wiring board 6 (FIG. 7E). At this time, when the protruding electrodes 2 provided on the surface of the semiconductor chip 1 are viewed from a direction perpendicular to the surface of the semiconductor chip 1, the projected electrodes 2 are in projection coordinates with the metal wiring layer 7 provided on the surface of the wiring board 6. Adjust the position so that they overlap. After this position adjustment, the semiconductor chip 1 is placed on the metal wiring layer 7 of the wiring substrate 6 by using a reflow process or the like.
Are flip-chip connected, and heating is performed to cure the conductive adhesive 4 (FIG. 7F). Next, the wiring board 6
In order to strengthen the connection between the semiconductor chip 1 and the chip-shaped semiconductor chip 1,
The sealing member 9 is supplied to the gap between the wiring substrate 6 and the semiconductor chip 1 by using the sealing member holding container 8, and the supplied sealing member 9 is provided.
Is cured by heating (FIG. 7 (f)). The sealing member 9
It penetrates into the gap between the wiring board 6 and the semiconductor chip 1 by a capillary phenomenon. As described above, the mounting using the conventional flip chip is completed.

[0008]

The above-described flip-chip mounting method is widely used as a method of manufacturing an integrated circuit which has already been commercialized. However, circuits that handle electromagnetic waves in the high frequency band of microwaves or higher, especially 30 GH
High-frequency integrated circuit devices that handle electromagnetic waves in the millimeter-wave band of z or more have the following problems.

In general, an integrated circuit device is manufactured not on the assumption that flip-chip mounting is performed face down, but on the assumption that wire bonding mounting is performed face up. That is,
2. Description of the Related Art A conventional integrated circuit device is manufactured on the assumption that a semiconductor chip is die-bonded to a wiring board, and then a gold or aluminum wire is used to connect an electrode of the semiconductor chip to a transmission line of the wiring board. Therefore, no special consideration is given to the effect of the physical properties of the sealing member used for flip-chip mounting on the circuit module (integrated circuit device). Since this sealing member is an insulator material, it has inherent physical properties such as a dielectric constant and a dielectric loss. A circuit module that handles electromagnetic waves in a relatively low frequency band can be treated as a lumped constant circuit because the dimensions of the transmission line in the circuit module are so small as to be negligible compared to the wavelength. In this lumped constant circuit, there is no need to consider the frequency characteristics of active circuit elements such as amplifiers.
In addition, the passive circuit element is also configured using a resistor, a capacitor, an inductance component, and the like. Therefore, when dealing with electromagnetic waves in a relatively low frequency band, the physical properties of the sealing member are:
It has no effect on circuit modules fabricated using flip-chip mounting, or has only a negligible effect on circuit modules.

However, a high-frequency circuit for handling electromagnetic waves in a high-frequency band of microwaves or higher (especially a millimeter-wave band of 30 GHz or higher) is treated as a lumped constant circuit because the size of the transmission line in the circuit module cannot be ignored compared to the wavelength. I can't do that. That is, a lumped constant element cannot be used in the high frequency circuit. Therefore, it is necessary to treat the electromagnetic wave on the transmission line in the circuit module as a wave in which a change in voltage and current with time and a change in position on the transmission line occur simultaneously. As a result, when dealing with electromagnetic waves in a high frequency band higher than microwaves, the waveform of the electromagnetic waves is disturbed by the physical properties of the insulating interlayer film around the transmission line and the dielectric material of the sealing member. In the module, performance loss such as loss of gain or change in frequency characteristics occurs.

FIG. 7 () shows a method of manufacturing an integrated circuit for handling electromagnetic waves in a high frequency band such as a microwave band or a millimeter wave band by using flip-chip mounting while preventing the disturbance of the waveform of the electromagnetic wave due to the influence of the sealing member. In the steps shown in FIGS. 7A to 7G, there is a method in which the step of supplying the sealing member is omitted, and the bonding is performed only by the adhesive force generated by curing the conductive adhesive. However, bonding using only the adhesive force generated by curing the conductive adhesive has poor reliability against physical impact force, and thus has a problem that the long-term reliability of the circuit module is deteriorated.

Another method for manufacturing an integrated circuit that handles electromagnetic waves in a high frequency band such as a microwave band or a millimeter wave band by using flip-chip mounting while preventing disturbance of the waveform of electromagnetic waves due to the influence of a sealing member. A protruding electrode is formed on the surface of the semiconductor chip by plating, and the protruding voltage is formed by the plating on the semiconductor chip and the wiring substrate at 250 ° C. to 350 ° C.
There is a method of performing flip-chip mounting by applying pressure while heating to ° C. to cause metal diffusion bonding between the protruding electrode and the wiring on the wiring board. In this method, the semiconductor chip and the wiring substrate are joined only by metal diffusion bonding between the protruding electrode and the wiring on the wiring substrate without using a sealing member. Since the bonding force of the metal diffusion bonding is generally stronger than the bonding force generated when the conductive adhesive is cured, it is possible to ensure the reliability of the circuit module with respect to the physical impact force. However, in the method of coupling only by metal diffusion bonding, when the wiring on the wiring board is a multilayer structure line using an organic material as an interlayer insulating film, the interlayer insulating film of the organic material is deteriorated by heating and is pressed by pressure. The problem of deformation occurs.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and is capable of reducing the performance degradation of a circuit due to a dielectric substance and producing an integrated circuit device having high reliability against physical shock. It is an object of the present invention to provide a chip mounting method and an integrated circuit device manufactured by the flip chip mounting method.

[0014]

According to a high frequency integrated circuit device of the present invention, a wiring board having a metal wiring layer provided on a surface thereof, and a main surface provided with an integrated circuit facing the surface of the wiring board. A flip-chip mounted semiconductor chip, and an insulating adhesive supplied between the wiring board and the semiconductor chip to mechanically join the wiring board and the semiconductor chip, A configuration is adopted in which a cavity region is formed at a position on the substrate facing the integrated circuit, the cavity region having a depth that prevents the insulating adhesive from entering the position.

According to this configuration, since the cavity region functions as a dielectric for the integrated circuit, the dielectric loss of the integrated circuit can be reduced. In addition, since the wiring board and the semiconductor chip are joined using the insulating adhesive, the reliability against physical impact can be improved.

The high-frequency integrated circuit device according to the present invention employs a configuration in which the depth of the cavity region is determined according to the viscosity and density of the insulating adhesive. According to this configuration, it is possible to reliably prevent the insulating adhesive from entering due to the capillary phenomenon.

According to the high frequency integrated circuit device of the present invention, in the above high frequency integrated circuit device, the depth of the hollow region is 50 μm.
The configuration described above is adopted. According to this configuration, the hollow region has a sufficient depth that does not cause the capillary phenomenon, and the invasion of the insulating adhesive can be reliably prevented. Also,
Since a sufficient distance from the wiring board can be obtained, it is possible to prevent the occurrence of dielectric loss due to the wiring board.

The high-frequency integrated circuit device according to the present invention employs the high-frequency integrated circuit device according to the above-described high-frequency integrated circuit device, wherein the insulating adhesive is provided with a ventilation hole for discharging gas present in the hollow region to the outside air. According to this configuration, it is possible to prevent the gas such as air existing in the hollow region from expanding during the heat treatment performed at the time of mounting, thereby preventing the circuit from being damaged.

The high-frequency integrated circuit device according to the present invention employs a configuration in which, in the high-frequency integrated circuit device described above, the insulating adhesive is supplied to a portion other than the transmission line provided on the surface of the wiring board. According to this configuration, since the insulating adhesive does not come into contact with the transmission line, dielectric loss generated in the transmission line by the insulating adhesive can be reduced.

The high-frequency integrated circuit device of the present invention has a configuration in which the integrated circuit provided on the surface of the semiconductor chip is a microwave monolithic integrated circuit or a millimeter-wave monolithic circuit. According to this configuration, it is possible to reduce the occurrence of dielectric loss in a circuit intended for a high frequency band.

A communication terminal device according to the present invention employs a configuration including the above-described high-frequency integrated circuit device. The base station apparatus of the present invention
A configuration including the high-frequency integrated circuit device is adopted. A wireless measurement device of the present invention employs a configuration including the high-frequency integrated circuit device. According to these configurations, a highly reliable communication terminal device, base station device, and radar device can be manufactured.

In the method of mounting a semiconductor chip according to the present invention, a step of forming a hollow area in a wiring board and a step of positioning a semiconductor chip having an integrated circuit on a main surface so that the integrated circuit faces the hollow area. Flip-chip mounting together, and providing an insulating adhesive between the wiring substrate and the semiconductor chip, wherein the cavity region prevents the insulating adhesive from entering. It had a depth.

According to this method, since the cavity region functions as a dielectric for the integrated circuit, the dielectric loss of the integrated circuit can be reduced. In addition, since the wiring board and the semiconductor chip are joined using the insulating adhesive, the reliability against physical impact can be improved.

The method for mounting a semiconductor chip according to the present invention is the method for mounting a semiconductor chip according to the above method, wherein the dry etching is performed under the condition that high-density plasma having a degree of vacuum exceeding 10 ⁻¹¹ cm ⁻³ is generated using a multi-spiral coil. As a result, a cavity region is formed in the wiring board. According to this method, a uniform cavity region can be formed with high accuracy.

According to the semiconductor chip mounting method of the present invention, the semiconductor chip mounting method further comprises a step of irradiating the insulating adhesive provided between the wiring substrate and the semiconductor chip with ultraviolet rays. did. According to this method, after supplying the insulating adhesive between the wiring board and the semiconductor chip, the insulating adhesive can be cured by immediately irradiating ultraviolet rays. Intrusion can be prevented.

[0026]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The gist of the present invention is a high-frequency integrated circuit device in which a semiconductor chip is flip-chip mounted on a surface of a wiring board and the wiring board and the semiconductor chip are joined using an insulating adhesive. Is to form a cavity region having a shape / size in which the insulating adhesive does not penetrate to the position where the integrated circuit is provided.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. (Embodiment 1) FIG. 1 shows a part of an integrated circuit device manufactured by using a flip-chip mounting method according to Embodiment 1 of the present invention. FIG. 1A is a top view of the integrated circuit viewed from a direction perpendicular to the surface of the wiring board 110 (above FIG. 1B), and FIG. 1B is a diagram of the integrated circuit shown in FIG.
FIG. 3 is a sectional view taken along line AA ′ shown in FIG. In FIG. 1A, an invisible portion is indicated by a dotted line.

As shown in FIG. 1B, the wiring board 110
A cavity region 106 is formed on the surface of the substrate. On the surface of the wiring board 110, a transmission line 101 and a metal wiring layer 102 serving as a ground electrode are provided. As the transmission line 101, for example, a coplanar line is used. Note that the transmission line 101 is not limited to a coplanar line, and a microstrip line or the like can be used. The semiconductor chip 103 is formed in a substantially rectangular parallelepiped. On the main surface of the semiconductor chip 103, for example, an active circuit 107 is provided as an integrated circuit. The semiconductor chip 103 is disposed so that its main surface faces the surface of the wiring board 110, and the active circuit 107 is aligned with the cavity area 106 formed in the wiring board 110 so as to face the wiring board 110. Flip chip mounting. Semiconductor chip 10
3 is provided on the electrode 108 provided on the main surface of the conductive adhesive 1.
The projection electrode 105 to which the image 09 is transferred is formed. The semiconductor chip 103 is connected to the metal wiring layer 102 provided on the wiring substrate 110 via the electrodes 108 and the protruding electrodes 105. Further, the semiconductor chip 103 is formed on the metal wiring layer 102 (wiring substrate 110) by using the insulating adhesive 104.
Mechanically connected to

The protruding electrode 105 is formed by applying ball bonding which is a kind of wire bonding.
According to this ball bonding, the semiconductor chip 103
After connecting a gold wire having a diameter of about 15 to 30 μm using an ultrasonic wave on the electrode 108 provided on the main surface of the above, the protruding electrode 105 is formed by cutting the gold wire.

Although the protruding electrodes 105 and the metal wiring layers 102 are connected in FIG.
May be connected to the transmission line 101 of the wiring board 110 via the protruding electrode 105 and a conductive adhesive.

In the mounting state shown in FIG. 1B, most of the cavity area 106 formed in the wiring board 110 is occupied by air, so that the air acts as a dielectric for the active circuit 107. Air has zero dielectric loss
Therefore, the cavity region 106 has an effect of reducing dielectric loss generated in the circuit module.
To achieve this effect, the depth (thickness) of the cavity region 106 is required.
Is preferably about 100 μm or more including the height of the bump electrode. When the depth of the cavity region 106 cannot be made 100 μm or more only by the height of the protruding electrode 105, a sufficient depth can be obtained by forming the cavity region 106 on the substrate 110. Further, by providing the cavity region 106, the distance between the semiconductor chip 103 and the wiring substrate 110 is increased, and the insulating adhesive 104 is formed by a capillary phenomenon.
Can be prevented from entering the cavity region 106. Thereby, the active circuit 107 and the insulating adhesive 104
Is not in contact with the circuit, so that deterioration of circuit performance can be prevented. The depth of the cavity 106 is preferably such that the insulating adhesive 106 does not penetrate into the cavity 106 due to capillary action, and particularly preferably 50 μm or more.

The depth of the cavity 106 formed in the substrate 110 is determined by the insulating adhesive 104 and the active circuit 10.
The viscosity is determined in consideration of the viscosity (adhesive tension) and density of the insulating adhesive 104 so that the insulating adhesive 104 does not flow near 7. The above-mentioned depth of 100 μm or more, and 50 μm or more is an example,
It is not limited to this.

FIG. 1 shows two of the side surfaces of the semiconductor chip 103 in which the insulating adhesive 104 is formed in a substantially rectangular parallelepiped.
The case of supplying only to the surface is shown as an example. As a result, the cavity region 106 is connected to the outside air via the surface to which the insulating adhesive 104 has not been supplied. Therefore, in the heating step of curing the insulating adhesive 104, the hollow region 1
06 expands, the insulating adhesive 1
04 can be prevented from being partially or entirely pierced. In other words, a ventilation path is formed from the surface to which the insulating adhesive 104 has not been supplied to the cavity area 106, and when heat treatment is performed, gas existing in the cavity area 106 passes through this ventilation path to outside air. Is discharged.

The insulating adhesive 104 is used for the transmission line 1.
It is supplied to portions other than 01 (the portion of the metal wiring layer 102). Insulating adhesive 10 having dielectric loss on transmission line 101
This is to prevent dielectric loss and frequency characteristic deviation from occurring in the electromagnetic waves in the transmission line due to contact with the electromagnetic wave 4. In FIG. 1, the insulating adhesive 104 is supplied to the entire side surface of the semiconductor chip 103 formed in a substantially rectangular parallelepiped, but as shown in FIG. 2, along the side perpendicular to the main surface of the semiconductor chip 103. The same effect can be obtained even if the insulating adhesive 104 is supplied. The method of supplying the insulating adhesive described above is an example. The insulating adhesive 104 may be supplied so as not to seal the hollow area.

As the curing type of the insulating adhesive 104, an ultraviolet curing type or a type using both an ultraviolet curing type and a thermosetting type is desirable. By using these curing types, the insulating adhesive is cured or semi-cured by ultraviolet rays immediately after the insulating adhesive is formed on the side surface of the semiconductor chip 103, so that the insulating adhesive can be spread wet. Can be prevented. Thereby, the cavity region 106
The insulating adhesive 104 can be prevented from entering the surface of the active circuit 107 formed on the semiconductor chip 103.

In the circuit module of the present invention,
Since it is assumed that electromagnetic waves in a high frequency band higher than microwaves are handled, the semiconductor chip 103 includes, for example, a heterojunction bipolar transistor (HBT: Heterojunctio).
n bipolar transistor), Microwave monolithic integrated circui (MMIC)
t) or millimeter-wave monolithic integrated circuit (MMIC: Millime)
It is preferable to use a ter-wave monolithic integrated circuit) or the like. Note that a circuit applicable to the semiconductor chip 103 is not limited to the above-described circuit, and may be any circuit suitable for handling a high frequency of microwave or higher.

Further, in the flip chip mounting method in FIG. 1, the bump electrode 105 is formed by applying ball bonding. However, the present invention is not limited to this, and the bump electrode 105 is formed by plating or using solder balls. May be. Further, the connection between the protruding electrode 105 and the wiring board 110 may be performed by melting solder or using an anisotropic conductive resin. Further, the bump electrode 105 and the wiring substrate 110 may be directly joined by using heating or ultrasonic waves.

Next, the manufacturing process of the integrated circuit device having the above configuration will be described. First, the protruding electrode 105 is formed on the electrode 108 provided on the main surface of the semiconductor chip 103 provided with the active circuit 107. Next, in order to connect the semiconductor chip 103 to the wiring substrate 110, a conductive adhesive 104 is formed on the protruding electrodes 105 formed on the semiconductor chip 103. In addition, 10 ^-11 using a multi-spiral coil
cm ^{- 3} under conditions to produce a high-density plasma of a vacuum of greater than, subjected to dry etching to form an opening in the wiring substrate 110.

Next, in the above process, the conductive adhesive 1
The main surface of the semiconductor chip 103 provided with the projecting electrode 105 to which 04 has been transferred is made to face the wiring substrate 110. At this time, the active circuit 1 provided on the main surface of the semiconductor chip 103
07 is positioned so as to face the cavity region 106. After this alignment, using a reflow process or the like,
The semiconductor chip 103 is flip-chip connected to the metal wiring layer 102 provided on the wiring substrate 110, and heating is performed to cure the conductive adhesive 109. Next, an insulating adhesive 104 is supplied between the wiring substrate 110 and the semiconductor chip 103 in order to strengthen the connection between the wiring substrate 110 and the chip-shaped semiconductor chip 103 and increase the reliability of the circuit module against physical impact. Then, the supplied insulating adhesive 104 is heated and cured. As described above, the flip chip mounting according to the present embodiment is completed.

As described above, according to the present embodiment, the semiconductor chip 1 is mounted on the wiring substrate 110 in which the cavity region 106 is formed.
03 is bonded face down, and the wiring board 110 and the semiconductor chip 103 are mechanically bonded by the insulating adhesive 104, so that the reliability against physical impact is high and the high frequency characteristics of the circuit module are not disturbed. A circuit device (circuit module) can be manufactured.

(Embodiment 2) FIG. 3 is a cross-sectional view showing a part of an integrated circuit device manufactured by using a flip-chip mounting method according to Embodiment 2 of the present invention. FIG. 3 differs from the first embodiment in that cavity region 111 is formed penetrating wiring substrate 110.

Since most of the cavity region 111 provided in this way is occupied by air, the air functions as a dielectric for the active circuit 107 as in the first embodiment. Since the cavity region 111 is formed so as to penetrate the wiring board 110, the cavity region 106 has a sufficient depth so that air acts as a dielectric and does not cause loss to the circuit module. Further, the cavity region 111 has a depth sufficient to prevent the capillary phenomenon from occurring, and it is possible to prevent the insulating adhesive 104 from entering the cavity region 111. Further, since the semiconductor chip 103 and the wiring board 110 are mechanically joined by the insulating adhesive 104, reliability against physical impact is also ensured.

(Embodiment 3) FIG. 4 is a sectional view showing a part of an integrated circuit device manufactured by using a flip-chip mounting method according to Embodiment 3 of the present invention. 4 differs from the first embodiment in that cavity region 111 is formed penetrating wiring board 110 and wiring
The point is that the insulating film 112 is formed between the metal wiring layer 10 and the metal wiring layer 102.

Since the thickness of the insulating film 112 is extremely smaller than the thickness of the wiring board 110, the effect of the insulating film 112 as a dielectric in the structure of FIG. 4 can be ignored. For example, the thickness of the insulating film 112 is about 10 μm, and the thickness of the wiring board 110 is about 300 to 1000 μm.

In the cavity region 111 provided as described above, air functions as a dielectric for the active circuit 107 as in the first embodiment. As a result, the loss generated in the circuit module can be reduced.

(Embodiment 4) FIG. 5 is a sectional view showing a part of an integrated circuit device manufactured by using a flip-chip mounting method according to Embodiment 4 of the present invention. FIG. 5 differs from the first embodiment in that the metal wiring film provided on wiring substrate 110 has a multilayer structure.

As shown in FIG. 5, a first insulating film 502 is formed on the upper surface (front surface) of wiring substrate 110 according to the present embodiment.
A first metal wiring layer 501 serving as a ground electrode is formed between the first metal wiring layer 501 and the first metal wiring layer 501. In addition, a second insulating film 504 is formed on the upper surface of the first insulating film 502, and the second insulating film 504 is formed.
A second metal wiring layer 503 serving as a ground electrode is formed between the first metal wiring layer 503 and the first insulating film 502. Further, a third insulating film 506 is formed on the upper surface of the second insulating film 504, and a third metal wiring layer serving as a ground electrode is provided between the third insulating film 506 and the second insulating film 504. 505 are formed. A fourth metal wiring layer 507 is formed on the upper surface of the third insulating film 506. Thus, the transmission line of the wiring board 110 has a multilayer structure. still,
In this specification, the first insulating film 502, the second insulating film 504, and the third insulating film 506 may be referred to as an interlayer insulating film.

The first metal wiring layer 501 shown in FIG.
The metal wiring layer 503, the third metal wiring layer 505, and the fourth metal wiring layer 507 are made of any of gold, silver, and copper noble metals in order to prevent conductor loss of electromagnetic waves on the transmission line. It is desirable to use these noble metals in combination.
Since these noble metals have lower electric resistance than aluminum generally used for semiconductor wiring, conductor loss can be reduced as compared with aluminum transmission lines.
The electrical resistance of the noble metal was 2.3 La 10 ^-6 Ω · cm for gold and 1.6 for Silver.
La 10 ^-6 Ω · cm, copper: 1.7 La 10 ^-6 Ω · cm, and the electrical resistance of aluminum is 2.7 La 10 ^-6 Ω · cm.

Since these precious metals alone have low adhesion to the interlayer insulating film, a base film is formed between the metal wiring layer and the interlayer insulating film. Thereby, the adhesion between the metal wiring layer and the interlayer insulating film can be improved, and highly reliable wiring can be formed. Any of titanium, chromium, and tungsten can be used for the base film, and a combination of these metals can also be used. The metal used for these underlayers has a lower conductivity (higher electrical resistance) than the aforementioned aluminum, but the underlayer is formed to be extremely thinner than a metal wiring layer using a noble metal (transmission line and ground electrode). Therefore, the conductor loss in the base film does not occur in an actual integrated circuit device (circuit module) or is negligible even if it occurs. The thickness of the above-described ground electrode is, for example, about 1 to 10 μm, and the thickness of the base film is, for example, about 0.02 to 0.05 μm.

By forming an intermediate layer made of platinum or palladium between the above-mentioned metal wiring layer and the above-mentioned base film, when heating is performed in the mounting process according to the present embodiment, The intermediate layer functions as a barrier layer that prevents alloying between the metal wiring layer and the underlying film. For example, when gold is used for the metal wiring layer and titanium is used for the base film without forming the intermediate layer, gold and titanium are alloyed at a relatively low temperature of 250 to 350 ° C. during the heating step. I will. In this case, the intermediate layer made of platinum or palladium functions as a barrier layer for preventing alloying of gold and titanium.

Further, by using an organic material such as polyimide or benzocyclobutene having a small dielectric loss even in a high frequency band as a material of the interlayer insulating film shown in FIG. 5, a decrease in the dielectric loss of the entire circuit module can be prevented. Dielectric loss of polyimide and benzocyclobutene is 1GHz
And tan δ: about 0.001.

Further, by forming a silicon oxide film or a silicon nitride film as a base film of the above-mentioned polyimide or benzocyclobutene with a thickness of about 0.02 to 0.05 μm,
The adhesion between the metal wiring layer and the polyimide film or benzocyclobutene film can be improved, and a highly reliable circuit module can be manufactured.

As described above, according to this embodiment, even when a semiconductor chip is flip-chip mounted on a wiring board having a multilayer structure with an interlayer insulating film, the interlayer insulating film is deteriorated by heating or deformed by pressing. An advantageous effect of not performing can be obtained.

(Embodiment 5) In this embodiment, a method for forming the cavity region 106 and the cavity region 111 in each of the above embodiments will be described.

The cavity region 106 shown in FIG. 1 and the cavity region 111 shown in FIGS. 3 and 4 can be formed by wet etching. However, in wet etching, it is conceivable that the environment and the human body are adversely affected. In wet etching, the processed shape may depend on the crystal orientation of the wiring substrate.

Therefore, processing is performed by dry etching using gas to reduce adverse effects on the environment and the human body, and to obtain a free processed shape independent of the crystal orientation of the wiring substrate. In order to perform the dry etching, a plasma etching apparatus is used in which a high frequency voltage is applied to a coil to generate plasma, and etching is performed using the generated plasma.

Incidentally, a generally used plasma etching apparatus has a low etching rate, so that a cavity region cannot be formed accurately. For example, in the etching using a reactive ion etching apparatus, the plasma density that can be generated is about 10 ⁻¹⁰ cm ⁻³ , and the substrate cannot be satisfactorily processed by recessing or penetrating. Therefore, in the present embodiment, a hollow region is formed by recessing or penetrating a wiring substrate using an inductively coupled plasma source capable of generating high-density plasma of about 10 ⁻¹² cm ⁻³ . In a plasma etching apparatus equipped with a general inductively coupled plasma source, it is difficult to perform uniform etching on a large-area substrate due to structural restrictions. Therefore, in this embodiment, the etching apparatus illustrated in FIG. 6 is used.

FIG. 6 is a schematic configuration diagram of a plasma etching apparatus provided with a multi-spiral coil and using an inductively coupled plasma source as a plasma source. In FIG. 6, a quartz plate 603 is provided on an upper surface of an etching chamber 602 formed in a cylindrical shape, and an electrode 605 is provided on a bottom surface. This electrode 605 has several hundred k
An electrode 605 to which a high-frequency power source 606 for applying a high frequency of 13 Hz to 13.56 MHz is provided. A wiring substrate 607 for processing is provided on the upper surface of the electrode 605.

The quartz plate 603 is provided with a multi-spiral coil 601. The multi-spiral coil 601 is configured by electrically connecting a plurality of coils on a vortex whose one ends are grounded, respectively, in parallel. The multi-spiral coil 601 is connected to a high frequency power supply 604 via a matching circuit 608. High frequency power supply 60
4 applies a high frequency to the multi-spiral coil 601 via the matching circuit 608. Matching circuit 60
Numeral 8 matches the high frequency power applied by the high frequency power supply 604.

The operation in the case where the wiring substrate 607 is subjected to an etching process in the dry etching apparatus having the above configuration will be described. First, the electrode 60 in the etching chamber 602
The wiring substrate 607 is set on the substrate 5, and an etching gas is introduced into the etching chamber 602 from a gas supply unit (not shown). After the inside of the etching chamber 602 is evacuated to about 1 to 10 Pa using a vacuum exhaust system (not shown), a high frequency is applied to the multi-spiral coil 601 by the high frequency power supply 604. Thereby, high-density plasma of about 10 ⁻¹² cm ⁻³ is generated in the etching chamber 602.

As described above, according to the present embodiment, by using the multi-spiral coil 601, it is possible to obtain a higher ion saturation current density than a normal single spiral coil. In addition, since the multi-spiral coil is configured by connecting a plurality of coils on the vortex in parallel,
The inductance of the entire coil is lower than that of a single spiral coil, and is suitable for generating a large-area plasma. By using a plasma etching apparatus provided with such a multi-spiral coil 601, the wiring substrate 607 can be etched while ensuring uniformity.

In order to realize such etching, it is necessary to generate high-density plasma with a degree of vacuum exceeding at least 10 ⁻¹¹ cm ⁻³ .

The high-frequency integrated circuit device manufactured by using the flip-chip mounting according to the present invention is mounted on a communication terminal device, a base station device, and a radar device in a wireless communication system. Thereby, highly reliable communication terminal devices, base station devices, and radar devices (wireless measurement devices) can be manufactured.

[0064]

As described above, according to the present invention,
For the active circuit (integrated circuit) provided in the semiconductor chip, the cavity region functions as a dielectric, so that the dielectric loss of the integrated circuit can be reduced. Also, since the bonding between the wiring board and the semiconductor chip is performed using an insulating adhesive,
The reliability against physical impact can be improved.

Further, even when a semiconductor chip is flip-chip mounted on a wiring board having a multilayer structure with an interlayer insulating film, an advantageous effect that the interlayer insulating film is not deteriorated by heating or deformed by pressure is obtained. I can do it.

[Brief description of the drawings]

FIG. 1A is a top view of an integrated circuit device according to Embodiment 1 of the present invention. FIG. 1B is a cross-sectional view of the integrated circuit device according to Embodiment 1 of the present invention.

FIG. 2 is a top view of the integrated circuit device according to the first embodiment of the present invention in which an application portion of an insulating adhesive is changed.

FIG. 3 is a sectional view of an integrated circuit device according to a second embodiment of the present invention;

FIG. 4 is a sectional view of an integrated circuit device according to a third embodiment of the present invention;

FIG. 5 is a sectional view of an integrated circuit device according to a fourth embodiment of the present invention.

FIG. 6 is a schematic configuration diagram of a plasma etching apparatus according to a fifth embodiment of the present invention.

FIG. 7 is a diagram showing a mounting process of a conventional flip chip mounting.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Transmission line 102 Metal wiring layer 103 Semiconductor chip 104 Insulating adhesive 105 Projecting electrode 106, 111 Hollow area 107 Active circuit 108 Electrode 109 Conductive adhesive 110 Wiring board 112 Insulating film

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Takeharu Urabe 3-1, Tsunashimahigashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Inside Matsushita Communication Industrial Co., Ltd. (72) Inventor Shio Samukawa, Tsunashima-Higashiyoshi, Kohoku-ku, Yokohama, Kanagawa Prefecture Matsushita Communication Industrial Co., Ltd. (3-1) Matsushita Communication Industrial Co., Ltd. (72) Inventor Taku Fujita 4-3-1 Tsunashima Higashi, Kohoku-ku, Yokohama-shi, Kanagawa Prefecture Matsushita Communication Industrial Co., Ltd. (72) Inventor Kazuaki Takahashi Kohoku, Yokohama-shi, Kanagawa Prefecture 4-3-1 Tsunashima-ku, Ward Matsushita Communication Industrial Co., Ltd. F-term (reference) 5F044 LL07 LL11 QQ04 RR18 RR19

Claims (12)

[Claims] A wiring board having a metal wiring layer provided on a surface thereof; a semiconductor chip mounted by flip-chip such that a main surface on which an integrated circuit is provided is opposed to a surface of the wiring board; And an insulating adhesive that is supplied between the semiconductor chip and the wiring board and mechanically joins the wiring board and the semiconductor chip. The wiring board has a position facing the integrated circuit. A high-frequency integrated circuit device, wherein a cavity region having a depth that prevents the insulative adhesive from penetrating into the cavity is formed. 2. The high-frequency integrated circuit device according to claim 1, wherein the depth of the cavity region is determined according to the viscosity and density of the insulating adhesive. 3. The high-frequency integrated circuit device according to claim 1, wherein the depth of the cavity region is 50 μm or more. 4. The high-frequency integrated circuit device according to claim 1, wherein a ventilation hole is provided in the insulating adhesive to discharge gas present in the hollow region to the outside air. 5. The high-frequency integrated circuit device according to claim 1, wherein the insulating adhesive is supplied to a portion other than the transmission line provided on the surface of the wiring board. 6. The high-frequency integrated circuit according to claim 1, wherein the integrated circuit provided on the surface of the semiconductor chip is a microwave monolithic integrated circuit or a millimeter-wave monolithic circuit. apparatus. 7. A communication terminal device comprising the high-frequency integrated circuit device according to any one of claims 1 to 6. 8. A base station device comprising the high-frequency integrated circuit device according to claim 1. Description: 9. A wireless measuring device comprising the high-frequency integrated circuit device according to claim 1. Description: 10. A step of forming a cavity region in a wiring board, and a step of flip-chip mounting a semiconductor chip provided with an integrated circuit on a main surface thereof such that the integrated circuit faces the cavity region. And bonding the wiring substrate and the semiconductor chip by providing an insulating adhesive between the wiring substrate and the semiconductor chip, wherein the cavity region is formed of the insulating adhesive. A method for mounting a semiconductor chip having a depth for preventing intrusion. 11. Use of a multi-spiral coil for 10
^{11. The} method of mounting a semiconductor chip according to claim 10, wherein the hollow region is formed in the wiring board by performing dry etching under a condition for generating high-density plasma having a degree of vacuum exceeding ^-11 cm ^-3 . 12. The mounting of the semiconductor chip according to claim 10, further comprising a step of irradiating the insulating adhesive provided between the wiring board and the semiconductor chip with ultraviolet rays. Method.