JP2002158548A - Digital power amplifier - Google Patents

Abstract

PROBLEM TO BE SOLVED: To facilitate gain setting for greatly taking an average output sound pressure level in the average input signal level part of a digital power amplifier. SOLUTION: In the digital power amplifier, with which an audio frequency band signal S3 is inputted to a ΔΣ modulator 23, and this signal S3 is made into power switch control signal such as pulse density modulated signal S19 or PWM signal S11 via the ΔΣ modulator, capable of being supplied via a power LPF 6 to a speaker part 7, the operation of this ΔΣ modulator 23 is stabilized by a first signal limiter 25, provided on the prestage side of this ΔΣmodulator 23 and a second signal limiter 30 provided on the poststage side of this ΔΣmodulator 23 and the upper limit of the average signal level of this signal S3, capable of being inputted to the ΔΣ modulator 23 is increased, so that the reproducing output of this average signal level is improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital power amplifier constituted by a class D amplifier which is suitably applied to a case where switching control of a power amplification stage is performed.

[0002]

2. Description of the Related Art Conventionally, as a typical example of the digital power amplifier, a signal amplifier called a class D operation (class D operation) is used, in particular, at an audio frequency (audio frequency).
) It is known as one form of signal amplifier for band signals. In a typical example of the class D amplifier, as shown in FIG. 4A, a signal input terminal 1, a signal gain controller 2, a sampling frequency converter 3, a ΔΣ modulator 4, a power switch unit 5, and a power LPF (low The main part of this class D amplifier is constituted by a pass filter 6. Reference numeral 7 denotes a speaker for sound reproduction. In the following description, a PCM (pulse code modulation) signal obtained by sampling and quantizing an analog signal and encoding this quantized signal is referred to as a digital signal.
Signal conversion is referred to as digital signal conversion.

A digital audio frequency band signal S1 sampled at the same sampling frequency of 44.1 KHz as a CD (compact disc) is input to a signal input terminal 1 as shown in FIG. The digital audio frequency band signal S2 multiplied by the gain coefficient is input to a sampling frequency converter 3, and is sampled as an example via the converter 3. Digital audio frequency band signal S converted to a digital signal of a frequency of 2.8224 MHz (64 × 44.1 kHz)
3 is input to the ΔΣ modulator 4.

The ΔΣ modulator 4 comprises a signal adder 9, a signal integrator 10, a quantizer 11, a sample delay 12, and an input terminal 13 for a clock signal S13 as shown in FIG. 4B.
The output terminal 14 of the 1-bit pulse density modulation signal S4 constitutes a main part thereof. And this input terminal 1
3 is supplied with a clock signal S11 having a frequency of 2.8224 MHz synchronized with the sampling frequency signal of the digital audio frequency band signal S3, and these signal adders 9,.
Each operation of the sample delay 12 is executed while being locked to the clock signal S11.

The digital audio frequency band signal S3 inputted to the signal input terminal 8A is supplied to the positive input side of the signal adder 9 and supplied to the negative input side of the signal adder 9, which will be described later. A digital signal S8 having a difference value from the feedback signal S10 is generated via the signal adder 9, and is supplied from the output side of the signal adder 9 to the input side of the signal integrator 10.

The signal S9 integrated and generated via the signal integrator 10 is supplied to a quantizer 11,
1-bit quantization / encoding is performed via the quantizer 11, and the 1-bit pulse density modulation signal S 4 output from the quantizer 11 is supplied to the input side of the delay 12. The signal is converted into a feedback signal S10 delayed by one sample via the delay 12, and this feedback signal S10 is supplied to the negative input side of the signal adder 9, and is subtracted from the input signal S3 as described above.

The pulse density modulation signal S4 is output from the signal output terminal 14 or, if necessary, is converted to a PWM (pulse width modulation) signal via a pulse width modulator or the like.
The signal is converted to a width modulation signal and output from the signal output terminal 14.

As described above, the signal negative feedback loop is formed from the signal output side of the quantizer 11 to the input side via the delay 12, the signal adder 9 and the signal integrator 10. The quantization noise generated by the quantizer 11 and mixed into the pulse density modulation signal S4 has a differential characteristic, and is improved in a direction in which the D range of the low frequency band of the density modulation signal S4, that is, the D range of the audio signal band is expanded. Is done.

The technique for improving the D range by eliminating the quantization noise in this way is called noise shaping. 4B shows an example of noise shaping by primary feedback, but in the example shown in FIG.
In addition to the noise shaping by the primary feedback, there has been proposed an example in which the feedback loop is increased to perform the secondary and tertiary feedback so that the noise shaping is performed by the multiple feedback loop to further enhance the improvement effect. I have.

The 1-bit pulse density modulation signal S4 generated based on the 1-bit pulse density modulation signal modulated in such a state, or the above-described PWM signal, not shown, is supplied to the power switch section through the input terminal 15A. 5 is supplied. And of this power switch unit 5,
Two N-channel power MOSFET elements 17A and 17B cascode-connected between the power supply Vcc side and the ground side
The signal S4 or the PWM signal is supplied to the gate side of the FET element 17A.
A signal S4A obtained by inverting the phase of S4 via an inverter 16A is supplied to the gate side of B, and the two P-channel power MOSFET elements 17A and 17B are complementarily switched at S4. The power signal S5 from the power supply Vcc that has been power-switched is output from the output terminal 15B.

Further, the power signal S5 is input to the input terminal 18A of the power LPF unit 6, and the choke coil 19 connected between the input terminal 18A and the output terminal 18B and the output terminal 18B between the output terminal 18B and the ground. Power LPF circuit 6 having a characteristic of cutting high frequency components outside the audible frequency band, comprising a capacitor 20 connected to
The power signal S5 in the audible frequency band obtained through the terminal is supplied to the speaker 7 for reproducing an audio signal through the output terminals 18B and 18C, and is reproduced as an audio signal.

[0012]

However, in the ΔΣ modulator 4 according to the prior art as described above, the ΔΣ
Digital audio frequency band signal S3 that can be input to modulator 4
Is divided by the amplitude value that can be expressed by the 1-bit pulse modulation signal S4 that can be output from the ΔΣ modulator 4, the maximum modulation rate is determined by the noise shaping order, the setting of the signal integrator 10, and the like. When a digital audio frequency band signal S3 exceeding the maximum modulation rate is input to the ΔΣ modulator 4, the noise shaping characteristic is deteriorated. In the worst case, the ΔΣ modulator is used. 4 may oscillate. Therefore, conventionally, it was necessary to limit the peak value of the digital audio frequency band signal S3 so as not to exceed the maximum modulation rate.

[0013] Therefore, a conventional ΔΣ modulator incorporating D
In the class signal amplifier, a signal gain controller is provided in a stage preceding the ΔΣ modulator to limit the peak value of the signal level of the signal input to the ΔΣ modulator so as not to exceed the maximum modulation rate. However, in the case of a power amplifier (power amplifier) as shown in FIG. 4, if the peak value of the signal level of the signal input to the ΔΣ modulator is restricted so as not to exceed the maximum modulation rate, the power amplifier can be output. The maximum power (maximum volume) is determined by limiting the signal level of the signal input to the ΔΣ modulator so as not to exceed the maximum modulation rate, and the signal having a signal level lower than the limit is determined by the ΔΣ modulator. However, there is a problem that the power (volume) that can be output as the power amplifier cannot be increased when the power is input to the power amplifier.

That is, even if the signal peak value of the digital audio frequency band signal input to the signal input terminal is large, but the average signal level is considerably lower than this peak value, the signal is input to the ΔΣ modulator. It is necessary to limit the peak value of the signal level of the signal to be controlled by the signal gain controller so as not to exceed the maximum modulation rate. There was a problem that could not be done.

The present invention has been made in view of such a conventional problem, and a digital audio frequency band signal input to a signal input terminal has a large signal peak value, but the average signal level is compared with the peak value. Even if the signal is considerably low, the signal gain controller must limit the peak value of the signal level of the signal input to this ΔΣ modulator so as not to exceed this maximum modulation rate. It is an object of the present invention to solve the problem that the power of the signal portion cannot be increased as the power amplifier.

[0016]

Means for Solving the Problems In order to solve the above-mentioned problems and the like and to achieve the above-mentioned object, a first aspect of the present invention is described.
The digital power amplifier described above inputs a signal in an audio frequency band to a ΔΣ modulator, uses the signal in the audio frequency band as a power switch control signal via the ΔΣ modulator, and performs power switching based on the power switch control signal. Is a digital power amplifier for generating a signal capable of supplying a power switching signal obtained by switching the to a speaker means via a low-pass type frequency filter, and a first power amplifier provided at a stage preceding the ΔΣ modulator. A signal limiter means, and a second signal limiter means provided at a subsequent stage of the ΔΣ modulator so that an allowable value of an average signal level of a signal in an audio frequency band inputted to the ΔΣ modulator can be increased. It is characterized by having been constituted.

With the above-described configuration, in the digital power amplifier according to the first aspect of the present invention, when the average value of the signal level is significantly lower than the peak value of the signal level in the audio frequency band. In this case, the power of the signal portion having the average signal level as the power amplifier can be increased.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. In the following description, a PCM (pulse code modulation) obtained by sampling and quantizing an analog signal and encoding the quantized signal is obtained.
A signal is referred to as a digital signal, and converting an analog signal into a PCM signal in this manner is referred to as digital signal conversion.

An embodiment of the digital power amplifier according to the present invention will be described with reference to FIG.
FIG. 2 is a circuit block diagram showing an example of a main part of a class D amplifier (class D operation amp.) As a specific example of a digital power amplifier.
Signal gain controller 2, sampling frequency converter 3, modulating means 22, power switch unit 5, and power LPF (low pass)
filter) unit 6. The modulator 22 includes a ΔΣ modulator 23 and a switching controller 24. Reference numeral 7 denotes a speaker unit for reproducing an audio signal, which is constituted by a dynamic speaker as an example.

As an example, a digital audio frequency band signal S1 sampled at the same sampling frequency of 44.1 KHz as a CD (compact disc) is input to a signal input terminal 1,
A gain coefficient for adjusting a signal level is multiplied through a signal gain controller 2, and the digital audio frequency band signal S 2 multiplied by the gain coefficient is input to a sampling frequency converter 3. 2.822MHz as an example
The digital audio frequency band signal S3 converted into a (64 × 44.1 kHz) digital signal is input to the input terminal 22A of the modulating means 22.

Next, an example of an embodiment of the modulation means 22 will be described with reference to FIG.

FIG. 1 is a block diagram showing a configuration of a main part of the modulating means 22. The modulating means 22 includes a first signal limiter 25, a signal adder 27, a signal integrator 28, and a quantizer 2
9, a second signal limiter 30, a PWM modulator 31, and a second delay 32. Reference numeral 33 denotes an input terminal of a clock signal. The input terminal receives the sampling frequency of the digital audio frequency band signal S3 input to the converter 3 shown in FIG. A synchronized clock signal, in this example, this 2.822 MHz clock signal S21 is input.

The digital audio frequency band signal S3 input to the input terminal 22A is input to the first signal limiter 25 and suppressed to a predetermined amplitude or less.

The signal S14 is supplied to a positive input side of the signal adder 27, and a signal S16 of a difference value from a feedback signal S20 supplied to a negative input side of the signal adder 27 is provided. An output of the signal integrator 27 is supplied to an input of the signal integrator 28. And this signal integrator 2
8, the signal S16 is integrated in synchronization with the cycle of the clock signal S21, and is integrated as a signal S17.
And is input to the quantizer 29.

In the quantizer 29, the multi-bit (24-bit as an example) digital data output from the signal integrator 28 is rounded to one bit by rounding or rounding off, thereby performing one-bit encoding. A digital signal S modulated so that the signal level of the digital audio frequency band signal S3 can be represented by 1 bit.
18 is output from the quantizer 29. Also, the quantizer 29
Outputs an overflow identification signal S15 when there is an input of the input signal S17 that cannot be expressed as this one bit as an output.

Further, the digital signal S18 and the overflow signal S15 are supplied to a second signal limiter 30, and a signal S19 whose amplitude is limited by the signal limiter 30 in accordance with the overflow identification signal S15 is input to a delay 32. This signal S20, which has been delayed by one sample through this delay 32 and converted into a signal which is sign-extended and padded with "0" to the same form as the digital signal S14 input to the positive input side of the signal adder 27, This noise shaping is executed by being supplied to the negative input side of the signal adder 23 and subtracted from the signal S14. On the other hand, this signal S19 is the PWM modulator 31
, And is output from the output terminal 22B as a power switch control signal.
However, the signal 19 may be output from the output terminal 22B as the control signal without providing the PWM modulator 31.

In the example shown in FIG. 1, a first signal limiter 25 is provided, and is constituted by a signal adder 27, a signal integrator 28, a quantizer 29, a second signal limiter 30, and a delay 32. The value of the maximum amplitude of the digital audio frequency band signal S3 that can be input to the ΔΣ modulator 23 is Δ Δ
1-bit pulse modulated signal S4 that can be output from modulator 4
Can be set by the first signal limiter 25 so as not to exceed a maximum modulation rate determined by dividing by a maximum amplitude value that can be expressed by the following equation.

Therefore, according to the example shown in FIG. 1, the average sound pressure level of the digital audio frequency band signal S1 is low,
Even when the digital audio frequency band signal S1 having a high instantaneous maximum sound pressure level is input to the signal input terminal 1, the instantaneous maximum sound pressure level can be suppressed by the first signal limiter 25. There is an advantage that the level of the digital audio frequency band signal S1 in the portion where the average sound pressure level is low can be raised and reproduced from the speaker section 7 for reproducing the audio signal.

Therefore, according to the present embodiment, as is often the case with music signals, for example, a digital audio frequency band signal S1 having a low average signal level and being instantaneously excessive can be input to the signal input terminal 1. Even if there is a possibility, the gain setting of the signal gain controller 2 is set to 2.0 (+6
dB), and as a result, a portion where the average signal level of the music signal is low can be largely reproduced, and an excessively large music signal is instantaneously converted into a digital audio frequency band signal. Even when the signal is input as S1, there is no problem such that the ΔΣ modulator 23 oscillates, or noise of a perceptible level is generated in the digital audio frequency band signal S19.
Reproduction can be performed with the average sound pressure level of this average sound pressure level portion raised.

In FIG. 1, a portion surrounded by a two-dot chain line shows an example of noise shaping by primary feedback.
Next, by increasing the number of tertiary feedbacks and feedback loops, it is possible to change the operation algorithm of the portion surrounded by the two-dot chain line so that noise shaping is performed so as to further enhance this improvement effect. Of course.
When the calculation algorithm is changed in this way,
Needless to say, it is necessary to change the signal limit value of the first signal limiter 25 and / or the signal limit value of the second signal limiter 30 according to the order to stabilize the operation of the ΔΣ modulator 23. It is.

[0031]

As described above, according to the first aspect of the present invention,
According to the described digital power amplifier, even when a signal of an excessive signal level is input to the digital power amplifier, the operation of the digital power amplifier does not become unstable, and extreme deterioration in sound quality is prevented. A signal output can be obtained from this digital power amplifier in a state where no signal is generated. Therefore, the signal input setting for this digital power amplifier can be set based on the average input signal level, and the gain setting for increasing the average output sound pressure level of this average input signal level portion of the digital power amplifier is set in this digital power amplifier. Can be easily realized.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram for explaining an example of an embodiment of a digital power amplifier according to the present invention.

FIG. 2 is a circuit block diagram for explaining an example of an embodiment of a modulation unit according to the present invention;

FIG. 3 is a circuit block diagram for explaining an example of an embodiment of a power switch unit and a power LPF unit applicable to the present invention;

FIG. 4 is a circuit block diagram for explaining a class D amplifier as an example of a conventional digital power amplifier.

[Explanation of symbols]

5 Power switch section 6 Power LPF (lo
w pass filter) section, 7 ... speaker section, 23 ...
ΔΣ modulator, 25... First signal limiter, 30.
... Second signal limiter

 ──────────────────────────────────────────────────続 き Continuing on the front page F term (reference) 5J064 AA00 BA03 BB12 BC11 BC17 BC19 BC21 BD01 5J091 AA02 AA24 AA26 AA41 AA66 CA35 FA01 HA10 HA29 HA33 HA39 KA00 KA04 KA15 KA20 KA26 KA31 KA42 KA53 KA62 U01 TA05

Claims (1)

[Claims] 1. An audio frequency band signal is input to a ΔΣ modulator, the audio frequency band signal is used as a power switch control signal via the ΔΣ modulator, and power switching means is switched based on the power switch control signal. A digital power amplifier that generates a power switching signal obtained as a signal that can be supplied to speaker means via a low-pass frequency filter, wherein the first signal is provided at a stage preceding the ΔΣ modulator. A digital power amplifier, comprising: a limiter means; and a second signal limiter means provided at a subsequent stage of the ΔΣ modulator.