JP2002149481A - Memory management device and method for parallel computer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the time since data allocated to a cell were already used until the data are recovered. SOLUTION: A memory allocating part 38 allocates the unused cells of a heap area 22 connected to a free list to necessary data accompanying the execution of a function frame 26. When the free cells of the heap 22 are made empty, a first trash collecting part 40 searches the heap, and divides cells into using cells and used cells, and collects and returns the used cells to the unused cells. A second trash collecting part 42 analyzes and inputs the used cells to a reclaim list 28 after the execution of the function frame 26, and when the execution of the function frame is ended, the second trash recovery part 42 recovers and returns the cells of the reclaim list 28 other than the cells which are already recovered by the first trash collecting part 40 to the unused cells.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory management apparatus and method for a parallel computer in which a plurality of processors each having a CPU and a cache and a shared memory are connected via a bus.
In particular, the present invention relates to a memory management apparatus and method for a parallel computer that performs garbage collection (garbage collection) that collects cells as data allocation units of used memories and makes the cells reusable.

[0002]

2. Description of the Related Art In recent years, with the increase in the size of problems solved by computers, the number of servers that provide this service has also increased in performance and scale. To meet this demand, parallel computers have been built in which a plurality of processors are linked by a shared memory.

On the other hand, not only memory management of OS but also JA
In a processing system of a programming language such as VA (registered trademark) or LISP, a run-time system performs memory management, allocates a memory area for data to be used (memory allocation), and collects a memory area for data that is no longer used. Collection, Garbage Collection (GC: Gar
The bage collection is under the control of the runtime system.

[0004] LISP is a typical functional programming language developed by a research group led by Professor John McCarthy of the Massachusetts Institute of Technology, and is already used and defined for artificial intelligence research. Write programs by combining functions to define new functions.

In a shared memory parallel computer system,
In order to efficiently execute a program language such as JAVA or LISP, it is necessary to realize an effective memory management system. In particular, with regard to garbage collection, a method that matches the characteristics of the language and the characteristics of the shared memory parallel computer is required. It is also necessary to increase the speed by hardware support.

In a conventional language processing system such as JAVA or LISP, a memory area for allocating data to be used is prepared, and data is allocated when necessary. When the consumption of the memory area progresses and new data cannot be allocated, garbage collection is called.

[0007] Here, a memory area to be subjected to garbage collection is called a heap area or simply a heap, and there are two methods for allocating data using the heap area. The first method is to prepare a pointer for storing the extent of the heap area used, allocate an area from the location pointed to by the pointer when there is an allocation request, and then shift the pointer by a required amount. It is.

[0008] The second method is a segregate.
Known as a memory management method, a heap area is divided into cells, which are units of a predetermined size. A cell contains a pointer to another cell. A list called a free list in which the cells are linked by a link is created, and when a data allocation request is made, a cell corresponding to the amount of data is extracted from the list and data is allocated.

FIG. 15 shows a method for managing a sigle gate memory of a parallel computer. The parallel computer has CPUs 100-1 and 1
100-n, and each CPU is connected to the shared memory via a cache device. A heap area 102 is secured in the shared memory.

In the case of a parallel computer, the CPU 100-1
A heap area is allocated for every .about.100-n. The heap area 102 is divided into a plurality of types of cells having different sizes, and a free list is provided for each of the CPUs 100-1 to 100-n in which unused cells are linked by a link for each size. When there is a data allocation request, cells are taken out from a free list of a size corresponding to the amount of data and data is allocated.

Here, the cells existing in the heap area to be subjected to garbage collection are in a state in which three states of an unused cell, a used cell, and a used cell are mixed.
Unused cells are connected to a free list. When there is a data allocation request, unused cells are taken out from the head of the free list and allocated, and cells to which data has been allocated are used cells.

A busy cell has a list structure pointed to by a pointer from the root, which is a data area such as a register or a stack that can always be referred to by the CPU. The garbage collection is a process of collecting used cells existing in the heap area, that is, garbage cells, returning them to a free list, and making them reusable.

[0013] The basic algorithm of garbage collection is the mark sweep algorithm. This is done by dividing one garbage collection into mark and sweep phases. Garbage collection starts when the free list is empty.

First, in the mark phase, the in-use cells are traversed in order from the root of the stack or the register, and all the used cells that have arrived are marked. Next, in the sweep phase, the entire heap area is scanned, and unmarked cells are collected as used garbage cells and connected to a free list. At the same time, unmark it for the next garbage collection.

FIG. 16 shows garbage collection of a parallel computer. The parallel computers are CPUs 100-1 and 100
,... 100-n. Programming languages such as JAVA and LISP
When the execution is performed at 00-n, a function frame is created on the stack for function call processing, and each function is executed.

This function frame is stored in, for example, the CPU 100-
1 executes and a data allocation request occurs, the CPU 1
The process of extracting an unused cell from the free list of the heap area allocated to 00-1 and allocating it to data is repeated.

When the free list of the CPU 100-1 becomes empty, a garbage collection is called, and the CPU 100-1
1 based on the root data R1 and R2 which are required for future execution, such as the register and stack,
Cell a of the heap area 102 pointed by the pointer from 1
1 and the cells b1, C2 and c3 pointed by the pointer from the route R2.
a3, b2, b3, and c1 are collected as used cells,
Connect to a free list.

By the way, in a programming language such as JAVA or LISP, list processing is performed, and data used for the list processing has a list structure (li) by a pointer chain.
nkedlist structure).

In languages such as JAVA and LISP having such a list structure, data allocated to cells is often used in a short time. There is also a method of performing an escape analysis for analyzing that a pointer to data allocated to a cell does not exist after the execution of a certain function is completed, and allocating such data to a stack.

FIG. 17 shows an example of data allocation to the stack. FIG. 17A shows the execution of the functions foo, bar, and gee in the program 108 of FIG.
As shown in (B), each function frame 112, 114, 116 is created in the stack 110. The data “new data” determined to be not used after execution of the function by the escape analysis is stored in the stack area 110 as new. A data area 118 is secured and allocated here.

According to this method, when the stack is accumulated at the end of execution of the function foo, new assigned to the stack is used. The data area 118 is automatically collected.

[0022]

However, if data that is determined by the escape analysis to be unused after the execution of the function is allocated to the stack, the data becomes unnecessary during execution of the function, and then the function execution is terminated. Therefore, there is a problem that the time until recovery is long. For example, in the sample method program 120 shown in FIG. 18, the data generated in lines (1) and (2) is referred to only from “sample a” and “sample b”, and 3) Unnecessary data after executing the row.

Therefore, if escape analysis is performed, (3)
It can be seen that the data indicated by “sample a” and “sampleb” is not used after the line. In other words, when these data are allocated to the heap area, if the garbage collection is executed after the execution of the row (3), the data of the rows (1) and (2) is collected at this point.

However, when these data are allocated to the stack, the data cannot be collected until the execution of the sample method program 120 is completed, and it takes a long time to collect the used data.

On the other hand, in the method for managing the gate memory,
As shown in FIG. 16, free lists are prepared for cells of various sizes to prepare for data allocation. The used cells collected in the garbage collection are returned to the corresponding free list according to their size.

A symmetric multiprocessor system (SM)
In a parallel computer such as P), if there is only one free list in the system, the free list is involved in data allocation, and as shown in FIG.
It is performed to have a plurality of free lists for each of 0-1 to 100-n.

However, when the CPU that has executed garbage collection connects the collected used cells to its own free list, the collected data is loaded on the cache device of the CPU, and the cells are actually allocated. A cache miss easily occurs between the CPU and a cache device using data. There is also a problem that a cache miss occurs when the CPU actually used is different from the recovered CPU.

In other words, the used cells connected to the free list of each CPU are distributed to other cache devices, and when allocating the unused cells to data, the unused cells between the caches are used. It is necessary to control the movement of the cell to be used and the state transition of the cache block. As a result, a cache miss is likely to occur, and the processing takes time.

It is an object of the present invention to provide a memory management apparatus and method for a parallel computer, which shortens the time from when data allocated to a cell is used to when it is collected.

Another object of the present invention is to provide a memory management device and method for a parallel computer which can hold a free list of unused cells in a cache so as to reduce cache misses and can perform high-speed processing. .

[0031]

FIG. 1 is a diagram illustrating the principle of the present invention. The present invention, as shown in FIG.
Processors 10 each having a cache device 14
And a shared memory 20 connected via a bus 16 to a memory management device of a parallel computer. As a memory management device of this parallel computer, the present invention provides a heap area 2 composed of a memory area divided into cells used for data allocation.
2, and a memory allocating unit 38 that allocates unused cells of the heap area 22 to necessary data in accordance with the execution of the function frame 26 created in the stack area of the shared memo 20 by the function call.
When the unused cells of the heap area 22 become empty,
A first garbage collection unit 40 which searches the heap area to divide the used cells and used cells, collects the used cells and returns them to unused cells, and sets the used cells to the used cells after executing the function frame 26. It is analyzed whether or not the second cell is used, and at the end of the execution of the function frame, used cells other than the cells collected by the first dust collection unit 40 are collected and returned to unused cells.
And a refuse collection unit 42. In this way, the present invention not only collects cells to which unnecessary data has been allocated after the execution of a function is completed when the function frame in the stack area is folded at the end of the function execution, but also performs garbage collection during the function execution. Can be recovered, so that when the data is no longer needed,
The time until the assigned cell is collected is shortened.

Here, the heap area 22 is managed by putting the unused cells in a first list (free list) linked by pointers, and the second collecting unit 42 lists the used cells that become unnecessary after the execution of the function in the second list. The first garbage collection unit 40 removes the collected cells from the second list in the final phase.

More specifically, each cell in the heap area 22 is provided with a flag (free flag) that turns off when data is allocated and turns on when returning to the first list.
The garbage collection unit 40 lists the cells whose flag is turned on (indicating collection) in the final phrase in the second list 28.
Remove from It prevents the cells of the second list that have been collected by the first garbage collection unit 40 from being redundantly collected after the execution of the function frame.

Each cell of the heap area 22 has a pointer area for storing a pointer linked to the second list.
As a result, a second list 28 in which cells that become used cells after executing the function are connected by the pointer can be created. As another data structure of the second list 28, one or a plurality of cells in which a data pointer indicating a used cell which is used after execution of a function and a link pointer indicating a next link destination are connected by a link. List structure. This is the data structure of the second list using the built-in function cons of LISP.

The first list (free list) 24 prepares a plurality of types of unused cells having different sizes for each CPU.
When receiving a data allocation request from a specific CPU, the memory allocation unit 38 selects and allocates an unused cell having a size corresponding to the data amount from a first list (free list) allocated to the CPU. wear. This means that the heap area 22 employs a method of managing a sigle gate memory in which a free list of unused cells having different sizes is provided for each CPU.

The memory management device of the present invention can
Executes a heap area search by the first garbage collection unit 40 to search for used cells, inquires of another cache device about holding of used cells that can be collected, and when there is a response from a plurality of cache devices, A specific cache device holding the first list is instructed to perform a collection operation, and the CPU causes the first garbage collection unit 40 to execute a collection process.

Thus, the used cells collected by the garbage collection can be always connected to the free list of the CPU of the cache device holding the used cells. As a result, unused cells in the free list of each CPU are present in their own cache devices, and cache misses during data allocation due to being distributed to other cache devices can be reduced, and high-speed processing can be performed. And

More specifically, when an arbitrary CPU searches for a used cell by executing a search of a heap area by the first garbage collection unit 40, another cache is used from its own cache device using the snoop bus 16. When the plurality of cache devices respond to the arbiter 18 of the snoop bus 16, the device requests the device to hold the used cells that can be collected, and the arbiter 18 arbitrates the collected cells to a specific cache device holding the used cells. The cache device that has instructed the operation and has received the collection instruction interrupts its own CPU and causes the first garbage collection unit 40 to execute the collection process.

Here, the CPU that has searched the used cell by executing the heap area search by the first garbage collection unit, sends a free list creation instruction (MKF instruction: ma) to its cache device.
The cache device that has issued the ke-free-list command) and received the free list creation command issues a free list creation command (MKF
Command: make-free-list command) snoop bus 1
Issue to 6.

If the recovered used cell completely includes one or a plurality of cache blocks, the cache device that has lost arbitration causes the corresponding cache block to transition to an invalid state. Also, in response to an inquiry about the retention of used cells that can be collected, if only a specific cache device responds to the snoop bus, the responding cache device interrupts its own CPU and causes the first garbage collection unit 40 to respond. Execute the collection process.

If none of the cache devices holds the reusable used cells, the used cells are read from the shared memory 20 into the cache device of the CPU determined to be retrievable, and the first garbage collection unit 40 collects the used cells. Execute the process. Further, if none of the cache devices holds the reusable used cells, the retrievable used cells are sent to the cache device of the CPU randomly selected on the shared memory side 18 and the first garbage collection unit 40 The collection process may be executed.

The present invention provides a memory management method for a parallel computer in which a plurality of processors each having a CPU and a cache device and a shared memory are interconnected via a bus. This memory management method for a parallel computer is based on a method for storing unused cells in a heap area composed of memory areas divided into cells in data necessary for execution of a function frame created in a stack area of the shared memory 20 by a function call. Allocating memory; when unused cells in the heap area are emptied, search the heap area to divide into used cells and used cells, collect used cells and return to unused cells A first garbage collection step; analyzing whether or not the used cells become used cells after execution of the function frame, and collecting the used cells excluding the collection in the first collection step at the end of execution of the function frame. A second dust collection step of returning to unused cells. The details of the memory management method of the parallel computer are basically the same as those of the device configuration.

[0043]

FIG. 2 is an explanatory diagram of the system configuration of a parallel computer according to the present invention. 2, the parallel computer of the present invention includes a plurality of processor modules 10-1 to 10-1.
10-n, and CPUs 12-1 to 12-n and cache devices 14-1 to 14-n, respectively.

Processor modules 10-1 to 10-n
Cache devices 14-1 to 14-n are snoop bus 1
The snoop bus comprises an arbiter 18. Further, a shared memory 20 is connected to the snoop bus 16. Here, the parallel computer of the present invention constructs a symmetric multiprocessor system SMP. The symmetric multiprocessor system SMP includes a plurality of CPUs 12-
Methods 1 to 12-n share the processing from an equivalent standpoint.

FIG. 3 is a block diagram of a functional configuration for memory management of a parallel computer according to the present invention. CPU12-
Each of the memory management units 30-1 to 30-n
0-n and function execution units 32-1 to 32-n are provided. The memory management units 30-1 to 30-n are under the control of the runtime system.

The function execution units 32-1 to 32-n execute a program described in a program language such as JAVA or LISP to be processed by the present invention. Shared memory 20
, A heap area 22, a free list area 24, and a stack area 25 are arranged. In the present invention, the same hegre gate memory management method as the conventional example of FIG. The heap area 22 according to the cigarette gate memory management method is stored in the CPUs 12-1 to 12-n.
Each of the heap areas 22-1 to 22-n is provided with a cell, which is a data allocation unit divided into a plurality of different sizes, in each of the heap areas 22-1 to 22-n.

Free list (first list) 24 for managing cells in each heap area corresponding to heap areas 22-1 to 22-n provided corresponding to CPUs 12-1 to 12-n.
-1 to 24-n are provided in the free list area 24. The free lists 24-1 to 24-n correspond to the heap area 2
This is a list in which unused cells 2-1 to 22-n are linked by a chain of pointers. As shown in FIG. 15, the free lists 24-1 to 24-n are divided and connected for each cell size. Have been.

In the stack area 25, the CPUs 12-1 to 12-1
Function frames 26-1, 26-2, 26 created at the time of function call by the 12-n function execution units 32-1 to 32-n
-3,... Are arranged. With respect to the function frames 26-1, 26-2, and 26-3 created in the stack area 25, according to the present invention, a reclaim indicating a used cell to which data that is to be used after the execution of the function frame is completed is allocated. List (second list) 28-1, 28-2, 2
8-3,... Are arranged.

The cache devices 14-1 to 14-n store C
When memory management or function execution is performed by the PUs 12-1 to 12-n, data existing in the shared memory 20 is read, and once read, memory management and function execution on the CPU side are performed while being present on the cache. Do.

For this reason, in a normal operation state, free lists 34-1 to 34-n obtained by copying the free lists 24-1 to 24-n of the shared memory 20 on the cache devices 14-1 to 14-n. Exists. In addition, the cache devices 14-1 to 14-n have cell groups 36-1 to 36-n of cells in use which store cells which are extracted from the free list and allocated data as cache data.

The snoop bus 16 connecting the cache devices 14-1 to 14-n and the shared memory 20 responds to the other devices by referring to the bus control line for the state of data in the device connected to the bus. Can always be viewed without requesting As a result, the cache device 14-1
Recognizes the status of other devices via the snoop bus 16,
Necessary cache processing can be performed by determining whether or not the same data exists in another device.

The arbiter 18 performs arbitration when a response is obtained from a plurality of other cache devices when a load command is sent to the cache device 14, and instructs a specific cache device to execute the load command. Has functions. The arbitration of the arbiter 18 is performed by the cache device 14-1 in the present invention.
Free lists 34-1 to 34- existing on .about.14-n
n is used at the time of garbage collection processing for connecting used cells to n.

FIG. 4 shows the CPUs 12-1 to 12-n of FIG.
Is a functional configuration of the memory management units 30-1 to 30-n provided in the CPU 12-1, and the memory management unit 30-1 of the CPU 12-1 is taken as an example.

The memory management section 30-1 is provided with a memory allocating section 38, a first dust collecting section 40, and a second dust collecting section 42. When a data allocation request is generated along with the execution of the function frame created in the stack area 25 by the function call, the memory allocation unit 38 notifies the CPU that processes the allocation request of a free list of a size corresponding to the data amount from the free list. Take out a cell and assign data. By this data allocation, unused cells in the heap area become used cells.

The first garbage collection unit 40 is called when an unused cell in the heap area is emptied, specifically when a free list of a specific CPU provided in a specific CPU is emptied, A garbage collection process is performed in which the heap area is searched to divide the cell into a used cell and a used cell, and the used cell is collected and connected to a free list to return the cell to an unused cell.

The collection process by the first dust collection unit 40 employs, for example, a mark sweep algorithm as a basic dust collection algorithm. The mark sweep algorithm is similar to the conventional example shown in FIG.
Starting from the root of a register or a stack that can always be referred to by the CPU, the used cell is marked while tracing the reference relation of the pointer, and then the whole heap is operated to become a cell without a mark, that is, garbage. Collect used cells.

In the collection processing by the first garbage collection unit 40, a method using a reference counter, a moving method, or the like may be employed in addition to the mark sweep algorithm. In any method, the first garbage collection unit 40 sorts the heap area in which cells in three states of unused, used, and used are mixed by distinguishing the state of the cells. A process of collecting used cells and regenerating unused cells is performed.

In the parallel computer shown in FIG. 3, execution of the function frame and garbage collection by the first garbage collection unit are executed in parallel by different CPUs. For example, CPU
If the free list 24-2 becomes empty during execution of the function frame 26-1 of the stack area 25 in 12-2, the memory management unit 3 of another CPU, for example, the CPU 12-1
The first garbage collection unit 40 provided in 0-1 is activated, and executes a function for executing garbage collection processing of the heap area 22-2 corresponding to the free list 24-2 and performs parallel processing of garbage collection. Thereby, the parallel computer system can dynamically realize the dust collection processing by the memory management in parallel with the function execution.

Further, the second garbage collection unit 42 provided in the memory management unit 30-1 in FIG. 4 executes the function frame created in the stack area 25 of the shared memory 20 in FIG. When the allocating unit 38 allocates data to an unused cell in the free list 24-2, an escape analysis is performed to determine whether or not the data becomes an unnecessary used cell after the execution of the function.

If the cell becomes a used cell after executing the function, the used cell is put in a reclaim list 28-1 provided in the function frame 26-1. Then, after the execution of the function frame 26-1, the second garbage collection unit 42 collects the used cells that have become unnecessary after the execution of the function included in the reclaim list 28-1 and connects them to the free list 24-2. Collect garbage.

In the final phase, the first garbage collection unit 40 stores the number of cells that have already been counted in the reclaim list 28.
Remove from -1. This prevents the second trash collection unit 42 from repeatedly collecting cells already collected by the first trash collection unit 40 and connecting them to the free list.

As described above, in the memory management unit of the present invention, the first and second dust collection units 40 and 42 collect the used dust in parallel from the used cells. That is, the first garbage collection unit 40 performs the mark sweep, the counter reference method,
According to a garbage collection algorithm such as a moving method, the function list is activated when the free list becomes empty during execution of the function frame to collect used cells and connect them to the free list. At the end of the execution of the function frame, the used cells included in the reclaim list are collected as used cells and connected to the free list.

For this reason, in the escape analysis of the function frame, the allocated cell of the data which becomes the used cell after the execution of the function cannot be collected until the execution of the function frame is completed. Becomes empty, the used cells are automatically collected by the first garbage collection unit 40. As a result, the cells that have been used at that time are immediately collected without waiting for the completion of the execution of the function frame. Can be collected as used cells in a free list, and the time required for a used cell to be connected to a free list and made reusable can be reduced.

FIG. 5 is an explanatory diagram of the data structure of a cell existing in the heap area 22 of FIG. The cell 44 existing in the heap area of the present invention is composed of a header 46 and data 48, and the header 46 is provided from a root such as a register or a stack which can always be referred to by the CPU when data is allocated to the data 48. A pointer area 50 for storing a pointer linked by a pointer chain is provided.

The same applies to the pointer area 50 in the conventional cell 44. However, in the present invention, a free flag 52 is newly provided in the header 46. Free flag 5
2 is turned on when the cell 44 is connected to the free list, and turned off when the cell 44 is removed from the free list and data is allocated. That is, the free flag 52 is connected to the free list in the on state, and is turned off when the cell is removed from the free list and becomes a busy cell by data allocation.

The free flag 52 provided in the header 46 of the cell 44 is used when the cell 44 is put in the reclaim list of the function frame 26-1 in the stack area 25 in FIG. That is, the reclaim list 2 of the function frame 26
In FIG. 8, cells that have been used after the execution of the function by escape analysis are entered, and all the cells entered in the reclaim list 28 are in-use cells to which data has been allocated, so that their free flags 52 are all turned off. It has become.

On the other hand, the first garbage collection unit 40 in FIG. 4 collects used cells when the free list becomes empty independently of execution of the function frame, and reclaims used cells. If it is left in the list, there is a problem that it will be collected twice at the end of execution of the function frame.

Therefore, in the first garbage collection unit 40, when collecting used cells and connecting them to the free list,
The in-use cell included in the reclaim list for which the free flag is set to ON is also used by the first garbage collection unit 40.
The free flag changes from off to on at the time of collection by.

Then, the first garbage collection unit 40 stores the cells connected to the reclaim list in the final phase.
Remove the cell connected to the free list whose free flag is on. This prevents the used cell collected by the first dust collection unit 40 from being redundantly collected in the free list by the second dust collection unit 42 when the function frame is used.

FIG. 6 shows a function call to the shared memory 2 of FIG.
FIG. 4 is an explanatory diagram of a function frame 26 created in a stack area 25 of 0. The function frame 26 created in the stack area includes an argument area 54, a temporary area 56, a register save area 58, a frame pointer save area 62, and a return address area 64 in the same manner as a normal function frame. In the above, a reclaim list area 60 is newly provided so that a set of reclaim lists shown in FIG. 3 can be referred to.

FIG. 7 is an explanatory diagram of a data structure of a cell for realizing a reclaim list. In the cell 44 shown in FIG. 7, the header 46 has the pointer area 50 as in FIG.
And a free flag 52, and a reclaim list pointer area 66 is newly provided for the data 48.

The data assigned to this cell 44 is
Since it becomes unnecessary at the end of execution of the function by escape analysis, it is put in the reclaim list 28. Specifically, it is stored in the reclaim list pointer area 66 in the reclaim list area 60 of the function frame 26 in FIG. Write the connected pointer. As a result, the reclaim list has a link structure consisting of a chain of pointers with the reclaim list area 60 of the function frame 26 as a root.

FIG. 8 is an explanatory diagram of another data structure of the reclaim list 28 used in the present invention, which is characterized by using a cons-cell data structure of LISP. That is, the reclaim list 28 has a list structure using the LISP cons cells 68-1, 68-2, and 68-3. Cons cells 68-1 to 68-3
Has a cell structure in which data pointers 70-1 to 70-3 indicating used data after execution of a function and link pointers 72-1 to 72-3 indicating the next link destination are set. When the list structure using the cons cells of the LISP is used, there is an advantage that the cells included in the reclaim list 28 can be determined without accessing the data itself.

FIG. 9 shows the processing of the memory allocating section 38 provided in the memory managing section 30-1 of FIG. 4 and the processing of the second garbage collecting section 42 which operates in accordance with the execution of the function using the data associated with the memory allocation. It is a flowchart shown.

In FIG. 9, the memory allocation process is called when an allocation request is generated in accordance with the execution of a function frame. In step S1, an unused cell having a size corresponding to the data amount is extracted from the corresponding CPU free list. Assign data. At this time, the free flag of the cell is turned off.

Subsequently, escape analysis is performed to determine whether or not the cell becomes a used cell after the execution of the function F in step S2 is completed. As a result of the escape analysis, if it is determined in step S3 that the cell is a used cell, the process proceeds to step S4, and the used cell is put in the reclaim list provided in the function frame of the function F. If it is not used, the process of step S4 is skipped.

Subsequently, in step S5, it is checked whether the function F has been completed.
Steps 1 to S5 are repeated each time an allocation request is issued. When the end of the function frame is determined in step S5, the cells included in the reclaim list are collected in step S6 and connected to a free list corresponding to each size. Here, since the free flags of the cells included in the reclaim list are all off, the free flags are turned on when connecting to the free list.

FIG. 10 is a flowchart of a process performed by the first dust collection unit 40 provided in the memory management unit of FIG. The first garbage collection process is called and activated when the free list becomes empty due to execution of a function. The garbage collection process uses a mark sweep algorithm as an example. First, mark processing is performed in step S1.

That is, the pointer is traced by using the data of the register or the stack which can always be referred to by the CPU as a root, and a mark is put on the in-use cell traceable by the pointer. Next, sweep processing is performed in step S2. In the sweep processing, the heap that has been marked is checked in order, and unmarked cells are returned to the free list as used cells. At this time, the free flag of the cell is turned on.

Subsequently, the reclaim list is updated in the final phase of the garbage collection process in step S3. The reclaim list is updated by tracing the reclaim list of each function frame, and excluding cells for which the free flag is turned on, that is, cells returned to the free list by the sweep processing in step S2, from the list.

Step S in the first garbage collection process
3, the function frames 26-1 to 26- in the stack area 25 in FIG.
In the reclaim lists 28-1 to 28-3 provided in No. 3, there are no used cells that have already been used, and only the cells that have been used in the subsequent execution of the function remain. The used cells to be returned to the free list at the end of the execution of the function can be minimized, and the used cells can be returned to the free list in a short time.

FIG. 11 shows a case where used cells are collected by the first garbage collection unit 40 in the memory management unit of FIG. 4 and are connected to a free list. FIG. 8 is an explanatory diagram of an embodiment of a memory management process to be connected;

Now, the CPU 12-1 sets the mark sweep
Suppose that a used cell to be collected is found by executing garbage collection processing by an algorithm. The CPU 12-1 uses the logical address of the used cell to be recovered as an operand.
Execute a free list creation command (MKF command: make-free-list command).

This free list creation instruction converts a logical address into a physical address like a normal load instruction, and issues a free list creation instruction to be a cache request in step S1 to the cache device 14-1. CPU1
The cache device 14-1 that has received the free list creation command in step S <b> 1 from 2-1 issues a free list creation command for passing the physical address of the used cell to be collected with the identifier of the free list creation command to the snoop bus 16. Is performed in step S2.

In response to the free list creation command from the cache device 14-1, assume that the cache device 14-2 and the cache device 14-n hold the used cells to be recovered found by the CPU 12-1. The cache devices 14-2 and 14-n are connected to the snoop bus 16
, A free list creation response is issued in steps S3 and S4.

The free list creation response from the cache devices 14-2 and 14-n is received by the arbiter 18, and the arbiter 18 caches the physical address with the free list creation identifier as in the case of the normal load instruction. Arbitration is performed between the cache devices 14-2 and 14-n having the blocks, and a free list creation win response (MK) is given to the cache device that has won the arbitration, for example, the cache device 14-2 in step S6.
(Lwin response).

The cache device 14-2 that has received the free list creation win response from the arbiter 18 returns to step S
At 7, a free list creation interrupt is issued to its own CPU 12-2. Upon receiving this interrupt, the CPU 12-2
The used cells that are to be collected and exist on the cache device 14-2 are linked to their own free list that also exists on the cache device 14-2.

FIG. 12 shows the processing function of each unit when the used cells to be collected shown in steps S1 to S7 of FIG. 11 exist on a plurality of cache devices.

In FIG. 12, the CPU 12-1 executes the first garbage collection process, thereby, for example,
It is assumed that the used cell a1 corresponding to the cache block of the physical address existing in both 4-2 and 14-n is found.

In this case, the CPU 12-1 converts the logical address of the used cell into a physical address and issues a make-free list instruction to the cache device 14-1, and the cache device 14-1 sends the make-free list instruction to the snoop bus 16. Issue a physical address with the identifier of

For the physical address to which the identifier of the make-free list is attached, the cache device 14-2, 1 holding the cache block a2 of the physical address
4-n each issue a make-free list response from the snoop bus 16 to the arbiter 18.

The arbiter 18 executes arbitration for two of the cache devices 14-2 and 14-n as in the case of a normal load instruction.
A free list creation win response is issued to 4-2.
In response, the cache device 14-2 has its own CPU.
Issue a make-free list interrupt to 12-2, and
12-2 executes a collection process of connecting the cache block a2 of the physical address as a used cell to its own free list 34-2.

In response to such a cache process, the data a1 to a3 of the heap area 22 are stored in the shared memory 20 side.
Cell, free list 24 in free list area 24
An original exists for each of -1 to 24-n.

The situation where the same cell a2 is allocated to the cache device 14-2 and the cache device 14-n in FIG. 12 is caused by the case where the data allocation of the list structure as shown in FIG. It is.

In FIG. 13, CPUs 12-1 and 12-
Reference numerals 2, 12-n denote in-use cells obtained by allocating unused cells of data necessary for executing functions to the heap area 22 with pointers, using data that can always be referred to, such as registers and stacks, as roots. It has as data of linked list structure.

Here, the CPU 12-2 has a list structure of cells in use linked from the route R21 to the data a1, a2 and a3, while the CPU 12-n
In this case, the data is linked from the route Rn2 to the data n1, and then linked to the data a2 used by the CPU 12-2, and then returns to its own data n3 to use the list structure of the used cells.

The two CPUs 12-2 and 12-
Due to the data list structure in n, the cells in use of the same data a2 exist in different caches, as in the cache devices 14-2 and 14-n in FIG.

Then, at a certain timing, the CPU 12-1
Performs the first garbage collection process based on the fact that the free list 34-2 becomes empty, and recognizes that the data a2 is a used cell, the data a2 as shown in FIG. A collection process for connecting the used cell of the data a2 to one of the existing two cache devices 14-2 and 14-n, for example, the free list 34-2 of the cache device 14-2 is performed. .

By the process of collecting used cells as described above, the free list 34- of each of the CPUs 12-1 to 12-n is obtained.
Unused cells 1-34-n are all present in each cache device, and it is assumed that unused cells connected to the free list of a certain cache device are distributed and present in other cache devices. By avoiding this and eliminating the need for processing between caches, cache misses during data allocation are reduced, and processing is accelerated.

FIG. 14 shows the CPU 12 of FIGS. 11 and 12.
11 is a time chart showing a procedure of processing when a used cell of data to be collected by -1 exists in the cache devices 14-2 and 14-n.

In FIG. 14, the CPU 12-1 having found the used cell to be collected by the first garbage collection process converts the logical address of the used cell to be collected in step S1 into a physical address, and issues a free list creation instruction. (MKF instruction) to the cache device 14-1.

In response, the cache device 14-1
In step S2, a free list creation command (MKF command issuance) for causing a physical address to which a free list creation identifier is assigned to flow to the snoop bus 16 is issued. In response to this command issuance, each of the cache devices 14-2 and 14-n holding the used cells to be collected issues a make-free list response (MFK response) to the snoop bus 16 in steps S3 and S4. . The arbiter 18 having received this response executes arbitration in step S5, and issues a free list creation win (MKF win) response to the cache device 14-2 in step S6.

For this reason, the cache device 14-2 issues a free list creation interrupt to its own CPU 12-2 in step S7, and the CPU 12-2 in step S8 executes the free list creation process by the interrupt processing. A cell is collected to connect the cache block of the address, that is, the used cell to its own free list.

In step S9, the CPU 12-2 issues a normal end response to the cache device 14-2. In response to this, the cache device 14-2 issues a normal end response command to the snoop bus. The original cache devices 14-2 and 14-1 return a normal end response interrupt to the instruction issuing CPU 12-1 and end a series of processing.

Further, the normal end response in step S10 is also received by the cache device 14-n that has lost the arbitration, and in this case, the used cells that are to be collected and exist in the cache device 14-n are completely included in the cache block. If so, invalidate the cache block completely including the collected used cells.

The cache processing described above is performed when a certain CPU finds data to be collected and a cache block of a used cell to be collected exists on a plurality of other cache devices. In FIG. 12, when the data of the used cell to be collected exists only in the cache device 14-2, for example, in the exclusive state in FIG. S
3 without issuing a free list creation response to the snoop bus 16 and immediately issuing a free list creation interrupt in step S7 to its own CPU 12-2.
Link used cells to a free list on the cache.

Even if a free list creation command is issued from the cache device 14-1 to the snoop bus 16 based on the free list creation command of the CPU 12-1, the used cells to be collected are not cache devices 14-1 to 14-1.
4-n, the shared memory 20 issues the free list creation command to the snoop bus 16 in the same manner as a normal load instruction.
-1 and sends the used cell to be collected to the cache device 14-1.
Is interrupted, and the used cell read from the shared memory 20 is connected to the free list 34-1 of the CPU 12-1.

Further, when the used cell to be collected does not exist in any of the cache devices 14-1 to 14-n, the cache device 14-1 to 14-n selected at random from the shared memory 20 is used. The data block of the used cell may be sent to any of them, and the cache device receiving the data block may interrupt the own CPU and connect the used cell to the free list of the CPU.

As a result of such processing, unused cells in the free list allocated to each CPU of the parallel computer exist in their own cache devices, and unused cells managed in the free list are stored in the cache. This reduces cache misses at the time of data allocation due to scattered data, and increases the speed.

The above-described embodiment uses JAVA as a program language for applying the memory management of the parallel computer of the present invention.
Although A and LISP are taken as examples, the present invention can be similarly applied to a programming language having a list structure in which data is linked by a chain of pointers similar to these programming languages. For example, the memory management of the present invention can be applied to a programming language such as C ++ that performs object-oriented programming.

Further, the present invention includes appropriate modifications which do not impair the objects and advantages thereof, and is not limited by the numerical values shown in the above embodiments.

[0112]

As described above, according to the present invention, a cell to which unnecessary data is allocated after the execution of a function is not only collected at the end of execution of the function, but also garbage collected during execution of the function. In such a case, it is possible to shorten the time from when the data is no longer needed to when the used cell to which the data is allocated is collected, and to reduce the cost of collection.

Also, the unused cells connected to the free list provided for each CPU are connected to each cache device by performing a cache process at the time of dust collection processing so that all unused cells are present on the own cache device. This prevents a situation in which used cells are distributed to other cache devices, thereby eliminating the need for exchanging unused cells between caches when a data allocation request occurs, reducing cache misses and increasing the speed of unallocated cells. Allocation of cells to be used can be realized. (Supplementary note) (Supplementary note 1) In a memory management device of a parallel computer in which a plurality of processors each including a CPU and a cache device and a shared memory are connected via a bus, a memory area divided into cells serving as data allocation units. A heap area to be configured, a memory allocating unit that allocates unused cells of the heap area to data necessary for execution of a function frame created in the stack area of the shared memory by a function call, and an unused heap area. A first garbage collection unit that searches the heap area to divide into used cells and used cells when the cells are emptied, and collects the used cells and returns them to unused cells; After the execution of the frame, it is analyzed whether or not the cell becomes a used cell. At the end of the execution of the function frame, the first garbage collection unit collects the used cell except the collected cell and uses the unused cell. And a second garbage collection unit for returning to the memory. (1) (Supplementary note 2) In the memory management device according to Supplementary note 1, the heap area is a first list in which unused cells are connected by a pointer.
(free-list), and the second garbage collection unit lists the used cells that become unnecessary after the execution of the function in a second list (reclaim-lis).
The memory management device according to claim 1, wherein the first garbage collection unit removes collected cells from the second list in the final phase. (2) (Supplementary note 3) In the memory management device according to Supplementary note 2, each cell of the heap area includes a flag (free-flag) that is turned off when data is allocated and turned on when returning to the first list. The memory management device according to claim 1, wherein the first garbage collection unit removes, from the second list, the used cells whose flags are on in the final phase. (3) (Supplementary Note 4) In the memory management device according to Supplementary Note 1, each cell of the heap area includes a pointer area for storing a pointer linked to the second list. . (Supplementary Note 5) In the memory management device according to Supplementary Note 1, the second list includes a data pointer indicating a used cell which is used after execution of a function and a link pointer indicating a next link destination. A memory management device having a list structure in which one or a plurality of cells are connected by a link. (Supplementary Note 6) In the memory management device according to Supplementary Note 1, the first list prepares a plurality of types of unused cells having different sizes for each of the CPUs,
When a data allocation request is received by the PU,
A memory management device for selecting and allocating unused cells having a size corresponding to the data amount from a first list allocated to the memory management device. (Supplementary Note 7) In the memory management device according to Supplementary Note 1, when an arbitrary CPU searches for a used cell by executing a search of a heap area by the first trash collection unit, the CPU can be collected in another cache device. Inquiry of the use of the used cell is performed, and when there is a response from a plurality of cache devices, a specific cache device holding the used cell is instructed to perform a collection operation, and the CPU performs a collection process by the first dust collection unit. And a memory management device.
(4) (Supplementary Note 8) In the memory management device according to Supplementary Note 1, when an arbitrary CPU executes a search for a heap area by the first garbage collection unit and searches for a used cell, Using a snoop bus to inquire of other cache devices for the retention of used cells that can be collected, and if there is a response to the snoop bus arbiter from multiple cache devices, hold the used cells by arbitration of the arbiter. A memory management device which instructs a specific cache device to perform a collection operation, and the cache device which has received the collection instruction interrupts its own CPU and causes the first garbage collection unit to execute a collection process. (5) (Supplementary note 9) In the memory management device according to supplementary note 8, the CPU that searches the heap area by the first garbage collection unit to search for a used cell stores a free list in its own cache device. A memory management, which issues a create instruction (make-free-list instruction), and the cache device that receives the free list creation instruction issues a free list creation command (make-free-list command) to the snoop bus. apparatus. (6) (Supplementary Note 10) In the memory management device according to Supplementary Note 8, when the collected used cells completely include one or more cache blocks, the cache device that has lost the arbitration corresponds to the cache device. A memory management device for transitioning a cache block to an invalid state. (7) (Supplementary Note 11) In the memory management device according to Supplementary Note 8, when a response to an inquiry about retention of a used cell that can be collected is made only from a specific cache device to the snoop bus, the cache device that has made a response. Interrupts its own CPU and causes the first garbage collection unit to execute a collection process. (8) (Supplementary Note 12) In the memory management device according to Supplementary Note 8, when none of the cache devices holds a recoverable used cell, the shared memory is used for the cache device of the CPU determined to be recoverable. A memory management device for reading a used cell and executing a collection process by the first dust collection unit. (Supplementary note 13) In the memory management device according to Supplementary note 8, when none of the cache devices holds a recoverable used cell, a CP randomly selected on the shared memory side is used.
A memory management device for sending a used cell that can be collected to a U cache device and causing the first garbage collection unit to execute a collection process. (9) (Supplementary note 14) In a memory management method of a parallel computer in which a plurality of processors each having a CPU and a cache device and a shared memory are connected via a bus, a function created in a stack area of the shared memory by a function call A memory allocation step of allocating an unused cell of a heap area composed of a memory area separated into cells to necessary data along with execution of a frame, and when an unused cell of the heap area becomes empty, A first garbage collection step of searching the heap area to divide into used cells and used cells, collecting the used cells and returning them to unused cells, and the used cells become used cells after execution of the function frame The second garbage collection step collects used cells other than those collected in the first collection step and returns them to unused cells at the end of execution of the function frame. And a memory management method for a parallel computer. (10) (Supplementary note 15) In the memory management method according to supplementary note 14,
The heap area is managed by a first list in which unused cells are connected by a pointer, and the second collection step registers and manages used cells that become unnecessary after execution of a function in a second list (reclaim-list). The memory management method according to claim 1, wherein the first refuse collection step removes cells collected in the final phase from the second list. (11) (Supplementary note 16) In the memory management method according to supplementary note 15,
Each cell of the heap area has a flag that is turned off when data is allocated and turned on when returning to the first list, and the first garbage collection step is a process in which the flag is turned on in the final phase. A memory management method, wherein a cell is removed from the second list. (Supplementary note 17) In the memory management method according to supplementary note 14,
A memory management method, wherein each cell of the heap area has a pointer area for storing a pointer linked to the second list. (Supplementary note 18) In the memory management method according to supplementary note 14,
The second list has a list structure in which one or more cells are linked by a link in which a data pointer indicating a used cell which is used after execution of a function and a link pointer indicating a next link destination are set. A memory management method comprising: (Supplementary note 19) In the memory management method according to supplementary note 14,
The first list prepares a plurality of types of unused cells having different sizes for each of the CPUs, and the memory allocating step is allocated to the CPU when a data allocation request is received by a specific CPU. A memory management method comprising: selecting and allocating unused cells having a size corresponding to a data amount from a first list. (Supplementary note 20) In the memory management method according to supplementary note 14,
When an arbitrary CPU executes a search for a heap area in the first garbage collection step and searches for a used cell,
The other cache devices are inquired about the holding of the used cells that can be collected, and when there is a response from a plurality of cache methods, the specific cache method holding the used cells is instructed to perform the collection operation and the CPU is instructed. A memory management method, wherein a collection process in the first dust collection step is executed. (12) (Supplementary note 21) In the memory management method according to supplementary note 14,
When an arbitrary CPU executes a search for a heap area in the first garbage collection step and searches for a used cell,
Using the snoop bus from its own cache method, the other cache devices are inquired about the retention of the used cells that can be collected, and if there is a response to the snoop bus arbiter from a plurality of cache methods, it is used by the arbiter of the arbiter. A specific cache device holding cells is instructed to perform a collection operation, and the cache method receiving the collection instruction interrupts its own CPU to execute the collection process in the first garbage collection step. How to manage memory. (13) (Supplementary note 22) In the memory management method according to supplementary note 21,
The CPU, which has searched the used cell by executing the search of the heap area in the first garbage collection step, sends a free list creation instruction (make-free-lis) to its own cache device.
t command), and the cache device that has received the free list creation command issues a free list creation command (make-free
-list command) to the snoop bus. (Supplementary note 23) In the memory management method according to supplementary note 21,
When the collected used cell completely includes one or a plurality of cache blocks, the cache method losing the arbitration causes the corresponding cache block to transition to an invalid state. (Supplementary note 24) In the memory management method according to supplementary note 21,
When a response to the snoop bus from only a specific cache device in response to the inquiry about the retention of the used cells that can be collected is performed, the cache device that has responded interrupts its own CPU and performs the collection process in the first garbage collection step. A memory management method. (Supplementary note 25) In the memory management method according to supplementary note 21,
In a case where none of the cache devices holds the reusable used cells, the cache device of the CPU determined to be retrievable reads the used cells from the shared memory and executes the collection process in the first garbage collection step. A memory management method comprising: (Supplementary note 26) In the memory management method according to supplementary note 21,
If none of the cache devices holds a recoverable used cell, a C randomly selected on the shared memory side is used.
A memory management method, comprising: sending a reusable used cell to a PU cache device to execute a collection process in the first garbage collection step.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is an explanatory diagram of a system configuration of a parallel computer according to the present invention.

FIG. 3 is a block diagram of a functional configuration of the present invention.

FIG. 4 is a block diagram of a functional configuration of a memory management unit in FIG. 3;

FIG. 5 is an explanatory diagram of cells arranged in a heap used for data allocation according to the present invention.

FIG. 6 is an explanatory diagram of a function frame having a reclaim list area.

FIG. 7 is an explanatory diagram of a cell having a reclaim list pointer area.

FIG. 8 is an explanatory view of a reclaim list using a cons cell list structure.

FIG. 9 is a flowchart of a memory allocation process of the present invention including a second trash collection process in a final phase.

FIG. 10 is a flowchart of the first garbage collection process of the present invention activated when the free list becomes empty.

FIG. 11 is an explanatory diagram of a process of collecting a free list of a cache device when the CPU searches for a used cell that can be collected;

FIG. 12 is a block diagram of a functional configuration in the collection processing of FIG. 11;

FIG. 13 is an explanatory diagram of a list structure of used cells that can be collected in FIG. 12;

FIG. 14 is a time chart of the procedure of the collection process in FIG. 12;

FIG. 15 is a diagram illustrating a conventional method of managing a gate memory.

FIG. 16 is an explanatory diagram of a conventional garbage collection.

FIG. 17 is an explanatory diagram of a conventional method of allocating unnecessary data to a stack after a function ends by escape analysis.

FIG. 18 is an explanatory diagram of data that can be collected during execution of a sample program.

[Explanation of symbols]

10, 10-1 to 10-n: Processor module 12, 12-1 to 12-n: CPU 14, 14-1 to 14-n: Cache device 16: Snoop bus 18: Arbiter 20: Shared memory 22: Heap area 24: List area 24-1 to 24-n, 34-1 to 34-n: Free list (first list) 25: Stack area 26, 26-1 to 26-3: Function frame 28-1 to 28-3 : Reclaim list (second list) 30-1 to 30-n: Memory management unit 32-1 to 32-n: Function execution unit 36-1 to 36-n: Cell group 38: Memory allocation unit 40: First Garbage collection unit 42: Second garbage collection unit 44: Cell 46: Header 48: Data 50: Pointer area 52: Free flag 60: Reclaim list area 66: Reclaim list pointer area 6 8-1 to 68-3: Cons cell 70-1 to 70-3: Data pointer 72-1 to 72-3: Cell pointer

Claims (13)

[Claims] In a memory management device of a parallel computer in which a plurality of processors each having a CPU and a cache device and a shared memory are connected via a bus, the memory management device is composed of a memory area divided into cells serving as data allocation units. A memory allocating unit that allocates unused cells of the heap area to data necessary for execution of a function frame created in the stack area of the shared memory by a function call, and an unused cell of the heap area. A first garbage collection unit which searches the heap area to divide into used cells and used cells when it becomes empty, and collects the used cells and returns them to unused cells; Analyze whether or not it becomes a used cell after the execution, and at the end of the execution of the function frame, collect the used cells except the collected by the first garbage collection unit and turn them into unused cells. A memory management device for a parallel computer, comprising: a second garbage collection unit for returning. 2. The memory management device according to claim 1, wherein
The heap area is managed by a first list (free-list) in which unused cells are connected by a pointer, and the second garbage collection unit removes unused cells that become unnecessary after execution of the function by a second list (reclaim).
a memory management device, wherein the first trash collection unit removes collected cells from the second list in the final phase. 3. The memory management device according to claim 2, wherein:
Each cell in the heap area has a flag (free-flag) which is turned off when data is allocated and turned on when returning to the first list, and the first garbage collection unit turns on the flag in the final phase. A memory management device that removes a busy cell from the second list. 4. The memory management device according to claim 1, wherein:
When an arbitrary CPU searches for a used cell by executing a search of the heap area by the first garbage collection unit, another cache device is inquired about holding of the used cell that can be collected, and responses from a plurality of cache devices are returned. A memory management device for instructing a specific cache device holding used cells to perform a collection operation and causing the CPU to execute a collection process by the first garbage collection unit. 5. The memory management device according to claim 1, wherein:
When an arbitrary CPU searches for a used cell by executing a search of the heap area by the first garbage collecting unit, the used cell of the used cache that can be collected by another cache device from its own cache device using a snoop bus. Query retention,
When a response is received from the plurality of cache devices to the snoop bus arbiter, the arbiter of the arbiter instructs the specific cache device holding the used cell to perform a collection operation, and the cache device that has received the collection instruction issues a response to the request. A memory management device for causing the first garbage collection unit to execute a collection process by interrupting the CPU. 6. The memory management device according to claim 5, wherein:
The CPU, which has searched the used cell by executing the search of the heap area by the first garbage collection unit, sends a free list creation instruction (make-free-list instruction) to its own cache device.
And the cache device receiving the free list creation command issues a free list creation command (make-free-list command) to the snoop bus. 7. The memory management device according to claim 5, wherein:
When the collected used cell completely includes one or a plurality of cache blocks, the cache device that has lost the arbitration causes the corresponding cache block to transition to an invalid state. 8. The memory management device according to claim 5, wherein:
If a response to the snoop bus is received from only a specific cache device in response to the inquiry about the retention of the used cells that can be collected, the cache device that has responded interrupts its own CPU and performs the collection process by the first garbage collection unit. A memory management device. 9. The memory management device according to claim 4, wherein:
If none of the cache devices holds a recoverable used cell, a C randomly selected on the shared memory side is used.
A memory management device, comprising: sending a used cell that can be collected to a PU cache device and causing the first garbage collection unit to execute a collection process. 10. A memory management method for a parallel computer in which a plurality of processors each having a CPU and a cache device and a shared memory are connected via a bus, wherein execution of a function frame created in a stack area of the shared memory by a function call is executed. A memory allocation step of allocating unused cells of a heap area composed of memory areas separated into cells to necessary data according to the above, and the heap area is allocated when the unused cells of the heap area become empty. A first garbage collection step of searching and separating used cells and used cells, collecting the used cells and returning them to unused cells, and determining whether the used cells become used cells after execution of the function frame Analyzing, at the end of the execution of the function frame, collecting a used cell other than the collected cell in the first collecting step and returning it to an unused cell; Memory management method of a parallel computer, characterized in that it comprises a. 11. The memory management method according to claim 10, wherein said heap area is managed by a first list in which unused cells are linked by a pointer, and said second collection step becomes unnecessary after execution of a function. Medium cells in second list (reclaim-list)
The first garbage collection step removes the cells collected in the final phase from the second list. 12. The memory management method according to claim 10, wherein when an arbitrary CPU searches for a used cell by executing a search of a heap area in said first garbage collection step, the CPU collects the used cell in another cache device. Inquiring about possible used cell holding, and when receiving a response from a plurality of cache methods, instructing a specific cache method holding used cells to perform a collecting operation and instructing the CPU of the first garbage collecting step. A memory management method for causing a collection process to be executed. 13. A memory management method according to claim 10, wherein when an arbitrary CPU executes a search for a heap area in said first garbage collection step to search for a used cell, a snoop is sent from its own cache device. Inquiry of another cache device using the bus for holding of the used cell that can be collected, and when there is a response to the snoop bus arbiter from a plurality of cache devices, the arbiter of the arbiter holds the used cell. A specific cache device is instructed to perform a collection operation, and the cache device that has received the collection instruction interrupts its own CPU, and
A memory management method, wherein a collection process is performed in a trash collection step.