JP2002118336A - Wiring board and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the flatness of the wiring surface of a wiring board having a fine wiring pattern. SOLUTION: The wiring board comprises an insulating board and wirings composed of a first conductive layer (base metal layer) on the surface of the insulating board and a second conductive layer (metal plating layer) on the first conductive layer. The second conductive layer of the wiring board is insoluble to an etching solution for dissolving the first conductive layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board and a method of manufacturing the same, and more particularly to a technique effective when applied to a wiring board having a small wiring interval (pitch) for mounting a small semiconductor chip.

[0002]

2. Description of the Related Art Conventionally, a wiring board on which a semiconductor chip is mounted, which is used for a semiconductor device or the like, is shown in FIGS.
As shown in (b), for example, a metal wiring 2 such as copper (Cu) is formed on an insulating substrate 1 such as a polyimide tape. The wiring 2 on the wiring board is generally formed by bonding a copper foil on the insulating substrate 1, applying a photoresist on the copper foil to form a resist film corresponding to a wiring pattern, and then forming the resist film on the wiring board. It is formed by etching the copper foil using as a mask. At this time, the resist film is formed in a portion to be left as the wiring 2.

[0003] The semiconductor chips used in the semiconductor device have been reduced in size and function, and the wirings 2 on a wiring board on which the semiconductor chips are mounted have become denser, and the spacing (pitch) between the wirings 2 has also gradually decreased. Is coming. In the method of etching and removing unnecessary portions of the copper foil using the resist film of the photoresist as a mask, the accuracy of etching is reduced when the wiring interval is narrow, and defects such as residual etching are likely to occur. Therefore, the wiring interval is about 40 μm. Is said to be the limit. For this reason, in order to further reduce the wiring interval, the additive plating method is used, as shown in FIG.
As shown in (c), a method of forming the wiring 2 in which the copper plating 202 is provided on the copper foil as the base metal layer 205 is used.

In a method of manufacturing a wiring board using the additive plating method, a thin copper foil 205 'having a thickness of, for example, about 3 μm is adhered as a base metal layer on an insulating substrate 1 such as the polyimide. On the copper foil 205 ′, a photoresist is applied, exposed, and developed to form a resist film 5. At this time, the resist film 5 is formed such that a portion where the wiring 2 is formed is opened, in other words, It is formed at a portion where the copper foil 205 'is removed in order to separate wirings. Then, using the resist film 5 as a mask, FIG.
As shown in (a), for example, by an electrolytic copper plating method,
A metal plating layer (copper plating layer) 202 is formed by applying copper plating to the opening of the resist film 5, that is, the wiring forming portion. After the formation of the copper plating layer 202, FIG.
As shown in FIG. 6, by removing the resist film 5 and etching the underlying metal layer (copper foil) 205 ',
The wiring 2 as shown in (c) is formed. At this time,
The copper plating layer 202 formed in the wiring forming portion serves as an etching mask. Further, at this time, in order to separate the wirings, it is only necessary to etch the thin copper foil 205 'as the base, so that even in the case of a wiring pattern with a narrow wiring interval, unnecessary portions can be surely removed.

[0005]

However, in the conventional wiring forming method using the additive plating method,
As shown in FIG. 7B, the base metal layer (copper foil) 2
Metal plating layer (copper plating layer) 20 formed on 05 ′
2 replaces the etching mask, the copper foil 2
When etching 05 ′, the surface of the copper plating layer 202 is also etched. Therefore, as shown in FIG. 7C, a corner (edge) 2 of the copper plating layer 202 is formed.
02A may be rounded and the flatness of the wiring surface may be poor. Since the copper plating layer is also used for connection with an external electrode of a semiconductor device, if the edge is rounded or flatness deteriorates, when the semiconductor chip is mounted, the connection with the external electrode of the semiconductor chip is made. There has been a problem that reliability is reduced.

Further, in order to prevent the surface of the copper plating layer 202 from being etched, after the copper plating layer 202 is formed, for example, a gold (Au) plating layer 206 is formed and then the resist film 5 is removed. As shown in FIG. 7 (d), there is a method of etching the copper foil 205 ′ so that the gold plating layer 206 serves as a mask, but in this case, the material cost is increased because gold is used. Will increase. In addition, there is a problem that the manufacturing cost of the wiring board increases because the number of steps for applying the gold plating increases and the manufacturing time increases.

An object of the present invention is to provide a technique capable of improving the flatness of the wiring surface of a wiring board having a fine wiring pattern.

Another object of the present invention is to provide a technique capable of efficiently and inexpensively manufacturing a wiring substrate having good wiring surface flatness.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

The summary of the invention disclosed in the present invention is as follows.

(1) Wiring comprising an insulating substrate, a first conductive layer (base metal layer) provided on the surface of the insulating substrate, and a second conductive layer (metal plating layer) provided thereon. Wherein the second conductive layer is insoluble or hardly soluble in an etching solution in which the first conductive layer dissolves.

According to the means (1), the second conductive layer (metal plating layer) hardly dissolves in an etching solution used for etching the first conductive layer (base metal layer). Therefore, a wiring board having a wiring with good flatness on the surface of the metal plating layer can be obtained. At this time,
For the base metal layer, tin (Sn), aluminum (Al), zinc (Zn), or the like is used instead of conventional copper (Cu). At this time, the metal plating layer includes copper (Cu), nickel (Ni), and silver as metals insoluble or hardly soluble in an etching solution for dissolving tin (Sn), aluminum (Al), and the like. (Ag), gold (Au), lead (Pb), rhodium (Rh), platinum (P
t), tin (Sn) or the like is used. However, when tin is used for the base metal layer, a metal other than tin is used for the metal plating layer. Further, as the base metal layer,
When copper is used as in the prior art, gold is used for the metal plating layer as a metal that does not dissolve in an acidic solution such as an ammonia solution which is a copper etching solution.

(2) forming a first conductive layer (base metal layer) on the surface of the insulating substrate; forming a resist film corresponding to a wiring pattern on the first conductive layer; Forming a second conductive layer (metal plating layer) that is insoluble or hardly soluble in an etching solution for dissolving the first conductive layer on the first conductive layer using the film as a mask; A method for manufacturing a wiring board, comprising: a step of removing; and a step of forming a wiring by dissolving the first conductive layer using the second conductive layer as a mask.

According to the means (2), when forming the wiring by etching the first conductive layer using the second conductive layer as a mask, the second conductive layer is etched by the first conductive layer. Since it hardly dissolves in the solution, the second
It can prevent the corners (edges) from being rounded due to melting of the conductive layer and the surface flatness from being deteriorated. Therefore, for example, a connection failure when connecting the wiring and the external electrode of the semiconductor chip can be reduced.

In the means (2), various kinds of metals, such as a combination of the base metal layer and the metal plating layer, may be used.
Alternatively, a combination of alloys and the like can be considered.
As a step of forming a conductive layer, one of tin (Sn) foil, aluminum (Al) foil, zinc (Zn) foil, and copper (Cu) is bonded to the surface of the insulating substrate;
As a step of forming the second conductive layer, copper (Cu), nickel (Ni), silver (Ag), gold (Au), lead (P
b), by forming any metal plating of rhodium (Rh), platinum (Pt), and tin (Sn), a wiring board can be formed by using a material and a manufacturing apparatus used in a conventional wiring board. Can be manufactured. Further, when copper is used as the base metal layer as in the related art, a method of forming gold plating that is not dissolved by an acidic solution such as an ammonia solution as a copper etching solution may be used as the metal plating layer. An increase in manufacturing costs due to an increase in material costs and an increase in manufacturing processes can be prevented. Therefore, a wiring substrate having a fine wiring pattern and good wiring surface flatness can be easily manufactured at low cost.

Hereinafter, the present invention will be described in detail together with embodiments (examples) with reference to the drawings.

In all the drawings for explaining the embodiments, parts having the same functions are given the same reference numerals, and their repeated explanation is omitted.

[0018]

(Embodiment 1) FIG. 1 is a schematic diagram showing a schematic configuration of a wiring board according to Embodiment 1 of the present invention.
1A is a schematic plan view of the entire wiring board, FIG. 1B is a partially enlarged view of FIG. 1A, and FIG. 1C is A in FIG. 1B.
It is sectional drawing in the -A 'line.

In FIG. 1, 1 is an insulating substrate, 2 is a wiring, 201 is a first conductive layer (base metal layer), and 202 is a second conductive layer.
The conductive layer (metal plating layer) 3 is a semiconductor chip mounting area.

As shown in FIGS. 1 (a) and 1 (b), a wiring board according to the first embodiment is formed on an insulating substrate 1 such as a polyimide tape and a surface of the insulating substrate 1. And one end of the wiring 2 extends to the semiconductor chip mounting area 3.

As shown in FIG. 1C, the wiring 2 has a structure in which a first conductive layer 201 and a second conductive layer 202 are sequentially laminated on the insulating substrate 1. At this time, the second conductive layer 202 has the first conductive layer 2
A metal material that is insoluble or hardly soluble in an etching solution for dissolving 01 is used. In the wiring board according to the first embodiment, tin (Sn) is used as the first conductive layer 201. An etching solution of tin used as the first conductive layer 201 is, for example, 10% of potassium hydroxide (KOH).
Since the second conductive layer 202 is an aqueous solution or the like, copper (Cu) hardly soluble in the aqueous potassium hydroxide solution is provided on the second conductive layer 202.
Is used.

FIG. 2 is a schematic cross-sectional view for explaining the method of manufacturing the wiring board according to the first embodiment, and shows a cross section corresponding to the line AA ′ in FIG. . Hereinafter, a method for manufacturing the semiconductor device of the first embodiment will be described with reference to FIG.

First, as shown in FIG. 2A, a tin foil (Sn) rolled to a thickness of, for example, about 3 μm is formed on the surface of an insulating substrate 1 such as a polyimide tape as a base metal layer of the wiring 2. The foil 201 ′ is bonded using an adhesive (not shown). At this time, the insulating substrate 1 is not shown, but is in the form of an elongated tape in which, for example, sprocket holes, positioning pin holes, and via holes are formed at predetermined positions. A plurality of wiring board formation regions are provided in the board.

Next, as shown in FIG. 2B, for example, a positive photoresist 4 is applied on the tin foil 201 ', and is exposed and developed using a mask corresponding to a predetermined wiring pattern. Then, a resist film 5 as shown in FIG. 2C is formed. At this time, the resist film 5 is
Are formed so as to remain in portions where no is formed.

Next, for example, using an electrolytic copper plating method,
As shown in FIG. 2D, a copper plating layer having a thickness of several tens μm is formed as a second conductive layer 202 on the tin foil 201 ′ using the resist film 5 as a mask. As shown in FIG. 7, the resist film 5 is removed.

Then, using the copper plating layer 202 as a mask, the tin foil 201 'is etched with, for example, a 10% aqueous solution of potassium hydroxide, as shown in FIG.
The wiring 2 as shown in FIG. 1B and FIG. 1C is formed. At this time, the copper plating layer 202 serves as a mask at the time of etching, but copper hardly dissolves in an aqueous solution of potassium hydroxide, so that when the tin foil 201 ′ is etched, the copper plating layer 202 is reduced or The corners (edges) are rounded, and the flatness of the surface of the copper plating layer 202 can be prevented from being deteriorated.

As described above, according to the first embodiment, the first conductive layer (base metal layer) 20 is formed on the insulating substrate 1.
1 is a tin foil, and a second conductive layer (metal plating layer) 20
By using copper plating as 2, when etching the tin foil, the copper plating is not etched at the same time, so that the flatness of the surface of the wiring 2 can be prevented from being deteriorated. Further, the flatness of the surface of the wiring 2 is improved, so that connection reliability when connecting a semiconductor chip or the like is improved.

In the wiring board of the first embodiment, tin (Sn) is used as the base metal layer 201 and the metal plating layer 202.
And copper (Cu), and can be manufactured in the same process as the conventional process of manufacturing a wiring substrate by the additive plating method only by changing the material of the base metal and the etching solution. Therefore, without increasing the number of manufacturing processes,
A wiring board having a fine wiring pattern and good flatness on the wiring surface can be easily manufactured at low cost.

In the first embodiment, a copper plating layer is formed as the second conductive layer (metal plating layer) 202. However, the present invention is not limited to this. For example, a nickel (Ni) plating layer may be formed. . Also in this case, since the nickel is hardly dissolved in the aqueous solution of potassium hydroxide, which is an etching solution for the tin foil 201 ', the tin foil 201' can be etched using the nickel plating as a mask. Similar effects can be obtained.

Further, a tin foil is used as the first conductive layer,
By using a copper plating layer or a nickel plating layer as the second conductive layer, not only the flatness of the wiring surface is improved, but also the connectivity between the first conductive layer and the second conductive layer is improved. A highly reliable wiring board with less peeling of layers can be obtained. In the case where a copper plating layer is used as the second conductive layer, since a base portion of the wiring is made of copper, a wiring having a low electric resistance can be formed similarly to a conventional copper wiring.

In the case where nickel plating is used as the second conductive layer 202, for example, after a nickel plating layer is formed by a method as shown in FIG. 2D, the thickness is further reduced from 0.5 μm to 2 μm. It is also possible to form a gold plating layer to a certain extent and to etch the tin foil 201 ′ using the gold plating layer as a mask. In this case, since the surface of the wiring 2 is a gold plating layer, the connection reliability when bonding to a semiconductor chip and mounting on a mounting substrate is improved, and the corrosion resistance of the wiring surface is improved by the gold plating layer. 20
During the etching of 1 ', the potential difference between tin and gold is large, and the selective dissolution of the tin foil 201' is further promoted.

When tin (Sn) is used as the first conductive layer (base metal layer) 201 as in the wiring board of the first embodiment, copper (C) is used as the second conductive layer 202.
u) and nickel (Ni), for example, silver (A
g) Use of a metal material such as gold (Au), lead (Pb), rhodium (Rh), and platinum (Pt) that is insoluble or hardly soluble in an aqueous solution of potassium hydroxide as an etching solution for tin. Can be.

(Embodiment 2) FIG. 3 shows Embodiment 2 according to the present invention.
FIG. 4A is a schematic diagram showing a schematic configuration of the wiring board of FIG.
3B is a partially enlarged view of the wiring board, and FIG.
It is sectional drawing in the -B 'line.

In FIG. 3, 1 is an insulating substrate, 2 is a wiring, 202 is a second conductive layer (metal plating layer), 203 is a first conductive layer (base metal layer), 204 is a zinc (Zn) crystal layer, Reference numeral 3 denotes a semiconductor chip mounting area.

The wiring board according to the second embodiment is similar to the wiring board according to the first embodiment, and as shown in FIG.
It comprises an insulating substrate 1 such as a polyimide tape and wiring 2 formed on the surface of the insulating substrate 1, and one end of the wiring 2 extends to the semiconductor chip mounting area 3.

The wiring 2 of the wiring board of the second embodiment
In this case, as shown in FIG. 3B, aluminum (Al) is used as the first conductive layer (base metal layer) 203 on the insulating substrate 1, and zinc (Z) is formed on the aluminum.
n) Second conductive layer (metal plating layer) via crystal layer 204
202 are stacked. The etching solution of aluminum used as the first conductive layer 203 is:
For example, since the second conductive layer 202 is a potassium hydroxide aqueous solution or a sodium hydroxide aqueous solution, for example, copper (Cu) is used as a metal material that is hardly soluble in the potassium hydroxide aqueous solution.

FIGS. 4 and 5 are schematic cross-sectional views for explaining the method of manufacturing the wiring board according to the second embodiment. In each of the steps, a cross-section corresponding to the line AA ′ in FIG. Is shown. Hereinafter, a method for manufacturing the semiconductor device of the first embodiment will be described with reference to FIGS.

First, as shown in FIG. 4A, an aluminum foil (Al) rolled to a thickness of, for example, about 3 μm on the surface of an insulating substrate 1 such as a polyimide tape as a thin underlayer metal layer 203. The foil 203 'is bonded using an adhesive (not shown). At this time, the insulating substrate 1
Although not shown, the tape-shaped substrate is formed in an elongated tape shape having, for example, sprocket holes, pin holes for positioning, via holes, and the like, and a plurality of wiring substrate forming regions are provided in the tape-shaped substrate. Have been.

Next, as shown in FIG. 4B, for example, a positive type photoresist 4 is applied on the aluminum foil 203 ', and exposed and developed using a mask corresponding to a predetermined wiring pattern. Thus, a resist film 5 as shown in FIG. 4C is formed. At this time, the resist film 5
The wiring is formed so as to remain in a portion where the wiring is not formed.

Next, plasma cleaning or cleaning with a phosphoric acid solution is performed to remove contaminants such as organic substances or oxide layers on the surface of the aluminum foil 203 '. afterwards,
A substitution treatment (zincate treatment) between aluminum and zinc (Zn) is performed, and as shown in FIG.
4 is formed.

Next, for example, using an electrolytic copper plating method,
As shown in FIG. 5E, a copper plating layer having a thickness of, for example, several tens μm is formed as a second conductive layer (metal plating layer) 202 on the aluminum foil 203 ′ using the resist film 5 as a mask. After that, the resist film 5 is removed as shown in FIG.

Then, using the copper plating layer 202 as a mask, the aluminum foil 203 'is etched with, for example, a 10% aqueous solution of potassium hydroxide (KOH), as shown in FIGS. 3 (b) and 3 (c). The wiring 2 as described above is formed. At this time, the copper plating layer 20
2 hardly dissolves in the aqueous potassium hydroxide solution, so that the etching of the aluminum foil 203 ′ causes the copper plating layer 202 to be reduced or the corners (edges) to be rounded, and the surface of the copper plating layer 202 to be removed. The flatness can be prevented from being deteriorated.

As described above, according to the second embodiment, the first conductive layer (base metal layer) 20 is formed on the insulating substrate 1.
By using an aluminum foil (Al foil) as 3 and using copper plating as the second conductive layer (metal plating layer) 202, the copper plating layer 202 is not etched when etching the aluminum foil. So
The flatness of the surface of the wiring 2 can be prevented from being deteriorated. Also,
Since the flatness of the surface of the wiring 2 is improved, the connection reliability when connecting a semiconductor chip or the like is improved.

In the wiring board of the second embodiment, since the first conductive layer 203 and the second conductive layer 202 are made of aluminum (Al) and copper (Cu), the material of the underlying metal and the etching solution By simply changing the wiring pattern, the wiring board can be manufactured in the same process as the conventional manufacturing process of the wiring board by the additive plating method. Therefore, it is possible to easily and inexpensively manufacture a wiring board having a fine wiring pattern and good wiring surface flatness without increasing the materials and manufacturing steps used for manufacturing the wiring board.

In the second embodiment, a copper plating layer is formed as the second conductive layer (metal plating layer) 202. However, the present invention is not limited to this. For example, a nickel (Ni) plating layer may be formed. Also in this case, nickel hardly dissolves in an aqueous solution of potassium hydroxide, which is an etching solution for the aluminum foil 203 ', so that the aluminum foil 203' can be etched using the nickel plating as a mask, The same effect as the substrate can be obtained.

Further, by using an aluminum foil as the first conductive layer and using a copper plating layer or a nickel plating layer as the second conductive layer, not only is the wiring surface flat, but also the first conductive layer Since the connection between the second conductive layer and the second conductive layer is also good, a highly reliable wiring board with little peeling of the second conductive layer can be obtained. In the case where a copper plating layer is used as the second conductive layer, since a base portion of the wiring is made of copper, a wiring having a low electric resistance can be formed similarly to a conventional copper wiring.

When nickel plating is used as the second conductive layer 202, for example, after a nickel plating layer is formed by a method as shown in FIG. It is also possible to form a gold plating layer to a certain extent, and to etch the aluminum foil 203 ′ using the gold plating layer as a mask. In this case, since the surface of the wiring 2 is a gold plating layer, connection reliability when bonding to a semiconductor chip and mounting on a mounting substrate is improved, and the corrosion resistance of the wiring surface is improved by the gold plating layer, and the aluminum During the etching of the foil 203 ', the potential difference between aluminum and gold is large, and the aluminum foil 203'
Is further promoted.

Further, as in the wiring board of the second embodiment, aluminum (A) is used as the first conductive layer (base metal layer) 203.
When 1) is used, as the second conductive layer 202,
Not limited to copper (Cu) and nickel (Ni), for example, silver (Ag), gold (Au), lead (Pb), rhodium (R
h) and a metal material such as platinum (Pt) that is insoluble or hardly soluble in an aqueous solution of potassium hydroxide or an aqueous solution of sodium hydroxide, which is an etching solution for the aluminum foil.

As described above, the present invention has been specifically described based on the above-described embodiment. However, the present invention is not limited to the above-described embodiment, and may be variously modified without departing from the gist thereof. Of course.

For example, in the above embodiment, tin (Sn), aluminum (Al) is used as the first conductive layer (base metal layer).
Although a metal material other than copper (Cu) conventionally used is used, the present invention is not limited to this. Copper is used as the first conductive layer (base metal layer), and the second conductive layer (metal plating layer) is used. )
Can also be used as gold. In this case, the copper etching solution is an acidic solution such as an aqueous ammonia solution. However, since gold (Au) is insoluble in the acidic solution, the flatness of the wiring surface is deteriorated by the etching of the copper foil. Can be prevented. However, when a gold plating layer is formed on a thin copper foil as described in the above embodiment, the amount of gold (Au) to be used increases and the manufacturing cost of the wiring board increases, so that the copper foil is thickened. Therefore, measures such as reducing the amount of gold plating are required. At this time, if the copper foil is thickened, etching defects as in the prior art are likely to occur, so it is necessary to appropriately select the thickness of the copper foil and the thickness of the gold plating layer.

For the first conductive layer (base metal layer), for example, zinc (Zn) can be used in addition to tin (Sn) and aluminum (Al). At this time, the second conductive layer (metal plating layer) may be made of a metal material that is insoluble or hardly soluble in an etching solution of the base metal layer, for example, copper (Cu), nickel (Ni), silver (Ag), gold (Au), lead (Pb), rhodium (Rh), platinum (Pt), tin (Sn), or the like can be used. However, when the base metal is tin, it goes without saying that a metal material other than tin is used for the metal plating layer.

[0052]

According to the invention disclosed in the present invention,
The effect obtained by the representative one will be briefly described as follows.

(1) The flatness of the wiring surface of a wiring board having a fine wiring pattern can be improved.

(2) It is possible to manufacture a wiring board with good flatness of the wiring surface at low cost and efficiently.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a schematic configuration of a wiring board according to a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining the method for manufacturing the wiring board of the first embodiment.

FIG. 3 is a schematic diagram illustrating a schematic configuration of a wiring board according to a second embodiment of the present invention.

FIG. 4 is a schematic cross-sectional view for explaining the method for manufacturing the wiring board of the second embodiment.

FIG. 5 is a schematic cross-sectional view for explaining the method for manufacturing the wiring board of the second embodiment.

FIG. 6 is a schematic diagram showing a schematic configuration of a conventional wiring board.

FIG. 7 is a schematic cross-sectional view for explaining a conventional method for manufacturing a wiring board and problems.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 insulating substrate 2 wiring 201, 203, 205 first conductive layer (base metal layer) 201 ′ tin foil 203 ′ aluminum foil 205 ′ copper foil 202 second conductive layer (metal plating layer, copper plating layer) 204 zinc crystal layer 206 Gold plating layer 207 Wiring corner (edge) 3 Semiconductor chip mounting area 4 Photoresist 5 Resist film

Continued on the front page F-term (reference) 4E351 AA01 AA06 BB01 BB24 BB33 BB35 CC06 DD04 DD05 DD06 DD10 DD12 DD19 DD20 GG01 5E319 AA03 AC01 AC17 CD04 GG01 5E339 BD03 BD05 BD08 BD11 BE11 BE17 CD01 CE12 CE15 CG04 GG02 ABB BB23 ABB BB02 BB02 ABB02A BB28 BB34 BB44 BB47 BB48 BB71 CC61 DD43 DD76 ER18 ER22 ER25 GG08

Claims (5)

[Claims] An insulating substrate and a wiring comprising a first conductive layer (base metal layer) provided on the surface of the insulating substrate and a second conductive layer (metal plating layer) provided thereon. The wiring substrate according to claim 1, wherein the second conductive layer is insoluble or hardly soluble in an etching solution in which the first conductive layer is dissolved. 2. The wiring board according to claim 1, wherein the first conductive layer is made of tin (Sn), aluminum (A).
1) A wiring board, which is one of zinc (Zn) and copper (Cu). 3. The semiconductor device according to claim 1, wherein said second conductive layer is made of copper (Cu), nickel (Ni), silver (Ag), gold (Au), lead (Pb), Rhodium (R
h), any one of platinum (Pt) and tin (Sn), or an alloy thereof. 4. A step of forming a first conductive layer (base metal layer) on a surface of an insulating substrate; a step of forming a resist film corresponding to a wiring pattern on the first conductive layer; Forming a second conductive layer (metal plating layer) that is insoluble or hardly soluble in an etching solution for dissolving the first conductive layer on the first conductive layer, using the mask as a mask, and removing the resist film And forming a wiring by dissolving the first conductive layer using the second conductive layer as a mask. 5. The method of manufacturing a wiring board according to claim 4, wherein the step of forming the first conductive layer comprises a tin (Sn) foil, an aluminum (Al) foil, a zinc (Zn) foil, and a copper (Cu)
Bonding one of the metal foils to the surface of the insulating substrate and forming the second conductive layer includes copper (Cu), nickel (Ni), silver (Ag), gold (Au), A method of manufacturing a wiring board, comprising forming a metal plating made of any one of lead (Pb), rhodium (Rh), platinum (Pt), tin (Sn), or an alloy thereof.