JP2002078228A - Power-supply system for buffer battery - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power-supply circuit for a buffer battery that largely reduces the voltage transient phenomenon. SOLUTION: It is shown in one embodiment that a battery-charger circuit supplies the total output current. The total output current is fed to both of an operating system 24 and a battery 18, and is detected and is compared with a preset-threshold total output-current signal. The current sent to the battery is also detected and compared with a preset-threshold battery-current signal. The compared signal generates an error signal. The error signal is provided to the battery-charger circuit as a feedback. Thereby, the total output current is controlled.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to battery power supply systems and, more particularly, to a buffered battery charger circuit that can control the power supplied to an operating system and a rechargeable battery. A utility unique to the present invention resides in a power supply system for a portable electronic device. However, other utilities are also contemplated here.

[0002]

2. Description of the Related Art FIG.
FIG. 1 is a simplified block schematic diagram of a conventional general powering topology 20 for a portable electronic system 24. The operating system 24 obtains power from either the battery 18 or the external input power adapter 10.
The power is regulated by the system DC / DC converter 22. The input power adapter 10 obtains power from an external primary power source, such as an AC outlet or DC power supply, and provides the power directly to a system DC / DC converter 22 (through a separate diode 12) and Is provided directly to the battery charger 14. During the time when the primary power source is not available, the battery 18 is connected to the system D via a separate diode 16.
It is connected to C / DC converter 22 and provides power. When a primary power source is available, the battery is isolated from the power input of the system DC / DC converter 22 by the reversed (reversely biased) diode 16. Further, when power is provided by the primary power source, the battery 18 is charged through the charger 14. This topology shown in FIG. 1 has the disadvantage that "a large and rapid voltage transient occurs at the node 25 which is the input of the system DC / DC converter 22".

FIG. 2 shows a buffer battery power supply 2.
FIG. 4 shows a simplified block diagram of the 0 ′ topology. The battery pack 18 includes the system DC / DC converter 2
2 are always connected to the inputs and provide the required power. When an external primary power source is available, an external input power adapter 10 supplies power to the battery charger 14. The external input power adapter 10 is intended to adapt the parameters of the primary source to the charger input requirements. The battery charger 14 provides a system DC / DC to charge the battery 18 or to maintain the voltage of a fully charged battery at an optimal level.
Power is supplied to both converter 22 and battery 18 in parallel. This "buffer battery topology"
Is the system DC / DC converter input (node 25)
To the normal battery pack voltage change and suppresses rapid voltage transients at this input. Further, if the power required by the system 24 temporarily exceeds the capacity of the input power adapter 10,
Both the input power adapter 10 and the battery 18
In parallel, power to system 24 is driven through converter 22. Unfortunately, however, the circuit 20 'shown in FIG. 2 provides a mechanism by which the power provided by the battery charger can be increased or decreased (based on preset limits or preset requests from the battery and / or system). Do not provide.

[0004] Similarly, U.S. Patent No. 5,698,
Issue 964 provides a battery charging circuit topology.
This circuit monitors the current from the AC adapter (ie, I _in ) to charge the battery, and adaptively utilizes all available current. System DC / D
The C converter is directly powered by the AC adapter after the AC adapter is connected. The battery is disconnected from the system. Thus, the voltage at the input of the system DC / DC converter remains a large transient (from the low voltage of the uncharged battery to the AC adapter voltage). The AC adapter voltage is always higher than the maximum charged battery voltage. Further, because the AC adapter output voltage can vary, the AC output to both the system (eg, portable electronic device) and the battery
No control is actually provided for the power delivered by the adapter. A similar topology is provided in US Pat. No. 5,723,970 to Bell. The topology has similar and / or additional disadvantages as described above.

Therefore, there is a need to provide a buffered battery power supply system that can control both the total output power and the power delivered to the battery. There is a further need to provide a system that significantly reduces voltage transients that occur in electronic devices and / or batteries.

[0006]

Accordingly, the present invention provides a buffer battery power supply system with feedback control of both the total output current sent by the battery charger circuit and the voltage sent to the battery. This solves the disadvantages mentioned above. Further, feedback control is provided based on the total output power (total output current x total output voltage) sent by the battery charger circuit.

[0007] In one embodiment of the present invention, a power supply system is provided that includes a charger circuit for generating a duty cycle. The duty cycle is for delivering power to the operating system and the battery.
A first feedback loop is provided to detect the total output current generated by the charger circuit, and a second feedback loop is provided to detect the current sent to the battery by the charger circuit. First
The feedback loop and the second feedback loop include an error circuit for generating an error signal to the charger circuit. The charger circuit regulates the duty cycle, thereby controlling the total output current delivered to the operating system and the battery based on the value of the error signal.

[0008] In another embodiment of the present invention, a power supply system is provided that includes an input power source and a charger circuit. The charger circuit is for generating a duty cycle to control an input power source to deliver controlled power to an operating system and a battery. A first feedback loop is provided to detect the total output current generated by the charger circuit. The first feedback loop generates a first error signal based on the total output current and the preset threshold total output current signal. A second feedback loop is provided to sense the current sent to the battery by the charger circuit. The second feedback loop generates a second error signal based on the current sent to the battery and the preset threshold battery current signal.
A third feedback loop is provided to detect the total output power generated by the charger circuit. The third feedback loop generates a third error signal based on the total output power and the preset threshold total output power signal. Using the first error signal, the second error signal, and the third error signal, the charger circuit adjusts the duty cycle. The duty cycle controls the total output current and the total output power sent to the operating system and the battery.

In a method form, the present invention provides a method for regulating the current delivered by a charger circuit to an operating system and a battery. The method includes detecting a first error signal based on a total output current of the charger circuit and a preset threshold total output current signal. The method also includes detecting a second error signal based on the current sent to the battery by the charger circuit and the preset threshold battery current signal. One of the first error signal or the second error signal is provided to the charger circuit as a feedback signal. The charger circuit adjusts the delivered current based on the first feedback error signal or the second feedback error signal.

[0010]

DETAILED DESCRIPTION OF THE INVENTION "While the following detailed description proceeds with reference to preferred embodiments and methods of use, the present invention is not intended to be limited to these preferred embodiments and methods of use. It will be understood by those skilled in the art. Rather, the invention is intended to be broad and limited only as set forth in the appended claims.

[0011] Other features and advantages of the present invention will become apparent as the following detailed description proceeds, and by reference to the drawings. In the drawings, like numbers represent like parts. The drawings are as follows. FIG. 1 is a block diagram of a prior art power supply circuit topology.
FIG. 2 is a block diagram of another prior art power supply circuit topology. FIG. 3 is a block diagram of a preferred embodiment of the power supply system of the present invention. FIG. 4 is a detailed circuit diagram of the embodiment of FIG. FIG. 5 is a detailed circuit diagram of another embodiment of the power supply system of the present invention. FIG.
6 is a detailed circuit diagram of an example of a current-voltage multiplication circuit provided in the embodiment of FIG. FIG. 7 is a detailed circuit diagram of another example of the current-voltage multiplication circuit provided in the embodiment of FIG.

FIG. 3 shows a block diagram of a preferred embodiment of the battery power system 30 according to the present invention. As described above, the battery pack 18 is always connected to the system DC / DC converter through the detection register 34. Preferably, register 34 is a very low value register and is intended to sense (with a very small voltage drop) current to and from battery 18. Battery charger 32 is connected to the system DC / DC converter input (node 25) through independent diode 12 and sense register 26. When the input power adapter 10 has an available primary power source and is connected to the system 30, the battery charger 32 provides the required power through the DC / DC converter 22 to the operating system 24. And at the same time, charge the battery 18. The battery charging current and the voltage on node 25 are:
It is regulated by the battery charger 32. The battery charging current is detected by the detection register 34.
Battery charger 32 uses a feedback connection from current sense register 34 and a feedback connection from node 25. Further, the total battery charger output current is sensed by sense register 26 and is limited to a safe value by using a feedback connection from sense register 26 to battery charger 32.
Battery charger 32 responds by reducing the charging current. The feedback connection via the sense registers 26, 34 will be described in more detail below.

Referring to FIG. 4, a detailed circuit diagram of the battery charger circuit 32 according to one embodiment of the present invention is shown. Switching MOS transistors 40, 42, Schottky diode 46, indicator 44, capacitor 48, and pulse width modulator 38 together form a controlled buck converter. In this embodiment, the duty cycle of the buck converter pulse cycle is controlled by the pulse width modulator 38 through at least three feedback loops. The three
The feedback loops include: I) a voltage loop provided around the error amplifier 60; II) a battery charging current loop using the battery charging current sensing amplifier 64 and the error amplifier 58; and III) an output current sensing amplifier 62.
And a total output current limiting loop incorporating the comparator 56. The diodes 50, 52, 54 ensure that "the largest negative value (ie, the diode with the largest reverse bias) passes to the PWM 38". This is the largest error measurement. Hence, providing control of the output parameter reaching the limit value.

When input power adapter 10 provides power to the charger input, pulse width modulator 38 begins to generate pulses that drive the gates of power MOS transistors 40,42. As a result, a voltage appears on the charger output. The duty cycle of the pulse depends on the feedback voltage received by PWM 38 from the feedback loop. As long as none of the set limits are exceeded, the duty cycle will increase. This, in turn, increases the output voltage of the buck converter. The set limits are preferably defined as preset inputs, as described below. When the output voltage of the buck converter exceeds the battery voltage, circuit 80 switches to the ON state, and the output voltage reaches node 25. This current is distributed between system DC / DC converter 22 and battery 18. The current flowing to the battery causes a voltage drop in the detection register 34. This voltage is applied to the sense amplifier 64
And is compared by the error amplifier 58 with the program value I _DAC . When the charging current exceeds the programmed value I _DAC , the output of the error amplifier 58 goes negative and flows through the diode 52 and reduces the PWM duty cycle (to keep the charging current at the programmed value). . Similarly, error amplifier 60
Compares the programmed value V _DAC the battery voltage, the charging voltage exceeds a programmed value V _DAC, the duty cycle of the buck converter is reduced. Similarly, the total output current of the buck converter produces a voltage drop on the sense register 26. This voltage drop is amplified by the sense amplifier 62 and compared with the preset value I _{out_max} by the error amplifier 56. When the total output current exceeds the preset value, the output of the error amplifier 56 becomes negative,
And the signal flows through the diode 50, and
The duty cycle is reduced (to keep the total output current at the preset limit). This decrease causes a decrease in battery charging current. As is known, since the internal resistance of the battery is low, the battery charging current is
It decreases very rapidly as the voltage decreases. Conversely, the current drawn by system DC / DC converter 22 is only slightly affected by this voltage change. Thus, while the battery charging current is decreasing, the total current I _{TOT at} node 25 is kept constant. Therefore, the current allocated to system DC / DC converter 22 is increased. The overall output current of the buck converter is
Up to a preset limit is assigned to the system 24.
In addition, if the system requires more power, the voltage will drop even more and the battery will
Couples with the buck converter when providing power. This feature allows the use of smaller and less expensive input power adapters.

Signal V _DAC is a programmed signal indicating the maximum voltage that can be safely sent to battery 18 (ie, the threshold value allowed by the battery for safe operation). The signal I _DAC is a programmed signal that indicates the maximum current that can be safely delivered to the battery 18 (ie, the threshold value allowed by the battery for safe operation). In some cases, (i.e., if the battery 18 is a so-called "smart battery" that provides a signal indicating the maximum allowable power of the battery 18), the battery 18 may have a signal V _DAC and a signal I _DAC. And are supplied in digital form. Therefore, as described above, for comparison purposes at error amplifiers 60 and 58, V
A D / A converter (not shown) is provided for converting the _DAC and the _IDAC into analog signals, respectively. other,
V _DAC and I _DAC can be generated by other programmable circuits (not shown), which are known in the art. Further, the reference signal I
_{out_max} is another preset threshold value.
The preset threshold value indicates the maximum allowable current that the PWM is allowed to send to prevent overcurrent from being sent by the charger circuit 32. I
_{out_max} can be generated by a voltage divider circuit (not shown) or other current generation circuit known in the art.

"In this embodiment, the diode 12
Should preferably be replaced with the circuit 80 ". Both diode 12 (FIG. 3) and circuit 80 provide reverse current from battery 18 to PWM.
To avoid reaching. However, "circuit 80
Circuit 80 has an additional advantage over diodes in that only a very small forward voltage is required to turn on the power supply. As a result, the circuit 80
It has only a very small voltage drop compared to a diode. Thus, circuit 80 causes very little loss in the system. The circuit 80 performs a process of interrupting a reverse current from the battery to the charger. Circuit 80
Includes a MOS transistor 70 having a body diode 72 incorporated therein. The MOS transistor 70 is driven by the comparator 66. Comparator 66
Are designed to have a limited positive offset. The offset is provided by a bias source 68. While the voltage on the MOS drain is negative with respect to the source of the MOS, the output of comparator 66 is "H" and MOS transistor 70 is off. When the MOS drain voltage exceeds the offset, the output of the comparator 66 becomes "L" and the MOS transistor 70 is turned on. As a result, circuit 80 behaves like a diode, with a very low forward voltage drop.

The power supply system shown in FIG. 4 limits the total output current of the buck converter. Since the buck converter output voltage depends on the battery voltage, for a fully charged battery, this output voltage limiting method forces the buck converter to deliver less power than the buck converter rating. Thus, in addition to controlling the parameters shown in FIG. 4, another solution is to control and limit the buck converter output power.

FIG. 5 shows a system 32 '. System 32 'is similar to the system of FIG. 4, but with an additional power limiting loop. The voltage drop in the detection register 26 is proportional to the total output current I _OUT and the output current detection amplifier 6
Applied to both 2 and multiplier 82. Also, the output voltage V _OUT is detected through a second connection to the multiplier.
By multiplying the total output current value by the output voltage value, multiplier 82 provides as its output a voltage PWR_OUT that is proportional to the output voltage. As in other loops, the PWR_OUT voltage is compared by comparator 84 to a set limit. The amplified error drives the pulse width modulator 38 through the diode 86. The function of this diode is similar to that of the other diodes 50, 52, 54 described above with reference to FIG.

An illustrative circuit 82 for multiplying the buck converter output current value and output voltage value is shown in FIG. The voltage drop in sense register 26 is applied to transconductance amplifier 88. This provides a current K × I _out . The current K × I _out is proportional to the voltage drop and, therefore, to the total output current. MOS transistor 90 divides this current with the same duty cycle as the buck converter. To that end, a duty signal is provided to the control line of transistor 90. The resulting current is integrated by an integrating circuit provided around the operational amplifier 92 using an integrated RC group 94. The output voltage of the integrator 92 is proportional to the total output power of the buck converter.

Another illustrative circuit 82 'for multiplying the output current value with the output voltage value is shown in FIG. This circuit is an amplifying differential stage
Based on well-known properties of The output voltage at such a stage is approximately proportional to the product of the common source current (I = k × V _out ) and the differential input voltage. The differential amplifier stages shown in FIG. 7 (each _tied to a reference voltage V _CC )
The common source transistors 98 and 100 are provided. The differential input is connected to the total current detection register 26. Therefore,
The output voltage provided by amplifier 96 is proportional to the buck converter output power.

Thus, it is clear that "a buffer battery power supply circuit is provided that satisfies the objects set forth herein." One of ordinary skill in the art will appreciate that "the present invention may be modified and / or interchanged, provided that such modifications and / or
Or all such exchanges are deemed to be within the scope of the invention as defined in the appended claims. "
You will understand that.

For example, while the preferred embodiments shown in FIGS. 4 and 5 specifically mention the use of controlled buck converter circuits, those skilled in the art will appreciate that "buck converter circuits are known in the art. Can be replaced with other controllable power supplies. " The other power supply is, for example, boost (boos
t) Including topologies and buck-boost topologies and other similar circuit topologies. Such topologies may also be derived from frequency width modulation (FWM) circuits and / or other switching topologies.

Other variations are possible. For example, diodes 50, 52, 54, 56 can be equivalently replaced with other reverse bias switches known in the art. The reverse bias switch includes, for example, a biased transistor circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram of a prior art power supply circuit topology.

FIG. 2 is a block diagram of another prior art power supply circuit topology.

FIG. 3 is a block diagram of a preferred embodiment of a power supply system of the present invention.

FIG. 4 is a detailed circuit diagram of the embodiment of FIG.

FIG. 5 is a detailed circuit diagram of another embodiment of the power supply system of the present invention.

FIG. 6 is a detailed circuit diagram of an example of a current-voltage multiplying circuit provided in the embodiment of FIG. 5;

FIG. 7 is a detailed circuit diagram of another example of the current-voltage multiplication circuit provided in the embodiment of FIG. 5;

[Explanation of symbols]

 10 Input Power Adapter 14 Battery Charger 18 Battery 22 System DC / DC Converter 24 Operating System 38 Pulse Width Modulator 82 Multiplier

 ──────────────────────────────────────────────────の Continuing on the front page (72) Inventor Vlad Popescu Stanesti United States 95130 California San Jose San Thomas Aquino Road # 5.1570 F term (reference) 5B011 DA06 DA13 DA13 DB01 DB04 EA10 GG06 5G003 AA01 BA01 CA01 CA11 CC02 DA07 DA15 DA18 GA01 GB03 5G015 FA12 GB02 HA15 JA06 JA34 JA35 JA55 5G065 BA01 BA02 BA03 DA02 DA04 DA06 EA02 EA06 GA06 HA04 JA01 KA02 KA05 LA01 LA02 MA08 MA09 MA10 NA02 FF03

Claims (28)

[Claims] 1. A charger circuit for generating a duty cycle for delivering power to an operating system and a battery; a first feedback loop for sensing a total output current generated by the charger circuit; A second feedback loop for detecting a current sent to the battery by a circuit, wherein the first feedback loop and the second feedback loop include an error circuit for generating an error signal to the charger circuit. And wherein the charger circuit adjusts the duty cycle to adjust a total output current sent to an operating system and a battery based on a value of the error signal. 2. The power supply system of claim 1, wherein the power supply system further comprises an input power source connected to the charger circuit. 3. The power supply system according to claim 1, wherein the charger circuit, the operation system, and the battery are connected in parallel. 4. The charger circuit comprises: a pulse width modulator (PW) connected to the input power source.
M) a circuit, wherein the PWM provides the duty cycle to adjust the input power source based on the error signal provided by the first feedback loop and the second feedback loop. The power supply system according to claim 2, wherein: 5. The first feedback loop includes: a detection register for detecting a total output current signal sent to the operation system; a first detection amplifier for amplifying the total output current signal; A first comparator for comparing the amplified total output current signal with a predetermined total output current threshold value to generate an error signal; and wherein the first error signal flows to the charger circuit. And a second switch for permitting the current signal, the second feedback loop includes a second detection register for detecting the current signal sent to the battery, and amplifying the current signal sent to the battery. A second sense amplifier for generating a second error signal, and amplifying the amplified current signal sent to the battery to a predetermined battery. A second comparator for comparing with a flow threshold value, and a second switch for allowing the second error signal to flow to the charger circuit, wherein the first switch and the second switch Are connected in parallel, and the largest signal of the first error signal and the second error signal is the first switch and the second switch as the error signal supplied to the charger circuit. The power supply system according to claim 1, wherein the power supply system is allowed to flow through the power supply. 6. The power supply system further comprises a third feedback loop, wherein the third feedback loop compares a battery voltage with a predetermined battery voltage threshold signal to generate a third error signal. And a third switch for allowing the third error signal to flow to the charger circuit, wherein the first switch, the second switch, and the third switch are connected to each other. Are connected in parallel, and the largest one of the first error signal, the second error signal, and the third error signal is the first switch as the error signal supplied to the charger circuit. The power supply system according to claim 5, wherein the power supply is permitted to flow through the second switch and the third switch. 7. The dc-power supply system for receiving the output current sent by the charger circuit and for sending power to the operating system.
The power supply system according to claim 1, further comprising a dc converter circuit. 8. The power supply system according to claim 1, wherein the power supply system further comprises a reverse current limiting circuit for limiting a current from flowing from the battery to the charger circuit. 9. The power supply system according to claim 8, wherein the reverse current limiting circuit includes a diode having a forward bias in a direction of the total output current. 10. The reverse current limiting circuit is a transistor, a comparator connected to an input line and an output line of the transistor, and generates a control signal connected to a control line of the transistor. And a voltage source for biasing the transistor to a positive state, wherein the transistor conducts when current flows from the input to the output. Feeding system. 11. The power supply system according to claim 5, wherein said predetermined total output current threshold value and said predetermined battery voltage threshold signal are generated by a programmable circuit. 12. The method of claim 1, wherein the predetermined total output current threshold value and the predetermined battery voltage threshold signal are generated by a voltage dividing circuit that divides a total output voltage and a voltage at the battery. The power supply system according to claim 6, wherein 13. The power supply system further comprises a power limiting feedback loop, the power limiting feedback loop for multiplying the total output current by a total output voltage to generate a total output power signal. A multiplier circuit; a power comparator for comparing the total output power signal with a predetermined power output threshold signal to generate a power output error signal; and wherein the power output error signal is transmitted to the charger circuit. A power switch for permitting the current to flow, wherein the first switch, the second switch, and the power switch are connected in parallel, the first error signal, the second error signal, and the power error The largest signal of the first switch and the second switch is the error signal supplied to the charger circuit. Power supply system according to claim 5, characterized in that it is allowed to flow through the said power switch and. 14. The multiplier circuit has a transconductance amplifier for generating a total current signal, the duty cycle as a control line input from the charger circuit, and is proportional to the total output power. A transistor for dividing the total output signal according to the duty cycle for multiplying the total output current by the output voltage to generate a power current signal, and an output voltage signal proportional to the total output power. 14. The power supply system according to claim 13, further comprising an integration circuit for generating the power. 15. The power supply system according to claim 13, wherein the multiplier circuit includes a differential amplifier circuit for generating an output voltage proportional to the total output power. 16. An input power source, a charger circuit for generating a duty cycle for controlling said input power source to deliver controlled power to an operating system and a battery, and A first feedback loop for detecting the generated total output current and generating a first error signal based on the total output current and a preset threshold total output current signal; and a current sent to the battery by the charger circuit. And a second feedback loop that generates a second error signal based on the current sent to the battery and a preset threshold battery current signal; anddetecting a total output power generated by the charger circuit, A third error is generated based on the total output power and a preset threshold total output power signal. A third feedback loop for generating a signal, wherein the charger circuit is configured to operate based on a value of the first error signal, a value of the second error signal, or a value of the third error signal. Adjusting the duty cycle for adjusting the total output current and the total output power sent to the power supply system. 17. The power supply system detects a voltage sent to the battery and generates a fourth error signal based on the voltage sent to the battery and a preset threshold battery voltage signal. An operating system based on a value of the first error signal, a value of the second error signal, a value of the third error signal, or a value of the fourth error signal. 17. The power supply system according to claim 16, wherein the duty cycle for adjusting a total output current and a total output power sent to a battery is adjusted. 18. The first feedback loop includes a first comparator for comparing the total output current with the preset threshold total output current signal, and the second feedback loop is sent to the battery. A second comparator for comparing the current with the preset threshold battery current signal, wherein the third feedback loop includes a second comparator for comparing the total output power with the preset threshold total output power signal. A third comparator, wherein the first comparator generates a first error signal, the second comparator generates a second error signal, and the third comparator generates a third error signal. The power supply system according to claim 16, wherein: 19. The first error signal, the second error signal, and the third error signal are supplied to a switch, and the switch outputs the first error signal, the second error signal, or the third error signal. The power supply system according to claim 16, wherein conduction is performed based on the largest signal among the signals. 20. The third feedback loop further comprises a multiplier circuit for multiplying the total output current by a total output voltage and generating a signal proportional to the total output power. The power supply system according to claim 18, wherein 21. The charger circuit comprising: a pulse width modulator (PW) connected to the input power source.
M) a circuit, comprising a pulse width modulator circuit that generates the duty cycle based on the first error signal, the second error signal, or the third error signal. 17. The power supply system according to claim 16. 22. The power supply system further includes a reverse current limiting circuit for limiting a current from flowing from the battery to the charger circuit, wherein the reverse current limiting circuit includes: a transistor; A comparator connected to an input line and an output line and for generating a control signal connected to a control line of the transistor; and a voltage source for biasing the transistor to a positive state. 17. The power supply system according to claim 16, comprising: when a current flows from the input to the output, the transistor conducts. 23. A method of adjusting the current delivered by a charger circuit to an operating system and a battery, the method comprising: a first error based on a total output current of the charger circuit and a total preset threshold output current. Detecting a second error signal based on the current sent to the battery by the charger circuit and a preset threshold battery current signal; and detecting the first error signal or the second error signal. Providing one of the signals as a feedback signal to the charger circuit, and adjusting the current delivered by the charger circuit based on the first feedback error signal or the second feedback error signal. A method comprising: 24. The method of claim 23, further comprising: detecting a third error signal based on the total output current and the total output voltage of the charger circuit; and detecting the first error signal, the second error signal, or the third error signal. Providing one of the error signals as a feedback signal to the charger circuit and transmitting the current and / or voltage sent by the charger circuit to the first feedback error signal or the second feedback error signal or the The method of claim 23, further comprising adjusting based on a third feedback error signal. 25. The method of claim 25, further comprising detecting a fourth error signal based on a voltage sent to the battery by the charger circuit and a preset threshold battery voltage signal, and detecting the first error signal or the second error signal. And providing one of the fourth error signal to the charger circuit as a feedback signal, and providing the current and / or voltage sent by the charger circuit to the first feedback error signal or the second feedback signal. The method of claim 23, further comprising adjusting based on an error signal or the fourth feedback error signal. 26. The method further comprises the step of multiplying the total output current and the total output voltage of the charger circuit to generate the third error signal, wherein the third error signal is 25. The method of claim 24, wherein said method is proportional to the total output power of said charger circuit. 27. The method of claim 23, wherein the method further comprises limiting reverse current flowing from the battery to the charger circuit. 28. The method of claim 27, further comprising: amplifying the total output current to generate the first error signal; and comparing the total output current with the preset threshold total output current signal. Amplifying the current sent by the charger circuit to the battery to generate an error signal;
24. The method of claim 23, further comprising comparing the current sent to the battery with the preset threshold battery current signal.